[qemu.git] / hw / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "memory.h"
#include "ioport.h"
#include "isa.h"
#include "fdc.h"
#include "net.h"
#include "memory.h"
#include "ioapic.h"

/* PC-style peripherals (also used by other machines).  */

/* serial.c */

SerialState *serial_init(int base, qemu_irq irq, int baudbase,
                         CharDriverState *chr);
SerialState *serial_mm_init(MemoryRegion *address_space,
                            target_phys_addr_t base, int it_shift,
                            qemu_irq irq, int baudbase,
                            CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
    ISADevice *dev;

    dev = isa_try_create("isa-serial");
    if (!dev) {
        return false;
    }
    qdev_prop_set_uint32(&dev->qdev, "index", index);
    qdev_prop_set_chr(&dev->qdev, "chardev", chr);
    if (qdev_init(&dev->qdev) < 0) {
        return false;
    }
    return true;
}

void serial_set_frequency(SerialState *s, uint32_t frequency);

/* parallel.c */
static inline bool parallel_init(int index, CharDriverState *chr)
{
    ISADevice *dev;

    dev = isa_try_create("isa-parallel");
    if (!dev) {
        return false;
    }
    qdev_prop_set_uint32(&dev->qdev, "index", index);
    qdev_prop_set_chr(&dev->qdev, "chardev", chr);
    if (qdev_init(&dev->qdev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

typedef struct PicState PicState;
extern PicState *isa_pic;
qemu_irq *i8259_init(qemu_irq parent_irq);
int pic_read_irq(PicState *s);
int pic_get_output(PicState *s);
void pic_info(Monitor *mon);
void irq_info(Monitor *mon);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* i8254.c */

#define PIT_FREQ 1193182

static inline ISADevice *pit_init(int base, int irq)
{
    ISADevice *dev;

    dev = isa_create("isa-pit");
    qdev_prop_set_uint32(&dev->qdev, "iobase", base);
    qdev_prop_set_uint32(&dev->qdev, "irq", irq);
    qdev_init_nofail(&dev->qdev);

    return dev;
}

void pit_set_gate(ISADevice *dev, int channel, int val);
int pit_get_gate(ISADevice *dev, int channel);
int pit_get_initial_count(ISADevice *dev, int channel);
int pit_get_mode(ISADevice *dev, int channel);
int pit_get_out(ISADevice *dev, int channel, int64_t current_time);

void hpet_pit_disable(void);
void hpet_pit_enable(void);

/* vmport.c */
static inline void vmport_init(void)
{
    isa_create_simple("vmport");
}
void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   target_phys_addr_t mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model);
void pc_memory_init(MemoryRegion *system_memory,
                    const char *kernel_filename,
                    const char *kernel_cmdline,
                    const char *initrd_filename,
                    ram_addr_t below_4g_mem_size,
                    ram_addr_t above_4g_mem_size,
                    MemoryRegion *rom_memory,
                    MemoryRegion **ram_memory);
qemu_irq *pc_allocate_cpu_irq(void);
void pc_vga_init(PCIBus *pci_bus);
void pc_basic_device_init(qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport);
void pc_init_ne2k_isa(NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

/* acpi.c */
extern int acpi_enabled;
extern char *acpi_tables;
extern size_t acpi_tables_len;

void acpi_bios_init(void);
int acpi_table_add(const char *table_desc);

/* acpi_piix.c */

i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                       qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
                       int kvm_enabled);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* pcspk.c */
void pcspk_init(ISADevice *pit);
int pcspk_audio_init(qemu_irq *pic);

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    target_phys_addr_t pci_hole_start,
                    target_phys_addr_t pci_hole_size,
                    target_phys_addr_t pci_hole64_start,
                    target_phys_addr_t pci_hole64_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

static inline int isa_vga_init(void)
{
    ISADevice *dev;

    dev = isa_try_create("isa-vga");
    if (!dev) {
        fprintf(stderr, "Warning: isa-vga not available\n");
        return 0;
    }
    qdev_init_nofail(&dev->qdev);
    return 1;
}

int pci_vga_init(PCIBus *bus);
int isa_vga_mm_init(target_phys_addr_t vram_base,
                    target_phys_addr_t ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* cirrus_vga.c */
void pci_cirrus_vga_init(PCIBus *bus);
void isa_cirrus_vga_init(MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
{
    ISADevice *dev;

    qemu_check_nic_model(nd, "ne2k_isa");

    dev = isa_try_create("ne2k_isa");
    if (!dev) {
        return false;
    }
    qdev_prop_set_uint32(&dev->qdev, "iobase", base);
    qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
    qdev_set_nic_properties(&dev->qdev, nd);
    qdev_init_nofail(&dev->qdev);
    return true;
}

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
00cb2a99	5	#include "memory.h"
35bed8ee	6	#include "ioport.h"
845773ab IY	7	#include "isa.h"
845773ab IY	8	#include "fdc.h"
cd1b8a8b	9	#include "net.h"
4aa63af1	10	#include "memory.h"
b881fbe9	11	#include "ioapic.h"
376253ec	12
87ecb68b PB	13	/* PC-style peripherals (also used by other machines). */
	14
	15	/* serial.c */
	16
b6cd0ea1 AJ	17	SerialState *serial_init(int base, qemu_irq irq, int baudbase,
b6cd0ea1 AJ	18	CharDriverState *chr);
39186d8a RH	19	SerialState serial_mm_init(MemoryRegion address_space,
	20	target_phys_addr_t base, int it_shift,
	21	qemu_irq irq, int baudbase,
	22	CharDriverState *chr, enum device_endian);
e22cf21e BS	23	static inline bool serial_isa_init(int index, CharDriverState *chr)
	24	{
	25	ISADevice *dev;
	26
9b13ef9f BS	27	dev = isa_try_create("isa-serial");
	28	if (!dev) {
	29	return false;
	30	}
e22cf21e BS	31	qdev_prop_set_uint32(&dev->qdev, "index", index);
	32	qdev_prop_set_chr(&dev->qdev, "chardev", chr);
	33	if (qdev_init(&dev->qdev) < 0) {
	34	return false;
	35	}
	36	return true;
	37	}
	38
038eaf82	39	void serial_set_frequency(SerialState *s, uint32_t frequency);
87ecb68b PB	40
87ecb68b PB	41	/* parallel.c */
defdb20e BS	42	static inline bool parallel_init(int index, CharDriverState *chr)
	43	{
	44	ISADevice *dev;
	45
73531538 BS	46	dev = isa_try_create("isa-parallel");
	47	if (!dev) {
	48	return false;
	49	}
defdb20e BS	50	qdev_prop_set_uint32(&dev->qdev, "index", index);
	51	qdev_prop_set_chr(&dev->qdev, "chardev", chr);
	52	if (qdev_init(&dev->qdev) < 0) {
	53	return false;
	54	}
	55	return true;
	56	}
	57
	58	bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
	59	CharDriverState *chr);
87ecb68b PB	60
	61	/* i8259.c */
	62
c17725f4 JK	63	typedef struct PicState PicState;
c17725f4 JK	64	extern PicState *isa_pic;
87ecb68b	65	qemu_irq *i8259_init(qemu_irq parent_irq);
c17725f4 JK	66	int pic_read_irq(PicState *s);
c17725f4 JK	67	int pic_get_output(PicState *s);
376253ec AL	68	void pic_info(Monitor *mon);
376253ec AL	69	void irq_info(Monitor *mon);
87ecb68b	70
b881fbe9	71	/* Global System Interrupts */
96051119	72
b881fbe9	73	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	74
b881fbe9	75	typedef struct GSIState {
43a0db35	76	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	77	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	78	} GSIState;
	79
	80	void gsi_handler(void *opaque, int n, int level);
845773ab	81
87ecb68b PB	82	/* i8254.c */
	83
	84	#define PIT_FREQ 1193182
	85
64d7e9a4 BS	86	static inline ISADevice *pit_init(int base, int irq)
	87	{
	88	ISADevice *dev;
	89
	90	dev = isa_create("isa-pit");
	91	qdev_prop_set_uint32(&dev->qdev, "iobase", base);
	92	qdev_prop_set_uint32(&dev->qdev, "irq", irq);
	93	qdev_init_nofail(&dev->qdev);
	94
	95	return dev;
	96	}
87ecb68b	97
64d7e9a4 BS	98	void pit_set_gate(ISADevice *dev, int channel, int val);
	99	int pit_get_gate(ISADevice *dev, int channel);
	100	int pit_get_initial_count(ISADevice *dev, int channel);
	101	int pit_get_mode(ISADevice *dev, int channel);
	102	int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
87ecb68b	103
bf4f74c0 AJ	104	void hpet_pit_disable(void);
	105	void hpet_pit_enable(void);
	106
87ecb68b	107	/* vmport.c */
6872ef61 BS	108	static inline void vmport_init(void)
	109	{
	110	isa_create_simple("vmport");
	111	}
87ecb68b	112	void vmport_register(unsigned char command, IOPortReadFunc func, void opaque);
86d86414 BS	113	void vmmouse_get_data(uint32_t *data);
86d86414 BS	114	void vmmouse_set_data(const uint32_t *data);
87ecb68b	115
87ecb68b PB	116	/* pckbd.c */
	117
	118	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	119	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	120	MemoryRegion *region, ram_addr_t size,
c227f099	121	target_phys_addr_t mask);
956a3e6b BS	122	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	123	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	124
87ecb68b PB	125	/* pc.c */
	126	extern int fd_bootchk;
	127
8e78eb28	128	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	129	void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
	130	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
	131
	132	void pc_cpus_init(const char *cpu_model);
4aa63af1 AK	133	void pc_memory_init(MemoryRegion *system_memory,
4aa63af1 AK	134	const char *kernel_filename,
845773ab IY	135	const char *kernel_cmdline,
845773ab IY	136	const char *initrd_filename,
e0e7e67b	137	ram_addr_t below_4g_mem_size,
ae0a5466	138	ram_addr_t above_4g_mem_size,
4463aee6	139	MemoryRegion *rom_memory,
ae0a5466	140	MemoryRegion **ram_memory);
845773ab IY	141	qemu_irq *pc_allocate_cpu_irq(void);
845773ab IY	142	void pc_vga_init(PCIBus *pci_bus);
b881fbe9	143	void pc_basic_device_init(qemu_irq *gsi,
1611977c	144	ISADevice **rtc_state,
34d4260e	145	ISADevice **floppy,
1611977c	146	bool no_vmport);
845773ab	147	void pc_init_ne2k_isa(NICInfo *nd);
845773ab	148	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	149	const char *boot_device,
34d4260e	150	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	151	ISADevice *s);
845773ab	152	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	153
f885f1ea IY	154	typedef void (cpu_set_smm_t)(int smm, void arg);
	155	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	156
87ecb68b PB	157	/* acpi.c */
87ecb68b PB	158	extern int acpi_enabled;
80deece2 BS	159	extern char *acpi_tables;
	160	extern size_t acpi_tables_len;
	161
9d5e77a2 IY	162	void acpi_bios_init(void);
	163	int acpi_table_add(const char *table_desc);
	164
	165	/* acpi_piix.c */
53b67b30	166
cf7a2fe2	167	i2c_bus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
53b67b30 BS	168	qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
53b67b30 BS	169	int kvm_enabled);
87ecb68b	170	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	171
16b29ae1 AL	172	/* hpet.c */
	173	extern int no_hpet;
	174
87ecb68b	175	/* pcspk.c */
64d7e9a4	176	void pcspk_init(ISADevice *pit);
22d83b14	177	int pcspk_audio_init(qemu_irq *pic);
87ecb68b PB	178
87ecb68b PB	179	/* piix_pci.c */
0a3bacf3 JQ	180	struct PCII440FXState;
	181	typedef struct PCII440FXState PCII440FXState;
	182
1e39101c	183	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
aee97b84 AK	184	qemu_irq *pic,
	185	MemoryRegion *address_space_mem,
	186	MemoryRegion *address_space_io,
ae0a5466 AK	187	ram_addr_t ram_size,
	188	target_phys_addr_t pci_hole_start,
	189	target_phys_addr_t pci_hole_size,
	190	target_phys_addr_t pci_hole64_start,
	191	target_phys_addr_t pci_hole64_size,
	192	MemoryRegion *pci_memory,
	193	MemoryRegion *ram_memory);
87ecb68b	194
823e675a	195	/* piix4.c */
b1d8e52e	196	extern PCIDevice *piix4_dev;
87ecb68b PB	197	int piix4_init(PCIBus *bus, int devfn);
	198
	199	/* vga.c */
cb5a7aa8	200	enum vga_retrace_method {
	201	VGA_RETRACE_DUMB,
	202	VGA_RETRACE_PRECISE
	203	};
	204
	205	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	206
7435b791 BS	207	static inline int isa_vga_init(void)
7435b791 BS	208	{
c74b88df	209	ISADevice *dev;
7435b791	210
c74b88df BS	211	dev = isa_try_create("isa-vga");
	212	if (!dev) {
	213	fprintf(stderr, "Warning: isa-vga not available\n");
	214	return 0;
	215	}
	216	qdev_init_nofail(&dev->qdev);
	217	return 1;
7435b791 BS	218	}
7435b791 BS	219
78895427	220	int pci_vga_init(PCIBus *bus);
c227f099	221	int isa_vga_mm_init(target_phys_addr_t vram_base,
be20f9e9 AK	222	target_phys_addr_t ctrl_base, int it_shift,
be20f9e9 AK	223	MemoryRegion *address_space);
87ecb68b PB	224
87ecb68b PB	225	/* cirrus_vga.c */
fbe1b595	226	void pci_cirrus_vga_init(PCIBus *bus);
be20f9e9	227	void isa_cirrus_vga_init(MemoryRegion *address_space);
87ecb68b	228
87ecb68b	229	/* ne2000.c */
cd1b8a8b	230	static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
60a14ad3 BS	231	{
60a14ad3 BS	232	ISADevice *dev;
87ecb68b	233
60a14ad3 BS	234	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	235
cd1b8a8b BS	236	dev = isa_try_create("ne2k_isa");
	237	if (!dev) {
	238	return false;
	239	}
60a14ad3 BS	240	qdev_prop_set_uint32(&dev->qdev, "iobase", base);
	241	qdev_prop_set_uint32(&dev->qdev, "irq", irq);
	242	qdev_set_nic_properties(&dev->qdev, nd);
	243	qdev_init_nofail(&dev->qdev);
cd1b8a8b	244	return true;
60a14ad3	245	}
87ecb68b	246
4c5b10b7 JS	247	/* e820 types */
	248	#define E820_RAM 1
	249	#define E820_RESERVED 2
	250	#define E820_ACPI 3
	251	#define E820_NVS 4
	252	#define E820_UNUSABLE 5
	253
	254	int e820_add_entry(uint64_t, uint64_t, uint32_t);
	255
87ecb68b	256	#endif