]> Git Repo - qemu.git/blame - target/s390x/cpu.c
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[qemu.git] / target / s390x / cpu.c
CommitLineData
29e4bcb2
AF
1/*
2 * QEMU S/390 CPU
3 *
1ac1a749
AF
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
29e4bcb2 6 * Copyright (c) 2012 SUSE LINUX Products GmbH
70bada03 7 * Copyright (c) 2012 IBM Corp.
29e4bcb2 8 *
44699e1c
TH
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
29e4bcb2 13 *
44699e1c 14 * This program is distributed in the hope that it will be useful,
29e4bcb2
AF
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
44699e1c 17 * General Public License for more details.
29e4bcb2 18 *
44699e1c
TH
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
29e4bcb2
AF
21 */
22
9615495a 23#include "qemu/osdep.h"
da34e65c 24#include "qapi/error.h"
564b863d 25#include "cpu.h"
4e58b838 26#include "internal.h"
f16bbb9b
DH
27#include "kvm_s390x.h"
28#include "sysemu/kvm.h"
71e8a915 29#include "sysemu/reset.h"
1de7afc9 30#include "qemu/timer.h"
eb24f7c6 31#include "qemu/error-report.h"
0b8fa32f 32#include "qemu/module.h"
eb24f7c6 33#include "trace.h"
96b1a8bb 34#include "qapi/visitor.h"
8ac25c84 35#include "qapi/qapi-types-machine.h"
112ed241 36#include "qapi/qapi-visit-run-state.h"
4ada99ad 37#include "sysemu/hw_accel.h"
ca5c1457 38#include "hw/qdev-properties.h"
c7396bbb 39#ifndef CONFIG_USER_ONLY
c3347ed0 40#include "hw/s390x/pv.h"
ae71ed86 41#include "hw/boards.h"
904e5fd5 42#include "sysemu/arch_init.h"
96b1a8bb 43#include "sysemu/sysemu.h"
14a48c1d 44#include "sysemu/tcg.h"
904e5fd5 45#endif
5f8ab000 46#include "fpu/softfloat-helpers.h"
3d562845 47#include "disas/capstone.h"
904e5fd5 48
70bada03
JF
49#define CR0_RESET 0xE0UL
50#define CR14_RESET 0xC2000000UL;
51
f45748f1
AF
52static void s390_cpu_set_pc(CPUState *cs, vaddr value)
53{
54 S390CPU *cpu = S390_CPU(cs);
55
56 cpu->env.psw.addr = value;
57}
58
8c2e1b00
AF
59static bool s390_cpu_has_work(CPUState *cs)
60{
61 S390CPU *cpu = S390_CPU(cs);
8c2e1b00 62
4beab671 63 /* STOPPED cpus can never wake up */
9d0306df
VM
64 if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD &&
65 s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) {
4beab671
DH
66 return false;
67 }
68
8417f904
DH
69 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
70 return false;
71 }
72
73 return s390_cpu_has_int(cpu);
8c2e1b00
AF
74}
75
29c6157c
CB
76#if !defined(CONFIG_USER_ONLY)
77/* S390CPUClass::load_normal() */
78static void s390_cpu_load_normal(CPUState *s)
79{
80 S390CPU *cpu = S390_CPU(s);
59181010
JF
81 uint64_t spsw;
82
83 if (!s390_is_pv()) {
84 spsw = ldq_phys(s->as, 0);
85 cpu->env.psw.mask = spsw & PSW_MASK_SHORT_CTRL;
86 /*
87 * Invert short psw indication, so SIE will report a specification
88 * exception if it was not set.
89 */
90 cpu->env.psw.mask ^= PSW_MASK_SHORTPSW;
91 cpu->env.psw.addr = spsw & PSW_MASK_SHORT_ADDR;
92 } else {
93 /*
94 * Firmware requires us to set the load state before we set
95 * the cpu to operating on protected guests.
96 */
97 s390_cpu_set_state(S390_CPU_STATE_LOAD, cpu);
98 }
9d0306df 99 s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
29c6157c
CB
100}
101#endif
102
eac4f827
JF
103/* S390CPUClass::reset() */
104static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
29e4bcb2
AF
105{
106 S390CPU *cpu = S390_CPU(s);
107 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
108 CPUS390XState *env = &cpu->env;
781c67ca 109 DeviceState *dev = DEVICE(s);
29e4bcb2 110
781c67ca 111 scc->parent_reset(dev);
18ff9494 112 cpu->env.sigp_order = 0;
9d0306df 113 s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
eac4f827
JF
114
115 switch (type) {
eb8adcc3
JF
116 case S390_CPU_RESET_CLEAR:
117 memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields));
118 /* fall through */
81b92223
JF
119 case S390_CPU_RESET_INITIAL:
120 /* initial reset does not clear everything! */
121 memset(&env->start_initial_reset_fields, 0,
e893baee 122 offsetof(CPUS390XState, start_normal_reset_fields) -
81b92223
JF
123 offsetof(CPUS390XState, start_initial_reset_fields));
124
125 /* architectured initial value for Breaking-Event-Address register */
126 env->gbea = 1;
127
128 /* architectured initial values for CR 0 and 14 */
129 env->cregs[0] = CR0_RESET;
130 env->cregs[14] = CR14_RESET;
131
eb8adcc3
JF
132#if defined(CONFIG_USER_ONLY)
133 /* user mode should always be allowed to use the full FPU */
134 env->cregs[0] |= CR0_AFP;
135 if (s390_has_feat(S390_FEAT_VECTOR)) {
136 env->cregs[0] |= CR0_VECTOR;
137 }
138#endif
139
81b92223
JF
140 /* tininess for underflow is detected before rounding */
141 set_float_detect_tininess(float_tininess_before_rounding,
142 &env->fpu_status);
143 /* fall through */
eac4f827 144 case S390_CPU_RESET_NORMAL:
e893baee
JF
145 env->psw.mask &= ~PSW_MASK_RI;
146 memset(&env->start_normal_reset_fields, 0,
147 offsetof(CPUS390XState, end_reset_fields) -
148 offsetof(CPUS390XState, start_normal_reset_fields));
149
eac4f827
JF
150 env->pfault_token = -1UL;
151 env->bpbc = false;
152 break;
153 default:
154 g_assert_not_reached();
155 }
4a33565f 156
49f5c9e9 157 /* Reset state inside the kernel that we cannot access yet from QEMU. */
b91a0394
JF
158 if (kvm_enabled()) {
159 switch (type) {
160 case S390_CPU_RESET_CLEAR:
161 kvm_s390_reset_vcpu_clear(cpu);
162 break;
163 case S390_CPU_RESET_INITIAL:
164 kvm_s390_reset_vcpu_initial(cpu);
165 break;
166 case S390_CPU_RESET_NORMAL:
167 kvm_s390_reset_vcpu_normal(cpu);
168 break;
169 }
49f5c9e9 170 }
f5ae2a4f
CB
171}
172
70bada03
JF
173#if !defined(CONFIG_USER_ONLY)
174static void s390_cpu_machine_reset_cb(void *opaque)
175{
176 S390CPU *cpu = opaque;
177
14e6fe12 178 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
70bada03
JF
179}
180#endif
181
dbad6b74
PC
182static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
183{
184 info->mach = bfd_mach_s390_64;
185 info->print_insn = print_insn_s390;
3d562845
RH
186 info->cap_arch = CS_ARCH_SYSZ;
187 info->cap_insn_unit = 2;
188 info->cap_insn_split = 6;
dbad6b74
PC
189}
190
1f136632
AF
191static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
192{
14a10fc3 193 CPUState *cs = CPU(dev);
1f136632 194 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
1e70ba24 195#if !defined(CONFIG_USER_ONLY)
c6644fc8 196 S390CPU *cpu = S390_CPU(dev);
1e70ba24 197#endif
c6644fc8
MR
198 Error *err = NULL;
199
41868f84
DH
200 /* the model has to be realized before qemu_init_vcpu() due to kvm */
201 s390_realize_cpu_model(cs, &err);
202 if (err) {
203 goto out;
204 }
205
96b1a8bb 206#if !defined(CONFIG_USER_ONLY)
ae71ed86
LX
207 MachineState *ms = MACHINE(qdev_get_machine());
208 unsigned int max_cpus = ms->smp.max_cpus;
ca5c1457
DH
209 if (cpu->env.core_id >= max_cpus) {
210 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
211 ", maximum core-id: %d", cpu->env.core_id,
212 max_cpus - 1);
96b1a8bb
MR
213 goto out;
214 }
88556edd 215
ca5c1457
DH
216 if (cpu_exists(cpu->env.core_id)) {
217 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
218 ", it already exists", cpu->env.core_id);
96b1a8bb
MR
219 goto out;
220 }
96b1a8bb 221
ca5c1457 222 /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */
1e70ba24
DH
223 cs->cpu_index = cpu->env.core_id;
224#endif
225
ce5b1bbf 226 cpu_exec_realizefn(cs, &err);
c6644fc8 227 if (err != NULL) {
96b1a8bb 228 goto out;
c6644fc8 229 }
1f136632 230
c6644fc8
MR
231#if !defined(CONFIG_USER_ONLY)
232 qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
233#endif
73d510c9 234 s390_cpu_gdb_init(cs);
14a10fc3 235 qemu_init_vcpu(cs);
d66b43c8
DH
236
237 /*
238 * KVM requires the initial CPU reset ioctl to be executed on the target
239 * CPU thread. CPU hotplug under single-threaded TCG will not work with
240 * run_on_cpu(), as run_on_cpu() will not work properly if called while
241 * the main thread is already running but the CPU hasn't been realized.
242 */
243 if (kvm_enabled()) {
244 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
245 } else {
246 cpu_reset(cs);
247 }
1f136632 248
96b1a8bb 249 scc->parent_realize(dev, &err);
96b1a8bb
MR
250out:
251 error_propagate(errp, err);
252}
253
6b4bf66e 254#if !defined(CONFIG_USER_ONLY)
4ada99ad
CB
255static GuestPanicInformation *s390_cpu_get_crash_info(CPUState *cs)
256{
257 GuestPanicInformation *panic_info;
258 S390CPU *cpu = S390_CPU(cs);
259
260 cpu_synchronize_state(cs);
261 panic_info = g_malloc0(sizeof(GuestPanicInformation));
262
263 panic_info->type = GUEST_PANIC_INFORMATION_TYPE_S390;
4ada99ad 264 panic_info->u.s390.core = cpu->env.core_id;
4ada99ad
CB
265 panic_info->u.s390.psw_mask = cpu->env.psw.mask;
266 panic_info->u.s390.psw_addr = cpu->env.psw.addr;
267 panic_info->u.s390.reason = cpu->env.crash_reason;
268
269 return panic_info;
270}
271
272static void s390_cpu_get_crash_info_qom(Object *obj, Visitor *v,
273 const char *name, void *opaque,
274 Error **errp)
275{
276 CPUState *cs = CPU(obj);
277 GuestPanicInformation *panic_info;
278
279 if (!cs->crash_occurred) {
280 error_setg(errp, "No crash occurred");
281 return;
282 }
283
284 panic_info = s390_cpu_get_crash_info(cs);
285
286 visit_type_GuestPanicInformation(v, "crash-information", &panic_info,
287 errp);
288 qapi_free_GuestPanicInformation(panic_info);
289}
6b4bf66e 290#endif
4ada99ad 291
8f22e0df
AF
292static void s390_cpu_initfn(Object *obj)
293{
c05efcb1 294 CPUState *cs = CPU(obj);
8f22e0df 295 S390CPU *cpu = S390_CPU(obj);
8f22e0df 296
7506ed90 297 cpu_set_cpustate_pointers(cpu);
ef3027af 298 cs->exception_index = EXCP_HLT;
6b4bf66e 299#if !defined(CONFIG_USER_ONLY)
86c5e6ab 300 cs->start_powered_off = true;
4ada99ad 301 object_property_add(obj, "crash-information", "GuestPanicInformation",
d2623129 302 s390_cpu_get_crash_info_qom, NULL, NULL, NULL);
7506ed90
RH
303 cpu->env.tod_timer =
304 timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
305 cpu->env.cpu_timer =
306 timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
9d0306df 307 s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
8f22e0df 308#endif
8f22e0df
AF
309}
310
d5627ce8
AF
311static void s390_cpu_finalize(Object *obj)
312{
313#if !defined(CONFIG_USER_ONLY)
314 S390CPU *cpu = S390_CPU(obj);
315
c7454f05 316 timer_free(cpu->env.tod_timer);
c7454f05
GQ
317 timer_free(cpu->env.cpu_timer);
318
d5627ce8 319 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
3cda44f7 320 g_free(cpu->irqstate);
d5627ce8
AF
321#endif
322}
323
75973bfe 324#if !defined(CONFIG_USER_ONLY)
eb24f7c6
DH
325static bool disabled_wait(CPUState *cpu)
326{
327 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
328 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
329}
330
75973bfe
DH
331static unsigned s390_count_running_cpus(void)
332{
333 CPUState *cpu;
334 int nr_running = 0;
335
336 CPU_FOREACH(cpu) {
337 uint8_t state = S390_CPU(cpu)->env.cpu_state;
9d0306df
VM
338 if (state == S390_CPU_STATE_OPERATING ||
339 state == S390_CPU_STATE_LOAD) {
eb24f7c6
DH
340 if (!disabled_wait(cpu)) {
341 nr_running++;
342 }
75973bfe
DH
343 }
344 }
345
346 return nr_running;
347}
348
eb24f7c6 349unsigned int s390_cpu_halt(S390CPU *cpu)
75973bfe
DH
350{
351 CPUState *cs = CPU(cpu);
eb24f7c6 352 trace_cpu_halt(cs->cpu_index);
75973bfe 353
eb24f7c6
DH
354 if (!cs->halted) {
355 cs->halted = 1;
356 cs->exception_index = EXCP_HLT;
75973bfe 357 }
eb24f7c6
DH
358
359 return s390_count_running_cpus();
75973bfe
DH
360}
361
eb24f7c6 362void s390_cpu_unhalt(S390CPU *cpu)
75973bfe
DH
363{
364 CPUState *cs = CPU(cpu);
eb24f7c6 365 trace_cpu_unhalt(cs->cpu_index);
75973bfe 366
eb24f7c6
DH
367 if (cs->halted) {
368 cs->halted = 0;
369 cs->exception_index = -1;
370 }
371}
372
373unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
374 {
375 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
376
377 switch (cpu_state) {
9d0306df
VM
378 case S390_CPU_STATE_STOPPED:
379 case S390_CPU_STATE_CHECK_STOP:
eb24f7c6
DH
380 /* halt the cpu for common infrastructure */
381 s390_cpu_halt(cpu);
382 break;
9d0306df
VM
383 case S390_CPU_STATE_OPERATING:
384 case S390_CPU_STATE_LOAD:
741a4ec1
DH
385 /*
386 * Starting a CPU with a PSW WAIT bit set:
387 * KVM: handles this internally and triggers another WAIT exit.
388 * TCG: will actually try to continue to run. Don't unhalt, will
389 * be done when the CPU actually has work (an interrupt).
390 */
391 if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) {
392 s390_cpu_unhalt(cpu);
393 }
eb24f7c6
DH
394 break;
395 default:
396 error_report("Requested CPU state is not a valid S390 CPU state: %u",
397 cpu_state);
398 exit(1);
75973bfe 399 }
c9e659c9
DH
400 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
401 kvm_s390_set_cpu_state(cpu, cpu_state);
402 }
eb24f7c6 403 cpu->env.cpu_state = cpu_state;
75973bfe
DH
404
405 return s390_count_running_cpus();
406}
b6089b05 407
b6089b05
DH
408int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit)
409{
410 if (kvm_enabled()) {
411 return kvm_s390_set_mem_limit(new_limit, hw_limit);
412 }
413 return 0;
414}
9138977b
DH
415
416void s390_set_max_pagesize(uint64_t pagesize, Error **errp)
417{
418 if (kvm_enabled()) {
419 kvm_s390_set_max_pagesize(pagesize, errp);
420 }
421}
b6089b05
DH
422
423void s390_cmma_reset(void)
424{
425 if (kvm_enabled()) {
426 kvm_s390_cmma_reset();
427 }
428}
429
b6089b05
DH
430int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id,
431 int vq, bool assign)
432{
433 if (kvm_enabled()) {
434 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
435 } else {
436 return 0;
437 }
438}
439
440void s390_crypto_reset(void)
441{
442 if (kvm_enabled()) {
443 kvm_s390_crypto_reset();
444 }
445}
446
5e7164c5
DH
447void s390_enable_css_support(S390CPU *cpu)
448{
449 if (kvm_enabled()) {
450 kvm_s390_enable_css_support(cpu);
451 }
452}
e2c6cd56
CW
453
454void s390_do_cpu_set_diag318(CPUState *cs, run_on_cpu_data arg)
455{
456 if (kvm_enabled()) {
457 kvm_s390_set_diag318(cs, arg.host_ulong);
458 }
459}
75973bfe
DH
460#endif
461
b3820e6c
DH
462static gchar *s390_gdb_arch_name(CPUState *cs)
463{
464 return g_strdup("s390:64-bit");
465}
466
ca5c1457 467static Property s390x_cpu_properties[] = {
1e70ba24 468#if !defined(CONFIG_USER_ONLY)
ca5c1457 469 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
1e70ba24 470#endif
ca5c1457
DH
471 DEFINE_PROP_END_OF_LIST()
472};
473
781c67ca 474static void s390_cpu_reset_full(DeviceState *dev)
eb8adcc3 475{
781c67ca 476 CPUState *s = CPU(dev);
eb8adcc3
JF
477 return s390_cpu_reset(s, S390_CPU_RESET_CLEAR);
478}
479
78271684
CF
480#ifdef CONFIG_TCG
481#include "hw/core/tcg-cpu-ops.h"
482
483static struct TCGCPUOps s390_tcg_ops = {
484 .initialize = s390x_translate_init,
485 .tlb_fill = s390_cpu_tlb_fill,
486
487#if !defined(CONFIG_USER_ONLY)
488 .cpu_exec_interrupt = s390_cpu_exec_interrupt,
489 .do_interrupt = s390_cpu_do_interrupt,
490 .debug_excp_handler = s390x_cpu_debug_excp_handler,
491 .do_unaligned_access = s390x_cpu_do_unaligned_access,
492#endif /* !CONFIG_USER_ONLY */
493};
494#endif /* CONFIG_TCG */
495
29e4bcb2
AF
496static void s390_cpu_class_init(ObjectClass *oc, void *data)
497{
498 S390CPUClass *scc = S390_CPU_CLASS(oc);
499 CPUClass *cc = CPU_CLASS(scc);
c7396bbb 500 DeviceClass *dc = DEVICE_CLASS(oc);
29e4bcb2 501
bf853881
PMD
502 device_class_set_parent_realize(dc, s390_cpu_realizefn,
503 &scc->parent_realize);
4f67d30b 504 device_class_set_props(dc, s390x_cpu_properties);
0347ab84 505 dc->user_creatable = true;
1f136632 506
781c67ca 507 device_class_set_parent_reset(dc, s390_cpu_reset_full, &scc->parent_reset);
29c6157c
CB
508#if !defined(CONFIG_USER_ONLY)
509 scc->load_normal = s390_cpu_load_normal;
510#endif
eac4f827 511 scc->reset = s390_cpu_reset;
41868f84 512 cc->class_by_name = s390_cpu_class_by_name,
8c2e1b00 513 cc->has_work = s390_cpu_has_work;
878096ee 514 cc->dump_state = s390_cpu_dump_state;
f45748f1 515 cc->set_pc = s390_cpu_set_pc;
5b50e790
AF
516 cc->gdb_read_register = s390_cpu_gdb_read_register;
517 cc->gdb_write_register = s390_cpu_gdb_write_register;
82851985 518#ifndef CONFIG_USER_ONLY
00b941e5 519 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
ef1df130 520 cc->vmsd = &vmstate_s390_cpu;
6b4bf66e 521 cc->get_crash_info = s390_cpu_get_crash_info;
9b4f38e1 522 cc->write_elf64_note = s390_cpu_write_elf64_note;
00b941e5 523#endif
dbad6b74 524 cc->disas_set_info = s390_cpu_disas_set_info;
73d510c9
DH
525 cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
526 cc->gdb_core_xml_file = "s390x-core64.xml";
b3820e6c 527 cc->gdb_arch_name = s390_gdb_arch_name;
4c315c27 528
6efadc90 529 s390_cpu_model_class_register_props(oc);
78271684
CF
530
531#ifdef CONFIG_TCG
532 cc->tcg_ops = &s390_tcg_ops;
533#endif /* CONFIG_TCG */
29e4bcb2
AF
534}
535
536static const TypeInfo s390_cpu_type_info = {
537 .name = TYPE_S390_CPU,
538 .parent = TYPE_CPU,
539 .instance_size = sizeof(S390CPU),
f62192a2 540 .instance_align = __alignof__(S390CPU),
8f22e0df 541 .instance_init = s390_cpu_initfn,
d5627ce8 542 .instance_finalize = s390_cpu_finalize,
41868f84 543 .abstract = true,
29e4bcb2
AF
544 .class_size = sizeof(S390CPUClass),
545 .class_init = s390_cpu_class_init,
546};
547
548static void s390_cpu_register_types(void)
549{
550 type_register_static(&s390_cpu_type_info);
551}
552
553type_init(s390_cpu_register_types)
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