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Commit | Line | Data |
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29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 | 8 | * |
44699e1c TH |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
29e4bcb2 | 13 | * |
44699e1c | 14 | * This program is distributed in the hope that it will be useful, |
29e4bcb2 AF |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
44699e1c | 17 | * General Public License for more details. |
29e4bcb2 | 18 | * |
44699e1c TH |
19 | * You should have received a copy of the GNU General Public License |
20 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
29e4bcb2 AF |
21 | */ |
22 | ||
9615495a | 23 | #include "qemu/osdep.h" |
da34e65c | 24 | #include "qapi/error.h" |
564b863d | 25 | #include "cpu.h" |
4e58b838 | 26 | #include "internal.h" |
f16bbb9b DH |
27 | #include "kvm_s390x.h" |
28 | #include "sysemu/kvm.h" | |
29e4bcb2 | 29 | #include "qemu-common.h" |
1de7afc9 | 30 | #include "qemu/timer.h" |
eb24f7c6 | 31 | #include "qemu/error-report.h" |
eb24f7c6 | 32 | #include "trace.h" |
96b1a8bb | 33 | #include "qapi/visitor.h" |
112ed241 MA |
34 | #include "qapi/qapi-visit-misc.h" |
35 | #include "qapi/qapi-visit-run-state.h" | |
4ada99ad | 36 | #include "sysemu/hw_accel.h" |
ca5c1457 | 37 | #include "hw/qdev-properties.h" |
c7396bbb | 38 | #ifndef CONFIG_USER_ONLY |
741da0d3 | 39 | #include "hw/hw.h" |
904e5fd5 | 40 | #include "sysemu/arch_init.h" |
96b1a8bb | 41 | #include "sysemu/sysemu.h" |
904e5fd5 | 42 | #endif |
24f91e81 | 43 | #include "fpu/softfloat.h" |
904e5fd5 | 44 | |
70bada03 JF |
45 | #define CR0_RESET 0xE0UL |
46 | #define CR14_RESET 0xC2000000UL; | |
47 | ||
f45748f1 AF |
48 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
49 | { | |
50 | S390CPU *cpu = S390_CPU(cs); | |
51 | ||
52 | cpu->env.psw.addr = value; | |
53 | } | |
54 | ||
8c2e1b00 AF |
55 | static bool s390_cpu_has_work(CPUState *cs) |
56 | { | |
57 | S390CPU *cpu = S390_CPU(cs); | |
8c2e1b00 | 58 | |
4beab671 | 59 | /* STOPPED cpus can never wake up */ |
9d0306df VM |
60 | if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD && |
61 | s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) { | |
4beab671 DH |
62 | return false; |
63 | } | |
64 | ||
8417f904 DH |
65 | if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { |
66 | return false; | |
67 | } | |
68 | ||
69 | return s390_cpu_has_int(cpu); | |
8c2e1b00 AF |
70 | } |
71 | ||
29c6157c CB |
72 | #if !defined(CONFIG_USER_ONLY) |
73 | /* S390CPUClass::load_normal() */ | |
74 | static void s390_cpu_load_normal(CPUState *s) | |
75 | { | |
76 | S390CPU *cpu = S390_CPU(s); | |
fdfba1a2 | 77 | cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; |
29c6157c | 78 | cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; |
9d0306df | 79 | s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu); |
29c6157c CB |
80 | } |
81 | #endif | |
82 | ||
f5ae2a4f | 83 | /* S390CPUClass::cpu_reset() */ |
29e4bcb2 AF |
84 | static void s390_cpu_reset(CPUState *s) |
85 | { | |
86 | S390CPU *cpu = S390_CPU(s); | |
87 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
88 | CPUS390XState *env = &cpu->env; | |
89 | ||
819bd309 | 90 | env->pfault_token = -1UL; |
b073c875 | 91 | env->bpbc = false; |
f5ae2a4f | 92 | scc->parent_reset(s); |
18ff9494 | 93 | cpu->env.sigp_order = 0; |
9d0306df | 94 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
f5ae2a4f CB |
95 | } |
96 | ||
97 | /* S390CPUClass::initial_reset() */ | |
98 | static void s390_cpu_initial_reset(CPUState *s) | |
99 | { | |
100 | S390CPU *cpu = S390_CPU(s); | |
101 | CPUS390XState *env = &cpu->env; | |
102 | ||
103 | s390_cpu_reset(s); | |
cb4f4bc3 CB |
104 | /* initial reset does not clear everything! */ |
105 | memset(&env->start_initial_reset_fields, 0, | |
106 | offsetof(CPUS390XState, end_reset_fields) - | |
107 | offsetof(CPUS390XState, start_initial_reset_fields)); | |
f5ae2a4f CB |
108 | |
109 | /* architectured initial values for CR 0 and 14 */ | |
110 | env->cregs[0] = CR0_RESET; | |
111 | env->cregs[14] = CR14_RESET; | |
819bd309 | 112 | |
3da0ab35 AJ |
113 | /* architectured initial value for Breaking-Event-Address register */ |
114 | env->gbea = 1; | |
115 | ||
819bd309 | 116 | env->pfault_token = -1UL; |
49f5c9e9 | 117 | |
4a33565f AJ |
118 | /* tininess for underflow is detected before rounding */ |
119 | set_float_detect_tininess(float_tininess_before_rounding, | |
120 | &env->fpu_status); | |
121 | ||
49f5c9e9 TH |
122 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
123 | if (kvm_enabled()) { | |
99607144 | 124 | kvm_s390_reset_vcpu(cpu); |
49f5c9e9 | 125 | } |
f5ae2a4f CB |
126 | } |
127 | ||
128 | /* CPUClass:reset() */ | |
129 | static void s390_cpu_full_reset(CPUState *s) | |
130 | { | |
131 | S390CPU *cpu = S390_CPU(s); | |
132 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
133 | CPUS390XState *env = &cpu->env; | |
134 | ||
29e4bcb2 | 135 | scc->parent_reset(s); |
18ff9494 | 136 | cpu->env.sigp_order = 0; |
9d0306df | 137 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
29e4bcb2 | 138 | |
1f5c00cf | 139 | memset(env, 0, offsetof(CPUS390XState, end_reset_fields)); |
70bada03 JF |
140 | |
141 | /* architectured initial values for CR 0 and 14 */ | |
142 | env->cregs[0] = CR0_RESET; | |
143 | env->cregs[14] = CR14_RESET; | |
819bd309 | 144 | |
53a19a9a DH |
145 | #if defined(CONFIG_USER_ONLY) |
146 | /* user mode should always be allowed to use the full FPU */ | |
147 | env->cregs[0] |= CR0_AFP; | |
fd481851 DH |
148 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
149 | env->cregs[0] |= CR0_VECTOR; | |
150 | } | |
53a19a9a DH |
151 | #endif |
152 | ||
3da0ab35 AJ |
153 | /* architectured initial value for Breaking-Event-Address register */ |
154 | env->gbea = 1; | |
155 | ||
819bd309 DD |
156 | env->pfault_token = -1UL; |
157 | ||
4a33565f AJ |
158 | /* tininess for underflow is detected before rounding */ |
159 | set_float_detect_tininess(float_tininess_before_rounding, | |
160 | &env->fpu_status); | |
161 | ||
99607144 | 162 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
50a2c6e5 PB |
163 | if (kvm_enabled()) { |
164 | kvm_s390_reset_vcpu(cpu); | |
165 | } | |
29e4bcb2 AF |
166 | } |
167 | ||
70bada03 JF |
168 | #if !defined(CONFIG_USER_ONLY) |
169 | static void s390_cpu_machine_reset_cb(void *opaque) | |
170 | { | |
171 | S390CPU *cpu = opaque; | |
172 | ||
14e6fe12 | 173 | run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL); |
70bada03 JF |
174 | } |
175 | #endif | |
176 | ||
dbad6b74 PC |
177 | static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
178 | { | |
179 | info->mach = bfd_mach_s390_64; | |
180 | info->print_insn = print_insn_s390; | |
181 | } | |
182 | ||
1f136632 AF |
183 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
184 | { | |
14a10fc3 | 185 | CPUState *cs = CPU(dev); |
1f136632 | 186 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
1e70ba24 | 187 | #if !defined(CONFIG_USER_ONLY) |
c6644fc8 | 188 | S390CPU *cpu = S390_CPU(dev); |
1e70ba24 | 189 | #endif |
c6644fc8 MR |
190 | Error *err = NULL; |
191 | ||
41868f84 DH |
192 | /* the model has to be realized before qemu_init_vcpu() due to kvm */ |
193 | s390_realize_cpu_model(cs, &err); | |
194 | if (err) { | |
195 | goto out; | |
196 | } | |
197 | ||
96b1a8bb | 198 | #if !defined(CONFIG_USER_ONLY) |
ca5c1457 DH |
199 | if (cpu->env.core_id >= max_cpus) { |
200 | error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 | |
201 | ", maximum core-id: %d", cpu->env.core_id, | |
202 | max_cpus - 1); | |
96b1a8bb MR |
203 | goto out; |
204 | } | |
88556edd | 205 | |
ca5c1457 DH |
206 | if (cpu_exists(cpu->env.core_id)) { |
207 | error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 | |
208 | ", it already exists", cpu->env.core_id); | |
96b1a8bb MR |
209 | goto out; |
210 | } | |
96b1a8bb | 211 | |
ca5c1457 | 212 | /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */ |
1e70ba24 DH |
213 | cs->cpu_index = cpu->env.core_id; |
214 | #endif | |
215 | ||
ce5b1bbf | 216 | cpu_exec_realizefn(cs, &err); |
c6644fc8 | 217 | if (err != NULL) { |
96b1a8bb | 218 | goto out; |
c6644fc8 | 219 | } |
1f136632 | 220 | |
c6644fc8 MR |
221 | #if !defined(CONFIG_USER_ONLY) |
222 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); | |
223 | #endif | |
73d510c9 | 224 | s390_cpu_gdb_init(cs); |
14a10fc3 | 225 | qemu_init_vcpu(cs); |
d66b43c8 DH |
226 | |
227 | /* | |
228 | * KVM requires the initial CPU reset ioctl to be executed on the target | |
229 | * CPU thread. CPU hotplug under single-threaded TCG will not work with | |
230 | * run_on_cpu(), as run_on_cpu() will not work properly if called while | |
231 | * the main thread is already running but the CPU hasn't been realized. | |
232 | */ | |
233 | if (kvm_enabled()) { | |
234 | run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); | |
235 | } else { | |
236 | cpu_reset(cs); | |
237 | } | |
1f136632 | 238 | |
96b1a8bb | 239 | scc->parent_realize(dev, &err); |
96b1a8bb MR |
240 | out: |
241 | error_propagate(errp, err); | |
242 | } | |
243 | ||
4ada99ad CB |
244 | static GuestPanicInformation *s390_cpu_get_crash_info(CPUState *cs) |
245 | { | |
246 | GuestPanicInformation *panic_info; | |
247 | S390CPU *cpu = S390_CPU(cs); | |
248 | ||
249 | cpu_synchronize_state(cs); | |
250 | panic_info = g_malloc0(sizeof(GuestPanicInformation)); | |
251 | ||
252 | panic_info->type = GUEST_PANIC_INFORMATION_TYPE_S390; | |
253 | #if !defined(CONFIG_USER_ONLY) | |
254 | panic_info->u.s390.core = cpu->env.core_id; | |
255 | #else | |
256 | panic_info->u.s390.core = 0; /* sane default for non system emulation */ | |
257 | #endif | |
258 | panic_info->u.s390.psw_mask = cpu->env.psw.mask; | |
259 | panic_info->u.s390.psw_addr = cpu->env.psw.addr; | |
260 | panic_info->u.s390.reason = cpu->env.crash_reason; | |
261 | ||
262 | return panic_info; | |
263 | } | |
264 | ||
265 | static void s390_cpu_get_crash_info_qom(Object *obj, Visitor *v, | |
266 | const char *name, void *opaque, | |
267 | Error **errp) | |
268 | { | |
269 | CPUState *cs = CPU(obj); | |
270 | GuestPanicInformation *panic_info; | |
271 | ||
272 | if (!cs->crash_occurred) { | |
273 | error_setg(errp, "No crash occurred"); | |
274 | return; | |
275 | } | |
276 | ||
277 | panic_info = s390_cpu_get_crash_info(cs); | |
278 | ||
279 | visit_type_GuestPanicInformation(v, "crash-information", &panic_info, | |
280 | errp); | |
281 | qapi_free_GuestPanicInformation(panic_info); | |
282 | } | |
283 | ||
8f22e0df AF |
284 | static void s390_cpu_initfn(Object *obj) |
285 | { | |
c05efcb1 | 286 | CPUState *cs = CPU(obj); |
8f22e0df | 287 | S390CPU *cpu = S390_CPU(obj); |
8f22e0df | 288 | |
7506ed90 | 289 | cpu_set_cpustate_pointers(cpu); |
ef3027af MR |
290 | cs->halted = 1; |
291 | cs->exception_index = EXCP_HLT; | |
4ada99ad CB |
292 | object_property_add(obj, "crash-information", "GuestPanicInformation", |
293 | s390_cpu_get_crash_info_qom, NULL, NULL, NULL, NULL); | |
0754f604 | 294 | s390_cpu_model_register_props(obj); |
8f22e0df | 295 | #if !defined(CONFIG_USER_ONLY) |
7506ed90 RH |
296 | cpu->env.tod_timer = |
297 | timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); | |
298 | cpu->env.cpu_timer = | |
299 | timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
9d0306df | 300 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
8f22e0df | 301 | #endif |
8f22e0df AF |
302 | } |
303 | ||
d5627ce8 AF |
304 | static void s390_cpu_finalize(Object *obj) |
305 | { | |
306 | #if !defined(CONFIG_USER_ONLY) | |
307 | S390CPU *cpu = S390_CPU(obj); | |
308 | ||
309 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
3cda44f7 | 310 | g_free(cpu->irqstate); |
d5627ce8 AF |
311 | #endif |
312 | } | |
313 | ||
75973bfe | 314 | #if !defined(CONFIG_USER_ONLY) |
eb24f7c6 DH |
315 | static bool disabled_wait(CPUState *cpu) |
316 | { | |
317 | return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & | |
318 | (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); | |
319 | } | |
320 | ||
75973bfe DH |
321 | static unsigned s390_count_running_cpus(void) |
322 | { | |
323 | CPUState *cpu; | |
324 | int nr_running = 0; | |
325 | ||
326 | CPU_FOREACH(cpu) { | |
327 | uint8_t state = S390_CPU(cpu)->env.cpu_state; | |
9d0306df VM |
328 | if (state == S390_CPU_STATE_OPERATING || |
329 | state == S390_CPU_STATE_LOAD) { | |
eb24f7c6 DH |
330 | if (!disabled_wait(cpu)) { |
331 | nr_running++; | |
332 | } | |
75973bfe DH |
333 | } |
334 | } | |
335 | ||
336 | return nr_running; | |
337 | } | |
338 | ||
eb24f7c6 | 339 | unsigned int s390_cpu_halt(S390CPU *cpu) |
75973bfe DH |
340 | { |
341 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 342 | trace_cpu_halt(cs->cpu_index); |
75973bfe | 343 | |
eb24f7c6 DH |
344 | if (!cs->halted) { |
345 | cs->halted = 1; | |
346 | cs->exception_index = EXCP_HLT; | |
75973bfe | 347 | } |
eb24f7c6 DH |
348 | |
349 | return s390_count_running_cpus(); | |
75973bfe DH |
350 | } |
351 | ||
eb24f7c6 | 352 | void s390_cpu_unhalt(S390CPU *cpu) |
75973bfe DH |
353 | { |
354 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 355 | trace_cpu_unhalt(cs->cpu_index); |
75973bfe | 356 | |
eb24f7c6 DH |
357 | if (cs->halted) { |
358 | cs->halted = 0; | |
359 | cs->exception_index = -1; | |
360 | } | |
361 | } | |
362 | ||
363 | unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) | |
364 | { | |
365 | trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); | |
366 | ||
367 | switch (cpu_state) { | |
9d0306df VM |
368 | case S390_CPU_STATE_STOPPED: |
369 | case S390_CPU_STATE_CHECK_STOP: | |
eb24f7c6 DH |
370 | /* halt the cpu for common infrastructure */ |
371 | s390_cpu_halt(cpu); | |
372 | break; | |
9d0306df VM |
373 | case S390_CPU_STATE_OPERATING: |
374 | case S390_CPU_STATE_LOAD: | |
741a4ec1 DH |
375 | /* |
376 | * Starting a CPU with a PSW WAIT bit set: | |
377 | * KVM: handles this internally and triggers another WAIT exit. | |
378 | * TCG: will actually try to continue to run. Don't unhalt, will | |
379 | * be done when the CPU actually has work (an interrupt). | |
380 | */ | |
381 | if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) { | |
382 | s390_cpu_unhalt(cpu); | |
383 | } | |
eb24f7c6 DH |
384 | break; |
385 | default: | |
386 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
387 | cpu_state); | |
388 | exit(1); | |
75973bfe | 389 | } |
c9e659c9 DH |
390 | if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { |
391 | kvm_s390_set_cpu_state(cpu, cpu_state); | |
392 | } | |
eb24f7c6 | 393 | cpu->env.cpu_state = cpu_state; |
75973bfe DH |
394 | |
395 | return s390_count_running_cpus(); | |
396 | } | |
b6089b05 | 397 | |
b6089b05 DH |
398 | int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit) |
399 | { | |
400 | if (kvm_enabled()) { | |
401 | return kvm_s390_set_mem_limit(new_limit, hw_limit); | |
402 | } | |
403 | return 0; | |
404 | } | |
9138977b DH |
405 | |
406 | void s390_set_max_pagesize(uint64_t pagesize, Error **errp) | |
407 | { | |
408 | if (kvm_enabled()) { | |
409 | kvm_s390_set_max_pagesize(pagesize, errp); | |
410 | } | |
411 | } | |
b6089b05 DH |
412 | |
413 | void s390_cmma_reset(void) | |
414 | { | |
415 | if (kvm_enabled()) { | |
416 | kvm_s390_cmma_reset(); | |
417 | } | |
418 | } | |
419 | ||
b6089b05 DH |
420 | int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id, |
421 | int vq, bool assign) | |
422 | { | |
423 | if (kvm_enabled()) { | |
424 | return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign); | |
425 | } else { | |
426 | return 0; | |
427 | } | |
428 | } | |
429 | ||
430 | void s390_crypto_reset(void) | |
431 | { | |
432 | if (kvm_enabled()) { | |
433 | kvm_s390_crypto_reset(); | |
434 | } | |
435 | } | |
436 | ||
5e7164c5 DH |
437 | void s390_enable_css_support(S390CPU *cpu) |
438 | { | |
439 | if (kvm_enabled()) { | |
440 | kvm_s390_enable_css_support(cpu); | |
441 | } | |
442 | } | |
75973bfe DH |
443 | #endif |
444 | ||
b3820e6c DH |
445 | static gchar *s390_gdb_arch_name(CPUState *cs) |
446 | { | |
447 | return g_strdup("s390:64-bit"); | |
448 | } | |
449 | ||
ca5c1457 | 450 | static Property s390x_cpu_properties[] = { |
1e70ba24 | 451 | #if !defined(CONFIG_USER_ONLY) |
ca5c1457 | 452 | DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0), |
1e70ba24 | 453 | #endif |
ca5c1457 DH |
454 | DEFINE_PROP_END_OF_LIST() |
455 | }; | |
456 | ||
29e4bcb2 AF |
457 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
458 | { | |
459 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
460 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 461 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 462 | |
bf853881 PMD |
463 | device_class_set_parent_realize(dc, s390_cpu_realizefn, |
464 | &scc->parent_realize); | |
ca5c1457 | 465 | dc->props = s390x_cpu_properties; |
0347ab84 | 466 | dc->user_creatable = true; |
1f136632 | 467 | |
29e4bcb2 | 468 | scc->parent_reset = cc->reset; |
29c6157c CB |
469 | #if !defined(CONFIG_USER_ONLY) |
470 | scc->load_normal = s390_cpu_load_normal; | |
471 | #endif | |
f5ae2a4f CB |
472 | scc->cpu_reset = s390_cpu_reset; |
473 | scc->initial_cpu_reset = s390_cpu_initial_reset; | |
474 | cc->reset = s390_cpu_full_reset; | |
41868f84 | 475 | cc->class_by_name = s390_cpu_class_by_name, |
8c2e1b00 | 476 | cc->has_work = s390_cpu_has_work; |
b114588c | 477 | #ifdef CONFIG_TCG |
97a8ea5a | 478 | cc->do_interrupt = s390_cpu_do_interrupt; |
b114588c | 479 | #endif |
878096ee | 480 | cc->dump_state = s390_cpu_dump_state; |
4ada99ad | 481 | cc->get_crash_info = s390_cpu_get_crash_info; |
f45748f1 | 482 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
483 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
484 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
82851985 | 485 | #ifndef CONFIG_USER_ONLY |
00b941e5 | 486 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; |
ef1df130 | 487 | cc->vmsd = &vmstate_s390_cpu; |
9b4f38e1 | 488 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
b114588c | 489 | #ifdef CONFIG_TCG |
02bb9bbf | 490 | cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; |
311918b9 | 491 | cc->debug_excp_handler = s390x_cpu_debug_excp_handler; |
44977a8f | 492 | cc->do_unaligned_access = s390x_cpu_do_unaligned_access; |
b114588c | 493 | #endif |
00b941e5 | 494 | #endif |
dbad6b74 | 495 | cc->disas_set_info = s390_cpu_disas_set_info; |
74d7fc7f | 496 | #ifdef CONFIG_TCG |
55c3ceef | 497 | cc->tcg_initialize = s390x_translate_init; |
82851985 | 498 | cc->tlb_fill = s390_cpu_tlb_fill; |
74d7fc7f | 499 | #endif |
dbad6b74 | 500 | |
73d510c9 DH |
501 | cc->gdb_num_core_regs = S390_NUM_CORE_REGS; |
502 | cc->gdb_core_xml_file = "s390x-core64.xml"; | |
b3820e6c | 503 | cc->gdb_arch_name = s390_gdb_arch_name; |
4c315c27 | 504 | |
6efadc90 | 505 | s390_cpu_model_class_register_props(oc); |
29e4bcb2 AF |
506 | } |
507 | ||
508 | static const TypeInfo s390_cpu_type_info = { | |
509 | .name = TYPE_S390_CPU, | |
510 | .parent = TYPE_CPU, | |
511 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 512 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 513 | .instance_finalize = s390_cpu_finalize, |
41868f84 | 514 | .abstract = true, |
29e4bcb2 AF |
515 | .class_size = sizeof(S390CPUClass), |
516 | .class_init = s390_cpu_class_init, | |
517 | }; | |
518 | ||
519 | static void s390_cpu_register_types(void) | |
520 | { | |
521 | type_register_static(&s390_cpu_type_info); | |
522 | } | |
523 | ||
524 | type_init(s390_cpu_register_types) |