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Commit | Line | Data |
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29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 | 8 | * |
44699e1c TH |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
29e4bcb2 | 13 | * |
44699e1c | 14 | * This program is distributed in the hope that it will be useful, |
29e4bcb2 AF |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
44699e1c | 17 | * General Public License for more details. |
29e4bcb2 | 18 | * |
44699e1c TH |
19 | * You should have received a copy of the GNU General Public License |
20 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
29e4bcb2 AF |
21 | */ |
22 | ||
9615495a | 23 | #include "qemu/osdep.h" |
da34e65c | 24 | #include "qapi/error.h" |
564b863d | 25 | #include "cpu.h" |
4e58b838 | 26 | #include "internal.h" |
f16bbb9b DH |
27 | #include "kvm_s390x.h" |
28 | #include "sysemu/kvm.h" | |
71e8a915 | 29 | #include "sysemu/reset.h" |
1de7afc9 | 30 | #include "qemu/timer.h" |
eb24f7c6 | 31 | #include "qemu/error-report.h" |
0b8fa32f | 32 | #include "qemu/module.h" |
eb24f7c6 | 33 | #include "trace.h" |
96b1a8bb | 34 | #include "qapi/visitor.h" |
8ac25c84 | 35 | #include "qapi/qapi-types-machine.h" |
112ed241 | 36 | #include "qapi/qapi-visit-run-state.h" |
4ada99ad | 37 | #include "sysemu/hw_accel.h" |
ca5c1457 | 38 | #include "hw/qdev-properties.h" |
c7396bbb | 39 | #ifndef CONFIG_USER_ONLY |
ae71ed86 | 40 | #include "hw/boards.h" |
904e5fd5 | 41 | #include "sysemu/arch_init.h" |
96b1a8bb | 42 | #include "sysemu/sysemu.h" |
14a48c1d | 43 | #include "sysemu/tcg.h" |
904e5fd5 | 44 | #endif |
5f8ab000 | 45 | #include "fpu/softfloat-helpers.h" |
904e5fd5 | 46 | |
70bada03 JF |
47 | #define CR0_RESET 0xE0UL |
48 | #define CR14_RESET 0xC2000000UL; | |
49 | ||
f45748f1 AF |
50 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
51 | { | |
52 | S390CPU *cpu = S390_CPU(cs); | |
53 | ||
54 | cpu->env.psw.addr = value; | |
55 | } | |
56 | ||
8c2e1b00 AF |
57 | static bool s390_cpu_has_work(CPUState *cs) |
58 | { | |
59 | S390CPU *cpu = S390_CPU(cs); | |
8c2e1b00 | 60 | |
4beab671 | 61 | /* STOPPED cpus can never wake up */ |
9d0306df VM |
62 | if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD && |
63 | s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) { | |
4beab671 DH |
64 | return false; |
65 | } | |
66 | ||
8417f904 DH |
67 | if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { |
68 | return false; | |
69 | } | |
70 | ||
71 | return s390_cpu_has_int(cpu); | |
8c2e1b00 AF |
72 | } |
73 | ||
29c6157c CB |
74 | #if !defined(CONFIG_USER_ONLY) |
75 | /* S390CPUClass::load_normal() */ | |
76 | static void s390_cpu_load_normal(CPUState *s) | |
77 | { | |
78 | S390CPU *cpu = S390_CPU(s); | |
104130cb JF |
79 | uint64_t spsw = ldq_phys(s->as, 0); |
80 | ||
81 | cpu->env.psw.mask = spsw & 0xffffffff80000000ULL; | |
82 | /* | |
83 | * Invert short psw indication, so SIE will report a specification | |
84 | * exception if it was not set. | |
85 | */ | |
86 | cpu->env.psw.mask ^= PSW_MASK_SHORTPSW; | |
87 | cpu->env.psw.addr = spsw & 0x7fffffffULL; | |
88 | ||
9d0306df | 89 | s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu); |
29c6157c CB |
90 | } |
91 | #endif | |
92 | ||
eac4f827 JF |
93 | /* S390CPUClass::reset() */ |
94 | static void s390_cpu_reset(CPUState *s, cpu_reset_type type) | |
29e4bcb2 AF |
95 | { |
96 | S390CPU *cpu = S390_CPU(s); | |
97 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
98 | CPUS390XState *env = &cpu->env; | |
99 | ||
f5ae2a4f | 100 | scc->parent_reset(s); |
18ff9494 | 101 | cpu->env.sigp_order = 0; |
9d0306df | 102 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
eac4f827 JF |
103 | |
104 | switch (type) { | |
eb8adcc3 JF |
105 | case S390_CPU_RESET_CLEAR: |
106 | memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields)); | |
107 | /* fall through */ | |
81b92223 JF |
108 | case S390_CPU_RESET_INITIAL: |
109 | /* initial reset does not clear everything! */ | |
110 | memset(&env->start_initial_reset_fields, 0, | |
e893baee | 111 | offsetof(CPUS390XState, start_normal_reset_fields) - |
81b92223 JF |
112 | offsetof(CPUS390XState, start_initial_reset_fields)); |
113 | ||
114 | /* architectured initial value for Breaking-Event-Address register */ | |
115 | env->gbea = 1; | |
116 | ||
117 | /* architectured initial values for CR 0 and 14 */ | |
118 | env->cregs[0] = CR0_RESET; | |
119 | env->cregs[14] = CR14_RESET; | |
120 | ||
eb8adcc3 JF |
121 | #if defined(CONFIG_USER_ONLY) |
122 | /* user mode should always be allowed to use the full FPU */ | |
123 | env->cregs[0] |= CR0_AFP; | |
124 | if (s390_has_feat(S390_FEAT_VECTOR)) { | |
125 | env->cregs[0] |= CR0_VECTOR; | |
126 | } | |
127 | #endif | |
128 | ||
81b92223 JF |
129 | /* tininess for underflow is detected before rounding */ |
130 | set_float_detect_tininess(float_tininess_before_rounding, | |
131 | &env->fpu_status); | |
132 | /* fall through */ | |
eac4f827 | 133 | case S390_CPU_RESET_NORMAL: |
e893baee JF |
134 | env->psw.mask &= ~PSW_MASK_RI; |
135 | memset(&env->start_normal_reset_fields, 0, | |
136 | offsetof(CPUS390XState, end_reset_fields) - | |
137 | offsetof(CPUS390XState, start_normal_reset_fields)); | |
138 | ||
eac4f827 JF |
139 | env->pfault_token = -1UL; |
140 | env->bpbc = false; | |
141 | break; | |
142 | default: | |
143 | g_assert_not_reached(); | |
144 | } | |
4a33565f | 145 | |
49f5c9e9 | 146 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
81b92223 | 147 | if (kvm_enabled() && type != S390_CPU_RESET_NORMAL) { |
99607144 | 148 | kvm_s390_reset_vcpu(cpu); |
49f5c9e9 | 149 | } |
f5ae2a4f CB |
150 | } |
151 | ||
70bada03 JF |
152 | #if !defined(CONFIG_USER_ONLY) |
153 | static void s390_cpu_machine_reset_cb(void *opaque) | |
154 | { | |
155 | S390CPU *cpu = opaque; | |
156 | ||
14e6fe12 | 157 | run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL); |
70bada03 JF |
158 | } |
159 | #endif | |
160 | ||
dbad6b74 PC |
161 | static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
162 | { | |
163 | info->mach = bfd_mach_s390_64; | |
164 | info->print_insn = print_insn_s390; | |
165 | } | |
166 | ||
1f136632 AF |
167 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
168 | { | |
14a10fc3 | 169 | CPUState *cs = CPU(dev); |
1f136632 | 170 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
1e70ba24 | 171 | #if !defined(CONFIG_USER_ONLY) |
c6644fc8 | 172 | S390CPU *cpu = S390_CPU(dev); |
1e70ba24 | 173 | #endif |
c6644fc8 MR |
174 | Error *err = NULL; |
175 | ||
41868f84 DH |
176 | /* the model has to be realized before qemu_init_vcpu() due to kvm */ |
177 | s390_realize_cpu_model(cs, &err); | |
178 | if (err) { | |
179 | goto out; | |
180 | } | |
181 | ||
96b1a8bb | 182 | #if !defined(CONFIG_USER_ONLY) |
ae71ed86 LX |
183 | MachineState *ms = MACHINE(qdev_get_machine()); |
184 | unsigned int max_cpus = ms->smp.max_cpus; | |
ca5c1457 DH |
185 | if (cpu->env.core_id >= max_cpus) { |
186 | error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 | |
187 | ", maximum core-id: %d", cpu->env.core_id, | |
188 | max_cpus - 1); | |
96b1a8bb MR |
189 | goto out; |
190 | } | |
88556edd | 191 | |
ca5c1457 DH |
192 | if (cpu_exists(cpu->env.core_id)) { |
193 | error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 | |
194 | ", it already exists", cpu->env.core_id); | |
96b1a8bb MR |
195 | goto out; |
196 | } | |
96b1a8bb | 197 | |
ca5c1457 | 198 | /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */ |
1e70ba24 DH |
199 | cs->cpu_index = cpu->env.core_id; |
200 | #endif | |
201 | ||
ce5b1bbf | 202 | cpu_exec_realizefn(cs, &err); |
c6644fc8 | 203 | if (err != NULL) { |
96b1a8bb | 204 | goto out; |
c6644fc8 | 205 | } |
1f136632 | 206 | |
c6644fc8 MR |
207 | #if !defined(CONFIG_USER_ONLY) |
208 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); | |
209 | #endif | |
73d510c9 | 210 | s390_cpu_gdb_init(cs); |
14a10fc3 | 211 | qemu_init_vcpu(cs); |
d66b43c8 DH |
212 | |
213 | /* | |
214 | * KVM requires the initial CPU reset ioctl to be executed on the target | |
215 | * CPU thread. CPU hotplug under single-threaded TCG will not work with | |
216 | * run_on_cpu(), as run_on_cpu() will not work properly if called while | |
217 | * the main thread is already running but the CPU hasn't been realized. | |
218 | */ | |
219 | if (kvm_enabled()) { | |
220 | run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); | |
221 | } else { | |
222 | cpu_reset(cs); | |
223 | } | |
1f136632 | 224 | |
96b1a8bb | 225 | scc->parent_realize(dev, &err); |
96b1a8bb MR |
226 | out: |
227 | error_propagate(errp, err); | |
228 | } | |
229 | ||
4ada99ad CB |
230 | static GuestPanicInformation *s390_cpu_get_crash_info(CPUState *cs) |
231 | { | |
232 | GuestPanicInformation *panic_info; | |
233 | S390CPU *cpu = S390_CPU(cs); | |
234 | ||
235 | cpu_synchronize_state(cs); | |
236 | panic_info = g_malloc0(sizeof(GuestPanicInformation)); | |
237 | ||
238 | panic_info->type = GUEST_PANIC_INFORMATION_TYPE_S390; | |
239 | #if !defined(CONFIG_USER_ONLY) | |
240 | panic_info->u.s390.core = cpu->env.core_id; | |
241 | #else | |
242 | panic_info->u.s390.core = 0; /* sane default for non system emulation */ | |
243 | #endif | |
244 | panic_info->u.s390.psw_mask = cpu->env.psw.mask; | |
245 | panic_info->u.s390.psw_addr = cpu->env.psw.addr; | |
246 | panic_info->u.s390.reason = cpu->env.crash_reason; | |
247 | ||
248 | return panic_info; | |
249 | } | |
250 | ||
251 | static void s390_cpu_get_crash_info_qom(Object *obj, Visitor *v, | |
252 | const char *name, void *opaque, | |
253 | Error **errp) | |
254 | { | |
255 | CPUState *cs = CPU(obj); | |
256 | GuestPanicInformation *panic_info; | |
257 | ||
258 | if (!cs->crash_occurred) { | |
259 | error_setg(errp, "No crash occurred"); | |
260 | return; | |
261 | } | |
262 | ||
263 | panic_info = s390_cpu_get_crash_info(cs); | |
264 | ||
265 | visit_type_GuestPanicInformation(v, "crash-information", &panic_info, | |
266 | errp); | |
267 | qapi_free_GuestPanicInformation(panic_info); | |
268 | } | |
269 | ||
8f22e0df AF |
270 | static void s390_cpu_initfn(Object *obj) |
271 | { | |
c05efcb1 | 272 | CPUState *cs = CPU(obj); |
8f22e0df | 273 | S390CPU *cpu = S390_CPU(obj); |
8f22e0df | 274 | |
7506ed90 | 275 | cpu_set_cpustate_pointers(cpu); |
ef3027af MR |
276 | cs->halted = 1; |
277 | cs->exception_index = EXCP_HLT; | |
4ada99ad CB |
278 | object_property_add(obj, "crash-information", "GuestPanicInformation", |
279 | s390_cpu_get_crash_info_qom, NULL, NULL, NULL, NULL); | |
0754f604 | 280 | s390_cpu_model_register_props(obj); |
8f22e0df | 281 | #if !defined(CONFIG_USER_ONLY) |
7506ed90 RH |
282 | cpu->env.tod_timer = |
283 | timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); | |
284 | cpu->env.cpu_timer = | |
285 | timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
9d0306df | 286 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
8f22e0df | 287 | #endif |
8f22e0df AF |
288 | } |
289 | ||
d5627ce8 AF |
290 | static void s390_cpu_finalize(Object *obj) |
291 | { | |
292 | #if !defined(CONFIG_USER_ONLY) | |
293 | S390CPU *cpu = S390_CPU(obj); | |
294 | ||
295 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
3cda44f7 | 296 | g_free(cpu->irqstate); |
d5627ce8 AF |
297 | #endif |
298 | } | |
299 | ||
75973bfe | 300 | #if !defined(CONFIG_USER_ONLY) |
eb24f7c6 DH |
301 | static bool disabled_wait(CPUState *cpu) |
302 | { | |
303 | return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & | |
304 | (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); | |
305 | } | |
306 | ||
75973bfe DH |
307 | static unsigned s390_count_running_cpus(void) |
308 | { | |
309 | CPUState *cpu; | |
310 | int nr_running = 0; | |
311 | ||
312 | CPU_FOREACH(cpu) { | |
313 | uint8_t state = S390_CPU(cpu)->env.cpu_state; | |
9d0306df VM |
314 | if (state == S390_CPU_STATE_OPERATING || |
315 | state == S390_CPU_STATE_LOAD) { | |
eb24f7c6 DH |
316 | if (!disabled_wait(cpu)) { |
317 | nr_running++; | |
318 | } | |
75973bfe DH |
319 | } |
320 | } | |
321 | ||
322 | return nr_running; | |
323 | } | |
324 | ||
eb24f7c6 | 325 | unsigned int s390_cpu_halt(S390CPU *cpu) |
75973bfe DH |
326 | { |
327 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 328 | trace_cpu_halt(cs->cpu_index); |
75973bfe | 329 | |
eb24f7c6 DH |
330 | if (!cs->halted) { |
331 | cs->halted = 1; | |
332 | cs->exception_index = EXCP_HLT; | |
75973bfe | 333 | } |
eb24f7c6 DH |
334 | |
335 | return s390_count_running_cpus(); | |
75973bfe DH |
336 | } |
337 | ||
eb24f7c6 | 338 | void s390_cpu_unhalt(S390CPU *cpu) |
75973bfe DH |
339 | { |
340 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 341 | trace_cpu_unhalt(cs->cpu_index); |
75973bfe | 342 | |
eb24f7c6 DH |
343 | if (cs->halted) { |
344 | cs->halted = 0; | |
345 | cs->exception_index = -1; | |
346 | } | |
347 | } | |
348 | ||
349 | unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) | |
350 | { | |
351 | trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); | |
352 | ||
353 | switch (cpu_state) { | |
9d0306df VM |
354 | case S390_CPU_STATE_STOPPED: |
355 | case S390_CPU_STATE_CHECK_STOP: | |
eb24f7c6 DH |
356 | /* halt the cpu for common infrastructure */ |
357 | s390_cpu_halt(cpu); | |
358 | break; | |
9d0306df VM |
359 | case S390_CPU_STATE_OPERATING: |
360 | case S390_CPU_STATE_LOAD: | |
741a4ec1 DH |
361 | /* |
362 | * Starting a CPU with a PSW WAIT bit set: | |
363 | * KVM: handles this internally and triggers another WAIT exit. | |
364 | * TCG: will actually try to continue to run. Don't unhalt, will | |
365 | * be done when the CPU actually has work (an interrupt). | |
366 | */ | |
367 | if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) { | |
368 | s390_cpu_unhalt(cpu); | |
369 | } | |
eb24f7c6 DH |
370 | break; |
371 | default: | |
372 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
373 | cpu_state); | |
374 | exit(1); | |
75973bfe | 375 | } |
c9e659c9 DH |
376 | if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { |
377 | kvm_s390_set_cpu_state(cpu, cpu_state); | |
378 | } | |
eb24f7c6 | 379 | cpu->env.cpu_state = cpu_state; |
75973bfe DH |
380 | |
381 | return s390_count_running_cpus(); | |
382 | } | |
b6089b05 | 383 | |
b6089b05 DH |
384 | int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit) |
385 | { | |
386 | if (kvm_enabled()) { | |
387 | return kvm_s390_set_mem_limit(new_limit, hw_limit); | |
388 | } | |
389 | return 0; | |
390 | } | |
9138977b DH |
391 | |
392 | void s390_set_max_pagesize(uint64_t pagesize, Error **errp) | |
393 | { | |
394 | if (kvm_enabled()) { | |
395 | kvm_s390_set_max_pagesize(pagesize, errp); | |
396 | } | |
397 | } | |
b6089b05 DH |
398 | |
399 | void s390_cmma_reset(void) | |
400 | { | |
401 | if (kvm_enabled()) { | |
402 | kvm_s390_cmma_reset(); | |
403 | } | |
404 | } | |
405 | ||
b6089b05 DH |
406 | int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id, |
407 | int vq, bool assign) | |
408 | { | |
409 | if (kvm_enabled()) { | |
410 | return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign); | |
411 | } else { | |
412 | return 0; | |
413 | } | |
414 | } | |
415 | ||
416 | void s390_crypto_reset(void) | |
417 | { | |
418 | if (kvm_enabled()) { | |
419 | kvm_s390_crypto_reset(); | |
420 | } | |
421 | } | |
422 | ||
5e7164c5 DH |
423 | void s390_enable_css_support(S390CPU *cpu) |
424 | { | |
425 | if (kvm_enabled()) { | |
426 | kvm_s390_enable_css_support(cpu); | |
427 | } | |
428 | } | |
75973bfe DH |
429 | #endif |
430 | ||
b3820e6c DH |
431 | static gchar *s390_gdb_arch_name(CPUState *cs) |
432 | { | |
433 | return g_strdup("s390:64-bit"); | |
434 | } | |
435 | ||
ca5c1457 | 436 | static Property s390x_cpu_properties[] = { |
1e70ba24 | 437 | #if !defined(CONFIG_USER_ONLY) |
ca5c1457 | 438 | DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0), |
1e70ba24 | 439 | #endif |
ca5c1457 DH |
440 | DEFINE_PROP_END_OF_LIST() |
441 | }; | |
442 | ||
eb8adcc3 JF |
443 | static void s390_cpu_reset_full(CPUState *s) |
444 | { | |
445 | return s390_cpu_reset(s, S390_CPU_RESET_CLEAR); | |
446 | } | |
447 | ||
29e4bcb2 AF |
448 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
449 | { | |
450 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
451 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 452 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 453 | |
bf853881 PMD |
454 | device_class_set_parent_realize(dc, s390_cpu_realizefn, |
455 | &scc->parent_realize); | |
4f67d30b | 456 | device_class_set_props(dc, s390x_cpu_properties); |
0347ab84 | 457 | dc->user_creatable = true; |
1f136632 | 458 | |
bc9888f7 | 459 | cpu_class_set_parent_reset(cc, s390_cpu_reset_full, &scc->parent_reset); |
29c6157c CB |
460 | #if !defined(CONFIG_USER_ONLY) |
461 | scc->load_normal = s390_cpu_load_normal; | |
462 | #endif | |
eac4f827 | 463 | scc->reset = s390_cpu_reset; |
41868f84 | 464 | cc->class_by_name = s390_cpu_class_by_name, |
8c2e1b00 | 465 | cc->has_work = s390_cpu_has_work; |
b114588c | 466 | #ifdef CONFIG_TCG |
97a8ea5a | 467 | cc->do_interrupt = s390_cpu_do_interrupt; |
b114588c | 468 | #endif |
878096ee | 469 | cc->dump_state = s390_cpu_dump_state; |
4ada99ad | 470 | cc->get_crash_info = s390_cpu_get_crash_info; |
f45748f1 | 471 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
472 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
473 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
82851985 | 474 | #ifndef CONFIG_USER_ONLY |
00b941e5 | 475 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; |
ef1df130 | 476 | cc->vmsd = &vmstate_s390_cpu; |
9b4f38e1 | 477 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
b114588c | 478 | #ifdef CONFIG_TCG |
02bb9bbf | 479 | cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; |
311918b9 | 480 | cc->debug_excp_handler = s390x_cpu_debug_excp_handler; |
44977a8f | 481 | cc->do_unaligned_access = s390x_cpu_do_unaligned_access; |
b114588c | 482 | #endif |
00b941e5 | 483 | #endif |
dbad6b74 | 484 | cc->disas_set_info = s390_cpu_disas_set_info; |
74d7fc7f | 485 | #ifdef CONFIG_TCG |
55c3ceef | 486 | cc->tcg_initialize = s390x_translate_init; |
82851985 | 487 | cc->tlb_fill = s390_cpu_tlb_fill; |
74d7fc7f | 488 | #endif |
dbad6b74 | 489 | |
73d510c9 DH |
490 | cc->gdb_num_core_regs = S390_NUM_CORE_REGS; |
491 | cc->gdb_core_xml_file = "s390x-core64.xml"; | |
b3820e6c | 492 | cc->gdb_arch_name = s390_gdb_arch_name; |
4c315c27 | 493 | |
6efadc90 | 494 | s390_cpu_model_class_register_props(oc); |
29e4bcb2 AF |
495 | } |
496 | ||
497 | static const TypeInfo s390_cpu_type_info = { | |
498 | .name = TYPE_S390_CPU, | |
499 | .parent = TYPE_CPU, | |
500 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 501 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 502 | .instance_finalize = s390_cpu_finalize, |
41868f84 | 503 | .abstract = true, |
29e4bcb2 AF |
504 | .class_size = sizeof(S390CPUClass), |
505 | .class_init = s390_cpu_class_init, | |
506 | }; | |
507 | ||
508 | static void s390_cpu_register_types(void) | |
509 | { | |
510 | type_register_static(&s390_cpu_type_info); | |
511 | } | |
512 | ||
513 | type_init(s390_cpu_register_types) |