[qemu.git] / cpu-exec.c

/*
 *  emulator main execution loop
 *
 *  Copyright (c) 2003-2005 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include "config.h"
#include "cpu.h"
#include "trace.h"
#include "disas/disas.h"
#include "tcg.h"
#include "qemu/atomic.h"
#include "sysemu/qtest.h"
#include "qemu/timer.h"
#include "exec/address-spaces.h"
#include "qemu/rcu.h"
#include "exec/tb-hash.h"
#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
#include "hw/i386/apic.h"
#endif
#include "sysemu/replay.h"

/* -icount align implementation. */

typedef struct SyncClocks {
    int64_t diff_clk;
    int64_t last_cpu_icount;
    int64_t realtime_clock;
} SyncClocks;

#if !defined(CONFIG_USER_ONLY)
/* Allow the guest to have a max 3ms advance.
 * The difference between the 2 clocks could therefore
 * oscillate around 0.
 */
#define VM_CLOCK_ADVANCE 3000000
#define THRESHOLD_REDUCE 1.5
#define MAX_DELAY_PRINT_RATE 2000000000LL
#define MAX_NB_PRINTS 100

static void align_clocks(SyncClocks *sc, const CPUState *cpu)
{
    int64_t cpu_icount;

    if (!icount_align_option) {
        return;
    }

    cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
    sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
    sc->last_cpu_icount = cpu_icount;

    if (sc->diff_clk > VM_CLOCK_ADVANCE) {
#ifndef _WIN32
        struct timespec sleep_delay, rem_delay;
        sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
        sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
        if (nanosleep(&sleep_delay, &rem_delay) < 0) {
            sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
        } else {
            sc->diff_clk = 0;
        }
#else
        Sleep(sc->diff_clk / SCALE_MS);
        sc->diff_clk = 0;
#endif
    }
}

static void print_delay(const SyncClocks *sc)
{
    static float threshold_delay;
    static int64_t last_realtime_clock;
    static int nb_prints;

    if (icount_align_option &&
        sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
        nb_prints < MAX_NB_PRINTS) {
        if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
            (-sc->diff_clk / (float)1000000000LL <
             (threshold_delay - THRESHOLD_REDUCE))) {
            threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
            printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
                   threshold_delay - 1,
                   threshold_delay);
            nb_prints++;
            last_realtime_clock = sc->realtime_clock;
        }
    }
}

static void init_delay_params(SyncClocks *sc,
                              const CPUState *cpu)
{
    if (!icount_align_option) {
        return;
    }
    sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
    sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
    sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
    if (sc->diff_clk < max_delay) {
        max_delay = sc->diff_clk;
    }
    if (sc->diff_clk > max_advance) {
        max_advance = sc->diff_clk;
    }

    /* Print every 2s max if the guest is late. We limit the number
       of printed messages to NB_PRINT_MAX(currently 100) */
    print_delay(sc);
}
#else
static void align_clocks(SyncClocks *sc, const CPUState *cpu)
{
}

static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
{
}
#endif /* CONFIG USER ONLY */

/* Execute a TB, and fix up the CPU state afterwards if necessary */
static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
{
    CPUArchState *env = cpu->env_ptr;
    uintptr_t next_tb;

#if defined(DEBUG_DISAS)
    if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
#if defined(TARGET_I386)
        log_cpu_state(cpu, CPU_DUMP_CCOP);
#elif defined(TARGET_M68K)
        /* ??? Should not modify env state for dumping.  */
        cpu_m68k_flush_flags(env, env->cc_op);
        env->cc_op = CC_OP_FLAGS;
        env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
        log_cpu_state(cpu, 0);
#else
        log_cpu_state(cpu, 0);
#endif
    }
#endif /* DEBUG_DISAS */

    cpu->can_do_io = !use_icount;
    next_tb = tcg_qemu_tb_exec(env, tb_ptr);
    cpu->can_do_io = 1;
    trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
                       next_tb & TB_EXIT_MASK);

    if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
        /* We didn't start executing this TB (eg because the instruction
         * counter hit zero); we must restore the guest PC to the address
         * of the start of the TB.
         */
        CPUClass *cc = CPU_GET_CLASS(cpu);
        TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
        if (cc->synchronize_from_tb) {
            cc->synchronize_from_tb(cpu, tb);
        } else {
            assert(cc->set_pc);
            cc->set_pc(cpu, tb->pc);
        }
    }
    if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
        /* We were asked to stop executing TBs (probably a pending
         * interrupt. We've now stopped, so clear the flag.
         */
        cpu->tcg_exit_req = 0;
    }
    return next_tb;
}

/* Execute the code without caching the generated code. An interpreter
   could be used if available. */
static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
                             TranslationBlock *orig_tb, bool ignore_icount)
{
    TranslationBlock *tb;

    /* Should never happen.
       We only end up here when an existing TB is too long.  */
    if (max_cycles > CF_COUNT_MASK)
        max_cycles = CF_COUNT_MASK;

    tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
                     max_cycles | CF_NOCACHE
                         | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
    tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
    cpu->current_tb = tb;
    /* execute the generated code */
    trace_exec_tb_nocache(tb, tb->pc);
    cpu_tb_exec(cpu, tb->tc_ptr);
    cpu->current_tb = NULL;
    tb_phys_invalidate(tb, -1);
    tb_free(tb);
}

static TranslationBlock *tb_find_physical(CPUState *cpu,
                                          target_ulong pc,
                                          target_ulong cs_base,
                                          uint64_t flags)
{
    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
    TranslationBlock *tb, **ptb1;
    unsigned int h;
    tb_page_addr_t phys_pc, phys_page1;
    target_ulong virt_page2;

    tcg_ctx.tb_ctx.tb_invalidated_flag = 0;

    /* find translated block using physical mappings */
    phys_pc = get_page_addr_code(env, pc);
    phys_page1 = phys_pc & TARGET_PAGE_MASK;
    h = tb_phys_hash_func(phys_pc);
    ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
    for(;;) {
        tb = *ptb1;
        if (!tb) {
            return NULL;
        }
        if (tb->pc == pc &&
            tb->page_addr[0] == phys_page1 &&
            tb->cs_base == cs_base &&
            tb->flags == flags) {
            /* check next page if needed */
            if (tb->page_addr[1] != -1) {
                tb_page_addr_t phys_page2;

                virt_page2 = (pc & TARGET_PAGE_MASK) +
                    TARGET_PAGE_SIZE;
                phys_page2 = get_page_addr_code(env, virt_page2);
                if (tb->page_addr[1] == phys_page2) {
                    break;
                }
            } else {
                break;
            }
        }
        ptb1 = &tb->phys_hash_next;
    }

    /* Move the TB to the head of the list */
    *ptb1 = tb->phys_hash_next;
    tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
    tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
    return tb;
}

static TranslationBlock *tb_find_slow(CPUState *cpu,
                                      target_ulong pc,
                                      target_ulong cs_base,
                                      uint64_t flags)
{
    TranslationBlock *tb;

    tb = tb_find_physical(cpu, pc, cs_base, flags);
    if (tb) {
        goto found;
    }

#ifdef CONFIG_USER_ONLY
    /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
     * taken outside tb_lock.  Since we're momentarily dropping
     * tb_lock, there's a chance that our desired tb has been
     * translated.
     */
    tb_unlock();
    mmap_lock();
    tb_lock();
    tb = tb_find_physical(cpu, pc, cs_base, flags);
    if (tb) {
        mmap_unlock();
        goto found;
    }
#endif

    /* if no translated code available, then translate it now */
    tb = tb_gen_code(cpu, pc, cs_base, flags, 0);

#ifdef CONFIG_USER_ONLY
    mmap_unlock();
#endif

found:
    /* we add the TB in the virtual pc hash table */
    cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
    return tb;
}

static inline TranslationBlock *tb_find_fast(CPUState *cpu)
{
    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
    TranslationBlock *tb;
    target_ulong cs_base, pc;
    int flags;

    /* we record a subset of the CPU state. It will
       always be the same before a given translated block
       is executed. */
    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
    tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
    if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
                 tb->flags != flags)) {
        tb = tb_find_slow(cpu, pc, cs_base, flags);
    }
    return tb;
}

static void cpu_handle_debug_exception(CPUState *cpu)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    CPUWatchpoint *wp;

    if (!cpu->watchpoint_hit) {
        QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
            wp->flags &= ~BP_WATCHPOINT_HIT;
        }
    }

    cc->debug_excp_handler(cpu);
}

/* main execution loop */

int cpu_exec(CPUState *cpu)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
#ifdef TARGET_I386
    X86CPU *x86_cpu = X86_CPU(cpu);
    CPUArchState *env = &x86_cpu->env;
#endif
    int ret, interrupt_request;
    TranslationBlock *tb;
    uint8_t *tc_ptr;
    uintptr_t next_tb;
    SyncClocks sc;

    /* replay_interrupt may need current_cpu */
    current_cpu = cpu;

    if (cpu->halted) {
#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
        if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
            && replay_interrupt()) {
            apic_poll_irq(x86_cpu->apic_state);
            cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
        }
#endif
        if (!cpu_has_work(cpu)) {
            current_cpu = NULL;
            return EXCP_HALTED;
        }

        cpu->halted = 0;
    }

    atomic_mb_set(&tcg_current_cpu, cpu);
    rcu_read_lock();

    if (unlikely(atomic_mb_read(&exit_request))) {
        cpu->exit_request = 1;
    }

    cc->cpu_exec_enter(cpu);

    /* Calculate difference between guest clock and host clock.
     * This delay includes the delay of the last cycle, so
     * what we have to do is sleep until it is 0. As for the
     * advance/delay we gain here, we try to fix it next time.
     */
    init_delay_params(&sc, cpu);

    /* prepare setjmp context for exception handling */
    for(;;) {
        if (sigsetjmp(cpu->jmp_env, 0) == 0) {
            /* if an exception is pending, we execute it here */
            if (cpu->exception_index >= 0) {
                if (cpu->exception_index >= EXCP_INTERRUPT) {
                    /* exit request from the cpu execution loop */
                    ret = cpu->exception_index;
                    if (ret == EXCP_DEBUG) {
                        cpu_handle_debug_exception(cpu);
                    }
                    cpu->exception_index = -1;
                    break;
                } else {
#if defined(CONFIG_USER_ONLY)
                    /* if user mode only, we simulate a fake exception
                       which will be handled outside the cpu execution
                       loop */
#if defined(TARGET_I386)
                    cc->do_interrupt(cpu);
#endif
                    ret = cpu->exception_index;
                    cpu->exception_index = -1;
                    break;
#else
                    if (replay_exception()) {
                        cc->do_interrupt(cpu);
                        cpu->exception_index = -1;
                    } else if (!replay_has_interrupt()) {
                        /* give a chance to iothread in replay mode */
                        ret = EXCP_INTERRUPT;
                        break;
                    }
#endif
                }
            } else if (replay_has_exception()
                       && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
                /* try to cause an exception pending in the log */
                cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true);
                ret = -1;
                break;
            }

            next_tb = 0; /* force lookup of first TB */
            for(;;) {
                interrupt_request = cpu->interrupt_request;
                if (unlikely(interrupt_request)) {
                    if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
                        /* Mask out external interrupts for this step. */
                        interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
                    }
                    if (interrupt_request & CPU_INTERRUPT_DEBUG) {
                        cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
                        cpu->exception_index = EXCP_DEBUG;
                        cpu_loop_exit(cpu);
                    }
                    if (replay_mode == REPLAY_MODE_PLAY
                        && !replay_has_interrupt()) {
                        /* Do nothing */
                    } else if (interrupt_request & CPU_INTERRUPT_HALT) {
                        replay_interrupt();
                        cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
                        cpu->halted = 1;
                        cpu->exception_index = EXCP_HLT;
                        cpu_loop_exit(cpu);
                    }
#if defined(TARGET_I386)
                    else if (interrupt_request & CPU_INTERRUPT_INIT) {
                        replay_interrupt();
                        cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
                        do_cpu_init(x86_cpu);
                        cpu->exception_index = EXCP_HALTED;
                        cpu_loop_exit(cpu);
                    }
#else
                    else if (interrupt_request & CPU_INTERRUPT_RESET) {
                        replay_interrupt();
                        cpu_reset(cpu);
                        cpu_loop_exit(cpu);
                    }
#endif
                    /* The target hook has 3 exit conditions:
                       False when the interrupt isn't processed,
                       True when it is, and we should restart on a new TB,
                       and via longjmp via cpu_loop_exit.  */
                    else {
                        replay_interrupt();
                        if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
                            next_tb = 0;
                        }
                    }
                    /* Don't use the cached interrupt_request value,
                       do_interrupt may have updated the EXITTB flag. */
                    if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
                        cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
                        /* ensure that no TB jump will be modified as
                           the program flow was changed */
                        next_tb = 0;
                    }
                }
                if (unlikely(cpu->exit_request
                             || replay_has_interrupt())) {
                    cpu->exit_request = 0;
                    cpu->exception_index = EXCP_INTERRUPT;
                    cpu_loop_exit(cpu);
                }
                tb_lock();
                tb = tb_find_fast(cpu);
                /* Note: we do it here to avoid a gcc bug on Mac OS X when
                   doing it in tb_find_slow */
                if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
                    /* as some TB could have been invalidated because
                       of memory exceptions while generating the code, we
                       must recompute the hash index here */
                    next_tb = 0;
                    tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
                }
                if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
                    qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
                             tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
                }
                /* see if we can patch the calling TB. When the TB
                   spans two pages, we cannot safely do a direct
                   jump. */
                if (next_tb != 0 && tb->page_addr[1] == -1
                    && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
                    tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
                                next_tb & TB_EXIT_MASK, tb);
                }
                tb_unlock();
                if (likely(!cpu->exit_request)) {
                    trace_exec_tb(tb, tb->pc);
                    tc_ptr = tb->tc_ptr;
                    /* execute the generated code */
                    cpu->current_tb = tb;
                    next_tb = cpu_tb_exec(cpu, tc_ptr);
                    cpu->current_tb = NULL;
                    switch (next_tb & TB_EXIT_MASK) {
                    case TB_EXIT_REQUESTED:
                        /* Something asked us to stop executing
                         * chained TBs; just continue round the main
                         * loop. Whatever requested the exit will also
                         * have set something else (eg exit_request or
                         * interrupt_request) which we will handle
                         * next time around the loop.  But we need to
                         * ensure the tcg_exit_req read in generated code
                         * comes before the next read of cpu->exit_request
                         * or cpu->interrupt_request.
                         */
                        smp_rmb();
                        next_tb = 0;
                        break;
                    case TB_EXIT_ICOUNT_EXPIRED:
                    {
                        /* Instruction counter expired.  */
                        int insns_left = cpu->icount_decr.u32;
                        if (cpu->icount_extra && insns_left >= 0) {
                            /* Refill decrementer and continue execution.  */
                            cpu->icount_extra += insns_left;
                            insns_left = MIN(0xffff, cpu->icount_extra);
                            cpu->icount_extra -= insns_left;
                            cpu->icount_decr.u16.low = insns_left;
                        } else {
                            if (insns_left > 0) {
                                /* Execute remaining instructions.  */
                                tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
                                cpu_exec_nocache(cpu, insns_left, tb, false);
                                align_clocks(&sc, cpu);
                            }
                            cpu->exception_index = EXCP_INTERRUPT;
                            next_tb = 0;
                            cpu_loop_exit(cpu);
                        }
                        break;
                    }
                    default:
                        break;
                    }
                }
                /* Try to align the host and virtual clocks
                   if the guest is in advance */
                align_clocks(&sc, cpu);
                /* reset soft MMU for next block (it can currently
                   only be set by a memory fault) */
            } /* for(;;) */
        } else {
            /* Reload env after longjmp - the compiler may have smashed all
             * local variables as longjmp is marked 'noreturn'. */
            cpu = current_cpu;
            cc = CPU_GET_CLASS(cpu);
            cpu->can_do_io = 1;
#ifdef TARGET_I386
            x86_cpu = X86_CPU(cpu);
            env = &x86_cpu->env;
#endif
            tb_lock_reset();
        }
    } /* for(;;) */

    cc->cpu_exec_exit(cpu);
    rcu_read_unlock();

    /* fail safe : never use current_cpu outside cpu_exec() */
    current_cpu = NULL;

    /* Does not need atomic_mb_set because a spurious wakeup is okay.  */
    atomic_set(&tcg_current_cpu, NULL);
    return ret;
}
Commit	Line	Data
7d13299d	1	/*
e965fc38	2	* emulator main execution loop
5fafdf24	3	*
66321a11	4	* Copyright (c) 2003-2005 Fabrice Bellard
7d13299d	5	*
3ef693a0 FB	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
7d13299d	10	*
3ef693a0 FB	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
7d13299d	15	*
3ef693a0	16	* You should have received a copy of the GNU Lesser General Public
8167ee88	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d	18	*/
e4533c7a	19	#include "config.h"
cea5f9a2	20	#include "cpu.h"
6db8b538	21	#include "trace.h"
76cad711	22	#include "disas/disas.h"
7cb69cae	23	#include "tcg.h"
1de7afc9	24	#include "qemu/atomic.h"
9c17d615	25	#include "sysemu/qtest.h"
c2aa5f81	26	#include "qemu/timer.h"
9d82b5a7	27	#include "exec/address-spaces.h"
79e2b9ae	28	#include "qemu/rcu.h"
e1b89321	29	#include "exec/tb-hash.h"
6220e900 PD	30	#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
	31	#include "hw/i386/apic.h"
	32	#endif
6f060969	33	#include "sysemu/replay.h"
c2aa5f81 ST	34
	35	/* -icount align implementation. */
	36
	37	typedef struct SyncClocks {
	38	int64_t diff_clk;
	39	int64_t last_cpu_icount;
7f7bc144	40	int64_t realtime_clock;
c2aa5f81 ST	41	} SyncClocks;
	42
	43	#if !defined(CONFIG_USER_ONLY)
	44	/* Allow the guest to have a max 3ms advance.
	45	* The difference between the 2 clocks could therefore
	46	* oscillate around 0.
	47	*/
	48	#define VM_CLOCK_ADVANCE 3000000
7f7bc144 ST	49	#define THRESHOLD_REDUCE 1.5
	50	#define MAX_DELAY_PRINT_RATE 2000000000LL
	51	#define MAX_NB_PRINTS 100
c2aa5f81 ST	52
	53	static void align_clocks(SyncClocks sc, const CPUState cpu)
	54	{
	55	int64_t cpu_icount;
	56
	57	if (!icount_align_option) {
	58	return;
	59	}
	60
	61	cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
	62	sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
	63	sc->last_cpu_icount = cpu_icount;
	64
	65	if (sc->diff_clk > VM_CLOCK_ADVANCE) {
	66	#ifndef _WIN32
	67	struct timespec sleep_delay, rem_delay;
	68	sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
	69	sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
	70	if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef	71	sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81 ST	72	} else {
	73	sc->diff_clk = 0;
	74	}
	75	#else
	76	Sleep(sc->diff_clk / SCALE_MS);
	77	sc->diff_clk = 0;
	78	#endif
	79	}
	80	}
	81
7f7bc144 ST	82	static void print_delay(const SyncClocks *sc)
	83	{
	84	static float threshold_delay;
	85	static int64_t last_realtime_clock;
	86	static int nb_prints;
	87
	88	if (icount_align_option &&
	89	sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
	90	nb_prints < MAX_NB_PRINTS) {
	91	if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) \|\|
	92	(-sc->diff_clk / (float)1000000000LL <
	93	(threshold_delay - THRESHOLD_REDUCE))) {
	94	threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
	95	printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
	96	threshold_delay - 1,
	97	threshold_delay);
	98	nb_prints++;
	99	last_realtime_clock = sc->realtime_clock;
	100	}
	101	}
	102	}
	103
c2aa5f81 ST	104	static void init_delay_params(SyncClocks *sc,
	105	const CPUState *cpu)
	106	{
	107	if (!icount_align_option) {
	108	return;
	109	}
2e91cc62 PB	110	sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
2e91cc62 PB	111	sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81	112	sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef ST	113	if (sc->diff_clk < max_delay) {
	114	max_delay = sc->diff_clk;
	115	}
	116	if (sc->diff_clk > max_advance) {
	117	max_advance = sc->diff_clk;
	118	}
7f7bc144 ST	119
	120	/* Print every 2s max if the guest is late. We limit the number
	121	of printed messages to NB_PRINT_MAX(currently 100) */
	122	print_delay(sc);
c2aa5f81 ST	123	}
	124	#else
	125	static void align_clocks(SyncClocks sc, const CPUState cpu)
	126	{
	127	}
	128
	129	static void init_delay_params(SyncClocks sc, const CPUState cpu)
	130	{
	131	}
	132	#endif /* CONFIG USER ONLY */
7d13299d	133
77211379 PM	134	/* Execute a TB, and fix up the CPU state afterwards if necessary */
	135	static inline tcg_target_ulong cpu_tb_exec(CPUState cpu, uint8_t tb_ptr)
	136	{
	137	CPUArchState *env = cpu->env_ptr;
03afa5f8 RH	138	uintptr_t next_tb;
	139
	140	#if defined(DEBUG_DISAS)
	141	if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
	142	#if defined(TARGET_I386)
	143	log_cpu_state(cpu, CPU_DUMP_CCOP);
	144	#elif defined(TARGET_M68K)
	145	/* ??? Should not modify env state for dumping. */
	146	cpu_m68k_flush_flags(env, env->cc_op);
	147	env->cc_op = CC_OP_FLAGS;
	148	env->sr = (env->sr & 0xffe0) \| env->cc_dest \| (env->cc_x << 4);
	149	log_cpu_state(cpu, 0);
	150	#else
	151	log_cpu_state(cpu, 0);
	152	#endif
	153	}
	154	#endif /* DEBUG_DISAS */
	155
414b15c9	156	cpu->can_do_io = !use_icount;
03afa5f8	157	next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4	158	cpu->can_do_io = 1;
6db8b538 AB	159	trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
	160	next_tb & TB_EXIT_MASK);
	161
77211379 PM	162	if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
	163	/* We didn't start executing this TB (eg because the instruction
	164	* counter hit zero); we must restore the guest PC to the address
	165	* of the start of the TB.
	166	*/
bdf7ae5b	167	CPUClass *cc = CPU_GET_CLASS(cpu);
77211379	168	TranslationBlock tb = (TranslationBlock )(next_tb & ~TB_EXIT_MASK);
bdf7ae5b AF	169	if (cc->synchronize_from_tb) {
	170	cc->synchronize_from_tb(cpu, tb);
	171	} else {
	172	assert(cc->set_pc);
	173	cc->set_pc(cpu, tb->pc);
	174	}
77211379	175	}
378df4b2 PM	176	if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
	177	/* We were asked to stop executing TBs (probably a pending
	178	* interrupt. We've now stopped, so clear the flag.
	179	*/
	180	cpu->tcg_exit_req = 0;
	181	}
77211379 PM	182	return next_tb;
	183	}
	184
2e70f6ef PB	185	/* Execute the code without caching the generated code. An interpreter
2e70f6ef PB	186	could be used if available. */
ea3e9847	187	static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a	188	TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef	189	{
2e70f6ef PB	190	TranslationBlock *tb;
	191
	192	/* Should never happen.
	193	We only end up here when an existing TB is too long. */
	194	if (max_cycles > CF_COUNT_MASK)
	195	max_cycles = CF_COUNT_MASK;
	196
02d57ea1	197	tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
56c0269a PD	198	max_cycles \| CF_NOCACHE
56c0269a PD	199	\| (ignore_icount ? CF_IGNORE_ICOUNT : 0));
02d57ea1	200	tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
d77953b9	201	cpu->current_tb = tb;
2e70f6ef	202	/* execute the generated code */
6db8b538	203	trace_exec_tb_nocache(tb, tb->pc);
77211379	204	cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9	205	cpu->current_tb = NULL;
2e70f6ef PB	206	tb_phys_invalidate(tb, -1);
	207	tb_free(tb);
	208	}
	209
9fd1a948 PB	210	static TranslationBlock tb_find_physical(CPUState cpu,
	211	target_ulong pc,
	212	target_ulong cs_base,
	213	uint64_t flags)
8a40a180	214	{
ea3e9847	215	CPUArchState env = (CPUArchState )cpu->env_ptr;
8a40a180	216	TranslationBlock tb, *ptb1;
8a40a180	217	unsigned int h;
337fc758	218	tb_page_addr_t phys_pc, phys_page1;
41c1b1c9	219	target_ulong virt_page2;
3b46e624	220
5e5f07e0	221	tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624	222
8a40a180	223	/* find translated block using physical mappings */
41c1b1c9	224	phys_pc = get_page_addr_code(env, pc);
8a40a180	225	phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180	226	h = tb_phys_hash_func(phys_pc);
5e5f07e0	227	ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180 FB	228	for(;;) {
8a40a180 FB	229	tb = *ptb1;
9fd1a948 PB	230	if (!tb) {
	231	return NULL;
	232	}
5fafdf24	233	if (tb->pc == pc &&
8a40a180	234	tb->page_addr[0] == phys_page1 &&
5fafdf24	235	tb->cs_base == cs_base &&
8a40a180 FB	236	tb->flags == flags) {
	237	/* check next page if needed */
	238	if (tb->page_addr[1] != -1) {
337fc758 BS	239	tb_page_addr_t phys_page2;
337fc758 BS	240
5fafdf24	241	virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180	242	TARGET_PAGE_SIZE;
41c1b1c9	243	phys_page2 = get_page_addr_code(env, virt_page2);
9fd1a948 PB	244	if (tb->page_addr[1] == phys_page2) {
	245	break;
	246	}
8a40a180	247	} else {
9fd1a948	248	break;
8a40a180 FB	249	}
	250	}
	251	ptb1 = &tb->phys_hash_next;
	252	}
3b46e624	253
9fd1a948 PB	254	/* Move the TB to the head of the list */
	255	*ptb1 = tb->phys_hash_next;
	256	tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
	257	tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
	258	return tb;
	259	}
	260
	261	static TranslationBlock tb_find_slow(CPUState cpu,
	262	target_ulong pc,
	263	target_ulong cs_base,
	264	uint64_t flags)
	265	{
	266	TranslationBlock *tb;
	267
	268	tb = tb_find_physical(cpu, pc, cs_base, flags);
	269	if (tb) {
	270	goto found;
	271	}
	272
	273	#ifdef CONFIG_USER_ONLY
	274	/* mmap_lock is needed by tb_gen_code, and mmap_lock must be
	275	* taken outside tb_lock. Since we're momentarily dropping
	276	* tb_lock, there's a chance that our desired tb has been
	277	* translated.
	278	*/
	279	tb_unlock();
	280	mmap_lock();
	281	tb_lock();
	282	tb = tb_find_physical(cpu, pc, cs_base, flags);
	283	if (tb) {
	284	mmap_unlock();
	285	goto found;
2c90fe2b	286	}
9fd1a948 PB	287	#endif
	288
	289	/* if no translated code available, then translate it now */
	290	tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
	291
	292	#ifdef CONFIG_USER_ONLY
	293	mmap_unlock();
	294	#endif
	295
	296	found:
8a40a180	297	/* we add the TB in the virtual pc hash table */
8cd70437	298	cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180 FB	299	return tb;
	300	}
	301
ea3e9847	302	static inline TranslationBlock tb_find_fast(CPUState cpu)
8a40a180	303	{
ea3e9847	304	CPUArchState env = (CPUArchState )cpu->env_ptr;
8a40a180 FB	305	TranslationBlock *tb;
8a40a180 FB	306	target_ulong cs_base, pc;
6b917547	307	int flags;
8a40a180 FB	308
	309	/* we record a subset of the CPU state. It will
	310	always be the same before a given translated block
	311	is executed. */
6b917547	312	cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437	313	tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f TS	314	if (unlikely(!tb \|\| tb->pc != pc \|\| tb->cs_base != cs_base \|\|
551bd27f TS	315	tb->flags != flags)) {
ea3e9847	316	tb = tb_find_slow(cpu, pc, cs_base, flags);
8a40a180 FB	317	}
	318	return tb;
	319	}
	320
ea3e9847	321	static void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed	322	{
86025ee4	323	CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed JK	324	CPUWatchpoint *wp;
1009d2ed JK	325
ff4700b0 AF	326	if (!cpu->watchpoint_hit) {
ff4700b0 AF	327	QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed JK	328	wp->flags &= ~BP_WATCHPOINT_HIT;
	329	}
	330	}
86025ee4 PM	331
86025ee4 PM	332	cc->debug_excp_handler(cpu);
1009d2ed JK	333	}
1009d2ed JK	334
7d13299d FB	335	/* main execution loop */
7d13299d FB	336
ea3e9847	337	int cpu_exec(CPUState *cpu)
7d13299d	338	{
97a8ea5a	339	CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551 AF	340	#ifdef TARGET_I386
693fa551 AF	341	X86CPU *x86_cpu = X86_CPU(cpu);
ea3e9847	342	CPUArchState *env = &x86_cpu->env;
97a8ea5a	343	#endif
8a40a180	344	int ret, interrupt_request;
8a40a180	345	TranslationBlock *tb;
c27004ec	346	uint8_t *tc_ptr;
3e9bd63a	347	uintptr_t next_tb;
c2aa5f81 ST	348	SyncClocks sc;
c2aa5f81 ST	349
6f060969 PD	350	/* replay_interrupt may need current_cpu */
	351	current_cpu = cpu;
	352
259186a7	353	if (cpu->halted) {
6220e900	354	#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
6f060969 PD	355	if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
6f060969 PD	356	&& replay_interrupt()) {
6220e900 PD	357	apic_poll_irq(x86_cpu->apic_state);
	358	cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
	359	}
	360	#endif
3993c6bd	361	if (!cpu_has_work(cpu)) {
6f060969	362	current_cpu = NULL;
eda48c34 PB	363	return EXCP_HALTED;
	364	}
	365
259186a7	366	cpu->halted = 0;
eda48c34	367	}
5a1e3cfc	368
9373e632	369	atomic_mb_set(&tcg_current_cpu, cpu);
79e2b9ae PB	370	rcu_read_lock();
79e2b9ae PB	371
aed807c8	372	if (unlikely(atomic_mb_read(&exit_request))) {
fcd7d003	373	cpu->exit_request = 1;
1a28cac3 MT	374	}
1a28cac3 MT	375
cffe7b32	376	cc->cpu_exec_enter(cpu);
9d27abd9	377
c2aa5f81 ST	378	/* Calculate difference between guest clock and host clock.
	379	* This delay includes the delay of the last cycle, so
	380	* what we have to do is sleep until it is 0. As for the
	381	* advance/delay we gain here, we try to fix it next time.
	382	*/
	383	init_delay_params(&sc, cpu);
	384
7d13299d	385	/* prepare setjmp context for exception handling */
3fb2ded1	386	for(;;) {
6f03bef0	387	if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1	388	/* if an exception is pending, we execute it here */
27103424 AF	389	if (cpu->exception_index >= 0) {
27103424 AF	390	if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1	391	/* exit request from the cpu execution loop */
27103424	392	ret = cpu->exception_index;
1009d2ed	393	if (ret == EXCP_DEBUG) {
ea3e9847	394	cpu_handle_debug_exception(cpu);
1009d2ed	395	}
e511b4d7	396	cpu->exception_index = -1;
3fb2ded1	397	break;
72d239ed AJ	398	} else {
72d239ed AJ	399	#if defined(CONFIG_USER_ONLY)
3fb2ded1	400	/* if user mode only, we simulate a fake exception
9f083493	401	which will be handled outside the cpu execution
3fb2ded1	402	loop */
83479e77	403	#if defined(TARGET_I386)
97a8ea5a	404	cc->do_interrupt(cpu);
83479e77	405	#endif
27103424	406	ret = cpu->exception_index;
e511b4d7	407	cpu->exception_index = -1;
3fb2ded1	408	break;
72d239ed	409	#else
6f060969 PD	410	if (replay_exception()) {
	411	cc->do_interrupt(cpu);
	412	cpu->exception_index = -1;
	413	} else if (!replay_has_interrupt()) {
	414	/* give a chance to iothread in replay mode */
	415	ret = EXCP_INTERRUPT;
	416	break;
	417	}
83479e77	418	#endif
3fb2ded1	419	}
6f060969 PD	420	} else if (replay_has_exception()
	421	&& cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
	422	/* try to cause an exception pending in the log */
	423	cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true);
	424	ret = -1;
	425	break;
5fafdf24	426	}
9df217a3	427
b5fc09ae	428	next_tb = 0; /* force lookup of first TB */
3fb2ded1	429	for(;;) {
259186a7	430	interrupt_request = cpu->interrupt_request;
e1638bd8	431	if (unlikely(interrupt_request)) {
ed2803da	432	if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8	433	/* Mask out external interrupts for this step. */
3125f763	434	interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8	435	}
6658ffb8	436	if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7	437	cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424	438	cpu->exception_index = EXCP_DEBUG;
5638d180	439	cpu_loop_exit(cpu);
6658ffb8	440	}
6f060969 PD	441	if (replay_mode == REPLAY_MODE_PLAY
	442	&& !replay_has_interrupt()) {
	443	/* Do nothing */
	444	} else if (interrupt_request & CPU_INTERRUPT_HALT) {
	445	replay_interrupt();
259186a7 AF	446	cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
259186a7 AF	447	cpu->halted = 1;
27103424	448	cpu->exception_index = EXCP_HLT;
5638d180	449	cpu_loop_exit(cpu);
a90b7318	450	}
4a92a558	451	#if defined(TARGET_I386)
6f060969 PD	452	else if (interrupt_request & CPU_INTERRUPT_INIT) {
6f060969 PD	453	replay_interrupt();
4a92a558 PB	454	cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
	455	do_cpu_init(x86_cpu);
	456	cpu->exception_index = EXCP_HALTED;
	457	cpu_loop_exit(cpu);
	458	}
	459	#else
6f060969 PD	460	else if (interrupt_request & CPU_INTERRUPT_RESET) {
6f060969 PD	461	replay_interrupt();
4a92a558	462	cpu_reset(cpu);
6f060969	463	cpu_loop_exit(cpu);
4a92a558	464	}
68a79315	465	#endif
9585db68 RH	466	/* The target hook has 3 exit conditions:
	467	False when the interrupt isn't processed,
	468	True when it is, and we should restart on a new TB,
	469	and via longjmp via cpu_loop_exit. */
6f060969 PD	470	else {
	471	replay_interrupt();
	472	if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
	473	next_tb = 0;
	474	}
9585db68 RH	475	}
	476	/* Don't use the cached interrupt_request value,
	477	do_interrupt may have updated the EXITTB flag. */
259186a7 AF	478	if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
259186a7 AF	479	cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1 FB	480	/* ensure that no TB jump will be modified as
bf3e8bf1 FB	481	the program flow was changed */
b5fc09ae	482	next_tb = 0;
bf3e8bf1	483	}
be214e6c	484	}
6f060969 PD	485	if (unlikely(cpu->exit_request
6f060969 PD	486	\|\| replay_has_interrupt())) {
fcd7d003	487	cpu->exit_request = 0;
27103424	488	cpu->exception_index = EXCP_INTERRUPT;
5638d180	489	cpu_loop_exit(cpu);
3fb2ded1	490	}
677ef623	491	tb_lock();
ea3e9847	492	tb = tb_find_fast(cpu);
d5975363 PB	493	/* Note: we do it here to avoid a gcc bug on Mac OS X when
d5975363 PB	494	doing it in tb_find_slow */
5e5f07e0	495	if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363 PB	496	/* as some TB could have been invalidated because
	497	of memory exceptions while generating the code, we
	498	must recompute the hash index here */
	499	next_tb = 0;
5e5f07e0	500	tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363	501	}
c30d1aea PM	502	if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
	503	qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
	504	tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
	505	}
8a40a180 FB	506	/* see if we can patch the calling TB. When the TB
	507	spans two pages, we cannot safely do a direct
	508	jump. */
89a82cd4 RH	509	if (next_tb != 0 && tb->page_addr[1] == -1
89a82cd4 RH	510	&& !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
0980011b PM	511	tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
0980011b PM	512	next_tb & TB_EXIT_MASK, tb);
3fb2ded1	513	}
677ef623	514	tb_unlock();
fcd7d003	515	if (likely(!cpu->exit_request)) {
6db8b538	516	trace_exec_tb(tb, tb->pc);
2e70f6ef	517	tc_ptr = tb->tc_ptr;
e965fc38	518	/* execute the generated code */
b0a46fa7	519	cpu->current_tb = tb;
77211379	520	next_tb = cpu_tb_exec(cpu, tc_ptr);
b0a46fa7	521	cpu->current_tb = NULL;
378df4b2 PM	522	switch (next_tb & TB_EXIT_MASK) {
	523	case TB_EXIT_REQUESTED:
	524	/* Something asked us to stop executing
	525	* chained TBs; just continue round the main
	526	* loop. Whatever requested the exit will also
	527	* have set something else (eg exit_request or
	528	* interrupt_request) which we will handle
ab096a75 PB	529	* next time around the loop. But we need to
	530	* ensure the tcg_exit_req read in generated code
	531	* comes before the next read of cpu->exit_request
	532	* or cpu->interrupt_request.
378df4b2	533	*/
ab096a75	534	smp_rmb();
378df4b2 PM	535	next_tb = 0;
	536	break;
	537	case TB_EXIT_ICOUNT_EXPIRED:
	538	{
bf20dc07	539	/* Instruction counter expired. */
52851b7e	540	int insns_left = cpu->icount_decr.u32;
efee7340	541	if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef	542	/* Refill decrementer and continue execution. */
efee7340	543	cpu->icount_extra += insns_left;
52851b7e	544	insns_left = MIN(0xffff, cpu->icount_extra);
efee7340	545	cpu->icount_extra -= insns_left;
28ecfd7a	546	cpu->icount_decr.u16.low = insns_left;
2e70f6ef PB	547	} else {
	548	if (insns_left > 0) {
	549	/* Execute remaining instructions. */
52851b7e	550	tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
56c0269a	551	cpu_exec_nocache(cpu, insns_left, tb, false);
c2aa5f81	552	align_clocks(&sc, cpu);
2e70f6ef	553	}
27103424	554	cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef	555	next_tb = 0;
5638d180	556	cpu_loop_exit(cpu);
2e70f6ef	557	}
378df4b2 PM	558	break;
	559	}
	560	default:
	561	break;
2e70f6ef PB	562	}
2e70f6ef PB	563	}
c2aa5f81 ST	564	/* Try to align the host and virtual clocks
	565	if the guest is in advance */
	566	align_clocks(&sc, cpu);
4cbf74b6 FB	567	/* reset soft MMU for next block (it can currently
4cbf74b6 FB	568	only be set by a memory fault) */
50a518e3	569	} /* for(;;) */
0d101938 JK	570	} else {
	571	/* Reload env after longjmp - the compiler may have smashed all
	572	* local variables as longjmp is marked 'noreturn'. */
4917cf44	573	cpu = current_cpu;
6c78f29a	574	cc = CPU_GET_CLASS(cpu);
626cf8f4	575	cpu->can_do_io = 1;
693fa551 AF	576	#ifdef TARGET_I386
693fa551 AF	577	x86_cpu = X86_CPU(cpu);
ea3e9847	578	env = &x86_cpu->env;
6c78f29a	579	#endif
677ef623	580	tb_lock_reset();
7d13299d	581	}
3fb2ded1 FB	582	} /* for(;;) */
3fb2ded1 FB	583
cffe7b32	584	cc->cpu_exec_exit(cpu);
79e2b9ae	585	rcu_read_unlock();
1057eaa7	586
4917cf44 AF	587	/* fail safe : never use current_cpu outside cpu_exec() */
4917cf44 AF	588	current_cpu = NULL;
9373e632 PB	589
	590	/* Does not need atomic_mb_set because a spurious wakeup is okay. */
	591	atomic_set(&tcg_current_cpu, NULL);
7d13299d FB	592	return ret;
7d13299d FB	593	}