]> Git Repo - qemu.git/blame - include/hw/i386/pc.h
target-i386: register a separate KVM address space including SMRAM regions
[qemu.git] / include / hw / i386 / pc.h
CommitLineData
87ecb68b
PB
1#ifndef HW_PC_H
2#define HW_PC_H
376253ec
AL
3
4#include "qemu-common.h"
022c62cb 5#include "exec/memory.h"
9521d42b 6#include "hw/boards.h"
0d09e41a
PB
7#include "hw/isa/isa.h"
8#include "hw/block/fdc.h"
1422e32d 9#include "net/net.h"
0d09e41a 10#include "hw/i386/ioapic.h"
376253ec 11
3459a625 12#include "qemu/range.h"
b20c9bd5
MT
13#include "qemu/bitmap.h"
14#include "sysemu/sysemu.h"
15#include "hw/pci/pci.h"
d5747cac 16#include "hw/boards.h"
68a27b20 17#include "hw/compat.h"
a7d69ff1 18#include "hw/mem/pc-dimm.h"
3459a625 19
7a10ef51
LPF
20#define HPET_INTCAP "hpet-intcap"
21
619d11e4
IM
22/**
23 * PCMachineState:
781bbd6b 24 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
91aa70ab
IM
25 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
26 * backend's alignment value if provided
619d11e4 27 */
d5747cac
IM
28struct PCMachineState {
29 /*< private >*/
30 MachineState parent_obj;
619d11e4
IM
31
32 /* <public> */
a7d69ff1 33 MemoryHotplugState hotplug_memory;
781bbd6b
IM
34
35 HotplugHandler *acpi_dev;
2d996150 36 ISADevice *rtc;
c87b1520
DS
37
38 uint64_t max_ram_below_4g;
d1048bef 39 OnOffAuto vmport;
91aa70ab 40 bool enforce_aligned_dimm;
d5747cac
IM
41};
42
781bbd6b 43#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
bf1e8939 44#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
c87b1520 45#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
9b23cfb7 46#define PC_MACHINE_VMPORT "vmport"
91aa70ab 47#define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm"
781bbd6b 48
95bee274
IM
49/**
50 * PCMachineClass:
51 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
52 */
d5747cac
IM
53struct PCMachineClass {
54 /*< private >*/
55 MachineClass parent_class;
95bee274
IM
56
57 /*< public >*/
58 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
59 DeviceState *dev);
d5747cac
IM
60};
61
62typedef struct PCMachineState PCMachineState;
63typedef struct PCMachineClass PCMachineClass;
64
65#define TYPE_PC_MACHINE "generic-pc-machine"
66#define PC_MACHINE(obj) \
67 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
68#define PC_MACHINE_GET_CLASS(obj) \
69 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
70#define PC_MACHINE_CLASS(klass) \
71 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
72
87ecb68b
PB
73/* PC-style peripherals (also used by other machines). */
74
3459a625
MT
75typedef struct PcPciInfo {
76 Range w32;
77 Range w64;
78} PcPciInfo;
79
f854ecc7
MT
80#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
81#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
82#define ACPI_PM_PROP_S4_VAL "s4_val"
83#define ACPI_PM_PROP_SCI_INT "sci_int"
84#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
85#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
86#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
87#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
88#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
89
3459a625 90struct PcGuestInfo {
6dd2a5c9 91 bool isapc_ram_fw;
f30ee8a9 92 hwaddr ram_size, ram_size_below_4g;
b20c9bd5
MT
93 unsigned apic_id_limit;
94 bool apic_xrupt_override;
95 uint64_t numa_nodes;
96 uint64_t *node_mem;
97 uint64_t *node_cpu;
3459a625 98 FWCfgState *fw_cfg;
07fb6176 99 int legacy_acpi_table_size;
72c194f7 100 bool has_acpi_build;
de268e13 101 bool has_reserved_memory;
384fb32e 102 bool rsdp_in_ram;
3459a625
MT
103};
104
87ecb68b 105/* parallel.c */
07dc7880
MA
106
107void parallel_hds_isa_init(ISABus *bus, int n);
defdb20e 108
63858cd9 109bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e 110 hwaddr base, int it_shift, qemu_irq irq,
defdb20e 111 CharDriverState *chr);
87ecb68b
PB
112
113/* i8259.c */
114
9aa78c42 115extern DeviceState *isa_pic;
48a18b3c 116qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
10b61882 117qemu_irq *kvm_i8259_init(ISABus *bus);
9aa78c42
JK
118int pic_read_irq(DeviceState *d);
119int pic_get_output(DeviceState *d);
1ce6be24
MA
120void hmp_info_pic(Monitor *mon, const QDict *qdict);
121void hmp_info_irq(Monitor *mon, const QDict *qdict);
87ecb68b 122
b881fbe9 123/* Global System Interrupts */
96051119 124
b881fbe9 125#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab 126
b881fbe9 127typedef struct GSIState {
43a0db35 128 qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9
JK
129 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
130} GSIState;
131
132void gsi_handler(void *opaque, int n, int level);
845773ab 133
87ecb68b 134/* vmport.c */
d67f679d
JK
135typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
136
48a18b3c 137static inline void vmport_init(ISABus *bus)
6872ef61 138{
48a18b3c 139 isa_create_simple(bus, "vmport");
6872ef61 140}
d67f679d
JK
141
142void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
86d86414
BS
143void vmmouse_get_data(uint32_t *data);
144void vmmouse_set_data(const uint32_t *data);
87ecb68b 145
87ecb68b
PB
146/* pckbd.c */
147
148void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
149void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac 150 MemoryRegion *region, ram_addr_t size,
a8170e5e 151 hwaddr mask);
956a3e6b
BS
152void i8042_isa_mouse_fake_event(void *opaque);
153void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
87ecb68b 154
87ecb68b
PB
155/* pc.c */
156extern int fd_bootchk;
157
8e78eb28 158void pc_register_ferr_irq(qemu_irq irq);
845773ab
IY
159void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
160
62fc403f 161void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
c649983b 162void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c 163void pc_acpi_init(const char *default_dsdt);
3459a625
MT
164
165PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
166 ram_addr_t above_4g_mem_size);
167
927766c7
MT
168void pc_set_legacy_acpi_data_size(void);
169
39848901
IM
170#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
171#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
172#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
173#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
174#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
1466cef3
MT
175#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
176
39848901 177
83d08f26
MT
178void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
179 MemoryRegion *pci_address_space);
39848901 180
b33a5bbf
CL
181FWCfgState *xen_load_linux(const char *kernel_filename,
182 const char *kernel_cmdline,
183 const char *initrd_filename,
184 ram_addr_t below_4g_mem_size,
185 PcGuestInfo *guest_info);
9521d42b
PB
186FWCfgState *pc_memory_init(MachineState *machine,
187 MemoryRegion *system_memory,
a88b362c
LE
188 ram_addr_t below_4g_mem_size,
189 ram_addr_t above_4g_mem_size,
190 MemoryRegion *rom_memory,
3459a625
MT
191 MemoryRegion **ram_memory,
192 PcGuestInfo *guest_info);
0b0cc076 193qemu_irq pc_allocate_cpu_irq(void);
48a18b3c
HP
194DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
195void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
1611977c 196 ISADevice **rtc_state,
fd53c87c 197 bool create_fdctrl,
34d4260e 198 ISADevice **floppy,
7a10ef51
LPF
199 bool no_vmport,
200 uint32 hpet_irqs);
48a18b3c 201void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
845773ab 202void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
2d996150 203 const char *boot_device, MachineState *machine,
34d4260e 204 ISADevice *floppy, BusState *ide0, BusState *ide1,
63ffb564 205 ISADevice *s);
9011a1a7 206void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
845773ab 207void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28 208
f885f1ea 209typedef void (*cpu_set_smm_t)(int smm, void *arg);
f885f1ea 210
a39e3564
JB
211void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
212
9d5e77a2 213/* acpi_piix.c */
53b67b30 214
a5c82852
AF
215I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
216 qemu_irq sci_irq, qemu_irq smi_irq,
6e7d8249 217 int kvm_enabled, DeviceState **piix4_pm);
87ecb68b 218void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b 219
16b29ae1
AL
220/* hpet.c */
221extern int no_hpet;
222
87ecb68b 223/* piix_pci.c */
0a3bacf3
JQ
224struct PCII440FXState;
225typedef struct PCII440FXState PCII440FXState;
226
1e39101c 227PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
60573079 228 ISABus **isa_bus, qemu_irq *pic,
aee97b84
AK
229 MemoryRegion *address_space_mem,
230 MemoryRegion *address_space_io,
ae0a5466 231 ram_addr_t ram_size,
ddaaefb4 232 ram_addr_t below_4g_mem_size,
39848901 233 ram_addr_t above_4g_mem_size,
ae0a5466
AK
234 MemoryRegion *pci_memory,
235 MemoryRegion *ram_memory);
87ecb68b 236
277e9340 237PCIBus *find_i440fx(void);
823e675a 238/* piix4.c */
b1d8e52e 239extern PCIDevice *piix4_dev;
142e9787 240int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
87ecb68b
PB
241
242/* vga.c */
cb5a7aa8 243enum vga_retrace_method {
244 VGA_RETRACE_DUMB,
245 VGA_RETRACE_PRECISE
246};
247
248extern enum vga_retrace_method vga_retrace_method;
87ecb68b 249
a8170e5e
AK
250int isa_vga_mm_init(hwaddr vram_base,
251 hwaddr ctrl_base, int it_shift,
be20f9e9 252 MemoryRegion *address_space);
87ecb68b 253
87ecb68b 254/* ne2000.c */
48a18b3c 255static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
60a14ad3 256{
4a17cc4f
AF
257 DeviceState *dev;
258 ISADevice *isadev;
87ecb68b 259
60a14ad3
BS
260 qemu_check_nic_model(nd, "ne2k_isa");
261
4a17cc4f
AF
262 isadev = isa_try_create(bus, "ne2k_isa");
263 if (!isadev) {
cd1b8a8b
BS
264 return false;
265 }
4a17cc4f
AF
266 dev = DEVICE(isadev);
267 qdev_prop_set_uint32(dev, "iobase", base);
268 qdev_prop_set_uint32(dev, "irq", irq);
269 qdev_set_nic_properties(dev, nd);
270 qdev_init_nofail(dev);
cd1b8a8b 271 return true;
60a14ad3 272}
87ecb68b 273
cbc5b5f3 274/* pc_sysfw.c */
6dd2a5c9
PB
275void pc_system_firmware_init(MemoryRegion *rom_memory,
276 bool isapc_ram_fw);
cbc5b5f3 277
3ab135f3 278/* pvpanic.c */
309cd62d 279uint16_t pvpanic_port(void);
3ab135f3 280
4c5b10b7
JS
281/* e820 types */
282#define E820_RAM 1
283#define E820_RESERVED 2
284#define E820_ACPI 3
285#define E820_NVS 4
286#define E820_UNUSABLE 5
287
288int e820_add_entry(uint64_t, uint64_t, uint32_t);
7bf8ef19
GS
289int e820_get_num_entries(void);
290bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
4c5b10b7 291
42134ac9
EH
292#define PC_COMPAT_2_3 \
293 HW_COMPAT_2_3
294
295#define PC_COMPAT_2_2 \
296 PC_COMPAT_2_3 \
297 HW_COMPAT_2_2
298
299#define PC_COMPAT_2_1 \
300 PC_COMPAT_2_2 \
301 HW_COMPAT_2_1
302
9df11c9f 303#define PC_COMPAT_2_0 \
42134ac9 304 PC_COMPAT_2_1 \
9df11c9f 305 {\
3eff1f46
PB
306 .driver = "virtio-scsi-pci",\
307 .property = "any_layout",\
308 .value = "off",\
309 },{\
34774320
IM
310 .driver = "PIIX4_PM",\
311 .property = "memory-hotplug-support",\
312 .value = "off",\
313 },\
9df11c9f 314 {\
aa93200b
GS
315 .driver = "apic",\
316 .property = "version",\
317 .value = stringify(0x11),\
34774320
IM
318 },\
319 {\
7bafd888
GH
320 .driver = "nec-usb-xhci",\
321 .property = "superspeed-ports-first",\
322 .value = "off",\
13cc2c3e 323 },\
e6043e92
DDAG
324 {\
325 .driver = "nec-usb-xhci",\
326 .property = "force-pcie-endcap",\
327 .value = "on",\
328 },\
13cc2c3e
BZ
329 {\
330 .driver = "pci-serial",\
331 .property = "prog_if",\
332 .value = stringify(0),\
333 },\
334 {\
335 .driver = "pci-serial-2x",\
fa118d1f 336 .property = "prog_if",\
13cc2c3e
BZ
337 .value = stringify(0),\
338 },\
339 {\
340 .driver = "pci-serial-4x",\
341 .property = "prog_if",\
342 .value = stringify(0),\
f57fcf70
JW
343 },\
344 {\
345 .driver = "virtio-net-pci",\
346 .property = "guest_announce",\
347 .value = "off",\
b8f5cfd6
EH
348 },\
349 {\
350 .driver = "ICH9-LPC",\
351 .property = "memory-hotplug-support",\
352 .value = "off",\
353 },{\
354 .driver = "xio3130-downstream",\
355 .property = COMPAT_PROP_PCP,\
356 .value = "off",\
357 },{\
358 .driver = "ioh3420",\
359 .property = COMPAT_PROP_PCP,\
360 .value = "off",\
a7cde24d 361 },
9df11c9f 362
5319dc7b 363#define PC_COMPAT_1_7 \
a7cde24d 364 PC_COMPAT_2_0 \
5319dc7b
GH
365 {\
366 .driver = TYPE_USB_DEVICE,\
367 .property = "msos-desc",\
368 .value = "no",\
9e047b98
MT
369 },\
370 {\
371 .driver = "PIIX4_PM",\
372 .property = "acpi-pci-hotplug-with-bridge-support",\
373 .value = "off",\
b8f5cfd6
EH
374 },\
375 {\
376 .driver = "hpet",\
377 .property = HPET_INTCAP,\
378 .value = stringify(4),\
a7cde24d 379 },
5319dc7b 380
e9845f09 381#define PC_COMPAT_1_6 \
a7cde24d 382 PC_COMPAT_1_7 \
e9845f09
VM
383 {\
384 .driver = "e1000",\
385 .property = "mitigation",\
386 .value = "off",\
f8e6a11a
EH
387 },{\
388 .driver = "qemu64-" TYPE_X86_CPU,\
389 .property = "model",\
390 .value = stringify(2),\
391 },{\
392 .driver = "qemu32-" TYPE_X86_CPU,\
393 .property = "model",\
394 .value = stringify(3),\
04c7d8b8
CR
395 },{\
396 .driver = "i440FX-pcihost",\
397 .property = "short_root_bus",\
398 .value = stringify(1),\
399 },{\
400 .driver = "q35-pcihost",\
401 .property = "short_root_bus",\
402 .value = stringify(1),\
a7cde24d 403 },
e9845f09 404
ffce9ebb 405#define PC_COMPAT_1_5 \
a7cde24d 406 PC_COMPAT_1_6 \
ffce9ebb
EH
407 {\
408 .driver = "Conroe-" TYPE_X86_CPU,\
409 .property = "model",\
410 .value = stringify(2),\
6b11322e
EH
411 },{\
412 .driver = "Conroe-" TYPE_X86_CPU,\
413 .property = "level",\
414 .value = stringify(2),\
ffce9ebb
EH
415 },{\
416 .driver = "Penryn-" TYPE_X86_CPU,\
417 .property = "model",\
418 .value = stringify(2),\
6b11322e
EH
419 },{\
420 .driver = "Penryn-" TYPE_X86_CPU,\
421 .property = "level",\
422 .value = stringify(2),\
ffce9ebb
EH
423 },{\
424 .driver = "Nehalem-" TYPE_X86_CPU,\
425 .property = "model",\
426 .value = stringify(2),\
6b11322e
EH
427 },{\
428 .driver = "Nehalem-" TYPE_X86_CPU,\
429 .property = "level",\
430 .value = stringify(2),\
488f069b
MT
431 },{\
432 .driver = "virtio-net-pci",\
433 .property = "any_layout",\
434 .value = "off",\
9337e3b6
EH
435 },{\
436 .driver = TYPE_X86_CPU,\
437 .property = "pmu",\
438 .value = "on",\
04c7d8b8
CR
439 },{\
440 .driver = "i440FX-pcihost",\
441 .property = "short_root_bus",\
442 .value = stringify(0),\
443 },{\
444 .driver = "q35-pcihost",\
445 .property = "short_root_bus",\
446 .value = stringify(0),\
a7cde24d 447 },
ffce9ebb 448
bf3caa3d 449#define PC_COMPAT_1_4 \
a7cde24d 450 PC_COMPAT_1_5 \
bf3caa3d
PB
451 {\
452 .driver = "scsi-hd",\
453 .property = "discard_granularity",\
454 .value = stringify(0),\
4974920a 455 },{\
bf3caa3d
PB
456 .driver = "scsi-cd",\
457 .property = "discard_granularity",\
458 .value = stringify(0),\
4974920a 459 },{\
bf3caa3d
PB
460 .driver = "scsi-disk",\
461 .property = "discard_granularity",\
462 .value = stringify(0),\
4974920a 463 },{\
bf3caa3d
PB
464 .driver = "ide-hd",\
465 .property = "discard_granularity",\
466 .value = stringify(0),\
4974920a 467 },{\
bf3caa3d
PB
468 .driver = "ide-cd",\
469 .property = "discard_granularity",\
470 .value = stringify(0),\
4974920a 471 },{\
bf3caa3d
PB
472 .driver = "ide-drive",\
473 .property = "discard_granularity",\
474 .value = stringify(0),\
c45e5b5b 475 },{\
bf3caa3d
PB
476 .driver = "virtio-blk-pci",\
477 .property = "discard_granularity",\
478 .value = stringify(0),\
4974920a 479 },{\
554f1997
GH
480 .driver = "virtio-serial-pci",\
481 .property = "vectors",\
482 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
483 .value = stringify(0xFFFFFFFF),\
644c9858
DF
484 },{ \
485 .driver = "virtio-net-pci", \
486 .property = "ctrl_guest_offloads", \
487 .value = "off", \
c45e5b5b
GH
488 },{\
489 .driver = "e1000",\
490 .property = "romfile",\
491 .value = "pxe-e1000.rom",\
492 },{\
493 .driver = "ne2k_pci",\
494 .property = "romfile",\
495 .value = "pxe-ne2k_pci.rom",\
496 },{\
497 .driver = "pcnet",\
498 .property = "romfile",\
499 .value = "pxe-pcnet.rom",\
500 },{\
501 .driver = "rtl8139",\
502 .property = "romfile",\
503 .value = "pxe-rtl8139.rom",\
504 },{\
505 .driver = "virtio-net-pci",\
506 .property = "romfile",\
507 .value = "pxe-virtio.rom",\
b2a856d9
AF
508 },{\
509 .driver = "486-" TYPE_X86_CPU,\
510 .property = "model",\
511 .value = stringify(0),\
a7cde24d 512 },
bf3caa3d 513
865906f7 514static inline void pc_common_machine_options(MachineClass *m)
fddd179a
EH
515{
516 m->default_boot_order = "cad";
517}
518
865906f7 519static inline void pc_default_machine_options(MachineClass *m)
fddd179a
EH
520{
521 pc_common_machine_options(m);
522 m->hot_add_cpu = pc_hot_add_cpu;
523 m->max_cpus = 255;
524}
525
25519b06 526#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
865906f7
EH
527 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
528 { \
529 MachineClass *mc = MACHINE_CLASS(oc); \
530 optsfn(mc); \
531 mc->name = namestr; \
532 mc->init = initfn; \
533 } \
534 static const TypeInfo pc_machine_type_##suffix = { \
535 .name = namestr TYPE_MACHINE_SUFFIX, \
536 .parent = TYPE_PC_MACHINE, \
537 .class_init = pc_machine_##suffix##_class_init, \
538 }; \
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539 static void pc_machine_init_##suffix(void) \
540 { \
865906f7 541 type_register(&pc_machine_type_##suffix); \
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542 } \
543 machine_init(pc_machine_init_##suffix)
544
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545#define SET_MACHINE_COMPAT(m, COMPAT) do { \
546 static GlobalProperty props[] = { \
547 COMPAT \
548 { /* end of list */ } \
549 }; \
550 (m)->compat_props = props; \
551} while (0)
552
87ecb68b 553#endif
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