[qemu.git] / include / hw / i386 / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/i386/ioapic.h"

#include "qemu/range.h"
#include "qemu/bitmap.h"
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"
#include "hw/boards.h"

#define HPET_INTCAP "hpet-intcap"

/**
 * PCMachineState:
 * @hotplug_memory_base: address in guest RAM address space where hotplug memory
 * address space begins.
 * @hotplug_memory: hotplug memory addess space container
 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
 */
struct PCMachineState {
    /*< private >*/
    MachineState parent_obj;

    /* <public> */
    ram_addr_t hotplug_memory_base;
    MemoryRegion hotplug_memory;

    HotplugHandler *acpi_dev;
};

#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"

/**
 * PCMachineClass:
 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
 */
struct PCMachineClass {
    /*< private >*/
    MachineClass parent_class;

    /*< public >*/
    HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
                                           DeviceState *dev);
};

typedef struct PCMachineState PCMachineState;
typedef struct PCMachineClass PCMachineClass;

#define TYPE_PC_MACHINE "generic-pc-machine"
#define PC_MACHINE(obj) \
    OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_GET_CLASS(obj) \
    OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_CLASS(klass) \
    OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)

void qemu_register_pc_machine(QEMUMachine *m);

/* PC-style peripherals (also used by other machines).  */

typedef struct PcPciInfo {
    Range w32;
    Range w64;
} PcPciInfo;

#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
#define ACPI_PM_PROP_S4_VAL "s4_val"
#define ACPI_PM_PROP_SCI_INT "sci_int"
#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"

struct PcGuestInfo {
    bool has_pci_info;
    bool isapc_ram_fw;
    hwaddr ram_size, ram_size_below_4g;
    unsigned apic_id_limit;
    bool apic_xrupt_override;
    uint64_t numa_nodes;
    uint64_t *node_mem;
    uint64_t *node_cpu;
    FWCfgState *fw_cfg;
    bool has_acpi_build;
    bool has_reserved_memory;
};

/* parallel.c */
static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
{
    DeviceState *dev;
    ISADevice *isadev;

    isadev = isa_try_create(bus, "isa-parallel");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "index", index);
    qdev_prop_set_chr(dev, "chardev", chr);
    if (qdev_init(dev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(MemoryRegion *address_space,
                      hwaddr base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
qemu_irq *kvm_i8259_init(ISABus *bus);
int pic_read_irq(DeviceState *d);
int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon, const QDict *qdict);
void irq_info(Monitor *mon, const QDict *qdict);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* vmport.c */
typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);

static inline void vmport_init(ISABus *bus)
{
    isa_create_simple(bus, "vmport");
}

void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);

PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
                                ram_addr_t above_4g_mem_size);

#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)


void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
                            MemoryRegion *pci_address_space);

FWCfgState *pc_memory_init(MemoryRegion *system_memory,
                           const char *kernel_filename,
                           const char *kernel_cmdline,
                           const char *initrd_filename,
                           ram_addr_t below_4g_mem_size,
                           ram_addr_t above_4g_mem_size,
                           MemoryRegion *rom_memory,
                           MemoryRegion **ram_memory,
                           PcGuestInfo *guest_info);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport,
                          uint32 hpet_irqs);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);

/* acpi_piix.c */

I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                      qemu_irq sci_irq, qemu_irq smi_irq,
                      int kvm_enabled, FWCfgState *fw_cfg,
                      DeviceState **piix4_pm);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    ISABus **isa_bus, qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    ram_addr_t below_4g_mem_size,
                    ram_addr_t above_4g_mem_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

PCIBus *find_i440fx(void);
/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

int isa_vga_mm_init(hwaddr vram_base,
                    hwaddr ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
{
    DeviceState *dev;
    ISADevice *isadev;

    qemu_check_nic_model(nd, "ne2k_isa");

    isadev = isa_try_create(bus, "ne2k_isa");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "iobase", base);
    qdev_prop_set_uint32(dev, "irq",    irq);
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
    return true;
}

/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory,
                             bool isapc_ram_fw);

/* pvpanic.c */
uint16_t pvpanic_port(void);

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);

#define PC_Q35_COMPAT_2_0 \
        PC_COMPAT_2_0, \
        {\
            .driver   = "ICH9 LPC",\
            .property = "memory-hotplug-support",\
            .value    = "off",\
        }

#define PC_Q35_COMPAT_1_7 \
        PC_COMPAT_1_7, \
        PC_Q35_COMPAT_2_0, \
        {\
            .driver   = "hpet",\
            .property = HPET_INTCAP,\
            .value    = stringify(4),\
        }

#define PC_Q35_COMPAT_1_6 \
        PC_COMPAT_1_6, \
        PC_Q35_COMPAT_1_7

#define PC_Q35_COMPAT_1_5 \
        PC_COMPAT_1_5, \
        PC_Q35_COMPAT_1_6

#define PC_Q35_COMPAT_1_4 \
        PC_COMPAT_1_4, \
        PC_Q35_COMPAT_1_5

#define PC_COMPAT_2_0 \
        {\
            .driver   = "PIIX4_PM",\
            .property = "memory-hotplug-support",\
            .value    = "off",\
        },\
        {\
            .driver   = "apic",\
            .property = "version",\
            .value    = stringify(0x11),\
        },\
        {\
            .driver   = "nec-usb-xhci",\
            .property = "superspeed-ports-first",\
            .value    = "off",\
        },\
        {\
            .driver   = "pci-serial",\
            .property = "prog_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-2x",\
            .property = "prof_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-4x",\
            .property = "prog_if",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_7 \
        PC_COMPAT_2_0, \
        {\
            .driver   = TYPE_USB_DEVICE,\
            .property = "msos-desc",\
            .value    = "no",\
        },\
        {\
            .driver   = "PIIX4_PM",\
            .property = "acpi-pci-hotplug-with-bridge-support",\
            .value    = "off",\
        }

#define PC_COMPAT_1_6 \
        PC_COMPAT_1_7, \
        {\
            .driver   = "e1000",\
            .property = "mitigation",\
            .value    = "off",\
        },{\
            .driver   = "qemu64-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "qemu32-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(3),\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        }

#define PC_COMPAT_1_5 \
        PC_COMPAT_1_6, \
        {\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "any_layout",\
            .value    = "off",\
        },{\
            .driver = TYPE_X86_CPU,\
            .property = "pmu",\
            .value = "on",\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_4 \
        PC_COMPAT_1_5, \
        {\
            .driver   = "scsi-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-disk",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-drive",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
        },{\
            .driver   = "virtio-blk-pci",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "virtio-serial-pci",\
            .property = "vectors",\
            /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
            .value    = stringify(0xFFFFFFFF),\
        },{ \
            .driver   = "virtio-net-pci", \
            .property = "ctrl_guest_offloads", \
            .value    = "off", \
        },{\
            .driver   = "e1000",\
            .property = "romfile",\
            .value    = "pxe-e1000.rom",\
        },{\
            .driver   = "ne2k_pci",\
            .property = "romfile",\
            .value    = "pxe-ne2k_pci.rom",\
        },{\
            .driver   = "pcnet",\
            .property = "romfile",\
            .value    = "pxe-pcnet.rom",\
        },{\
            .driver   = "rtl8139",\
            .property = "romfile",\
            .value    = "pxe-rtl8139.rom",\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "romfile",\
            .value    = "pxe-virtio.rom",\
        },{\
            .driver   = "486-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(0),\
        }

#define PC_COMMON_MACHINE_OPTIONS \
    .default_boot_order = "cad"

#define PC_DEFAULT_MACHINE_OPTIONS \
    PC_COMMON_MACHINE_OPTIONS, \
    .hot_add_cpu = pc_hot_add_cpu, \
    .max_cpus = 255

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
022c62cb	5	#include "exec/memory.h"
0d09e41a PB	6	#include "hw/isa/isa.h"
0d09e41a PB	7	#include "hw/block/fdc.h"
1422e32d	8	#include "net/net.h"
0d09e41a	9	#include "hw/i386/ioapic.h"
376253ec	10
3459a625	11	#include "qemu/range.h"
b20c9bd5 MT	12	#include "qemu/bitmap.h"
	13	#include "sysemu/sysemu.h"
	14	#include "hw/pci/pci.h"
d5747cac	15	#include "hw/boards.h"
3459a625	16
7a10ef51 LPF	17	#define HPET_INTCAP "hpet-intcap"
7a10ef51 LPF	18
619d11e4 IM	19	/**
	20	* PCMachineState:
	21	* @hotplug_memory_base: address in guest RAM address space where hotplug memory
	22	* address space begins.
	23	* @hotplug_memory: hotplug memory addess space container
781bbd6b	24	* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
619d11e4	25	*/
d5747cac IM	26	struct PCMachineState {
	27	/< private >/
	28	MachineState parent_obj;
619d11e4 IM	29
	30	/* <public> */
	31	ram_addr_t hotplug_memory_base;
	32	MemoryRegion hotplug_memory;
781bbd6b IM	33
781bbd6b IM	34	HotplugHandler *acpi_dev;
d5747cac IM	35	};
d5747cac IM	36
781bbd6b IM	37	#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
781bbd6b IM	38
95bee274 IM	39	/**
	40	* PCMachineClass:
	41	* @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
	42	*/
d5747cac IM	43	struct PCMachineClass {
	44	/< private >/
	45	MachineClass parent_class;
95bee274 IM	46
	47	/< public >/
	48	HotplugHandler (get_hotplug_handler)(MachineState *machine,
	49	DeviceState *dev);
d5747cac IM	50	};
	51
	52	typedef struct PCMachineState PCMachineState;
	53	typedef struct PCMachineClass PCMachineClass;
	54
	55	#define TYPE_PC_MACHINE "generic-pc-machine"
	56	#define PC_MACHINE(obj) \
	57	OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
	58	#define PC_MACHINE_GET_CLASS(obj) \
	59	OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
	60	#define PC_MACHINE_CLASS(klass) \
	61	OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
	62
	63	void qemu_register_pc_machine(QEMUMachine *m);
	64
87ecb68b PB	65	/* PC-style peripherals (also used by other machines). */
87ecb68b PB	66
3459a625 MT	67	typedef struct PcPciInfo {
	68	Range w32;
	69	Range w64;
	70	} PcPciInfo;
	71
f854ecc7 MT	72	#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
	73	#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
	74	#define ACPI_PM_PROP_S4_VAL "s4_val"
	75	#define ACPI_PM_PROP_SCI_INT "sci_int"
	76	#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
	77	#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
	78	#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
	79	#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
	80	#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
	81
3459a625	82	struct PcGuestInfo {
f8c457b8	83	bool has_pci_info;
6dd2a5c9	84	bool isapc_ram_fw;
f30ee8a9	85	hwaddr ram_size, ram_size_below_4g;
b20c9bd5 MT	86	unsigned apic_id_limit;
	87	bool apic_xrupt_override;
	88	uint64_t numa_nodes;
	89	uint64_t *node_mem;
	90	uint64_t *node_cpu;
3459a625	91	FWCfgState *fw_cfg;
72c194f7	92	bool has_acpi_build;
de268e13	93	bool has_reserved_memory;
3459a625 MT	94	};
3459a625 MT	95
87ecb68b	96	/* parallel.c */
48a18b3c	97	static inline bool parallel_init(ISABus bus, int index, CharDriverState chr)
defdb20e	98	{
4a17cc4f AF	99	DeviceState *dev;
4a17cc4f AF	100	ISADevice *isadev;
defdb20e	101
4a17cc4f AF	102	isadev = isa_try_create(bus, "isa-parallel");
4a17cc4f AF	103	if (!isadev) {
73531538 BS	104	return false;
73531538 BS	105	}
4a17cc4f AF	106	dev = DEVICE(isadev);
	107	qdev_prop_set_uint32(dev, "index", index);
	108	qdev_prop_set_chr(dev, "chardev", chr);
	109	if (qdev_init(dev) < 0) {
defdb20e BS	110	return false;
	111	}
	112	return true;
	113	}
	114
63858cd9	115	bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e	116	hwaddr base, int it_shift, qemu_irq irq,
defdb20e	117	CharDriverState *chr);
87ecb68b PB	118
	119	/* i8259.c */
	120
9aa78c42	121	extern DeviceState *isa_pic;
48a18b3c	122	qemu_irq i8259_init(ISABus bus, qemu_irq parent_irq);
10b61882	123	qemu_irq kvm_i8259_init(ISABus bus);
9aa78c42 JK	124	int pic_read_irq(DeviceState *d);
9aa78c42 JK	125	int pic_get_output(DeviceState *d);
84f2d0ea WX	126	void pic_info(Monitor mon, const QDict qdict);
84f2d0ea WX	127	void irq_info(Monitor mon, const QDict qdict);
87ecb68b	128
b881fbe9	129	/* Global System Interrupts */
96051119	130
b881fbe9	131	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	132
b881fbe9	133	typedef struct GSIState {
43a0db35	134	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	135	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	136	} GSIState;
	137
	138	void gsi_handler(void *opaque, int n, int level);
845773ab	139
87ecb68b	140	/* vmport.c */
d67f679d JK	141	typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
d67f679d JK	142
48a18b3c	143	static inline void vmport_init(ISABus *bus)
6872ef61	144	{
48a18b3c	145	isa_create_simple(bus, "vmport");
6872ef61	146	}
d67f679d JK	147
d67f679d JK	148	void vmport_register(unsigned char command, VMPortReadFunc func, void opaque);
86d86414 BS	149	void vmmouse_get_data(uint32_t *data);
86d86414 BS	150	void vmmouse_set_data(const uint32_t *data);
87ecb68b	151
87ecb68b PB	152	/* pckbd.c */
	153
	154	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	155	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	156	MemoryRegion *region, ram_addr_t size,
a8170e5e	157	hwaddr mask);
956a3e6b BS	158	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	159	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	160
87ecb68b PB	161	/* pc.c */
	162	extern int fd_bootchk;
	163
8e78eb28	164	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	165	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
845773ab IY	166
62fc403f	167	void pc_cpus_init(const char cpu_model, DeviceState icc_bridge);
c649983b	168	void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c	169	void pc_acpi_init(const char *default_dsdt);
3459a625 MT	170
	171	PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
	172	ram_addr_t above_4g_mem_size);
	173
39848901 IM	174	#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
	175	#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
	176	#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
	177	#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
	178	#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
1466cef3 MT	179	#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
1466cef3 MT	180
39848901	181
83d08f26 MT	182	void pc_pci_as_mapping_init(Object owner, MemoryRegion system_memory,
83d08f26 MT	183	MemoryRegion *pci_address_space);
39848901	184
a88b362c LE	185	FWCfgState pc_memory_init(MemoryRegion system_memory,
	186	const char *kernel_filename,
	187	const char *kernel_cmdline,
	188	const char *initrd_filename,
	189	ram_addr_t below_4g_mem_size,
	190	ram_addr_t above_4g_mem_size,
	191	MemoryRegion *rom_memory,
3459a625 MT	192	MemoryRegion **ram_memory,
3459a625 MT	193	PcGuestInfo *guest_info);
845773ab	194	qemu_irq *pc_allocate_cpu_irq(void);
48a18b3c HP	195	DeviceState pc_vga_init(ISABus isa_bus, PCIBus *pci_bus);
48a18b3c HP	196	void pc_basic_device_init(ISABus isa_bus, qemu_irq gsi,
1611977c	197	ISADevice **rtc_state,
34d4260e	198	ISADevice **floppy,
7a10ef51 LPF	199	bool no_vmport,
7a10ef51 LPF	200	uint32 hpet_irqs);
48a18b3c	201	void pc_init_ne2k_isa(ISABus bus, NICInfo nd);
845773ab	202	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	203	const char *boot_device,
34d4260e	204	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	205	ISADevice *s);
9011a1a7	206	void pc_nic_init(ISABus isa_bus, PCIBus pci_bus);
845773ab	207	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	208
f885f1ea IY	209	typedef void (cpu_set_smm_t)(int smm, void arg);
	210	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	211
a39e3564 JB	212	void ioapic_init_gsi(GSIState gsi_state, const char parent_name);
a39e3564 JB	213
9d5e77a2	214	/* acpi_piix.c */
53b67b30	215
a5c82852 AF	216	I2CBus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
a5c82852 AF	217	qemu_irq sci_irq, qemu_irq smi_irq,
781bbd6b IM	218	int kvm_enabled, FWCfgState *fw_cfg,
781bbd6b IM	219	DeviceState **piix4_pm);
87ecb68b	220	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	221
16b29ae1 AL	222	/* hpet.c */
	223	extern int no_hpet;
	224
87ecb68b	225	/* piix_pci.c */
0a3bacf3 JQ	226	struct PCII440FXState;
	227	typedef struct PCII440FXState PCII440FXState;
	228
1e39101c	229	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
60573079	230	ISABus *isa_bus, qemu_irq pic,
aee97b84 AK	231	MemoryRegion *address_space_mem,
aee97b84 AK	232	MemoryRegion *address_space_io,
ae0a5466	233	ram_addr_t ram_size,
ddaaefb4	234	ram_addr_t below_4g_mem_size,
39848901	235	ram_addr_t above_4g_mem_size,
ae0a5466 AK	236	MemoryRegion *pci_memory,
ae0a5466 AK	237	MemoryRegion *ram_memory);
87ecb68b	238
277e9340	239	PCIBus *find_i440fx(void);
823e675a	240	/* piix4.c */
b1d8e52e	241	extern PCIDevice *piix4_dev;
142e9787	242	int piix4_init(PCIBus bus, ISABus *isa_bus, int devfn);
87ecb68b PB	243
87ecb68b PB	244	/* vga.c */
cb5a7aa8	245	enum vga_retrace_method {
	246	VGA_RETRACE_DUMB,
	247	VGA_RETRACE_PRECISE
	248	};
	249
	250	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	251
a8170e5e AK	252	int isa_vga_mm_init(hwaddr vram_base,
a8170e5e AK	253	hwaddr ctrl_base, int it_shift,
be20f9e9	254	MemoryRegion *address_space);
87ecb68b	255
87ecb68b	256	/* ne2000.c */
48a18b3c	257	static inline bool isa_ne2000_init(ISABus bus, int base, int irq, NICInfo nd)
60a14ad3	258	{
4a17cc4f AF	259	DeviceState *dev;
4a17cc4f AF	260	ISADevice *isadev;
87ecb68b	261
60a14ad3 BS	262	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	263
4a17cc4f AF	264	isadev = isa_try_create(bus, "ne2k_isa");
4a17cc4f AF	265	if (!isadev) {
cd1b8a8b BS	266	return false;
cd1b8a8b BS	267	}
4a17cc4f AF	268	dev = DEVICE(isadev);
	269	qdev_prop_set_uint32(dev, "iobase", base);
	270	qdev_prop_set_uint32(dev, "irq", irq);
	271	qdev_set_nic_properties(dev, nd);
	272	qdev_init_nofail(dev);
cd1b8a8b	273	return true;
60a14ad3	274	}
87ecb68b	275
cbc5b5f3	276	/* pc_sysfw.c */
6dd2a5c9 PB	277	void pc_system_firmware_init(MemoryRegion *rom_memory,
6dd2a5c9 PB	278	bool isapc_ram_fw);
cbc5b5f3	279
3ab135f3	280	/* pvpanic.c */
309cd62d	281	uint16_t pvpanic_port(void);
3ab135f3	282
4c5b10b7 JS	283	/* e820 types */
	284	#define E820_RAM 1
	285	#define E820_RESERVED 2
	286	#define E820_ACPI 3
	287	#define E820_NVS 4
	288	#define E820_UNUSABLE 5
	289
	290	int e820_add_entry(uint64_t, uint64_t, uint32_t);
7bf8ef19 GS	291	int e820_get_num_entries(void);
7bf8ef19 GS	292	bool e820_get_entry(int, uint32_t, uint64_t , uint64_t );
4c5b10b7	293
9df11c9f	294	#define PC_Q35_COMPAT_2_0 \
1f862184 IM	295	PC_COMPAT_2_0, \
	296	{\
	297	.driver = "ICH9 LPC",\
	298	.property = "memory-hotplug-support",\
	299	.value = "off",\
	300	}
9df11c9f	301
7a10ef51	302	#define PC_Q35_COMPAT_1_7 \
5319dc7b	303	PC_COMPAT_1_7, \
9df11c9f	304	PC_Q35_COMPAT_2_0, \
7a10ef51 LPF	305	{\
	306	.driver = "hpet",\
	307	.property = HPET_INTCAP,\
	308	.value = stringify(4),\
	309	}
	310
	311	#define PC_Q35_COMPAT_1_6 \
	312	PC_COMPAT_1_6, \
	313	PC_Q35_COMPAT_1_7
	314
	315	#define PC_Q35_COMPAT_1_5 \
	316	PC_COMPAT_1_5, \
	317	PC_Q35_COMPAT_1_6
	318
	319	#define PC_Q35_COMPAT_1_4 \
	320	PC_COMPAT_1_4, \
	321	PC_Q35_COMPAT_1_5
	322
9df11c9f	323	#define PC_COMPAT_2_0 \
34774320 IM	324	{\
	325	.driver = "PIIX4_PM",\
	326	.property = "memory-hotplug-support",\
	327	.value = "off",\
	328	},\
9df11c9f	329	{\
aa93200b GS	330	.driver = "apic",\
	331	.property = "version",\
	332	.value = stringify(0x11),\
34774320 IM	333	},\
34774320 IM	334	{\
7bafd888 GH	335	.driver = "nec-usb-xhci",\
	336	.property = "superspeed-ports-first",\
	337	.value = "off",\
13cc2c3e BZ	338	},\
	339	{\
	340	.driver = "pci-serial",\
	341	.property = "prog_if",\
	342	.value = stringify(0),\
	343	},\
	344	{\
	345	.driver = "pci-serial-2x",\
	346	.property = "prof_if",\
	347	.value = stringify(0),\
	348	},\
	349	{\
	350	.driver = "pci-serial-4x",\
	351	.property = "prog_if",\
	352	.value = stringify(0),\
9df11c9f GS	353	}
9df11c9f GS	354
5319dc7b	355	#define PC_COMPAT_1_7 \
9df11c9f	356	PC_COMPAT_2_0, \
5319dc7b GH	357	{\
	358	.driver = TYPE_USB_DEVICE,\
	359	.property = "msos-desc",\
	360	.value = "no",\
9e047b98 MT	361	},\
	362	{\
	363	.driver = "PIIX4_PM",\
	364	.property = "acpi-pci-hotplug-with-bridge-support",\
	365	.value = "off",\
5319dc7b GH	366	}
5319dc7b GH	367
e9845f09	368	#define PC_COMPAT_1_6 \
5319dc7b	369	PC_COMPAT_1_7, \
e9845f09 VM	370	{\
	371	.driver = "e1000",\
	372	.property = "mitigation",\
	373	.value = "off",\
f8e6a11a EH	374	},{\
	375	.driver = "qemu64-" TYPE_X86_CPU,\
	376	.property = "model",\
	377	.value = stringify(2),\
	378	},{\
	379	.driver = "qemu32-" TYPE_X86_CPU,\
	380	.property = "model",\
	381	.value = stringify(3),\
04c7d8b8 CR	382	},{\
	383	.driver = "i440FX-pcihost",\
	384	.property = "short_root_bus",\
	385	.value = stringify(1),\
	386	},{\
	387	.driver = "q35-pcihost",\
	388	.property = "short_root_bus",\
	389	.value = stringify(1),\
e9845f09 VM	390	}
e9845f09 VM	391
ffce9ebb	392	#define PC_COMPAT_1_5 \
e9845f09	393	PC_COMPAT_1_6, \
ffce9ebb EH	394	{\
	395	.driver = "Conroe-" TYPE_X86_CPU,\
	396	.property = "model",\
	397	.value = stringify(2),\
6b11322e EH	398	},{\
	399	.driver = "Conroe-" TYPE_X86_CPU,\
	400	.property = "level",\
	401	.value = stringify(2),\
ffce9ebb EH	402	},{\
	403	.driver = "Penryn-" TYPE_X86_CPU,\
	404	.property = "model",\
	405	.value = stringify(2),\
6b11322e EH	406	},{\
	407	.driver = "Penryn-" TYPE_X86_CPU,\
	408	.property = "level",\
	409	.value = stringify(2),\
ffce9ebb EH	410	},{\
	411	.driver = "Nehalem-" TYPE_X86_CPU,\
	412	.property = "model",\
	413	.value = stringify(2),\
6b11322e EH	414	},{\
	415	.driver = "Nehalem-" TYPE_X86_CPU,\
	416	.property = "level",\
	417	.value = stringify(2),\
488f069b MT	418	},{\
	419	.driver = "virtio-net-pci",\
	420	.property = "any_layout",\
	421	.value = "off",\
9337e3b6 EH	422	},{\
	423	.driver = TYPE_X86_CPU,\
	424	.property = "pmu",\
	425	.value = "on",\
04c7d8b8 CR	426	},{\
	427	.driver = "i440FX-pcihost",\
	428	.property = "short_root_bus",\
	429	.value = stringify(0),\
	430	},{\
	431	.driver = "q35-pcihost",\
	432	.property = "short_root_bus",\
	433	.value = stringify(0),\
ffce9ebb EH	434	}
ffce9ebb EH	435
bf3caa3d	436	#define PC_COMPAT_1_4 \
ffce9ebb	437	PC_COMPAT_1_5, \
bf3caa3d PB	438	{\
	439	.driver = "scsi-hd",\
	440	.property = "discard_granularity",\
	441	.value = stringify(0),\
	442	},{\
	443	.driver = "scsi-cd",\
	444	.property = "discard_granularity",\
	445	.value = stringify(0),\
	446	},{\
	447	.driver = "scsi-disk",\
	448	.property = "discard_granularity",\
	449	.value = stringify(0),\
	450	},{\
	451	.driver = "ide-hd",\
	452	.property = "discard_granularity",\
	453	.value = stringify(0),\
	454	},{\
	455	.driver = "ide-cd",\
	456	.property = "discard_granularity",\
	457	.value = stringify(0),\
	458	},{\
	459	.driver = "ide-drive",\
	460	.property = "discard_granularity",\
	461	.value = stringify(0),\
c45e5b5b	462	},{\
bf3caa3d PB	463	.driver = "virtio-blk-pci",\
	464	.property = "discard_granularity",\
	465	.value = stringify(0),\
554f1997 GH	466	},{\
	467	.driver = "virtio-serial-pci",\
	468	.property = "vectors",\
	469	/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
	470	.value = stringify(0xFFFFFFFF),\
644c9858 DF	471	},{ \
	472	.driver = "virtio-net-pci", \
	473	.property = "ctrl_guest_offloads", \
	474	.value = "off", \
c45e5b5b GH	475	},{\
	476	.driver = "e1000",\
	477	.property = "romfile",\
	478	.value = "pxe-e1000.rom",\
	479	},{\
	480	.driver = "ne2k_pci",\
	481	.property = "romfile",\
	482	.value = "pxe-ne2k_pci.rom",\
	483	},{\
	484	.driver = "pcnet",\
	485	.property = "romfile",\
	486	.value = "pxe-pcnet.rom",\
	487	},{\
	488	.driver = "rtl8139",\
	489	.property = "romfile",\
	490	.value = "pxe-rtl8139.rom",\
	491	},{\
	492	.driver = "virtio-net-pci",\
	493	.property = "romfile",\
	494	.value = "pxe-virtio.rom",\
b2a856d9 AF	495	},{\
	496	.driver = "486-" TYPE_X86_CPU,\
	497	.property = "model",\
	498	.value = stringify(0),\
c45e5b5b	499	}
bf3caa3d	500
a0dba644 MT	501	#define PC_COMMON_MACHINE_OPTIONS \
	502	.default_boot_order = "cad"
	503
	504	#define PC_DEFAULT_MACHINE_OPTIONS \
	505	PC_COMMON_MACHINE_OPTIONS, \
	506	.hot_add_cpu = pc_hot_add_cpu, \
	507	.max_cpus = 255
	508
87ecb68b	509	#endif