]>
Commit | Line | Data |
---|---|---|
7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
7b31bbc2 | 19 | #include "qemu/osdep.h" |
cea5f9a2 | 20 | #include "cpu.h" |
6db8b538 | 21 | #include "trace.h" |
76cad711 | 22 | #include "disas/disas.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
7cb69cae | 24 | #include "tcg.h" |
1de7afc9 | 25 | #include "qemu/atomic.h" |
9c17d615 | 26 | #include "sysemu/qtest.h" |
c2aa5f81 | 27 | #include "qemu/timer.h" |
9d82b5a7 | 28 | #include "exec/address-spaces.h" |
79e2b9ae | 29 | #include "qemu/rcu.h" |
e1b89321 | 30 | #include "exec/tb-hash.h" |
508127e2 | 31 | #include "exec/log.h" |
6220e900 PD |
32 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
33 | #include "hw/i386/apic.h" | |
34 | #endif | |
6f060969 | 35 | #include "sysemu/replay.h" |
c2aa5f81 ST |
36 | |
37 | /* -icount align implementation. */ | |
38 | ||
39 | typedef struct SyncClocks { | |
40 | int64_t diff_clk; | |
41 | int64_t last_cpu_icount; | |
7f7bc144 | 42 | int64_t realtime_clock; |
c2aa5f81 ST |
43 | } SyncClocks; |
44 | ||
45 | #if !defined(CONFIG_USER_ONLY) | |
46 | /* Allow the guest to have a max 3ms advance. | |
47 | * The difference between the 2 clocks could therefore | |
48 | * oscillate around 0. | |
49 | */ | |
50 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
51 | #define THRESHOLD_REDUCE 1.5 |
52 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
53 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
54 | |
55 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
56 | { | |
57 | int64_t cpu_icount; | |
58 | ||
59 | if (!icount_align_option) { | |
60 | return; | |
61 | } | |
62 | ||
63 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
64 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
65 | sc->last_cpu_icount = cpu_icount; | |
66 | ||
67 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
68 | #ifndef _WIN32 | |
69 | struct timespec sleep_delay, rem_delay; | |
70 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
71 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
72 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 73 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
74 | } else { |
75 | sc->diff_clk = 0; | |
76 | } | |
77 | #else | |
78 | Sleep(sc->diff_clk / SCALE_MS); | |
79 | sc->diff_clk = 0; | |
80 | #endif | |
81 | } | |
82 | } | |
83 | ||
7f7bc144 ST |
84 | static void print_delay(const SyncClocks *sc) |
85 | { | |
86 | static float threshold_delay; | |
87 | static int64_t last_realtime_clock; | |
88 | static int nb_prints; | |
89 | ||
90 | if (icount_align_option && | |
91 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
92 | nb_prints < MAX_NB_PRINTS) { | |
93 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
94 | (-sc->diff_clk / (float)1000000000LL < | |
95 | (threshold_delay - THRESHOLD_REDUCE))) { | |
96 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
97 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
98 | threshold_delay - 1, | |
99 | threshold_delay); | |
100 | nb_prints++; | |
101 | last_realtime_clock = sc->realtime_clock; | |
102 | } | |
103 | } | |
104 | } | |
105 | ||
c2aa5f81 ST |
106 | static void init_delay_params(SyncClocks *sc, |
107 | const CPUState *cpu) | |
108 | { | |
109 | if (!icount_align_option) { | |
110 | return; | |
111 | } | |
2e91cc62 PB |
112 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
113 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 114 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
115 | if (sc->diff_clk < max_delay) { |
116 | max_delay = sc->diff_clk; | |
117 | } | |
118 | if (sc->diff_clk > max_advance) { | |
119 | max_advance = sc->diff_clk; | |
120 | } | |
7f7bc144 ST |
121 | |
122 | /* Print every 2s max if the guest is late. We limit the number | |
123 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
124 | print_delay(sc); | |
c2aa5f81 ST |
125 | } |
126 | #else | |
127 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
128 | { | |
129 | } | |
130 | ||
131 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
132 | { | |
133 | } | |
134 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 135 | |
77211379 | 136 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
1a830635 | 137 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) |
77211379 PM |
138 | { |
139 | CPUArchState *env = cpu->env_ptr; | |
819af24b SF |
140 | uintptr_t ret; |
141 | TranslationBlock *last_tb; | |
142 | int tb_exit; | |
1a830635 PM |
143 | uint8_t *tb_ptr = itb->tc_ptr; |
144 | ||
d977e1c2 | 145 | qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, |
4426f83a AB |
146 | "Trace %p [%d: " TARGET_FMT_lx "] %s\n", |
147 | itb->tc_ptr, cpu->cpu_index, itb->pc, | |
148 | lookup_symbol(itb->pc)); | |
03afa5f8 RH |
149 | |
150 | #if defined(DEBUG_DISAS) | |
be2208e2 RH |
151 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU) |
152 | && qemu_log_in_addr_range(itb->pc)) { | |
03afa5f8 RH |
153 | #if defined(TARGET_I386) |
154 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
155 | #elif defined(TARGET_M68K) | |
156 | /* ??? Should not modify env state for dumping. */ | |
157 | cpu_m68k_flush_flags(env, env->cc_op); | |
158 | env->cc_op = CC_OP_FLAGS; | |
159 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); | |
160 | log_cpu_state(cpu, 0); | |
161 | #else | |
162 | log_cpu_state(cpu, 0); | |
163 | #endif | |
164 | } | |
165 | #endif /* DEBUG_DISAS */ | |
166 | ||
414b15c9 | 167 | cpu->can_do_io = !use_icount; |
819af24b | 168 | ret = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 169 | cpu->can_do_io = 1; |
819af24b SF |
170 | last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
171 | tb_exit = ret & TB_EXIT_MASK; | |
172 | trace_exec_tb_exit(last_tb, tb_exit); | |
6db8b538 | 173 | |
819af24b | 174 | if (tb_exit > TB_EXIT_IDX1) { |
77211379 PM |
175 | /* We didn't start executing this TB (eg because the instruction |
176 | * counter hit zero); we must restore the guest PC to the address | |
177 | * of the start of the TB. | |
178 | */ | |
bdf7ae5b | 179 | CPUClass *cc = CPU_GET_CLASS(cpu); |
819af24b | 180 | qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, |
d977e1c2 AB |
181 | "Stopped execution of TB chain before %p [" |
182 | TARGET_FMT_lx "] %s\n", | |
819af24b SF |
183 | last_tb->tc_ptr, last_tb->pc, |
184 | lookup_symbol(last_tb->pc)); | |
bdf7ae5b | 185 | if (cc->synchronize_from_tb) { |
819af24b | 186 | cc->synchronize_from_tb(cpu, last_tb); |
bdf7ae5b AF |
187 | } else { |
188 | assert(cc->set_pc); | |
819af24b | 189 | cc->set_pc(cpu, last_tb->pc); |
bdf7ae5b | 190 | } |
77211379 | 191 | } |
819af24b | 192 | if (tb_exit == TB_EXIT_REQUESTED) { |
378df4b2 PM |
193 | /* We were asked to stop executing TBs (probably a pending |
194 | * interrupt. We've now stopped, so clear the flag. | |
195 | */ | |
027d9a7d | 196 | atomic_set(&cpu->tcg_exit_req, 0); |
378df4b2 | 197 | } |
819af24b | 198 | return ret; |
77211379 PM |
199 | } |
200 | ||
7687bf52 | 201 | #ifndef CONFIG_USER_ONLY |
2e70f6ef PB |
202 | /* Execute the code without caching the generated code. An interpreter |
203 | could be used if available. */ | |
ea3e9847 | 204 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
56c0269a | 205 | TranslationBlock *orig_tb, bool ignore_icount) |
2e70f6ef | 206 | { |
2e70f6ef PB |
207 | TranslationBlock *tb; |
208 | ||
209 | /* Should never happen. | |
210 | We only end up here when an existing TB is too long. */ | |
211 | if (max_cycles > CF_COUNT_MASK) | |
212 | max_cycles = CF_COUNT_MASK; | |
213 | ||
a5e99826 | 214 | tb_lock(); |
02d57ea1 | 215 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, |
56c0269a PD |
216 | max_cycles | CF_NOCACHE |
217 | | (ignore_icount ? CF_IGNORE_ICOUNT : 0)); | |
3359baad | 218 | tb->orig_tb = orig_tb; |
a5e99826 FK |
219 | tb_unlock(); |
220 | ||
2e70f6ef | 221 | /* execute the generated code */ |
6db8b538 | 222 | trace_exec_tb_nocache(tb, tb->pc); |
1a830635 | 223 | cpu_tb_exec(cpu, tb); |
a5e99826 FK |
224 | |
225 | tb_lock(); | |
2e70f6ef PB |
226 | tb_phys_invalidate(tb, -1); |
227 | tb_free(tb); | |
a5e99826 | 228 | tb_unlock(); |
2e70f6ef | 229 | } |
7687bf52 | 230 | #endif |
2e70f6ef | 231 | |
fdbc2b57 RH |
232 | static void cpu_exec_step(CPUState *cpu) |
233 | { | |
234 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; | |
235 | TranslationBlock *tb; | |
236 | target_ulong cs_base, pc; | |
237 | uint32_t flags; | |
238 | ||
239 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); | |
240 | tb = tb_gen_code(cpu, pc, cs_base, flags, | |
241 | 1 | CF_NOCACHE | CF_IGNORE_ICOUNT); | |
242 | tb->orig_tb = NULL; | |
243 | /* execute the generated code */ | |
244 | trace_exec_tb_nocache(tb, pc); | |
245 | cpu_tb_exec(cpu, tb); | |
246 | tb_phys_invalidate(tb, -1); | |
247 | tb_free(tb); | |
248 | } | |
249 | ||
250 | void cpu_exec_step_atomic(CPUState *cpu) | |
251 | { | |
252 | start_exclusive(); | |
253 | ||
254 | /* Since we got here, we know that parallel_cpus must be true. */ | |
255 | parallel_cpus = false; | |
256 | cpu_exec_step(cpu); | |
257 | parallel_cpus = true; | |
258 | ||
259 | end_exclusive(); | |
260 | } | |
261 | ||
909eaac9 EC |
262 | struct tb_desc { |
263 | target_ulong pc; | |
264 | target_ulong cs_base; | |
265 | CPUArchState *env; | |
266 | tb_page_addr_t phys_page1; | |
267 | uint32_t flags; | |
268 | }; | |
269 | ||
270 | static bool tb_cmp(const void *p, const void *d) | |
271 | { | |
272 | const TranslationBlock *tb = p; | |
273 | const struct tb_desc *desc = d; | |
274 | ||
275 | if (tb->pc == desc->pc && | |
276 | tb->page_addr[0] == desc->phys_page1 && | |
277 | tb->cs_base == desc->cs_base && | |
6d21e420 PB |
278 | tb->flags == desc->flags && |
279 | !atomic_read(&tb->invalid)) { | |
909eaac9 EC |
280 | /* check next page if needed */ |
281 | if (tb->page_addr[1] == -1) { | |
282 | return true; | |
283 | } else { | |
284 | tb_page_addr_t phys_page2; | |
285 | target_ulong virt_page2; | |
286 | ||
287 | virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; | |
288 | phys_page2 = get_page_addr_code(desc->env, virt_page2); | |
289 | if (tb->page_addr[1] == phys_page2) { | |
290 | return true; | |
291 | } | |
292 | } | |
293 | } | |
294 | return false; | |
295 | } | |
296 | ||
b34de45f | 297 | static TranslationBlock *tb_htable_lookup(CPUState *cpu, |
9fd1a948 PB |
298 | target_ulong pc, |
299 | target_ulong cs_base, | |
89fee74a | 300 | uint32_t flags) |
8a40a180 | 301 | { |
909eaac9 EC |
302 | tb_page_addr_t phys_pc; |
303 | struct tb_desc desc; | |
42bd3228 | 304 | uint32_t h; |
3b46e624 | 305 | |
909eaac9 EC |
306 | desc.env = (CPUArchState *)cpu->env_ptr; |
307 | desc.cs_base = cs_base; | |
308 | desc.flags = flags; | |
309 | desc.pc = pc; | |
310 | phys_pc = get_page_addr_code(desc.env, pc); | |
311 | desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; | |
42bd3228 | 312 | h = tb_hash_func(phys_pc, pc, flags); |
909eaac9 | 313 | return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h); |
9fd1a948 PB |
314 | } |
315 | ||
bd2710d5 SF |
316 | static inline TranslationBlock *tb_find(CPUState *cpu, |
317 | TranslationBlock *last_tb, | |
318 | int tb_exit) | |
8a40a180 | 319 | { |
ea3e9847 | 320 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
8a40a180 FB |
321 | TranslationBlock *tb; |
322 | target_ulong cs_base, pc; | |
89fee74a | 323 | uint32_t flags; |
74d356dd | 324 | bool have_tb_lock = false; |
8a40a180 FB |
325 | |
326 | /* we record a subset of the CPU state. It will | |
327 | always be the same before a given translated block | |
328 | is executed. */ | |
6b917547 | 329 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
89a16b1e | 330 | tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]); |
551bd27f TS |
331 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
332 | tb->flags != flags)) { | |
b34de45f | 333 | tb = tb_htable_lookup(cpu, pc, cs_base, flags); |
bd2710d5 SF |
334 | if (!tb) { |
335 | ||
336 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be | |
337 | * taken outside tb_lock. As system emulation is currently | |
338 | * single threaded the locks are NOPs. | |
339 | */ | |
340 | mmap_lock(); | |
341 | tb_lock(); | |
342 | have_tb_lock = true; | |
343 | ||
344 | /* There's a chance that our desired tb has been translated while | |
345 | * taking the locks so we check again inside the lock. | |
346 | */ | |
b34de45f | 347 | tb = tb_htable_lookup(cpu, pc, cs_base, flags); |
bd2710d5 SF |
348 | if (!tb) { |
349 | /* if no translated code available, then translate it now */ | |
350 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); | |
351 | } | |
352 | ||
353 | mmap_unlock(); | |
354 | } | |
355 | ||
356 | /* We add the TB in the virtual pc hash table for the fast lookup */ | |
357 | atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); | |
8a40a180 | 358 | } |
c88c67e5 SF |
359 | #ifndef CONFIG_USER_ONLY |
360 | /* We don't take care of direct jumps when address mapping changes in | |
361 | * system emulation. So it's not safe to make a direct jump to a TB | |
362 | * spanning two pages because the mapping for the second page can change. | |
363 | */ | |
364 | if (tb->page_addr[1] != -1) { | |
4b7e6950 | 365 | last_tb = NULL; |
c88c67e5 SF |
366 | } |
367 | #endif | |
a0522c7a | 368 | /* See if we can patch the calling TB. */ |
4b7e6950 | 369 | if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { |
74d356dd SF |
370 | if (!have_tb_lock) { |
371 | tb_lock(); | |
372 | have_tb_lock = true; | |
373 | } | |
3359baad | 374 | if (!tb->invalid) { |
118b0730 SF |
375 | tb_add_jump(last_tb, tb_exit, tb); |
376 | } | |
74d356dd SF |
377 | } |
378 | if (have_tb_lock) { | |
518615c6 | 379 | tb_unlock(); |
a0522c7a | 380 | } |
8a40a180 FB |
381 | return tb; |
382 | } | |
383 | ||
8b2d34e9 SF |
384 | static inline bool cpu_handle_halt(CPUState *cpu) |
385 | { | |
386 | if (cpu->halted) { | |
387 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) | |
388 | if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) | |
389 | && replay_interrupt()) { | |
390 | X86CPU *x86_cpu = X86_CPU(cpu); | |
391 | apic_poll_irq(x86_cpu->apic_state); | |
392 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); | |
393 | } | |
394 | #endif | |
395 | if (!cpu_has_work(cpu)) { | |
396 | current_cpu = NULL; | |
397 | return true; | |
398 | } | |
399 | ||
400 | cpu->halted = 0; | |
401 | } | |
402 | ||
403 | return false; | |
404 | } | |
405 | ||
ea284766 | 406 | static inline void cpu_handle_debug_exception(CPUState *cpu) |
1009d2ed | 407 | { |
86025ee4 | 408 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
409 | CPUWatchpoint *wp; |
410 | ||
ff4700b0 AF |
411 | if (!cpu->watchpoint_hit) { |
412 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
413 | wp->flags &= ~BP_WATCHPOINT_HIT; |
414 | } | |
415 | } | |
86025ee4 PM |
416 | |
417 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
418 | } |
419 | ||
ea284766 SF |
420 | static inline bool cpu_handle_exception(CPUState *cpu, int *ret) |
421 | { | |
422 | if (cpu->exception_index >= 0) { | |
423 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
424 | /* exit request from the cpu execution loop */ | |
425 | *ret = cpu->exception_index; | |
426 | if (*ret == EXCP_DEBUG) { | |
427 | cpu_handle_debug_exception(cpu); | |
428 | } | |
429 | cpu->exception_index = -1; | |
430 | return true; | |
431 | } else { | |
432 | #if defined(CONFIG_USER_ONLY) | |
433 | /* if user mode only, we simulate a fake exception | |
434 | which will be handled outside the cpu execution | |
435 | loop */ | |
436 | #if defined(TARGET_I386) | |
437 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
438 | cc->do_interrupt(cpu); | |
439 | #endif | |
440 | *ret = cpu->exception_index; | |
441 | cpu->exception_index = -1; | |
442 | return true; | |
443 | #else | |
444 | if (replay_exception()) { | |
445 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
446 | cc->do_interrupt(cpu); | |
447 | cpu->exception_index = -1; | |
448 | } else if (!replay_has_interrupt()) { | |
449 | /* give a chance to iothread in replay mode */ | |
450 | *ret = EXCP_INTERRUPT; | |
451 | return true; | |
452 | } | |
453 | #endif | |
454 | } | |
455 | #ifndef CONFIG_USER_ONLY | |
456 | } else if (replay_has_exception() | |
457 | && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { | |
458 | /* try to cause an exception pending in the log */ | |
bd2710d5 | 459 | cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true); |
ea284766 SF |
460 | *ret = -1; |
461 | return true; | |
462 | #endif | |
463 | } | |
464 | ||
465 | return false; | |
466 | } | |
467 | ||
c385e6e4 SF |
468 | static inline void cpu_handle_interrupt(CPUState *cpu, |
469 | TranslationBlock **last_tb) | |
470 | { | |
471 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
472 | int interrupt_request = cpu->interrupt_request; | |
473 | ||
474 | if (unlikely(interrupt_request)) { | |
475 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { | |
476 | /* Mask out external interrupts for this step. */ | |
477 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; | |
478 | } | |
479 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { | |
480 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; | |
481 | cpu->exception_index = EXCP_DEBUG; | |
482 | cpu_loop_exit(cpu); | |
483 | } | |
484 | if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { | |
485 | /* Do nothing */ | |
486 | } else if (interrupt_request & CPU_INTERRUPT_HALT) { | |
487 | replay_interrupt(); | |
488 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; | |
489 | cpu->halted = 1; | |
490 | cpu->exception_index = EXCP_HLT; | |
491 | cpu_loop_exit(cpu); | |
492 | } | |
493 | #if defined(TARGET_I386) | |
494 | else if (interrupt_request & CPU_INTERRUPT_INIT) { | |
495 | X86CPU *x86_cpu = X86_CPU(cpu); | |
496 | CPUArchState *env = &x86_cpu->env; | |
497 | replay_interrupt(); | |
498 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); | |
499 | do_cpu_init(x86_cpu); | |
500 | cpu->exception_index = EXCP_HALTED; | |
501 | cpu_loop_exit(cpu); | |
502 | } | |
503 | #else | |
504 | else if (interrupt_request & CPU_INTERRUPT_RESET) { | |
505 | replay_interrupt(); | |
506 | cpu_reset(cpu); | |
507 | cpu_loop_exit(cpu); | |
508 | } | |
509 | #endif | |
510 | /* The target hook has 3 exit conditions: | |
511 | False when the interrupt isn't processed, | |
512 | True when it is, and we should restart on a new TB, | |
513 | and via longjmp via cpu_loop_exit. */ | |
514 | else { | |
515 | replay_interrupt(); | |
516 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { | |
517 | *last_tb = NULL; | |
518 | } | |
8b1fe3f4 SF |
519 | /* The target hook may have updated the 'cpu->interrupt_request'; |
520 | * reload the 'interrupt_request' value */ | |
521 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 | 522 | } |
8b1fe3f4 | 523 | if (interrupt_request & CPU_INTERRUPT_EXITTB) { |
c385e6e4 SF |
524 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
525 | /* ensure that no TB jump will be modified as | |
526 | the program flow was changed */ | |
527 | *last_tb = NULL; | |
528 | } | |
529 | } | |
027d9a7d AB |
530 | if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) { |
531 | atomic_set(&cpu->exit_request, 0); | |
c385e6e4 SF |
532 | cpu->exception_index = EXCP_INTERRUPT; |
533 | cpu_loop_exit(cpu); | |
534 | } | |
535 | } | |
536 | ||
928de9ee SF |
537 | static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, |
538 | TranslationBlock **last_tb, int *tb_exit, | |
539 | SyncClocks *sc) | |
540 | { | |
541 | uintptr_t ret; | |
542 | ||
027d9a7d | 543 | if (unlikely(atomic_read(&cpu->exit_request))) { |
928de9ee SF |
544 | return; |
545 | } | |
546 | ||
547 | trace_exec_tb(tb, tb->pc); | |
548 | ret = cpu_tb_exec(cpu, tb); | |
549 | *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); | |
550 | *tb_exit = ret & TB_EXIT_MASK; | |
551 | switch (*tb_exit) { | |
552 | case TB_EXIT_REQUESTED: | |
553 | /* Something asked us to stop executing | |
554 | * chained TBs; just continue round the main | |
555 | * loop. Whatever requested the exit will also | |
556 | * have set something else (eg exit_request or | |
557 | * interrupt_request) which we will handle | |
558 | * next time around the loop. But we need to | |
559 | * ensure the tcg_exit_req read in generated code | |
560 | * comes before the next read of cpu->exit_request | |
561 | * or cpu->interrupt_request. | |
562 | */ | |
563 | smp_rmb(); | |
564 | *last_tb = NULL; | |
565 | break; | |
566 | case TB_EXIT_ICOUNT_EXPIRED: | |
567 | { | |
568 | /* Instruction counter expired. */ | |
569 | #ifdef CONFIG_USER_ONLY | |
570 | abort(); | |
571 | #else | |
572 | int insns_left = cpu->icount_decr.u32; | |
573 | if (cpu->icount_extra && insns_left >= 0) { | |
574 | /* Refill decrementer and continue execution. */ | |
575 | cpu->icount_extra += insns_left; | |
576 | insns_left = MIN(0xffff, cpu->icount_extra); | |
577 | cpu->icount_extra -= insns_left; | |
578 | cpu->icount_decr.u16.low = insns_left; | |
579 | } else { | |
580 | if (insns_left > 0) { | |
581 | /* Execute remaining instructions. */ | |
582 | cpu_exec_nocache(cpu, insns_left, *last_tb, false); | |
583 | align_clocks(sc, cpu); | |
584 | } | |
585 | cpu->exception_index = EXCP_INTERRUPT; | |
586 | *last_tb = NULL; | |
587 | cpu_loop_exit(cpu); | |
588 | } | |
589 | break; | |
590 | #endif | |
591 | } | |
592 | default: | |
593 | break; | |
594 | } | |
595 | } | |
596 | ||
7d13299d FB |
597 | /* main execution loop */ |
598 | ||
ea3e9847 | 599 | int cpu_exec(CPUState *cpu) |
7d13299d | 600 | { |
97a8ea5a | 601 | CPUClass *cc = CPU_GET_CLASS(cpu); |
c385e6e4 | 602 | int ret; |
c2aa5f81 ST |
603 | SyncClocks sc; |
604 | ||
6f060969 PD |
605 | /* replay_interrupt may need current_cpu */ |
606 | current_cpu = cpu; | |
607 | ||
8b2d34e9 SF |
608 | if (cpu_handle_halt(cpu)) { |
609 | return EXCP_HALTED; | |
eda48c34 | 610 | } |
5a1e3cfc | 611 | |
9373e632 | 612 | atomic_mb_set(&tcg_current_cpu, cpu); |
79e2b9ae PB |
613 | rcu_read_lock(); |
614 | ||
aed807c8 | 615 | if (unlikely(atomic_mb_read(&exit_request))) { |
fcd7d003 | 616 | cpu->exit_request = 1; |
1a28cac3 MT |
617 | } |
618 | ||
cffe7b32 | 619 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 620 | |
c2aa5f81 ST |
621 | /* Calculate difference between guest clock and host clock. |
622 | * This delay includes the delay of the last cycle, so | |
623 | * what we have to do is sleep until it is 0. As for the | |
624 | * advance/delay we gain here, we try to fix it next time. | |
625 | */ | |
626 | init_delay_params(&sc, cpu); | |
627 | ||
3fb2ded1 | 628 | for(;;) { |
ea284766 | 629 | /* prepare setjmp context for exception handling */ |
6f03bef0 | 630 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
ca7d8e1c SF |
631 | TranslationBlock *tb, *last_tb = NULL; |
632 | int tb_exit = 0; | |
633 | ||
3fb2ded1 | 634 | /* if an exception is pending, we execute it here */ |
ea284766 | 635 | if (cpu_handle_exception(cpu, &ret)) { |
6f060969 | 636 | break; |
5fafdf24 | 637 | } |
9df217a3 | 638 | |
3fb2ded1 | 639 | for(;;) { |
c385e6e4 | 640 | cpu_handle_interrupt(cpu, &last_tb); |
bd2710d5 | 641 | tb = tb_find(cpu, last_tb, tb_exit); |
928de9ee | 642 | cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc); |
c2aa5f81 ST |
643 | /* Try to align the host and virtual clocks |
644 | if the guest is in advance */ | |
645 | align_clocks(&sc, cpu); | |
50a518e3 | 646 | } /* for(;;) */ |
0d101938 | 647 | } else { |
0448f5f8 SW |
648 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
649 | /* Some compilers wrongly smash all local variables after | |
650 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. | |
651 | * Reload essential local variables here for those compilers. | |
652 | * Newer versions of gcc would complain about this code (-Wclobbered). */ | |
4917cf44 | 653 | cpu = current_cpu; |
6c78f29a | 654 | cc = CPU_GET_CLASS(cpu); |
0448f5f8 SW |
655 | #else /* buggy compiler */ |
656 | /* Assert that the compiler does not smash local variables. */ | |
657 | g_assert(cpu == current_cpu); | |
658 | g_assert(cc == CPU_GET_CLASS(cpu)); | |
0448f5f8 SW |
659 | #endif /* buggy compiler */ |
660 | cpu->can_do_io = 1; | |
677ef623 | 661 | tb_lock_reset(); |
7d13299d | 662 | } |
3fb2ded1 FB |
663 | } /* for(;;) */ |
664 | ||
cffe7b32 | 665 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 666 | rcu_read_unlock(); |
1057eaa7 | 667 | |
4917cf44 AF |
668 | /* fail safe : never use current_cpu outside cpu_exec() */ |
669 | current_cpu = NULL; | |
9373e632 PB |
670 | |
671 | /* Does not need atomic_mb_set because a spurious wakeup is okay. */ | |
672 | atomic_set(&tcg_current_cpu, NULL); | |
7d13299d FB |
673 | return ret; |
674 | } |