Merge patch "Enable SPCR table for console output on RISC-V"

Sia Jee Heng <[email protected]> says:

The ACPI SPCR code has been used to enable console output for ARM64 and
X86. The same code can be reused for RISC-V. Furthermore, SPCR table is
mandated for headless system as outlined in the RISC-V BRS
Specification, chapter 6.

* b4-shazam-merge:
  RISC-V: ACPI: Enable SPCR table for console output on RISC-V

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>

diff --combined arch/riscv/Kconfig
index 19ca402e6f264390c1c8f4b7fa90c242b26d252d,287c17daa9d514018e468afdc89a20012dcda1ae..b32472fe84c274624a7c9d0a925b63d8ca83dd2d
--- 1/arch/riscv/Kconfig
--- 2/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@@ -14,10 -14,9 +14,11 @@@ config RISC
        def_bool y
        select ACPI_GENERIC_GSI if ACPI
        select ACPI_REDUCED_HARDWARE_ONLY if ACPI
+       select ACPI_SPCR_TABLE if ACPI
        select ARCH_DMA_DEFAULT_COHERENT
        select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
 +      select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP
 +      select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
        select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
        select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
        select ARCH_HAS_BINFMT_FLAT
@@@ -37,7 -36,6 +38,7 @@@
        select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
        select ARCH_HAS_PMEM_API
        select ARCH_HAS_PREPARE_SYNC_CORE_CMD
 +      select ARCH_HAS_PTE_DEVMAP if 64BIT && MMU
        select ARCH_HAS_PTE_SPECIAL
        select ARCH_HAS_SET_DIRECT_MAP if MMU
        select ARCH_HAS_SET_MEMORY if MMU
@@@ -49,7 -47,6 +50,7 @@@
        select ARCH_HAS_UBSAN
        select ARCH_HAS_VDSO_DATA
        select ARCH_KEEP_MEMBLOCK if ACPI
 +      select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU
        select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
        select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
        select ARCH_STACKWALK
@@@ -73,7 -70,6 +74,7 @@@
        select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT
        select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
        select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL
 +      select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP
        select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
        select ARCH_WANTS_NO_INSTR
        select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
@@@ -111,7 -107,7 +112,7 @@@
        select HAS_IOPORT if MMU
        select HAVE_ARCH_AUDITSYSCALL
        select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP
 -      select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL
 +      select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT
        select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
        select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
        select HAVE_ARCH_KASAN if MMU && 64BIT
@@@ -123,7 -119,6 +124,7 @@@
        select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
        select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
        select HAVE_ARCH_SECCOMP_FILTER
 +      select HAVE_ARCH_STACKLEAK
        select HAVE_ARCH_THREAD_STRUCT_WHITELIST
        select HAVE_ARCH_TRACEHOOK
        select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
@@@ -155,6 -150,7 +156,6 @@@
        select HAVE_KERNEL_UNCOMPRESSED if !XIP_KERNEL && !EFI_ZBOOT
        select HAVE_KERNEL_ZSTD if !XIP_KERNEL && !EFI_ZBOOT
        select HAVE_KPROBES if !XIP_KERNEL
 -      select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL
        select HAVE_KRETPROBES if !XIP_KERNEL
        # https://github.com/ClangBuiltLinux/linux/issues/1881
        select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD
@@@ -600,19 -596,6 +601,19 @@@ config RISCV_ISA_V_PREEMPTIV
          preemption. Enabling this config will result in higher memory
          consumption due to the allocation of per-task's kernel Vector context.
  
 +config RISCV_ISA_ZAWRS
 +      bool "Zawrs extension support for more efficient busy waiting"
 +      depends on RISCV_ALTERNATIVE
 +      default y
 +      help
 +        The Zawrs extension defines instructions to be used in polling loops
 +        which allow a hart to enter a low-power state or to trap to the
 +        hypervisor while waiting on a store to a memory location. Enable the
 +        use of these instructions in the kernel when the Zawrs extension is
 +        detected at boot.
 +
 +        If you don't know what to do here, say Y.
 +
  config TOOLCHAIN_HAS_ZBB
        bool
        default y
@@@ -628,18 -611,6 +629,18 @@@ config TOOLCHAIN_HAS_VECTOR_CRYPT
        def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb)
        depends on AS_HAS_OPTION_ARCH
  
 +config RISCV_ISA_ZBA
 +      bool "Zba extension support for bit manipulation instructions"
 +      default y
 +      help
 +         Add support for enabling optimisations in the kernel when the Zba
 +         extension is detected at boot.
 +
 +         The Zba extension provides instructions to accelerate the generation
 +         of addresses that index into arrays of basic data types.
 +
 +         If you don't know what to do here, say Y.
 +
  config RISCV_ISA_ZBB
        bool "Zbb extension support for bit manipulation instructions"
        depends on TOOLCHAIN_HAS_ZBB
@@@ -655,29 -626,6 +656,29 @@@
  
           If you don't know what to do here, say Y.
  
 +config TOOLCHAIN_HAS_ZBC
 +      bool
 +      default y
 +      depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)
 +      depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)
 +      depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
 +      depends on AS_HAS_OPTION_ARCH
 +
 +config RISCV_ISA_ZBC
 +      bool "Zbc extension support for carry-less multiplication instructions"
 +      depends on TOOLCHAIN_HAS_ZBC
 +      depends on MMU
 +      depends on RISCV_ALTERNATIVE
 +      default y
 +      help
 +         Adds support to dynamically detect the presence of the Zbc
 +         extension (carry-less multiplication) and enable its usage.
 +
 +         The Zbc extension could accelerate CRC (cyclic redundancy check)
 +         calculations.
 +
 +         If you don't know what to do here, say Y.
 +
  config RISCV_ISA_ZICBOM
        bool "Zicbom extension support for non-coherent DMA operation"
        depends on MMU
@@@ -707,6 -655,13 +708,6 @@@ config RISCV_ISA_ZICBO
  
           If you don't know what to do here, say Y.
  
 -config TOOLCHAIN_HAS_ZIHINTPAUSE
 -      bool
 -      default y
 -      depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zihintpause)
 -      depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
 -      depends on LLD_VERSION >= 150000 || LD_VERSION >= 23600
 -
  config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
        def_bool y
        # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc
@@@ -820,8 -775,6 +821,8 @@@ config RISCV_EFFICIENT_UNALIGNED_ACCES
  
  endchoice
  
 +source "arch/riscv/Kconfig.vendor"
 +
  endmenu # "Platform type"
  
  menu "Kernel features"
@@@ -1015,17 -968,6 +1016,17 @@@ config EF
          allow the kernel to be booted as an EFI application. This
          is only useful on systems that have UEFI firmware.
  
 +config DMI
 +      bool "Enable support for SMBIOS (DMI) tables"
 +      depends on EFI
 +      default y
 +      help
 +        This enables SMBIOS/DMI feature for systems.
 +
 +        This option is only useful on systems that have UEFI firmware.
 +        However, even with this option, the resultant kernel should
 +        continue to boot on existing non-UEFI platforms.
 +
  config CC_HAVE_STACKPROTECTOR_TLS
        def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0)
  

diff --combined arch/riscv/kernel/acpi.c
index 040bdbfea2b424fe7fe21963e9c74e54a3619626,43a12c00ae8b1f6e0e426e96fa9691346b6ab782..ba957aaca5cbb8ab3e4bdc832fcccd87d6ea7a5d
--- 1/arch/riscv/kernel/acpi.c
--- 2/arch/riscv/kernel/acpi.c
+++ b/arch/riscv/kernel/acpi.c
@@@ -17,7 -17,9 +17,9 @@@
  #include <linux/efi.h>
  #include <linux/io.h>
  #include <linux/memblock.h>
+ #include <linux/of_fdt.h>
  #include <linux/pci.h>
+ #include <linux/serial_core.h>
  
  int acpi_noirq = 1;           /* skip ACPI IRQ initialization */
  int acpi_disabled = 1;
@@@ -131,7 -133,7 +133,7 @@@ void __init acpi_boot_table_init(void
        if (param_acpi_off ||
            (!param_acpi_on && !param_acpi_force &&
             efi.acpi20 == EFI_INVALID_TABLE_ADDR))
-               return;
+               goto done;
  
        /*
         * ACPI is disabled at this point. Enable it in order to parse
@@@ -151,6 -153,14 +153,14 @@@
                if (!param_acpi_force)
                        disable_acpi();
        }
+ 
+ done:
+       if (acpi_disabled) {
+               if (earlycon_acpi_spcr_enable)
+                       early_init_dt_scan_chosen_stdout();
+       } else {
+               acpi_parse_spcr(earlycon_acpi_spcr_enable, true);
+       }
  }
  
  static int acpi_parse_madt_rintc(union acpi_subtable_headers *header, const unsigned long end)
@@@ -191,6 -201,11 +201,6 @@@ struct acpi_madt_rintc *acpi_cpu_get_ma
        return &cpu_madt_rintc[cpu];
  }
  
 -u32 get_acpi_id_for_cpu(int cpu)
 -{
 -      return acpi_cpu_get_madt_rintc(cpu)->uid;
 -}
 -
  /*
   * __acpi_map_table() will be called before paging_init(), so early_ioremap()
   * or early_memremap() should be called here to for ACPI table mapping.