W: http://blackfin.uclinux.org/
S: Supported
F: sound/soc/blackfin/*
+
+ANALOG DEVICES INC IIO DRIVERS
+W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
+S: Supported
+F: drivers/iio/*/ad*
+X: drivers/iio/*/adjd*
+F: drivers/staging/iio/*/ad*
+F: staging/iio/trigger/iio-trig-bfin-timer.c
AOA (Apple Onboard Audio) ALSA DRIVER
S: Maintained
F: drivers/clk/sunxi/
+ARM/Amlogic MesonX SoC support
+S: Maintained
+N: meson[x68]
+
ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES
F: arch/arm/mach-highbank/
ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT
S: Maintained
F: arch/arm/mach-cns3xxx/
-T: git git://git.infradead.org/users/cbou/linux-cns3xxx.git
ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
F: arch/arm/mach-footbridge/
ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
-M: Shawn Guo <shawn.guo@freescale.com>
+M: Shawn Guo <shawn.guo@linaro.org>
S: Maintained
ARM/INTEL IOP32X ARM ARCHITECTURE
S: Maintained
ARM/INTEL IOP33X ARM ARCHITECTURE
-S: Maintained
+S: Orphan
ARM/INTEL IOP13XX ARM ARCHITECTURE
S: Maintained
ARM/INTEL IQ81342EX MACHINE SUPPORT
S: Maintained
ARM/INTEL IXP4XX ARM ARCHITECTURE
+M: Krzysztof Halasa <khalasa@piap.pl>
S: Maintained
F: arch/arm/mach-ixp4xx/
ARM/INTEL XSC3 (MANZANO) ARM CORE
S: Maintained
S: Maintained
F: arch/arm/mach-orion5x/ts78xx-*
+ARM/Mediatek SoC support
+S: Maintained
+F: arch/arm/boot/dts/mt6*
+F: arch/arm/boot/dts/mt8*
+F: arch/arm/mach-mediatek/
+N: mtk
+K: mediatek
+
ARM/MICREL KS8695 ARCHITECTURE
F: arch/arm/configs/ape6evm_defconfig
F: arch/arm/configs/armadillo800eva_defconfig
F: arch/arm/configs/bockw_defconfig
-F: arch/arm/configs/genmai_defconfig
F: arch/arm/configs/koelsch_defconfig
F: arch/arm/configs/kzm9g_defconfig
F: arch/arm/configs/lager_defconfig
F: arch/arm/mach-sti/
F: arch/arm/boot/dts/sti*
F: drivers/clocksource/arm_global_timer.c
-F: drivers/reset/sti/
-F: drivers/pinctrl/pinctrl-st.c
-F: drivers/media/rc/st_rc.c
F: drivers/i2c/busses/i2c-st.c
-F: drivers/tty/serial/st-asc.c
+F: drivers/media/rc/st_rc.c
F: drivers/mmc/host/sdhci-st.c
+F: drivers/phy/phy-stih407-usb.c
+F: drivers/phy/phy-stih41x-usb.c
+F: drivers/pinctrl/pinctrl-st.c
+F: drivers/reset/sti/
+F: drivers/tty/serial/st-asc.c
+F: drivers/usb/dwc3/dwc3-st.c
+F: drivers/usb/host/ehci-st.c
+F: drivers/usb/host/ohci-st.c
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
F: drivers/platform/x86/eeepc*.c
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
W: http://sourceforge.net/projects/xscaleiop
-S: Maintained
+S: Odd fixes
F: Documentation/crypto/async-tx-api.txt
F: crypto/async_tx/
F: drivers/dma/
S: Supported
F: drivers/tty/serial/atmel_serial.c
+ATMEL Audio ALSA driver
+S: Supported
+F: sound/soc/atmel
+
ATMEL DMA DRIVER
BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE
T: git git://github.com/broadcom/mach-bcm
S: Maintained
F: arch/arm/boot/dts/bcm5301x.dtsi
F: arch/arm/boot/dts/bcm470*
+ BROADCOM BCM63XX ARM ARCHITECTURE
+ T: git git://git.github.com/brcm/linux.git
+ S: Maintained
+ F: arch/arm/mach-bcm/bcm63xx.c
+ F: arch/arm/include/debug/bcm63xx.S
+
BROADCOM BCM7XXX ARM ARCHITECTURE
F: drivers/scsi/bfa/
BROCADE BNA 10 GIGABIT ETHERNET DRIVER
-M: Rasesh Mody <rmody@brocade.com>
+M: Rasesh Mody <rasesh.mody@qlogic.com>
S: Supported
F: drivers/net/ethernet/brocade/bna/
DESIGNWARE USB2 DRD IP DRIVER
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
S: Maintained
F: drivers/usb/dwc2/
S: Maintained
F: drivers/usb/dwc3/
+DEVICE COREDUMP (DEV_COREDUMP)
+S: Maintained
+F: drivers/base/devcoredump.c
+F: include/linux/devcoredump.h
+
DEVICE FREQUENCY (DEVFREQ)
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
-S: Supported
+S: Maintained
F: drivers/dma/
F: include/linux/dma*
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx.git
T: git git://git.infradead.org/users/vkoul/slave-dma.git (slave-dma)
DME1737 HARDWARE MONITOR DRIVER
F: drivers/acpi/dock.c
DOCUMENTATION
-T: quilt http://www.infradead.org/~rdunlap/Doc/patches/
S: Maintained
F: Documentation/
X: Documentation/ABI/
X: Documentation/devicetree/
X: Documentation/[a-z][a-z]_[A-Z][A-Z]/
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/doc.git
DOUBLETALK DRIVER
S: Maintained
-F: drivers/i2c/i2c-acpi.c
I2C-TAOS-EVM DRIVER
IIO SUBSYSTEM AND DRIVERS
S: Maintained
F: drivers/iio/
F: arch/x86/kernel/cpu/microcode/intel*
INTEL I/OAT DMA DRIVER
Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
S: Supported
F: include/linux/intel-iommu.h
INTEL IOP-ADMA DMA DRIVER
S: Odd fixes
F: drivers/dma/iop-adma.c
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
+M: Krzysztof Halasa <khalasa@piap.pl>
S: Maintained
F: arch/arm/mach-ixp4xx/include/mach/qmgr.h
F: arch/arm/mach-ixp4xx/include/mach/npe.h
LINUX FOR POWERPC EMBEDDED MPC5XXX
-T: git git://git.denx.de/linux-2.6-agust.git
+T: git git://git.denx.de/linux-denx-agust.git
S: Maintained
F: arch/powerpc/platforms/512x/
F: arch/powerpc/platforms/52xx/
F: drivers/scsi/nsp32*
NTB DRIVER
S: Supported
W: https://github.com/jonmason/ntb/wiki
T: git git://github.com/jonmason/ntb.git
PCI DRIVER FOR IMX6
S: Maintained
F: drivers/pinctrl/sh-pfc/
PIN CONTROLLER - SAMSUNG
-M: Tomasz Figa <t.figa@samsung.com>
+M: Tomasz Figa <tomasz.figa@gmail.com>
F: include/linux/pwm_backlight.h
PXA2xx/PXA3xx SUPPORT
T: git git://github.com/hzhuang1/linux.git
-T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
+T: git git://github.com/rjarzmik/linux.git
S: Maintained
F: arch/arm/mach-pxa/
F: drivers/pcmcia/pxa2xx*
REGISTER MAP ABSTRACTION
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
S: Supported
F: drivers/base/regmap/
F: drivers/media/i2c/s5k5baf.c
SAMSUNG SOC CLOCK DRIVERS
S: Supported
F: drivers/clk/samsung/
F: drivers/net/ethernet/samsung/sxgbe/
+SAMSUNG USB2 PHY DRIVER
+S: Supported
+F: Documentation/devicetree/bindings/phy/samsung-phy.txt
+F: Documentation/phy/samsung-usb2.txt
+F: drivers/phy/phy-exynos4210-usb2.c
+F: drivers/phy/phy-exynos4x12-usb2.c
+F: drivers/phy/phy-exynos5250-usb2.c
+F: drivers/phy/phy-s5pv210-usb2.c
+F: drivers/phy/phy-samsung-usb2.c
+F: drivers/phy/phy-samsung-usb2.h
+
SERIAL DRIVERS
S: Odd Fixes
F: drivers/staging/media/lirc/
+STAGING - LUSTRE PARALLEL FILESYSTEM
+W: http://lustre.opensfs.org/
+S: Maintained
+F: drivers/staging/lustre
+
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
TEGRA ARCHITECTURE SUPPORT
Q: http://patchwork.ozlabs.org/project/linux-tegra/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git
S: Supported
N: [^a-z]tegra
-TEGRA ASOC DRIVER
-S: Supported
-F: sound/soc/tegra/
-
TEGRA CLOCK DRIVER
S: Supported
F: drivers/dma/tegra20-apb-dma.c
-TEGRA GPIO DRIVER
-S: Supported
-F: drivers/gpio/gpio-tegra.c
-
TEGRA I2C DRIVER
S: Supported
S: Supported
F: drivers/input/keyboard/tegra-kbc.c
-TEGRA PINCTRL DRIVER
-S: Supported
-F: drivers/pinctrl/pinctrl-tegra*
-
TEGRA PWM DRIVER
S: Supported
S: Maintained
-F: drivers/usb/gadget/function/*uvc*.c
+F: drivers/usb/gadget/function/*uvc*
F: drivers/usb/gadget/legacy/webcam.c
USB WIRELESS RNDIS DRIVER (rndis_wlan)
VOLTAGE AND CURRENT REGULATOR FRAMEWORK
W: http://opensource.wolfsonmicro.com/node/15
W: http://www.slimlogic.co.uk/?p=48
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
F: arch/x86/
X86 PLATFORM DRIVERS
-T: git git://cavan.codon.org.uk/platform-drivers-x86.git
+T: git git://git.infradead.org/users/dvhart/linux-platform-drivers-x86.git
S: Maintained
F: drivers/platform/x86/
S: Maintained
F: drivers/tty/serial/uartlite.c
+XILLYBUS DRIVER
+S: Supported
+F: drivers/char/xillybus/
+
XTENSA XTFPGA PLATFORM SUPPORT
select CPU_ARM720T
select GENERIC_CLOCKEVENTS
select MFD_SYSCON
+ select SOC_BUS
help
Support for Cirrus Logic 711x/721x/731x based boards.
select ARCH_SHMOBILE
select ARM_PATCH_PHYS_VIRT if MMU
select CLKDEV_LOOKUP
+ select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select NO_IOPORT_MAP
select PINCTRL
select PM_GENERIC_DOMAINS if PM
+ select SH_CLK_CPG
select SPARSE_IRQ
help
Support for Renesas ARM SoC platforms using a non-multiplatform
source "arch/arm/mach-ks8695/Kconfig"
+ source "arch/arm/mach-meson/Kconfig"
+
source "arch/arm/mach-msm/Kconfig"
source "arch/arm/mach-moxart/Kconfig"
for (multi-)cluster based systems, such as big.LITTLE based
systems.
+ config MCPM_QUAD_CLUSTER
+ bool
+ depends on MCPM
+ help
+ To avoid wasting resources unnecessarily, MCPM only supports up
+ to 2 clusters by default.
+ Platforms with 3 or 4 clusters that use MCPM must select this
+ option to allow the additional clusters to be managed.
+
config BIG_LITTLE
bool "big.LITTLE support (Experimental)"
depends on CPU_V7 && SMP
bool "Kernel low-level debugging on 9263 and 9g45"
depends on HAVE_AT91_DBGU1
+ config AT91_DEBUG_LL_DBGU2
+ bool "Kernel low-level debugging on sama5d4"
+ depends on HAVE_AT91_DBGU2
+
config DEBUG_BCM2835
bool "Kernel low-level debugging on BCM2835 PL011 UART"
depends on ARCH_BCM2835
mobile SoCs in the Kona family of chips (e.g. bcm28155,
bcm11351, etc...)
+ config DEBUG_BCM63XX
+ bool "Kernel low-level debugging on BCM63XX UART"
+ depends on ARCH_BCM_63XX
+ select DEBUG_UART_BCM63XX
+
config DEBUG_BERLIN_UART
bool "Marvell Berlin SoC Debug UART"
depends on ARCH_BERLIN
Say Y here if you want kernel low-level debugging support
on HI3716 UART.
- config DEBUG_HIX5HD2_UART
- bool "Hisilicon Hix5hd2 Debug UART"
- depends on ARCH_HIX5HD2
- select DEBUG_UART_PL01X
- help
- Say Y here if you want kernel low-level debugging support
- on Hix5hd2 UART.
-
config DEBUG_HIGHBANK_UART
bool "Kernel low-level debugging messages via Highbank UART"
depends on ARCH_HIGHBANK
Say Y here if you want the debug print routines to direct
their output to the UART on Highbank based devices.
+ config DEBUG_HIP04_UART
+ bool "Hisilicon HiP04 Debug UART"
+ depends on ARCH_HIP04
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on HIP04 UART.
+
+ config DEBUG_HIX5HD2_UART
+ bool "Hisilicon Hix5hd2 Debug UART"
+ depends on ARCH_HIX5HD2
+ select DEBUG_UART_PL01X
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Hix5hd2 UART.
+
config DEBUG_IMX1_UART
bool "i.MX1 Debug UART"
depends on SOC_IMX1
Say Y here if you want the debug print routines to direct
their output to UART1 serial port on KEYSTONE2 devices.
+ config DEBUG_MESON_UARTAO
+ bool "Kernel low-level debugging via Meson6 UARTAO"
+ depends on ARCH_MESON
+ help
+ Say Y here if you want kernel low-lever debugging support
+ on Amlogic Meson6 based platforms on the UARTAO.
+
config DEBUG_MMP_UART2
bool "Kernel low-level debugging message via MMP UART2"
depends on ARCH_MMP
Say Y here if you want kernel low-level debugging support
on Ux500 based platforms.
+ config DEBUG_MT6589_UART0
+ bool "Mediatek mt6589 UART0"
+ depends on ARCH_MEDIATEK
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ for Mediatek mt6589 based platforms on UART0.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
string
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
+ default "debug/meson.S" if DEBUG_MESON_UARTAO
default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X
default "debug/exynos.S" if DEBUG_EXYNOS_UART
default "debug/efm32.S" if DEBUG_LL_UART_EFM32
default "debug/vf.S" if DEBUG_VF_UART
default "debug/vt8500.S" if DEBUG_VT8500_UART0
default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
+ default "debug/bcm63xx.S" if DEBUG_UART_BCM63XX
default "mach/debug-macro.S"
# Compatibility options for PL01x
ARCH_IOP33X || ARCH_IXP4XX || \
ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC
+ # Compatibility options for BCM63xx
+ config DEBUG_UART_BCM63XX
+ def_bool ARCH_BCM_63XX
+
config DEBUG_UART_PHYS
hex "Physical base address of debug UART"
default 0x01c20000 if DEBUG_DAVINCI_DMx_UART0
default 0x10126000 if DEBUG_RK3X_UART1
default 0x101f1000 if ARCH_VERSATILE
default 0x101fb000 if DEBUG_NOMADIK_UART
+ default 0x11006000 if DEBUG_MT6589_UART0
default 0x16000000 if ARCH_INTEGRATOR
default 0x18000300 if DEBUG_BCM_5301X
default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
DEBUG_S3C2410_UART1)
default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
DEBUG_S3C2410_UART2)
+ default 0x78000000 if DEBUG_CNS3XXX
default 0x7c0003f8 if FOOTBRIDGE
+ default 0x78000000 if DEBUG_CNS3XXX
default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
default 0xd0012000 if DEBUG_MVEBU_UART
+ default 0xc81004c0 if DEBUG_MESON_UARTAO
default 0xd4017000 if DEBUG_MMP_UART2
default 0xd4018000 if DEBUG_MMP_UART3
default 0xe0000000 if ARCH_SPEAR13XX
+ default 0xe4007000 if DEBUG_HIP04_UART
default 0xf0000be0 if ARCH_EBSA110
default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
default 0xffc02000 if DEBUG_SOCFPGA_UART
default 0xffd82340 if ARCH_IOP13XX
default 0xfff36000 if DEBUG_HIGHBANK_UART
+ default 0xfffe8600 if DEBUG_UART_BCM63XX
default 0xfffff700 if ARCH_IOP33X
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
DEBUG_LL_UART_EFM32 || \
- DEBUG_UART_8250 || DEBUG_UART_PL01X || \
- DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
+ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
+ DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
+ DEBUG_UART_BCM63XX
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
default 0xf01fb000 if DEBUG_NOMADIK_UART
default 0xf0201000 if DEBUG_BCM2835
default 0xf1000300 if DEBUG_BCM_5301X
+ default 0xf1006000 if DEBUG_MT6589_UART0
default 0xf11f1000 if ARCH_VERSATILE
default 0xf1600000 if ARCH_INTEGRATOR
default 0xf1c28000 if DEBUG_SUNXI_UART0
default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
DEBUG_S3C2410_UART2)
default 0xf7fc9000 if DEBUG_BERLIN_UART
+ default 0xf8007000 if DEBUG_HIP04_UART
default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
default 0xfa71e000 if DEBUG_QCOM_UARTDM
default 0xfb002000 if DEBUG_CNS3XXX
default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
+ default 0xfcfe8600 if DEBUG_UART_BCM63XX
default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
default 0xfd000000 if ARCH_SPEAR13XX
default 0xfd012000 if ARCH_MV78XX0
default 0xfde12000 if ARCH_DOVE
default 0xfe012000 if ARCH_ORION5X
+ default 0xf31004c0 if DEBUG_MESON_UARTAO
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
default 0xff003000 if DEBUG_U300_UART
default DEBUG_UART_PHYS if !MMU
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
- DEBUG_UART_8250 || DEBUG_UART_PL01X || \
- DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
+ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
+ DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
+ DEBUG_UART_BCM63XX
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
machine-$(CONFIG_ARCH_EFM32) += efm32
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
machine-$(CONFIG_ARCH_EXYNOS) += exynos
+machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge
machine-$(CONFIG_ARCH_GEMINI) += gemini
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_HISI) += hisi
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
machine-$(CONFIG_ARCH_KS8695) += ks8695
machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
+ machine-$(CONFIG_ARCH_MESON) += meson
machine-$(CONFIG_ARCH_MMP) += mmp
machine-$(CONFIG_ARCH_MOXART) += moxart
machine-$(CONFIG_ARCH_MSM) += msm
machine-$(CONFIG_ARCH_VT8500) += vt8500
machine-$(CONFIG_ARCH_W90X900) += w90x900
machine-$(CONFIG_ARCH_ZYNQ) += zynq
-machine-$(CONFIG_FOOTBRIDGE) += footbridge
machine-$(CONFIG_PLAT_SPEAR) += spear
# Platform directory name. This list is sorted alphanumerically
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
+ # sama5d4
+ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
+ dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
bcm21664-garnet.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
dtb-$(CONFIG_ARCH_HIX5HD2) += hisi-x5hd2-dkb.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
ecx-2000.dtb
+ dtb-$(CONFIG_ARCH_HIP04) += hip04-d01.dtb
dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
integratorcp.dtb
dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \
kirkwood-openrd-client.dtb \
kirkwood-openrd-ultimate.dtb \
kirkwood-rd88f6192.dtb \
- kirkwood-rd88f6281-a0.dtb \
- kirkwood-rd88f6281-a1.dtb \
+ kirkwood-rd88f6281-z0.dtb \
+ kirkwood-rd88f6281-a.dtb \
kirkwood-rs212.dtb \
kirkwood-rs409.dtb \
kirkwood-rs411.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
- r8a7740-armadillo800eva-reference.dtb \
r8a7779-marzen.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
+ r8a7740-armadillo800eva.dtb \
r8a7791-henninger.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
usb1: usb@48390000 {
compatible = "synopsys,dwc3";
- reg = <0x48390000 0x17000>;
+ reg = <0x48390000 0x10000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy1>;
phy-names = "usb2-phy";
usb2: usb@483d0000 {
compatible = "synopsys,dwc3";
- reg = <0x483d0000 0x17000>;
+ reg = <0x483d0000 0x10000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy2>;
phy-names = "usb2-phy";
clock-names = "fck";
};
};
+
+ ocmcram: ocmcram@40300000 {
+ compatible = "mmio-sram";
+ reg = <0x40300000 0x40000>; /* 256k */
+ };
};
};
config HAVE_AT91_DBGU1
bool
+ config HAVE_AT91_DBGU2
+ bool
+
config AT91_USE_OLD_CLK
bool
bool
default AT91_PMC_UNIT && AT91_USE_OLD_CLK
+config OLD_IRQ_AT91
+ bool
+ select MULTI_IRQ_HANDLER
+ select SPARSE_IRQ
+
config AT91_SAM9_ALT_RESET
bool
default !ARCH_AT91X40
config HAVE_AT91_SMD
bool
+ config HAVE_AT91_H32MX
+ bool
+
config SOC_AT91SAM9
bool
select AT91_SAM9_TIME
+ select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
- select MULTI_IRQ_HANDLER
- select SPARSE_IRQ
config SOC_SAMA5
bool
select AT91_SAM9_TIME
+ select ATMEL_AIC5_IRQ
select CPU_V7
select GENERIC_CLOCKEVENTS
- select MULTI_IRQ_HANDLER
- select SPARSE_IRQ
select USE_OF
menu "Atmel AT91 System-on-Chip"
depends on !MMU
select CPU_ARM7TDMI
select ARCH_USES_GETTIMEOFFSET
- select MULTI_IRQ_HANDLER
- select SPARSE_IRQ
+ select OLD_IRQ_AT91
help
Select this if you are using one of Atmel's AT91X40 SoC.
help
Select this if you are using one of Atmel's SAMA5D3 family SoC.
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
+
+ config SOC_SAMA5D4
+ bool "SAMA5D4 family"
+ select SOC_SAMA5
+ select HAVE_AT91_DBGU2
+ select CLKSRC_MMIO
+ select CACHE_L2X0
+ select CACHE_PL310
+ select HAVE_FB_ATMEL
+ select HAVE_AT91_UTMI
+ select HAVE_AT91_SMD
+ select HAVE_AT91_USB_CLK
+ select HAVE_AT91_H32MX
+ help
+ Select this if you are using one of Atmel's SAMA5D4 family SoC.
endif
if SOC_SAM_V4_V5
config SOC_AT91RM9200
bool "AT91RM9200"
+ select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
- select MULTI_IRQ_HANDLER
- select SPARSE_IRQ
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
# Makefile for the linux kernel.
#
-obj-y := irq.o gpio.o setup.o sysirq_mask.o
+obj-y := gpio.o setup.o sysirq_mask.o
obj-m :=
obj-n :=
obj- :=
+obj-$(CONFIG_OLD_IRQ_AT91) += irq.o
obj-$(CONFIG_OLD_CLK_AT91) += clock.o
obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
+ obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
at91sam926x_pit_init();
}
-static const struct of_device_id irq_of_match[] __initconst = {
-
- { .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init },
- { /*sentinel*/ }
-};
-
-static void __init at91_dt_init_irq(void)
-{
- of_irq_init(irq_of_match);
-}
-
static int ksz9021rn_phy_fixup(struct phy_device *phy)
{
int value;
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
- static const char *sama5_dt_board_compat[] __initdata = {
+ static const char *sama5_dt_board_compat[] __initconst = {
"atmel,sama5",
NULL
};
/* Maintainer: Atmel */
.init_time = sama5_dt_timer_init,
.map_io = at91_map_io,
- .handle_irq = at91_aic5_handle_irq,
.init_early = at91_dt_initialize,
- .init_irq = at91_dt_init_irq,
.init_machine = sama5_dt_device_init,
.dt_compat = sama5_dt_board_compat,
MACHINE_END
+
+ static const char *sama5_alt_dt_board_compat[] __initconst = {
+ "atmel,sama5d4",
+ NULL
+ };
+
+ DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5 (Device Tree)")
+ /* Maintainer: Atmel */
+ .map_io = at91_alt_map_io,
+ .init_early = at91_dt_initialize,
+ .init_machine = sama5_dt_device_init,
+ .dt_compat = sama5_alt_dt_board_compat,
+ .l2c_aux_mask = ~0UL,
+ MACHINE_END
void __init at91_init_interrupts(unsigned int *priority)
{
/* Initialize the AIC interrupt controller */
- at91_aic_init(priority, at91_boot_soc.extern_irq);
+ if (IS_ENABLED(CONFIG_OLD_IRQ_AT91))
+ at91_aic_init(priority, at91_boot_soc.extern_irq);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
.type = MT_DEVICE,
};
+ static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
+ .virtual = (unsigned long)AT91_ALT_VA_BASE_SYS,
+ .pfn = __phys_to_pfn(AT91_ALT_BASE_SYS),
+ .length = 24 * SZ_1K,
+ .type = MT_DEVICE,
+ };
+
static void __init soc_detect(u32 dbgu_base)
{
u32 cidr, socid;
at91_boot_soc = at91sam9n12_soc;
break;
- case ARCH_ID_SAMA5D3:
- at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- at91_boot_soc = sama5d3_soc;
+ case ARCH_ID_SAMA5:
+ at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
+ if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
+ at91_soc_initdata.type = AT91_SOC_SAMA5D3;
+ at91_boot_soc = sama5d3_soc;
+ }
break;
}
at91_soc_initdata.cidr = cidr;
/* sub version of soc */
- at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
+ if (!at91_soc_initdata.exid)
+ at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
switch (at91_soc_initdata.exid) {
}
}
+ static void __init alt_soc_detect(u32 dbgu_base)
+ {
+ u32 cidr, socid;
+
+ /* SoC ID */
+ cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
+ socid = cidr & ~AT91_CIDR_VERSION;
+
+ switch (socid) {
+ case ARCH_ID_SAMA5:
+ at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
+ if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
+ at91_soc_initdata.type = AT91_SOC_SAMA5D3;
+ at91_boot_soc = sama5d3_soc;
+ } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
+ at91_soc_initdata.type = AT91_SOC_SAMA5D4;
+ at91_boot_soc = sama5d4_soc;
+ }
+ break;
+ }
+
+ if (!at91_soc_is_detected())
+ return;
+
+ at91_soc_initdata.cidr = cidr;
+
+ /* sub version of soc */
+ if (!at91_soc_initdata.exid)
+ at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
+
+ if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
+ switch (at91_soc_initdata.exid) {
+ case ARCH_EXID_SAMA5D41:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
+ break;
+ case ARCH_EXID_SAMA5D42:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
+ break;
+ case ARCH_EXID_SAMA5D43:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
+ break;
+ case ARCH_EXID_SAMA5D44:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
+ break;
+ }
+ }
+ }
+
static const char *soc_name[] = {
[AT91_SOC_RM9200] = "at91rm9200",
[AT91_SOC_SAM9260] = "at91sam9260",
[AT91_SOC_SAM9X5] = "at91sam9x5",
[AT91_SOC_SAM9N12] = "at91sam9n12",
[AT91_SOC_SAMA5D3] = "sama5d3",
+ [AT91_SOC_SAMA5D4] = "sama5d4",
[AT91_SOC_UNKNOWN] = "Unknown",
};
[AT91_SOC_SAMA5D34] = "sama5d34",
[AT91_SOC_SAMA5D35] = "sama5d35",
[AT91_SOC_SAMA5D36] = "sama5d36",
+ [AT91_SOC_SAMA5D41] = "sama5d41",
+ [AT91_SOC_SAMA5D42] = "sama5d42",
+ [AT91_SOC_SAMA5D43] = "sama5d43",
+ [AT91_SOC_SAMA5D44] = "sama5d44",
[AT91_SOC_SUBTYPE_NONE] = "None",
[AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
};
panic("Impossible to ioremap at91_rstc_base\n");
}
+ void __init at91_alt_map_io(void)
+ {
+ /* Map peripherals */
+ iotable_init(&at91_alt_io_desc, 1);
+
+ at91_soc_initdata.type = AT91_SOC_UNKNOWN;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
+
+ alt_soc_detect(AT91_BASE_DBGU2);
+ if (!at91_soc_is_detected())
+ panic("AT91: Impossible to detect the SOC type");
+
+ pr_info("AT91: Detected soc type: %s\n",
+ at91_get_soc_type(&at91_soc_initdata));
+ if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
+ pr_info("AT91: Detected soc subtype: %s\n",
+ at91_get_soc_subtype(&at91_soc_initdata));
+
+ if (!at91_soc_is_enabled())
+ panic("AT91: Soc not enabled");
+
+ if (at91_boot_soc.map_io)
+ at91_boot_soc.map_io();
+ }
+
void __iomem *at91_matrix_base;
EXPORT_SYMBOL_GPL(at91_matrix_base);
menu "TI OMAP/AM/DM/DRA Family"
depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
-config ARCH_OMAP
- bool
-
config ARCH_OMAP2
bool "TI OMAP2"
depends on ARCH_MULTI_V6
bool "TI OMAP4"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
- select ARCH_HAS_OPP
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
select ARM_CPU_SUSPEND if PM
select ARM_ERRATA_720789
bool "TI OMAP5"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
- select ARCH_HAS_OPP
select ARM_CPU_SUSPEND if PM
select ARM_GIC
select HAVE_ARM_SCU if SMP
bool "TI AM33XX"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
- select ARCH_HAS_OPP
select ARM_CPU_SUSPEND if PM
config SOC_AM43XX
bool "TI AM43x"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
- select ARCH_HAS_OPP
select ARM_GIC
select MACH_OMAP_GENERIC
select MIGHT_HAVE_CACHE_L2X0
bool "TI DRA7XX"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
- select ARCH_HAS_OPP
select ARM_CPU_SUSPEND if PM
select ARM_GIC
select HAVE_ARM_ARCH_TIMER
}
#endif
- #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
+ #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
int omap4_pm_init(void);
int omap4_pm_init_early(void);
#else
#endif
-void pdata_quirks_init(struct of_device_id *);
+void pdata_quirks_init(const struct of_device_id *);
void omap_auxdata_legacy_init(struct device *dev);
void omap_pcs_legacy_init(int irq, void (*rearm)(void));
oh->_clk = clk_get(NULL, oh->main_clk);
if (IS_ERR(oh->_clk)) {
- pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
- oh->name, oh->main_clk);
+ pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
+ oh->name, oh->main_clk);
return -EINVAL;
}
/*
c = clk_get(NULL, os->clk);
if (IS_ERR(c)) {
- pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
- oh->name, os->clk);
+ pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
+ oh->name, os->clk);
ret = -EINVAL;
continue;
}
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
c = clk_get(NULL, oc->clk);
if (IS_ERR(c)) {
- pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
- oh->name, oc->clk);
+ pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
+ oh->name, oc->clk);
ret = -EINVAL;
continue;
}
oh->clkdm = clkdm_lookup(oh->clkdm_name);
if (!oh->clkdm) {
- pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
+ pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
oh->name, oh->clkdm_name);
return 0;
}
if (!ret)
oh->_state = _HWMOD_STATE_CLKS_INITED;
else
- pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
+ pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
return ret;
}
_disable_clocks(oh);
if (ret == -EBUSY)
- pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
+ pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
if (!ret) {
/*
c = _wait_softreset_complete(oh);
if (c == MAX_MODULE_SOFTRESET_WAIT) {
- pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
- oh->name, MAX_MODULE_SOFTRESET_WAIT);
+ pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
+ oh->name, MAX_MODULE_SOFTRESET_WAIT);
ret = -ETIMEDOUT;
goto dis_opt_clks;
} else {
spin_lock_irqsave(&io_chain_lock, flags);
- if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
+ if (cpu_is_omap34xx())
omap3xxx_prm_reconfigure_io_chain();
else if (cpu_is_omap44xx())
omap44xx_prm_reconfigure_io_chain();
oh->mux->pads_dynamic))) {
omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
_reconfigure_io_chain();
- } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+ } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
_reconfigure_io_chain();
}
if (oh->mux && oh->mux->pads_dynamic) {
omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
_reconfigure_io_chain();
- } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+ } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
_reconfigure_io_chain();
}
if (oh->rst_lines_cnt == 0) {
r = _enable(oh);
if (r) {
- pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
- oh->name, oh->_state);
+ pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
+ oh->name, oh->_state);
return -EINVAL;
}
}
/* set IBE to 1 */
rx51_secure_update_aux_cr(BIT(6), 0);
} else {
- pr_warning("RX-51: Not enabling ARM errata 430973 workaround\n");
- pr_warning("Thumb binaries may crash randomly without this workaround\n");
+ pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
+ pr_warn("Thumb binaries may crash randomly without this workaround\n");
}
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata),
OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata),
#endif
+ #ifdef CONFIG_SOC_OMAP5
+ OF_DEV_AUXDATA("ti,omap5-padconf", 0x4a002840, "4a002840.pinmux", &pcs_pdata),
+ OF_DEV_AUXDATA("ti,omap5-padconf", 0x4ae0c840, "4ae0c840.pinmux", &pcs_pdata),
+ #endif
+ #ifdef CONFIG_SOC_DRA7XX
+ OF_DEV_AUXDATA("ti,dra7-padconf", 0x4a003400, "4a003400.pinmux", &pcs_pdata),
+ #endif
+ #ifdef CONFIG_SOC_AM43XX
+ OF_DEV_AUXDATA("ti,am437-padconf", 0x44e10800, "44e10800.pinmux", &pcs_pdata),
+ #endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
&omap4_iommu_pdata),
}
}
-void __init pdata_quirks_init(struct of_device_id *omap_dt_match_table)
+void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
{
omap_sdrc_init(NULL, NULL);
pdata_quirks_check(auxdata_quirks);
#include <linux/err.h>
#include <linux/io.h>
#include <linux/irq.h>
+ #include <linux/of_irq.h>
#include "soc.h"
#include "common.h"
.ocp_barrier = &omap3xxx_prm_ocp_barrier,
.save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen,
.restore_irqen = &omap3xxx_prm_restore_irqen,
- .reconfigure_io_chain = &omap3xxx_prm_reconfigure_io_chain,
+ .reconfigure_io_chain = NULL,
};
/*
}
/**
- * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ * omap3430_pre_es3_1_reconfigure_io_chain - restart wake-up daisy chain
+ *
+ * The ST_IO_CHAIN bit does not exist in 3430 before es3.1. The only
+ * thing we can do is toggle EN_IO bit for earlier omaps.
+ */
+void omap3430_pre_es3_1_reconfigure_io_chain(void)
+{
+ omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
+ PM_WKEN);
+ omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
+ PM_WKEN);
+ omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
+}
+
+/**
+ * omap3_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
*
* Clear any previously-latched I/O wakeup events and ensure that the
* I/O wakeup gates are aligned with the current mux settings. Works
* by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
* deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No
- * return value.
+ * return value. These registers are only available in 3430 es3.1 and later.
*/
-void omap3xxx_prm_reconfigure_io_chain(void)
+void omap3_prm_reconfigure_io_chain(void)
{
int i = 0;
omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST);
}
+/**
+ * omap3xxx_prm_reconfigure_io_chain - reconfigure I/O chain
+ */
+void omap3xxx_prm_reconfigure_io_chain(void)
+{
+ if (omap3_prcm_irq_setup.reconfigure_io_chain)
+ omap3_prcm_irq_setup.reconfigure_io_chain();
+}
+
/**
* omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
*
return prm_register(&omap3xxx_prm_ll_data);
}
+ static struct of_device_id omap3_prm_dt_match_table[] = {
+ { .compatible = "ti,omap3-prm" },
+ { }
+ };
+
static int omap3xxx_prm_late_init(void)
{
int ret;
if (!(prm_features & PRM_HAS_IO_WAKEUP))
return 0;
+ if (omap3_has_io_chain_ctrl())
+ omap3_prcm_irq_setup.reconfigure_io_chain =
+ omap3_prm_reconfigure_io_chain;
+ else
+ omap3_prcm_irq_setup.reconfigure_io_chain =
+ omap3430_pre_es3_1_reconfigure_io_chain;
+
+ if (of_have_populated_dt()) {
+ struct device_node *np;
+ int irq_num;
+
+ np = of_find_matching_node(NULL, omap3_prm_dt_match_table);
+ if (np) {
+ irq_num = of_irq_get(np, 0);
+ if (irq_num >= 0)
+ omap3_prcm_irq_setup.irq = irq_num;
+ }
+ }
+
omap3xxx_prm_enable_io_wakeup();
ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
if (!ret)
config ARCH_SHMOBILE
bool
+config PM_RCAR
+ bool
+
+config PM_RMOBILE
+ bool
+
+config ARCH_RCAR_GEN1
+ bool
+ select PM_RCAR if PM || SMP
+ select RENESAS_INTC_IRQPIN
+ select SYS_SUPPORTS_SH_TMU
+
+config ARCH_RCAR_GEN2
+ bool
+ select PM_RCAR if PM || SMP
+ select RENESAS_IRQC
+ select SYS_SUPPORTS_SH_CMT
+
+config ARCH_RMOBILE
+ bool
+ select PM_RMOBILE if PM && !ARCH_SHMOBILE_MULTI
+ select SYS_SUPPORTS_SH_CMT
+ select SYS_SUPPORTS_SH_TMU
+
menuconfig ARCH_SHMOBILE_MULTI
bool "Renesas ARM SoCs" if ARCH_MULTI_V7
depends on MMU
bool "RZ/A1H (R7S72100)"
select SYS_SUPPORTS_SH_MTU2
+ config ARCH_R8A7740
+ bool "R-Mobile A1 (R8A77400)"
+ select ARCH_RMOBILE
+ select RENESAS_INTC_IRQPIN
+
config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
- select RENESAS_INTC_IRQPIN
- select SYS_SUPPORTS_SH_TMU
+ select ARCH_RCAR_GEN1
config ARCH_R8A7790
bool "R-Car H2 (R8A77900)"
- select RENESAS_IRQC
- select SYS_SUPPORTS_SH_CMT
+ select ARCH_RCAR_GEN2
config ARCH_R8A7791
- bool "R-Car M2 (R8A77910)"
- select RENESAS_IRQC
- select SYS_SUPPORTS_SH_CMT
+ bool "R-Car M2-W (R8A77910)"
+ select ARCH_RCAR_GEN2
- comment "Renesas ARM SoCs Board Type"
+ config ARCH_R8A7794
+ bool "R-Car E2 (R8A77940)"
+ select ARCH_RCAR_GEN2
- config MACH_GENMAI
- bool "Genmai board"
- depends on ARCH_R7S72100
+ comment "Renesas ARM SoCs Board Type"
config MACH_KOELSCH
bool "Koelsch board"
config ARCH_SH7372
bool "SH-Mobile AP4 (SH7372)"
+ select ARCH_RMOBILE
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_CPU_SUSPEND if PM || CPU_IDLE
- select CPU_V7
- select SH_CLK_CPG
select SH_INTC
- select SYS_SUPPORTS_SH_CMT
- select SYS_SUPPORTS_SH_TMU
config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
+ select ARCH_RMOBILE
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
select I2C
- select SH_CLK_CPG
select SH_INTC
select RENESAS_INTC_IRQPIN
- select SYS_SUPPORTS_SH_CMT
- select SYS_SUPPORTS_SH_TMU
config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
+ select ARCH_RMOBILE
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
- select SH_CLK_CPG
select RENESAS_IRQC
- select SYS_SUPPORTS_SH_CMT
- select SYS_SUPPORTS_SH_TMU
config ARCH_R8A7740
bool "R-Mobile A1 (R8A77400)"
+ select ARCH_RMOBILE
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
- select SH_CLK_CPG
select RENESAS_INTC_IRQPIN
- select SYS_SUPPORTS_SH_CMT
- select SYS_SUPPORTS_SH_TMU
config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
+ select ARCH_RCAR_GEN1
select ARCH_WANT_OPTIONAL_GPIOLIB
- select CPU_V7
- select SH_CLK_CPG
select ARM_GIC
- select SYS_SUPPORTS_SH_TMU
- select RENESAS_INTC_IRQPIN
config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
+ select ARCH_RCAR_GEN1
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
- select SH_CLK_CPG
- select RENESAS_INTC_IRQPIN
- select SYS_SUPPORTS_SH_TMU
config ARCH_R8A7790
bool "R-Car H2 (R8A77900)"
+ select ARCH_RCAR_GEN2
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
select MIGHT_HAVE_PCI
- select SH_CLK_CPG
- select RENESAS_IRQC
- select SYS_SUPPORTS_SH_CMT
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
config ARCH_R8A7791
- bool "R-Car M2 (R8A77910)"
+ bool "R-Car M2-W (R8A77910)"
+ select ARCH_RCAR_GEN2
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
- select CPU_V7
select MIGHT_HAVE_PCI
- select SH_CLK_CPG
- select RENESAS_IRQC
- select SYS_SUPPORTS_SH_CMT
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- config ARCH_R7S72100
- bool "RZ/A1H (R7S72100)"
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARM_GIC
- select CPU_V7
- select SH_CLK_CPG
- select SYS_SUPPORTS_SH_MTU2
-
comment "Renesas ARM SoCs Board Type"
config MACH_APE6EVM
select SND_SOC_WM8978 if SND_SIMPLE_CARD
select USE_OF
- config MACH_ARMADILLO800EVA_REFERENCE
- bool "Armadillo-800 EVA board - Reference Device Tree Implementation"
- depends on ARCH_R8A7740
- select ARCH_REQUIRE_GPIOLIB
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
- select SMSC_PHY if SH_ETH
- select SND_SOC_WM8978 if SND_SIMPLE_CARD
- select USE_OF
- ---help---
- Use reference implementation of Armadillo800 EVA board support
- which makes greater use of device tree at the expense
- of not supporting a number of devices.
-
- This is intended to aid developers
-
config MACH_BOCKW
bool "BOCK-W platform"
depends on ARCH_R8A7778
This is intended to aid developers
- config MACH_GENMAI
- bool "Genmai board"
- depends on ARCH_R7S72100
- select USE_OF
-
config MACH_MARZEN
bool "MARZEN board"
depends on ARCH_R8A7779
# Makefile for the linux kernel.
#
- ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/mach-shmobile/include
-
# Common objects
obj-y := timer.o console.o
# CPU objects
-obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o
-obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o intc-sh73a0.o
+obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o pm-sh7372.o
+obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o intc-sh73a0.o pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
-obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o pm-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
-obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
-obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
-obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o setup-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o setup-rcar-gen2.o
+obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
+obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o pm-r8a7790.o
+obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o pm-r8a7791.o
+ obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
- obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
endif
# CPU reset vector handling objects
cpu-y := platsmp.o headsmp.o
-cpu-$(CONFIG_ARCH_R8A7790) += platsmp-apmu.o
-cpu-$(CONFIG_ARCH_R8A7791) += platsmp-apmu.o
+
+# Shared SoC family objects
+obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y)
# SMP objects
smp-y := $(cpu-y)
obj-$(CONFIG_SUSPEND) += suspend.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
-obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
-obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
-obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
-obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o
-obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o $(cpu-y)
-obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o $(cpu-y)
+obj-$(CONFIG_PM_RCAR) += pm-rcar.o
+obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
-# IRQ objects
-obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
+# special sh7372 handling for IRQ objects and low level sleep code
+obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
- obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
- obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
#include <asm/mach-types.h>
#include "common.h"
+ #include "intc.h"
#include "irqs.h"
#include "pm-rmobile.h"
#include "sh-gpio.h"
#define USCCR1 IOMEM(0xE6058144)
static void __init mackerel_init(void)
{
- struct pm_domain_device domain_devices[] = {
+ static struct pm_domain_device domain_devices[] __initdata = {
{ "A4LC", &lcdc_device, },
{ "A4LC", &hdmi_lcdc_device, },
{ "A4LC", &meram_device, },
#include "common.h"
#include "pm-rmobile.h"
- #ifdef CONFIG_PM
+ #if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
static int r8a7740_pd_a4s_suspend(void)
{
/*
* The A4S domain contains the CPU core and therefore it should
- * only be turned off if the CPU is in use.
+ * only be turned off if the CPU is not in use.
*/
return -EBUSY;
}
static struct rmobile_pm_domain r8a7740_pm_domains[] = {
{
+ .genpd.name = "A4LC",
+ .bit_shift = 1,
+ }, {
.genpd.name = "A4S",
.bit_shift = 10,
.gov = &pm_domain_always_on_gov,
.no_debug = true,
.suspend = r8a7740_pd_a4s_suspend,
- },
- {
+ }, {
.genpd.name = "A3SP",
.bit_shift = 11,
.gov = &pm_domain_always_on_gov,
.no_debug = true,
.suspend = r8a7740_pd_a3sp_suspend,
},
- {
- .genpd.name = "A4LC",
- .bit_shift = 1,
- },
};
void __init r8a7740_init_pm_domains(void)
rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
pm_genpd_add_subdomain_names("A4S", "A3SP");
}
-
- #endif /* CONFIG_PM */
+ #endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */
#ifdef CONFIG_SUSPEND
static int r8a7740_enter_suspend(suspend_state_t suspend_state)
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+ #include <asm/hardware/cache-l2x0.h>
#include "common.h"
#include "dma-register.h"
.num_resources = ARRAY_SIZE(ipmmu_resources),
};
- static struct platform_device *r8a7740_devices_dt[] __initdata = {
- &cmt1_device,
- };
-
static struct platform_device *r8a7740_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&irqpin3_device,
&tmu0_device,
&ipmmu_device,
+ &cmt1_device,
};
/* DMA */
void __init r8a7740_add_standard_devices(void)
{
+ static struct pm_domain_device domain_devices[] __initdata = {
+ { "A3SP", &scif0_device },
+ { "A3SP", &scif1_device },
+ { "A3SP", &scif2_device },
+ { "A3SP", &scif3_device },
+ { "A3SP", &scif4_device },
+ { "A3SP", &scif5_device },
+ { "A3SP", &scif6_device },
+ { "A3SP", &scif7_device },
+ { "A3SP", &scif8_device },
+ { "A3SP", &i2c1_device },
+ };
+
/* I2C work-around */
r8a7740_i2c_workaround(&i2c0_device);
r8a7740_i2c_workaround(&i2c1_device);
/* add devices */
platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
platform_add_devices(r8a7740_late_devices,
ARRAY_SIZE(r8a7740_late_devices));
/* add devices to PM domain */
-
- rmobile_add_device_to_domain("A3SP", &scif0_device);
- rmobile_add_device_to_domain("A3SP", &scif1_device);
- rmobile_add_device_to_domain("A3SP", &scif2_device);
- rmobile_add_device_to_domain("A3SP", &scif3_device);
- rmobile_add_device_to_domain("A3SP", &scif4_device);
- rmobile_add_device_to_domain("A3SP", &scif5_device);
- rmobile_add_device_to_domain("A3SP", &scif6_device);
- rmobile_add_device_to_domain("A3SP", &scif7_device);
- rmobile_add_device_to_domain("A3SP", &scif8_device);
- rmobile_add_device_to_domain("A3SP", &i2c1_device);
+ rmobile_add_devices_to_domains(domain_devices,
+ ARRAY_SIZE(domain_devices));
}
void __init r8a7740_add_early_devices(void)
{
early_platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- early_platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
/* setup early console here as well */
shmobile_setup_console();
#ifdef CONFIG_USE_OF
- void __init r8a7740_add_standard_devices_dt(void)
- {
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
-
void __init r8a7740_init_irq_of(void)
{
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
static void __init r8a7740_generic_init(void)
{
- r8a7740_clock_init(0);
- r8a7740_add_standard_devices_dt();
+ r8a7740_meram_workaround();
+
+ #ifdef CONFIG_CACHE_L2X0
+ /* Shared attribute override enable, 32K*8way */
+ l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
+ #endif
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+
+ #define RESCNT2 IOMEM(0xe6188020)
+ static void r8a7740_restart(enum reboot_mode mode, const char *cmd)
+ {
+ /* Do soft power on reset */
+ writel(1 << 31, RESCNT2);
}
static const char *r8a7740_boards_compat_dt[] __initdata = {
.init_machine = r8a7740_generic_init,
.init_late = shmobile_init_late,
.dt_compat = r8a7740_boards_compat_dt,
+ .restart = r8a7740_restart,
MACHINE_END
#endif /* CONFIG_USE_OF */
#include "common.h"
#include "dma-register.h"
+ #include "intc.h"
#include "irqs.h"
#include "pm-rmobile.h"
#include "sh7372.h"
void __init sh7372_add_standard_devices(void)
{
- struct pm_domain_device domain_devices[] = {
+ static struct pm_domain_device domain_devices[] __initdata = {
{ "A3RV", &vpu_device, },
{ "A4MP", &spu0_device, },
{ "A4MP", &spu1_device, },
void __init sh7372_add_early_devices_dt(void)
{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
+ shmobile_init_delay();
sh7372_add_early_devices();
}
DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
.map_io = sh7372_map_io,
.init_early = sh7372_add_early_devices_dt,
- .nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh7372_init_irq,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = sh7372_add_standard_devices_dt,