1 // SPDX-License-Identifier: GPL-2.0
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
7 * Copyright (C) 1999 Harald Koerfgen
10 * Copyright (C) 2000-2002 Toshiba Corporation
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/delay.h>
20 #include <linux/platform_device.h>
21 #include <linux/pci.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
29 #define PASS_LIMIT 256
31 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
32 /* "ttyS" is used for standard serial driver */
33 #define TXX9_TTY_NAME "ttyTX"
34 #define TXX9_TTY_MINOR_START 196
35 #define TXX9_TTY_MAJOR 204
37 /* acts like standard serial driver */
38 #define TXX9_TTY_NAME "ttyS"
39 #define TXX9_TTY_MINOR_START 64
40 #define TXX9_TTY_MAJOR TTY_MAJOR
44 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
45 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
48 /* support for Toshiba TC86C001 SIO */
49 #define ENABLE_SERIAL_TXX9_PCI
53 * Number of serial ports
55 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
57 #define TXX9_REGION_SIZE 0x24
59 /* TXX9 Serial Registers */
60 #define TXX9_SILCR 0x00
61 #define TXX9_SIDICR 0x04
62 #define TXX9_SIDISR 0x08
63 #define TXX9_SICISR 0x0c
64 #define TXX9_SIFCR 0x10
65 #define TXX9_SIFLCR 0x14
66 #define TXX9_SIBGR 0x18
67 #define TXX9_SITFIFO 0x1c
68 #define TXX9_SIRFIFO 0x20
70 /* SILCR : Line Control */
71 #define TXX9_SILCR_SCS_MASK 0x00000060
72 #define TXX9_SILCR_SCS_IMCLK 0x00000000
73 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
74 #define TXX9_SILCR_SCS_SCLK 0x00000040
75 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
76 #define TXX9_SILCR_UEPS 0x00000010
77 #define TXX9_SILCR_UPEN 0x00000008
78 #define TXX9_SILCR_USBL_MASK 0x00000004
79 #define TXX9_SILCR_USBL_1BIT 0x00000000
80 #define TXX9_SILCR_USBL_2BIT 0x00000004
81 #define TXX9_SILCR_UMODE_MASK 0x00000003
82 #define TXX9_SILCR_UMODE_8BIT 0x00000000
83 #define TXX9_SILCR_UMODE_7BIT 0x00000001
85 /* SIDICR : DMA/Int. Control */
86 #define TXX9_SIDICR_TDE 0x00008000
87 #define TXX9_SIDICR_RDE 0x00004000
88 #define TXX9_SIDICR_TIE 0x00002000
89 #define TXX9_SIDICR_RIE 0x00001000
90 #define TXX9_SIDICR_SPIE 0x00000800
91 #define TXX9_SIDICR_CTSAC 0x00000600
92 #define TXX9_SIDICR_STIE_MASK 0x0000003f
93 #define TXX9_SIDICR_STIE_OERS 0x00000020
94 #define TXX9_SIDICR_STIE_CTSS 0x00000010
95 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
96 #define TXX9_SIDICR_STIE_TRDY 0x00000004
97 #define TXX9_SIDICR_STIE_TXALS 0x00000002
98 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
100 /* SIDISR : DMA/Int. Status */
101 #define TXX9_SIDISR_UBRK 0x00008000
102 #define TXX9_SIDISR_UVALID 0x00004000
103 #define TXX9_SIDISR_UFER 0x00002000
104 #define TXX9_SIDISR_UPER 0x00001000
105 #define TXX9_SIDISR_UOER 0x00000800
106 #define TXX9_SIDISR_ERI 0x00000400
107 #define TXX9_SIDISR_TOUT 0x00000200
108 #define TXX9_SIDISR_TDIS 0x00000100
109 #define TXX9_SIDISR_RDIS 0x00000080
110 #define TXX9_SIDISR_STIS 0x00000040
111 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
113 /* SICISR : Change Int. Status */
114 #define TXX9_SICISR_OERS 0x00000020
115 #define TXX9_SICISR_CTSS 0x00000010
116 #define TXX9_SICISR_RBRKD 0x00000008
117 #define TXX9_SICISR_TRDY 0x00000004
118 #define TXX9_SICISR_TXALS 0x00000002
119 #define TXX9_SICISR_UBRKD 0x00000001
121 /* SIFCR : FIFO Control */
122 #define TXX9_SIFCR_SWRST 0x00008000
123 #define TXX9_SIFCR_RDIL_MASK 0x00000180
124 #define TXX9_SIFCR_RDIL_1 0x00000000
125 #define TXX9_SIFCR_RDIL_4 0x00000080
126 #define TXX9_SIFCR_RDIL_8 0x00000100
127 #define TXX9_SIFCR_RDIL_12 0x00000180
128 #define TXX9_SIFCR_RDIL_MAX 0x00000180
129 #define TXX9_SIFCR_TDIL_MASK 0x00000018
130 #define TXX9_SIFCR_TDIL_1 0x00000000
131 #define TXX9_SIFCR_TDIL_4 0x00000001
132 #define TXX9_SIFCR_TDIL_8 0x00000010
133 #define TXX9_SIFCR_TDIL_MAX 0x00000010
134 #define TXX9_SIFCR_TFRST 0x00000004
135 #define TXX9_SIFCR_RFRST 0x00000002
136 #define TXX9_SIFCR_FRSTE 0x00000001
137 #define TXX9_SIO_TX_FIFO 8
138 #define TXX9_SIO_RX_FIFO 16
140 /* SIFLCR : Flow Control */
141 #define TXX9_SIFLCR_RCS 0x00001000
142 #define TXX9_SIFLCR_TES 0x00000800
143 #define TXX9_SIFLCR_RTSSC 0x00000200
144 #define TXX9_SIFLCR_RSDE 0x00000100
145 #define TXX9_SIFLCR_TSDE 0x00000080
146 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
147 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
148 #define TXX9_SIFLCR_TBRK 0x00000001
150 /* SIBGR : Baudrate Control */
151 #define TXX9_SIBGR_BCLK_MASK 0x00000300
152 #define TXX9_SIBGR_BCLK_T0 0x00000000
153 #define TXX9_SIBGR_BCLK_T2 0x00000100
154 #define TXX9_SIBGR_BCLK_T4 0x00000200
155 #define TXX9_SIBGR_BCLK_T6 0x00000300
156 #define TXX9_SIBGR_BRD_MASK 0x000000ff
158 static inline unsigned int sio_in(struct uart_port *up, int offset)
160 switch (up->iotype) {
162 return __raw_readl(up->membase + offset);
164 return inl(up->iobase + offset);
169 sio_out(struct uart_port *up, int offset, int value)
171 switch (up->iotype) {
173 __raw_writel(value, up->membase + offset);
176 outl(value, up->iobase + offset);
182 sio_mask(struct uart_port *up, int offset, unsigned int value)
184 sio_out(up, offset, sio_in(up, offset) & ~value);
187 sio_set(struct uart_port *up, int offset, unsigned int value)
189 sio_out(up, offset, sio_in(up, offset) | value);
193 sio_quot_set(struct uart_port *up, int quot)
197 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
198 else if (quot < (256 << 2))
199 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
200 else if (quot < (256 << 4))
201 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
202 else if (quot < (256 << 6))
203 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
205 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
208 static void serial_txx9_stop_tx(struct uart_port *up)
210 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
213 static void serial_txx9_start_tx(struct uart_port *up)
215 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
218 static void serial_txx9_stop_rx(struct uart_port *up)
220 up->read_status_mask &= ~TXX9_SIDISR_RDIS;
223 static void serial_txx9_initialize(struct uart_port *up)
225 unsigned int tmout = 10000;
227 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
228 /* TX4925 BUG WORKAROUND. Accessing SIOC register
229 * immediately after soft reset causes bus error. */
231 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
233 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
234 sio_set(up, TXX9_SIFCR,
235 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
236 /* initial settings */
237 sio_out(up, TXX9_SILCR,
238 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
239 ((up->flags & UPF_TXX9_USE_SCLK) ?
240 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
241 sio_quot_set(up, uart_get_divisor(up, 9600));
242 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
243 sio_out(up, TXX9_SIDICR, 0);
247 receive_chars(struct uart_port *up, unsigned int *status)
249 unsigned int disr = *status;
251 unsigned int next_ignore_status_mask;
255 ch = sio_in(up, TXX9_SIRFIFO);
259 /* mask out RFDN_MASK bit added by previous overrun */
260 next_ignore_status_mask =
261 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
262 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
263 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
265 * For statistics only
267 if (disr & TXX9_SIDISR_UBRK) {
268 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
271 * We do the SysRQ and SAK checking
272 * here because otherwise the break
273 * may get masked by ignore_status_mask
274 * or read_status_mask.
276 if (uart_handle_break(up))
278 } else if (disr & TXX9_SIDISR_UPER)
280 else if (disr & TXX9_SIDISR_UFER)
282 if (disr & TXX9_SIDISR_UOER) {
283 up->icount.overrun++;
285 * The receiver read buffer still hold
286 * a char which caused overrun.
287 * Ignore next char by adding RFDN_MASK
288 * to ignore_status_mask temporarily.
290 next_ignore_status_mask |=
291 TXX9_SIDISR_RFDN_MASK;
295 * Mask off conditions which should be ingored.
297 disr &= up->read_status_mask;
299 if (disr & TXX9_SIDISR_UBRK) {
301 } else if (disr & TXX9_SIDISR_UPER)
303 else if (disr & TXX9_SIDISR_UFER)
306 if (uart_handle_sysrq_char(up, ch))
309 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
312 up->ignore_status_mask = next_ignore_status_mask;
313 disr = sio_in(up, TXX9_SIDISR);
314 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
316 tty_flip_buffer_push(&up->state->port);
321 static inline void transmit_chars(struct uart_port *up)
325 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO,
327 sio_out(up, TXX9_SITFIFO, ch),
331 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
333 int pass_counter = 0;
334 struct uart_port *up = dev_id;
339 status = sio_in(up, TXX9_SIDISR);
340 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
341 status &= ~TXX9_SIDISR_TDIS;
342 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
343 TXX9_SIDISR_TOUT))) {
344 uart_port_unlock(up);
348 if (status & TXX9_SIDISR_RDIS)
349 receive_chars(up, &status);
350 if (status & TXX9_SIDISR_TDIS)
352 /* Clear TX/RX Int. Status */
353 sio_mask(up, TXX9_SIDISR,
354 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
356 uart_port_unlock(up);
358 if (pass_counter++ > PASS_LIMIT)
362 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
365 static unsigned int serial_txx9_tx_empty(struct uart_port *up)
370 uart_port_lock_irqsave(up, &flags);
371 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
372 uart_port_unlock_irqrestore(up, flags);
377 static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
381 /* no modem control lines */
382 ret = TIOCM_CAR | TIOCM_DSR;
383 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
384 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
389 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
392 if (mctrl & TIOCM_RTS)
393 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
395 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
398 static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
402 uart_port_lock_irqsave(up, &flags);
403 if (break_state == -1)
404 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
406 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
407 uart_port_unlock_irqrestore(up, flags);
410 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
412 * Wait for transmitter & holding register to empty
414 static void wait_for_xmitr(struct uart_port *up)
416 unsigned int tmout = 10000;
418 /* Wait up to 10ms for the character(s) to be sent. */
420 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
423 /* Wait up to 1s for flow control if necessary */
424 if (up->flags & UPF_CONS_FLOW) {
427 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
433 #ifdef CONFIG_CONSOLE_POLL
435 * Console polling routines for writing and reading from the uart while
436 * in an interrupt or debug context.
439 static int serial_txx9_get_poll_char(struct uart_port *up)
445 * First save the IER then disable the interrupts
447 ier = sio_in(up, TXX9_SIDICR);
448 sio_out(up, TXX9_SIDICR, 0);
450 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
453 c = sio_in(up, TXX9_SIRFIFO);
456 * Finally, clear RX interrupt status
457 * and restore the IER
459 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
460 sio_out(up, TXX9_SIDICR, ier);
465 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
470 * First save the IER then disable the interrupts
472 ier = sio_in(up, TXX9_SIDICR);
473 sio_out(up, TXX9_SIDICR, 0);
477 * Send the character out.
479 sio_out(up, TXX9_SITFIFO, c);
482 * Finally, wait for transmitter to become empty
483 * and restore the IER
486 sio_out(up, TXX9_SIDICR, ier);
489 #endif /* CONFIG_CONSOLE_POLL */
491 static int serial_txx9_startup(struct uart_port *up)
497 * Clear the FIFO buffers and disable them.
498 * (they will be reenabled in set_termios())
500 sio_set(up, TXX9_SIFCR,
501 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
503 sio_mask(up, TXX9_SIFCR,
504 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
505 sio_out(up, TXX9_SIDICR, 0);
508 * Clear the interrupt registers.
510 sio_out(up, TXX9_SIDISR, 0);
512 retval = request_irq(up->irq, serial_txx9_interrupt,
513 IRQF_SHARED, "serial_txx9", up);
518 * Now, initialize the UART
520 uart_port_lock_irqsave(up, &flags);
521 serial_txx9_set_mctrl(up, up->mctrl);
522 uart_port_unlock_irqrestore(up, flags);
525 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
528 * Finally, enable interrupts.
530 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
535 static void serial_txx9_shutdown(struct uart_port *up)
540 * Disable interrupts from this port
542 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
544 uart_port_lock_irqsave(up, &flags);
545 serial_txx9_set_mctrl(up, up->mctrl);
546 uart_port_unlock_irqrestore(up, flags);
549 * Disable break condition
551 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
553 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
554 if (up->cons && up->line == up->cons->index) {
555 free_irq(up->irq, up);
560 sio_set(up, TXX9_SIFCR,
561 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
563 sio_mask(up, TXX9_SIFCR,
564 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
567 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
569 free_irq(up->irq, up);
573 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
574 const struct ktermios *old)
576 unsigned int cval, fcr = 0;
578 unsigned int baud, quot;
581 * We don't support modem control lines.
583 termios->c_cflag &= ~(HUPCL | CMSPAR);
584 termios->c_cflag |= CLOCAL;
586 cval = sio_in(up, TXX9_SILCR);
587 /* byte size and parity */
588 cval &= ~TXX9_SILCR_UMODE_MASK;
589 switch (termios->c_cflag & CSIZE) {
591 cval |= TXX9_SILCR_UMODE_7BIT;
594 case CS5: /* not supported */
595 case CS6: /* not supported */
597 cval |= TXX9_SILCR_UMODE_8BIT;
598 termios->c_cflag &= ~CSIZE;
599 termios->c_cflag |= CS8;
603 cval &= ~TXX9_SILCR_USBL_MASK;
604 if (termios->c_cflag & CSTOPB)
605 cval |= TXX9_SILCR_USBL_2BIT;
607 cval |= TXX9_SILCR_USBL_1BIT;
608 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
609 if (termios->c_cflag & PARENB)
610 cval |= TXX9_SILCR_UPEN;
611 if (!(termios->c_cflag & PARODD))
612 cval |= TXX9_SILCR_UEPS;
615 * Ask the core to calculate the divisor for us.
617 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
618 quot = uart_get_divisor(up, baud);
621 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
622 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
625 * Ok, we're now changing the port state. Do it with
626 * interrupts disabled.
628 uart_port_lock_irqsave(up, &flags);
631 * Update the per-port timeout.
633 uart_update_timeout(up, termios->c_cflag, baud);
635 up->read_status_mask = TXX9_SIDISR_UOER |
636 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
637 if (termios->c_iflag & INPCK)
638 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
639 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
640 up->read_status_mask |= TXX9_SIDISR_UBRK;
643 * Characteres to ignore
645 up->ignore_status_mask = 0;
646 if (termios->c_iflag & IGNPAR)
647 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
648 if (termios->c_iflag & IGNBRK) {
649 up->ignore_status_mask |= TXX9_SIDISR_UBRK;
651 * If we're ignoring parity and break indicators,
652 * ignore overruns too (for real raw support).
654 if (termios->c_iflag & IGNPAR)
655 up->ignore_status_mask |= TXX9_SIDISR_UOER;
659 * ignore all characters if CREAD is not set
661 if ((termios->c_cflag & CREAD) == 0)
662 up->ignore_status_mask |= TXX9_SIDISR_RDIS;
664 /* CTS flow control flag */
665 if ((termios->c_cflag & CRTSCTS) &&
666 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
667 sio_set(up, TXX9_SIFLCR,
668 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
670 sio_mask(up, TXX9_SIFLCR,
671 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
674 sio_out(up, TXX9_SILCR, cval);
675 sio_quot_set(up, quot);
676 sio_out(up, TXX9_SIFCR, fcr);
678 serial_txx9_set_mctrl(up, up->mctrl);
679 uart_port_unlock_irqrestore(up, flags);
683 serial_txx9_pm(struct uart_port *port, unsigned int state,
684 unsigned int oldstate)
687 * If oldstate was -1 this is called from
688 * uart_configure_port(). In this case do not initialize the
689 * port now, because the port was already initialized (for
690 * non-console port) or should not be initialized here (for
691 * console port). If we initialized the port here we lose
692 * serial console settings.
694 if (state == 0 && oldstate != -1)
695 serial_txx9_initialize(port);
698 static int serial_txx9_request_resource(struct uart_port *up)
700 unsigned int size = TXX9_REGION_SIZE;
703 switch (up->iotype) {
708 if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
713 if (up->flags & UPF_IOREMAP) {
714 up->membase = ioremap(up->mapbase, size);
716 release_mem_region(up->mapbase, size);
723 if (!request_region(up->iobase, size, "serial_txx9"))
730 static void serial_txx9_release_resource(struct uart_port *up)
732 unsigned int size = TXX9_REGION_SIZE;
734 switch (up->iotype) {
739 if (up->flags & UPF_IOREMAP) {
740 iounmap(up->membase);
744 release_mem_region(up->mapbase, size);
748 release_region(up->iobase, size);
753 static void serial_txx9_release_port(struct uart_port *up)
755 serial_txx9_release_resource(up);
758 static int serial_txx9_request_port(struct uart_port *up)
760 return serial_txx9_request_resource(up);
763 static void serial_txx9_config_port(struct uart_port *up, int uflags)
768 * Find the region that we can probe for. This in turn
769 * tells us whether we can probe for the type of port.
771 ret = serial_txx9_request_resource(up);
774 up->type = PORT_TXX9;
775 up->fifosize = TXX9_SIO_TX_FIFO;
777 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
778 if (up->line == up->cons->index)
781 serial_txx9_initialize(up);
785 serial_txx9_type(struct uart_port *port)
790 static const struct uart_ops serial_txx9_pops = {
791 .tx_empty = serial_txx9_tx_empty,
792 .set_mctrl = serial_txx9_set_mctrl,
793 .get_mctrl = serial_txx9_get_mctrl,
794 .stop_tx = serial_txx9_stop_tx,
795 .start_tx = serial_txx9_start_tx,
796 .stop_rx = serial_txx9_stop_rx,
797 .break_ctl = serial_txx9_break_ctl,
798 .startup = serial_txx9_startup,
799 .shutdown = serial_txx9_shutdown,
800 .set_termios = serial_txx9_set_termios,
801 .pm = serial_txx9_pm,
802 .type = serial_txx9_type,
803 .release_port = serial_txx9_release_port,
804 .request_port = serial_txx9_request_port,
805 .config_port = serial_txx9_config_port,
806 #ifdef CONFIG_CONSOLE_POLL
807 .poll_get_char = serial_txx9_get_poll_char,
808 .poll_put_char = serial_txx9_put_poll_char,
812 static struct uart_port serial_txx9_ports[UART_NR];
814 static void __init serial_txx9_register_ports(struct uart_driver *drv,
819 for (i = 0; i < UART_NR; i++) {
820 struct uart_port *up = &serial_txx9_ports[i];
823 up->ops = &serial_txx9_pops;
825 if (up->iobase || up->mapbase)
826 uart_add_one_port(drv, up);
830 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
832 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
835 sio_out(up, TXX9_SITFIFO, ch);
839 * Print a string to the serial port trying not to disturb
840 * any possible real use of the port...
842 * The console_lock must be held when we get here.
845 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
847 struct uart_port *up = &serial_txx9_ports[co->index];
848 unsigned int ier, flcr;
851 * First save the UER then disable the interrupts
853 ier = sio_in(up, TXX9_SIDICR);
854 sio_out(up, TXX9_SIDICR, 0);
856 * Disable flow-control if enabled (and unnecessary)
858 flcr = sio_in(up, TXX9_SIFLCR);
859 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
860 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
862 uart_console_write(up, s, count, serial_txx9_console_putchar);
865 * Finally, wait for transmitter to become empty
866 * and restore the IER
869 sio_out(up, TXX9_SIFLCR, flcr);
870 sio_out(up, TXX9_SIDICR, ier);
873 static int __init serial_txx9_console_setup(struct console *co, char *options)
875 struct uart_port *up;
882 * Check whether an invalid uart number has been specified, and
883 * if so, search for the first available port that does have
886 if (co->index >= UART_NR)
888 up = &serial_txx9_ports[co->index];
892 serial_txx9_initialize(up);
895 uart_parse_options(options, &baud, &parity, &bits, &flow);
897 return uart_set_options(up, co, baud, parity, bits, flow);
900 static struct uart_driver serial_txx9_reg;
901 static struct console serial_txx9_console = {
902 .name = TXX9_TTY_NAME,
903 .write = serial_txx9_console_write,
904 .device = uart_console_device,
905 .setup = serial_txx9_console_setup,
906 .flags = CON_PRINTBUFFER,
908 .data = &serial_txx9_reg,
911 static int __init serial_txx9_console_init(void)
913 register_console(&serial_txx9_console);
916 console_initcall(serial_txx9_console_init);
918 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
920 #define SERIAL_TXX9_CONSOLE NULL
923 static struct uart_driver serial_txx9_reg = {
924 .owner = THIS_MODULE,
925 .driver_name = "serial_txx9",
926 .dev_name = TXX9_TTY_NAME,
927 .major = TXX9_TTY_MAJOR,
928 .minor = TXX9_TTY_MINOR_START,
930 .cons = SERIAL_TXX9_CONSOLE,
933 int __init early_serial_txx9_setup(struct uart_port *port)
935 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
938 serial_txx9_ports[port->line] = *port;
939 serial_txx9_ports[port->line].ops = &serial_txx9_pops;
940 serial_txx9_ports[port->line].flags |=
941 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
945 static DEFINE_MUTEX(serial_txx9_mutex);
948 * serial_txx9_register_port - register a serial port
949 * @port: serial port template
951 * Configure the serial port specified by the request.
953 * The port is then probed and if necessary the IRQ is autodetected
954 * If this fails an error is returned.
956 * On success the port is ready to use and the line number is returned.
958 static int serial_txx9_register_port(struct uart_port *port)
961 struct uart_port *uart;
964 mutex_lock(&serial_txx9_mutex);
965 for (i = 0; i < UART_NR; i++) {
966 uart = &serial_txx9_ports[i];
967 if (uart_match_port(uart, port)) {
968 uart_remove_one_port(&serial_txx9_reg, uart);
973 /* Find unused port */
974 for (i = 0; i < UART_NR; i++) {
975 uart = &serial_txx9_ports[i];
976 if (!(uart->iobase || uart->mapbase))
981 uart->iobase = port->iobase;
982 uart->membase = port->membase;
983 uart->irq = port->irq;
984 uart->uartclk = port->uartclk;
985 uart->iotype = port->iotype;
986 uart->flags = port->flags
987 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
988 uart->mapbase = port->mapbase;
990 uart->dev = port->dev;
991 ret = uart_add_one_port(&serial_txx9_reg, uart);
995 mutex_unlock(&serial_txx9_mutex);
1000 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1001 * @line: serial line number
1003 * Remove one serial port. This may not be called from interrupt
1004 * context. We hand the port back to the our control.
1006 static void serial_txx9_unregister_port(int line)
1008 struct uart_port *uart = &serial_txx9_ports[line];
1010 mutex_lock(&serial_txx9_mutex);
1011 uart_remove_one_port(&serial_txx9_reg, uart);
1013 uart->type = PORT_UNKNOWN;
1016 uart->membase = NULL;
1018 mutex_unlock(&serial_txx9_mutex);
1022 * Register a set of serial devices attached to a platform device.
1024 static int serial_txx9_probe(struct platform_device *dev)
1026 struct uart_port *p = dev_get_platdata(&dev->dev);
1027 struct uart_port port;
1030 memset(&port, 0, sizeof(struct uart_port));
1031 for (i = 0; p && p->uartclk != 0; p++, i++) {
1032 port.iobase = p->iobase;
1033 port.membase = p->membase;
1035 port.uartclk = p->uartclk;
1036 port.iotype = p->iotype;
1037 port.flags = p->flags;
1038 port.mapbase = p->mapbase;
1039 port.dev = &dev->dev;
1040 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1041 ret = serial_txx9_register_port(&port);
1043 dev_err(&dev->dev, "unable to register port at index %d "
1044 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1045 p->iobase, (unsigned long long)p->mapbase,
1053 * Remove serial ports registered against a platform device.
1055 static int serial_txx9_remove(struct platform_device *dev)
1059 for (i = 0; i < UART_NR; i++) {
1060 struct uart_port *up = &serial_txx9_ports[i];
1062 if (up->dev == &dev->dev)
1063 serial_txx9_unregister_port(i);
1069 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1073 for (i = 0; i < UART_NR; i++) {
1074 struct uart_port *up = &serial_txx9_ports[i];
1076 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1077 uart_suspend_port(&serial_txx9_reg, up);
1083 static int serial_txx9_resume(struct platform_device *dev)
1087 for (i = 0; i < UART_NR; i++) {
1088 struct uart_port *up = &serial_txx9_ports[i];
1090 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1091 uart_resume_port(&serial_txx9_reg, up);
1098 static struct platform_driver serial_txx9_plat_driver = {
1099 .probe = serial_txx9_probe,
1100 .remove = serial_txx9_remove,
1102 .suspend = serial_txx9_suspend,
1103 .resume = serial_txx9_resume,
1106 .name = "serial_txx9",
1110 #ifdef ENABLE_SERIAL_TXX9_PCI
1112 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1113 * to the arrangement of serial ports on a PCI card.
1116 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1118 struct uart_port port;
1122 rc = pci_enable_device(dev);
1126 memset(&port, 0, sizeof(port));
1127 port.ops = &serial_txx9_pops;
1128 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1129 port.uartclk = 66670000;
1130 port.irq = dev->irq;
1131 port.iotype = UPIO_PORT;
1132 port.iobase = pci_resource_start(dev, 1);
1133 port.dev = &dev->dev;
1134 line = serial_txx9_register_port(&port);
1136 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1137 pci_disable_device(dev);
1140 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1145 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1147 struct uart_port *up = pci_get_drvdata(dev);
1150 serial_txx9_unregister_port(up->line);
1151 pci_disable_device(dev);
1156 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1158 struct uart_port *up = pci_get_drvdata(dev);
1161 uart_suspend_port(&serial_txx9_reg, up);
1162 pci_save_state(dev);
1163 pci_set_power_state(dev, pci_choose_state(dev, state));
1167 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1169 struct uart_port *up = pci_get_drvdata(dev);
1171 pci_set_power_state(dev, PCI_D0);
1172 pci_restore_state(dev);
1174 uart_resume_port(&serial_txx9_reg, up);
1179 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1180 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1184 static struct pci_driver serial_txx9_pci_driver = {
1185 .name = "serial_txx9",
1186 .probe = pciserial_txx9_init_one,
1187 .remove = pciserial_txx9_remove_one,
1189 .suspend = pciserial_txx9_suspend_one,
1190 .resume = pciserial_txx9_resume_one,
1192 .id_table = serial_txx9_pci_tbl,
1195 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1196 #endif /* ENABLE_SERIAL_TXX9_PCI */
1198 static struct platform_device *serial_txx9_plat_devs;
1200 static int __init serial_txx9_init(void)
1204 ret = uart_register_driver(&serial_txx9_reg);
1208 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1209 if (!serial_txx9_plat_devs) {
1211 goto unreg_uart_drv;
1214 ret = platform_device_add(serial_txx9_plat_devs);
1218 serial_txx9_register_ports(&serial_txx9_reg,
1219 &serial_txx9_plat_devs->dev);
1221 ret = platform_driver_register(&serial_txx9_plat_driver);
1225 #ifdef ENABLE_SERIAL_TXX9_PCI
1226 ret = pci_register_driver(&serial_txx9_pci_driver);
1228 platform_driver_unregister(&serial_txx9_plat_driver);
1235 platform_device_del(serial_txx9_plat_devs);
1237 platform_device_put(serial_txx9_plat_devs);
1239 uart_unregister_driver(&serial_txx9_reg);
1244 static void __exit serial_txx9_exit(void)
1248 #ifdef ENABLE_SERIAL_TXX9_PCI
1249 pci_unregister_driver(&serial_txx9_pci_driver);
1251 platform_driver_unregister(&serial_txx9_plat_driver);
1252 platform_device_unregister(serial_txx9_plat_devs);
1253 for (i = 0; i < UART_NR; i++) {
1254 struct uart_port *up = &serial_txx9_ports[i];
1255 if (up->iobase || up->mapbase)
1256 uart_remove_one_port(&serial_txx9_reg, up);
1259 uart_unregister_driver(&serial_txx9_reg);
1262 module_init(serial_txx9_init);
1263 module_exit(serial_txx9_exit);
1265 MODULE_LICENSE("GPL");
1266 MODULE_DESCRIPTION("TX39/49 serial driver");
1268 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);