1 // SPDX-License-Identifier: GPL-2.0
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
7 * Copyright (C) 1999 Harald Koerfgen
10 * Copyright (C) 2000-2002 Toshiba Corporation
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/delay.h>
20 #include <linux/platform_device.h>
21 #include <linux/pci.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
28 #include <asm/txx9/generic.h>
30 #define PASS_LIMIT 256
32 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
33 /* "ttyS" is used for standard serial driver */
34 #define TXX9_TTY_NAME "ttyTX"
35 #define TXX9_TTY_MINOR_START 196
36 #define TXX9_TTY_MAJOR 204
38 /* acts like standard serial driver */
39 #define TXX9_TTY_NAME "ttyS"
40 #define TXX9_TTY_MINOR_START 64
41 #define TXX9_TTY_MAJOR TTY_MAJOR
45 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
46 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
49 /* support for Toshiba TC86C001 SIO */
50 #define ENABLE_SERIAL_TXX9_PCI
54 * Number of serial ports
56 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
58 #define TXX9_REGION_SIZE 0x24
60 /* TXX9 Serial Registers */
61 #define TXX9_SILCR 0x00
62 #define TXX9_SIDICR 0x04
63 #define TXX9_SIDISR 0x08
64 #define TXX9_SICISR 0x0c
65 #define TXX9_SIFCR 0x10
66 #define TXX9_SIFLCR 0x14
67 #define TXX9_SIBGR 0x18
68 #define TXX9_SITFIFO 0x1c
69 #define TXX9_SIRFIFO 0x20
71 /* SILCR : Line Control */
72 #define TXX9_SILCR_SCS_MASK 0x00000060
73 #define TXX9_SILCR_SCS_IMCLK 0x00000000
74 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
75 #define TXX9_SILCR_SCS_SCLK 0x00000040
76 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
77 #define TXX9_SILCR_UEPS 0x00000010
78 #define TXX9_SILCR_UPEN 0x00000008
79 #define TXX9_SILCR_USBL_MASK 0x00000004
80 #define TXX9_SILCR_USBL_1BIT 0x00000000
81 #define TXX9_SILCR_USBL_2BIT 0x00000004
82 #define TXX9_SILCR_UMODE_MASK 0x00000003
83 #define TXX9_SILCR_UMODE_8BIT 0x00000000
84 #define TXX9_SILCR_UMODE_7BIT 0x00000001
86 /* SIDICR : DMA/Int. Control */
87 #define TXX9_SIDICR_TDE 0x00008000
88 #define TXX9_SIDICR_RDE 0x00004000
89 #define TXX9_SIDICR_TIE 0x00002000
90 #define TXX9_SIDICR_RIE 0x00001000
91 #define TXX9_SIDICR_SPIE 0x00000800
92 #define TXX9_SIDICR_CTSAC 0x00000600
93 #define TXX9_SIDICR_STIE_MASK 0x0000003f
94 #define TXX9_SIDICR_STIE_OERS 0x00000020
95 #define TXX9_SIDICR_STIE_CTSS 0x00000010
96 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
97 #define TXX9_SIDICR_STIE_TRDY 0x00000004
98 #define TXX9_SIDICR_STIE_TXALS 0x00000002
99 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
101 /* SIDISR : DMA/Int. Status */
102 #define TXX9_SIDISR_UBRK 0x00008000
103 #define TXX9_SIDISR_UVALID 0x00004000
104 #define TXX9_SIDISR_UFER 0x00002000
105 #define TXX9_SIDISR_UPER 0x00001000
106 #define TXX9_SIDISR_UOER 0x00000800
107 #define TXX9_SIDISR_ERI 0x00000400
108 #define TXX9_SIDISR_TOUT 0x00000200
109 #define TXX9_SIDISR_TDIS 0x00000100
110 #define TXX9_SIDISR_RDIS 0x00000080
111 #define TXX9_SIDISR_STIS 0x00000040
112 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
114 /* SICISR : Change Int. Status */
115 #define TXX9_SICISR_OERS 0x00000020
116 #define TXX9_SICISR_CTSS 0x00000010
117 #define TXX9_SICISR_RBRKD 0x00000008
118 #define TXX9_SICISR_TRDY 0x00000004
119 #define TXX9_SICISR_TXALS 0x00000002
120 #define TXX9_SICISR_UBRKD 0x00000001
122 /* SIFCR : FIFO Control */
123 #define TXX9_SIFCR_SWRST 0x00008000
124 #define TXX9_SIFCR_RDIL_MASK 0x00000180
125 #define TXX9_SIFCR_RDIL_1 0x00000000
126 #define TXX9_SIFCR_RDIL_4 0x00000080
127 #define TXX9_SIFCR_RDIL_8 0x00000100
128 #define TXX9_SIFCR_RDIL_12 0x00000180
129 #define TXX9_SIFCR_RDIL_MAX 0x00000180
130 #define TXX9_SIFCR_TDIL_MASK 0x00000018
131 #define TXX9_SIFCR_TDIL_1 0x00000000
132 #define TXX9_SIFCR_TDIL_4 0x00000001
133 #define TXX9_SIFCR_TDIL_8 0x00000010
134 #define TXX9_SIFCR_TDIL_MAX 0x00000010
135 #define TXX9_SIFCR_TFRST 0x00000004
136 #define TXX9_SIFCR_RFRST 0x00000002
137 #define TXX9_SIFCR_FRSTE 0x00000001
138 #define TXX9_SIO_TX_FIFO 8
139 #define TXX9_SIO_RX_FIFO 16
141 /* SIFLCR : Flow Control */
142 #define TXX9_SIFLCR_RCS 0x00001000
143 #define TXX9_SIFLCR_TES 0x00000800
144 #define TXX9_SIFLCR_RTSSC 0x00000200
145 #define TXX9_SIFLCR_RSDE 0x00000100
146 #define TXX9_SIFLCR_TSDE 0x00000080
147 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
148 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
149 #define TXX9_SIFLCR_TBRK 0x00000001
151 /* SIBGR : Baudrate Control */
152 #define TXX9_SIBGR_BCLK_MASK 0x00000300
153 #define TXX9_SIBGR_BCLK_T0 0x00000000
154 #define TXX9_SIBGR_BCLK_T2 0x00000100
155 #define TXX9_SIBGR_BCLK_T4 0x00000200
156 #define TXX9_SIBGR_BCLK_T6 0x00000300
157 #define TXX9_SIBGR_BRD_MASK 0x000000ff
159 static inline unsigned int sio_in(struct uart_port *up, int offset)
161 switch (up->iotype) {
163 return __raw_readl(up->membase + offset);
165 return inl(up->iobase + offset);
170 sio_out(struct uart_port *up, int offset, int value)
172 switch (up->iotype) {
174 __raw_writel(value, up->membase + offset);
177 outl(value, up->iobase + offset);
183 sio_mask(struct uart_port *up, int offset, unsigned int value)
185 sio_out(up, offset, sio_in(up, offset) & ~value);
188 sio_set(struct uart_port *up, int offset, unsigned int value)
190 sio_out(up, offset, sio_in(up, offset) | value);
194 sio_quot_set(struct uart_port *up, int quot)
198 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
199 else if (quot < (256 << 2))
200 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
201 else if (quot < (256 << 4))
202 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
203 else if (quot < (256 << 6))
204 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
206 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
209 static void serial_txx9_stop_tx(struct uart_port *up)
211 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
214 static void serial_txx9_start_tx(struct uart_port *up)
216 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
219 static void serial_txx9_stop_rx(struct uart_port *up)
221 up->read_status_mask &= ~TXX9_SIDISR_RDIS;
224 static void serial_txx9_initialize(struct uart_port *up)
226 unsigned int tmout = 10000;
228 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
229 /* TX4925 BUG WORKAROUND. Accessing SIOC register
230 * immediately after soft reset causes bus error. */
232 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
234 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
235 sio_set(up, TXX9_SIFCR,
236 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
237 /* initial settings */
238 sio_out(up, TXX9_SILCR,
239 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
240 ((up->flags & UPF_TXX9_USE_SCLK) ?
241 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
242 sio_quot_set(up, uart_get_divisor(up, 9600));
243 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
244 sio_out(up, TXX9_SIDICR, 0);
248 receive_chars(struct uart_port *up, unsigned int *status)
250 unsigned int disr = *status;
252 unsigned int next_ignore_status_mask;
256 ch = sio_in(up, TXX9_SIRFIFO);
260 /* mask out RFDN_MASK bit added by previous overrun */
261 next_ignore_status_mask =
262 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
263 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
264 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
266 * For statistics only
268 if (disr & TXX9_SIDISR_UBRK) {
269 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
272 * We do the SysRQ and SAK checking
273 * here because otherwise the break
274 * may get masked by ignore_status_mask
275 * or read_status_mask.
277 if (uart_handle_break(up))
279 } else if (disr & TXX9_SIDISR_UPER)
281 else if (disr & TXX9_SIDISR_UFER)
283 if (disr & TXX9_SIDISR_UOER) {
284 up->icount.overrun++;
286 * The receiver read buffer still hold
287 * a char which caused overrun.
288 * Ignore next char by adding RFDN_MASK
289 * to ignore_status_mask temporarily.
291 next_ignore_status_mask |=
292 TXX9_SIDISR_RFDN_MASK;
296 * Mask off conditions which should be ingored.
298 disr &= up->read_status_mask;
300 if (disr & TXX9_SIDISR_UBRK) {
302 } else if (disr & TXX9_SIDISR_UPER)
304 else if (disr & TXX9_SIDISR_UFER)
307 if (uart_handle_sysrq_char(up, ch))
310 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
313 up->ignore_status_mask = next_ignore_status_mask;
314 disr = sio_in(up, TXX9_SIDISR);
315 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
317 tty_flip_buffer_push(&up->state->port);
322 static inline void transmit_chars(struct uart_port *up)
326 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO,
328 sio_out(up, TXX9_SITFIFO, ch),
332 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
334 int pass_counter = 0;
335 struct uart_port *up = dev_id;
340 status = sio_in(up, TXX9_SIDISR);
341 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
342 status &= ~TXX9_SIDISR_TDIS;
343 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
344 TXX9_SIDISR_TOUT))) {
345 uart_port_unlock(up);
349 if (status & TXX9_SIDISR_RDIS)
350 receive_chars(up, &status);
351 if (status & TXX9_SIDISR_TDIS)
353 /* Clear TX/RX Int. Status */
354 sio_mask(up, TXX9_SIDISR,
355 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
357 uart_port_unlock(up);
359 if (pass_counter++ > PASS_LIMIT)
363 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
366 static unsigned int serial_txx9_tx_empty(struct uart_port *up)
371 uart_port_lock_irqsave(up, &flags);
372 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
373 uart_port_unlock_irqrestore(up, flags);
378 static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
382 /* no modem control lines */
383 ret = TIOCM_CAR | TIOCM_DSR;
384 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
385 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
390 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
393 if (mctrl & TIOCM_RTS)
394 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
396 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
399 static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
403 uart_port_lock_irqsave(up, &flags);
404 if (break_state == -1)
405 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
407 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
408 uart_port_unlock_irqrestore(up, flags);
411 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
413 * Wait for transmitter & holding register to empty
415 static void wait_for_xmitr(struct uart_port *up)
417 unsigned int tmout = 10000;
419 /* Wait up to 10ms for the character(s) to be sent. */
421 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
424 /* Wait up to 1s for flow control if necessary */
425 if (up->flags & UPF_CONS_FLOW) {
428 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
434 #ifdef CONFIG_CONSOLE_POLL
436 * Console polling routines for writing and reading from the uart while
437 * in an interrupt or debug context.
440 static int serial_txx9_get_poll_char(struct uart_port *up)
446 * First save the IER then disable the interrupts
448 ier = sio_in(up, TXX9_SIDICR);
449 sio_out(up, TXX9_SIDICR, 0);
451 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
454 c = sio_in(up, TXX9_SIRFIFO);
457 * Finally, clear RX interrupt status
458 * and restore the IER
460 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
461 sio_out(up, TXX9_SIDICR, ier);
466 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
471 * First save the IER then disable the interrupts
473 ier = sio_in(up, TXX9_SIDICR);
474 sio_out(up, TXX9_SIDICR, 0);
478 * Send the character out.
480 sio_out(up, TXX9_SITFIFO, c);
483 * Finally, wait for transmitter to become empty
484 * and restore the IER
487 sio_out(up, TXX9_SIDICR, ier);
490 #endif /* CONFIG_CONSOLE_POLL */
492 static int serial_txx9_startup(struct uart_port *up)
498 * Clear the FIFO buffers and disable them.
499 * (they will be reenabled in set_termios())
501 sio_set(up, TXX9_SIFCR,
502 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
504 sio_mask(up, TXX9_SIFCR,
505 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
506 sio_out(up, TXX9_SIDICR, 0);
509 * Clear the interrupt registers.
511 sio_out(up, TXX9_SIDISR, 0);
513 retval = request_irq(up->irq, serial_txx9_interrupt,
514 IRQF_SHARED, "serial_txx9", up);
519 * Now, initialize the UART
521 uart_port_lock_irqsave(up, &flags);
522 serial_txx9_set_mctrl(up, up->mctrl);
523 uart_port_unlock_irqrestore(up, flags);
526 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
529 * Finally, enable interrupts.
531 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
536 static void serial_txx9_shutdown(struct uart_port *up)
541 * Disable interrupts from this port
543 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
545 uart_port_lock_irqsave(up, &flags);
546 serial_txx9_set_mctrl(up, up->mctrl);
547 uart_port_unlock_irqrestore(up, flags);
550 * Disable break condition
552 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
554 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
555 if (up->cons && up->line == up->cons->index) {
556 free_irq(up->irq, up);
561 sio_set(up, TXX9_SIFCR,
562 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
564 sio_mask(up, TXX9_SIFCR,
565 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
568 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
570 free_irq(up->irq, up);
574 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
575 const struct ktermios *old)
577 unsigned int cval, fcr = 0;
579 unsigned int baud, quot;
582 * We don't support modem control lines.
584 termios->c_cflag &= ~(HUPCL | CMSPAR);
585 termios->c_cflag |= CLOCAL;
587 cval = sio_in(up, TXX9_SILCR);
588 /* byte size and parity */
589 cval &= ~TXX9_SILCR_UMODE_MASK;
590 switch (termios->c_cflag & CSIZE) {
592 cval |= TXX9_SILCR_UMODE_7BIT;
595 case CS5: /* not supported */
596 case CS6: /* not supported */
598 cval |= TXX9_SILCR_UMODE_8BIT;
599 termios->c_cflag &= ~CSIZE;
600 termios->c_cflag |= CS8;
604 cval &= ~TXX9_SILCR_USBL_MASK;
605 if (termios->c_cflag & CSTOPB)
606 cval |= TXX9_SILCR_USBL_2BIT;
608 cval |= TXX9_SILCR_USBL_1BIT;
609 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
610 if (termios->c_cflag & PARENB)
611 cval |= TXX9_SILCR_UPEN;
612 if (!(termios->c_cflag & PARODD))
613 cval |= TXX9_SILCR_UEPS;
616 * Ask the core to calculate the divisor for us.
618 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
619 quot = uart_get_divisor(up, baud);
622 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
623 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
626 * Ok, we're now changing the port state. Do it with
627 * interrupts disabled.
629 uart_port_lock_irqsave(up, &flags);
632 * Update the per-port timeout.
634 uart_update_timeout(up, termios->c_cflag, baud);
636 up->read_status_mask = TXX9_SIDISR_UOER |
637 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
638 if (termios->c_iflag & INPCK)
639 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
640 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
641 up->read_status_mask |= TXX9_SIDISR_UBRK;
644 * Characteres to ignore
646 up->ignore_status_mask = 0;
647 if (termios->c_iflag & IGNPAR)
648 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
649 if (termios->c_iflag & IGNBRK) {
650 up->ignore_status_mask |= TXX9_SIDISR_UBRK;
652 * If we're ignoring parity and break indicators,
653 * ignore overruns too (for real raw support).
655 if (termios->c_iflag & IGNPAR)
656 up->ignore_status_mask |= TXX9_SIDISR_UOER;
660 * ignore all characters if CREAD is not set
662 if ((termios->c_cflag & CREAD) == 0)
663 up->ignore_status_mask |= TXX9_SIDISR_RDIS;
665 /* CTS flow control flag */
666 if ((termios->c_cflag & CRTSCTS) &&
667 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
668 sio_set(up, TXX9_SIFLCR,
669 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
671 sio_mask(up, TXX9_SIFLCR,
672 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
675 sio_out(up, TXX9_SILCR, cval);
676 sio_quot_set(up, quot);
677 sio_out(up, TXX9_SIFCR, fcr);
679 serial_txx9_set_mctrl(up, up->mctrl);
680 uart_port_unlock_irqrestore(up, flags);
684 serial_txx9_pm(struct uart_port *port, unsigned int state,
685 unsigned int oldstate)
688 * If oldstate was -1 this is called from
689 * uart_configure_port(). In this case do not initialize the
690 * port now, because the port was already initialized (for
691 * non-console port) or should not be initialized here (for
692 * console port). If we initialized the port here we lose
693 * serial console settings.
695 if (state == 0 && oldstate != -1)
696 serial_txx9_initialize(port);
699 static int serial_txx9_request_resource(struct uart_port *up)
701 unsigned int size = TXX9_REGION_SIZE;
704 switch (up->iotype) {
709 if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
714 if (up->flags & UPF_IOREMAP) {
715 up->membase = ioremap(up->mapbase, size);
717 release_mem_region(up->mapbase, size);
724 if (!request_region(up->iobase, size, "serial_txx9"))
731 static void serial_txx9_release_resource(struct uart_port *up)
733 unsigned int size = TXX9_REGION_SIZE;
735 switch (up->iotype) {
740 if (up->flags & UPF_IOREMAP) {
741 iounmap(up->membase);
745 release_mem_region(up->mapbase, size);
749 release_region(up->iobase, size);
754 static void serial_txx9_release_port(struct uart_port *up)
756 serial_txx9_release_resource(up);
759 static int serial_txx9_request_port(struct uart_port *up)
761 return serial_txx9_request_resource(up);
764 static void serial_txx9_config_port(struct uart_port *up, int uflags)
769 * Find the region that we can probe for. This in turn
770 * tells us whether we can probe for the type of port.
772 ret = serial_txx9_request_resource(up);
775 up->type = PORT_TXX9;
776 up->fifosize = TXX9_SIO_TX_FIFO;
778 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
779 if (up->line == up->cons->index)
782 serial_txx9_initialize(up);
786 serial_txx9_type(struct uart_port *port)
791 static const struct uart_ops serial_txx9_pops = {
792 .tx_empty = serial_txx9_tx_empty,
793 .set_mctrl = serial_txx9_set_mctrl,
794 .get_mctrl = serial_txx9_get_mctrl,
795 .stop_tx = serial_txx9_stop_tx,
796 .start_tx = serial_txx9_start_tx,
797 .stop_rx = serial_txx9_stop_rx,
798 .break_ctl = serial_txx9_break_ctl,
799 .startup = serial_txx9_startup,
800 .shutdown = serial_txx9_shutdown,
801 .set_termios = serial_txx9_set_termios,
802 .pm = serial_txx9_pm,
803 .type = serial_txx9_type,
804 .release_port = serial_txx9_release_port,
805 .request_port = serial_txx9_request_port,
806 .config_port = serial_txx9_config_port,
807 #ifdef CONFIG_CONSOLE_POLL
808 .poll_get_char = serial_txx9_get_poll_char,
809 .poll_put_char = serial_txx9_put_poll_char,
813 static struct uart_port serial_txx9_ports[UART_NR];
815 static void __init serial_txx9_register_ports(struct uart_driver *drv,
820 for (i = 0; i < UART_NR; i++) {
821 struct uart_port *up = &serial_txx9_ports[i];
824 up->ops = &serial_txx9_pops;
826 if (up->iobase || up->mapbase)
827 uart_add_one_port(drv, up);
831 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
833 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
836 sio_out(up, TXX9_SITFIFO, ch);
840 * Print a string to the serial port trying not to disturb
841 * any possible real use of the port...
843 * The console_lock must be held when we get here.
846 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
848 struct uart_port *up = &serial_txx9_ports[co->index];
849 unsigned int ier, flcr;
852 * First save the UER then disable the interrupts
854 ier = sio_in(up, TXX9_SIDICR);
855 sio_out(up, TXX9_SIDICR, 0);
857 * Disable flow-control if enabled (and unnecessary)
859 flcr = sio_in(up, TXX9_SIFLCR);
860 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
861 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
863 uart_console_write(up, s, count, serial_txx9_console_putchar);
866 * Finally, wait for transmitter to become empty
867 * and restore the IER
870 sio_out(up, TXX9_SIFLCR, flcr);
871 sio_out(up, TXX9_SIDICR, ier);
874 static int __init serial_txx9_console_setup(struct console *co, char *options)
876 struct uart_port *up;
883 * Check whether an invalid uart number has been specified, and
884 * if so, search for the first available port that does have
887 if (co->index >= UART_NR)
889 up = &serial_txx9_ports[co->index];
893 serial_txx9_initialize(up);
896 uart_parse_options(options, &baud, &parity, &bits, &flow);
898 return uart_set_options(up, co, baud, parity, bits, flow);
901 static struct uart_driver serial_txx9_reg;
902 static struct console serial_txx9_console = {
903 .name = TXX9_TTY_NAME,
904 .write = serial_txx9_console_write,
905 .device = uart_console_device,
906 .setup = serial_txx9_console_setup,
907 .flags = CON_PRINTBUFFER,
909 .data = &serial_txx9_reg,
912 static int __init serial_txx9_console_init(void)
914 register_console(&serial_txx9_console);
917 console_initcall(serial_txx9_console_init);
919 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
921 #define SERIAL_TXX9_CONSOLE NULL
924 static struct uart_driver serial_txx9_reg = {
925 .owner = THIS_MODULE,
926 .driver_name = "serial_txx9",
927 .dev_name = TXX9_TTY_NAME,
928 .major = TXX9_TTY_MAJOR,
929 .minor = TXX9_TTY_MINOR_START,
931 .cons = SERIAL_TXX9_CONSOLE,
934 int __init early_serial_txx9_setup(struct uart_port *port)
936 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
939 serial_txx9_ports[port->line] = *port;
940 serial_txx9_ports[port->line].ops = &serial_txx9_pops;
941 serial_txx9_ports[port->line].flags |=
942 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
946 static DEFINE_MUTEX(serial_txx9_mutex);
949 * serial_txx9_register_port - register a serial port
950 * @port: serial port template
952 * Configure the serial port specified by the request.
954 * The port is then probed and if necessary the IRQ is autodetected
955 * If this fails an error is returned.
957 * On success the port is ready to use and the line number is returned.
959 static int serial_txx9_register_port(struct uart_port *port)
962 struct uart_port *uart;
965 mutex_lock(&serial_txx9_mutex);
966 for (i = 0; i < UART_NR; i++) {
967 uart = &serial_txx9_ports[i];
968 if (uart_match_port(uart, port)) {
969 uart_remove_one_port(&serial_txx9_reg, uart);
974 /* Find unused port */
975 for (i = 0; i < UART_NR; i++) {
976 uart = &serial_txx9_ports[i];
977 if (!(uart->iobase || uart->mapbase))
982 uart->iobase = port->iobase;
983 uart->membase = port->membase;
984 uart->irq = port->irq;
985 uart->uartclk = port->uartclk;
986 uart->iotype = port->iotype;
987 uart->flags = port->flags
988 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
989 uart->mapbase = port->mapbase;
991 uart->dev = port->dev;
992 ret = uart_add_one_port(&serial_txx9_reg, uart);
996 mutex_unlock(&serial_txx9_mutex);
1001 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1002 * @line: serial line number
1004 * Remove one serial port. This may not be called from interrupt
1005 * context. We hand the port back to the our control.
1007 static void serial_txx9_unregister_port(int line)
1009 struct uart_port *uart = &serial_txx9_ports[line];
1011 mutex_lock(&serial_txx9_mutex);
1012 uart_remove_one_port(&serial_txx9_reg, uart);
1014 uart->type = PORT_UNKNOWN;
1017 uart->membase = NULL;
1019 mutex_unlock(&serial_txx9_mutex);
1023 * Register a set of serial devices attached to a platform device.
1025 static int serial_txx9_probe(struct platform_device *dev)
1027 struct uart_port *p = dev_get_platdata(&dev->dev);
1028 struct uart_port port;
1031 memset(&port, 0, sizeof(struct uart_port));
1032 for (i = 0; p && p->uartclk != 0; p++, i++) {
1033 port.iobase = p->iobase;
1034 port.membase = p->membase;
1036 port.uartclk = p->uartclk;
1037 port.iotype = p->iotype;
1038 port.flags = p->flags;
1039 port.mapbase = p->mapbase;
1040 port.dev = &dev->dev;
1041 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1042 ret = serial_txx9_register_port(&port);
1044 dev_err(&dev->dev, "unable to register port at index %d "
1045 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1046 p->iobase, (unsigned long long)p->mapbase,
1054 * Remove serial ports registered against a platform device.
1056 static void serial_txx9_remove(struct platform_device *dev)
1060 for (i = 0; i < UART_NR; i++) {
1061 struct uart_port *up = &serial_txx9_ports[i];
1063 if (up->dev == &dev->dev)
1064 serial_txx9_unregister_port(i);
1069 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1073 for (i = 0; i < UART_NR; i++) {
1074 struct uart_port *up = &serial_txx9_ports[i];
1076 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1077 uart_suspend_port(&serial_txx9_reg, up);
1083 static int serial_txx9_resume(struct platform_device *dev)
1087 for (i = 0; i < UART_NR; i++) {
1088 struct uart_port *up = &serial_txx9_ports[i];
1090 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1091 uart_resume_port(&serial_txx9_reg, up);
1098 static struct platform_driver serial_txx9_plat_driver = {
1099 .probe = serial_txx9_probe,
1100 .remove = serial_txx9_remove,
1102 .suspend = serial_txx9_suspend,
1103 .resume = serial_txx9_resume,
1106 .name = "serial_txx9",
1110 #ifdef ENABLE_SERIAL_TXX9_PCI
1112 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1113 * to the arrangement of serial ports on a PCI card.
1116 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1118 struct uart_port port;
1122 rc = pci_enable_device(dev);
1126 memset(&port, 0, sizeof(port));
1127 port.ops = &serial_txx9_pops;
1128 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1129 port.uartclk = 66670000;
1130 port.irq = dev->irq;
1131 port.iotype = UPIO_PORT;
1132 port.iobase = pci_resource_start(dev, 1);
1133 port.dev = &dev->dev;
1134 line = serial_txx9_register_port(&port);
1136 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1137 pci_disable_device(dev);
1140 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1145 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1147 struct uart_port *up = pci_get_drvdata(dev);
1150 serial_txx9_unregister_port(up->line);
1151 pci_disable_device(dev);
1156 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1158 struct uart_port *up = pci_get_drvdata(dev);
1161 uart_suspend_port(&serial_txx9_reg, up);
1162 pci_save_state(dev);
1163 pci_set_power_state(dev, pci_choose_state(dev, state));
1167 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1169 struct uart_port *up = pci_get_drvdata(dev);
1171 pci_set_power_state(dev, PCI_D0);
1172 pci_restore_state(dev);
1174 uart_resume_port(&serial_txx9_reg, up);
1179 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1180 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1184 static struct pci_driver serial_txx9_pci_driver = {
1185 .name = "serial_txx9",
1186 .probe = pciserial_txx9_init_one,
1187 .remove = pciserial_txx9_remove_one,
1189 .suspend = pciserial_txx9_suspend_one,
1190 .resume = pciserial_txx9_resume_one,
1192 .id_table = serial_txx9_pci_tbl,
1195 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1196 #endif /* ENABLE_SERIAL_TXX9_PCI */
1198 static struct platform_device *serial_txx9_plat_devs;
1200 static int __init serial_txx9_init(void)
1204 ret = uart_register_driver(&serial_txx9_reg);
1208 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1209 if (!serial_txx9_plat_devs) {
1211 goto unreg_uart_drv;
1214 ret = platform_device_add(serial_txx9_plat_devs);
1218 serial_txx9_register_ports(&serial_txx9_reg,
1219 &serial_txx9_plat_devs->dev);
1221 ret = platform_driver_register(&serial_txx9_plat_driver);
1225 #ifdef ENABLE_SERIAL_TXX9_PCI
1226 ret = pci_register_driver(&serial_txx9_pci_driver);
1228 platform_driver_unregister(&serial_txx9_plat_driver);
1235 platform_device_del(serial_txx9_plat_devs);
1237 platform_device_put(serial_txx9_plat_devs);
1239 uart_unregister_driver(&serial_txx9_reg);
1244 static void __exit serial_txx9_exit(void)
1248 #ifdef ENABLE_SERIAL_TXX9_PCI
1249 pci_unregister_driver(&serial_txx9_pci_driver);
1251 platform_driver_unregister(&serial_txx9_plat_driver);
1252 platform_device_unregister(serial_txx9_plat_devs);
1253 for (i = 0; i < UART_NR; i++) {
1254 struct uart_port *up = &serial_txx9_ports[i];
1255 if (up->iobase || up->mapbase)
1256 uart_remove_one_port(&serial_txx9_reg, up);
1259 uart_unregister_driver(&serial_txx9_reg);
1262 module_init(serial_txx9_init);
1263 module_exit(serial_txx9_exit);
1265 MODULE_LICENSE("GPL");
1266 MODULE_DESCRIPTION("TX39/49 serial driver");
1268 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);