2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 #include <drm/display/drm_dp_helper.h>
29 #include <drm/display/drm_dsc_helper.h>
30 #include <drm/drm_edid.h>
34 #include "intel_display.h"
35 #include "intel_display_types.h"
36 #include "intel_gmbus.h"
38 #define _INTEL_BIOS_PRIVATE
39 #include "intel_vbt_defs.h"
42 * DOC: Video BIOS Table (VBT)
44 * The Video BIOS Table, or VBT, provides platform and board specific
45 * configuration information to the driver that is not discoverable or available
46 * through other means. The configuration is mostly related to display
47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
52 * contain the actual configuration information. The VBT Header, and thus the
53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
54 * BDB Header. The data blocks are concatenated after the BDB Header. The data
55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
56 * data. (Block 53, the MIPI Sequence Block is an exception.)
58 * The driver parses the VBT during load. The relevant information is stored in
59 * driver private data for ease of use, and the actual VBT is not read after
63 /* Wrapper for VBT child device config */
64 struct intel_bios_encoder_data {
65 struct drm_i915_private *i915;
67 struct child_device_config child;
68 struct dsc_compression_parameters_entry *dsc;
69 struct list_head node;
72 #define SLAVE_ADDR1 0x70
73 #define SLAVE_ADDR2 0x72
75 /* Get BDB block size given a pointer to Block ID. */
76 static u32 _get_blocksize(const u8 *block_base)
78 /* The MIPI Sequence Block v3+ has a separate size field. */
79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
80 return *((const u32 *)(block_base + 4));
82 return *((const u16 *)(block_base + 1));
85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
86 static u32 get_blocksize(const void *block_data)
88 return _get_blocksize(block_data - 3);
92 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
94 const struct bdb_header *bdb = _bdb;
95 const u8 *base = _bdb;
97 u32 total, current_size;
98 enum bdb_block_id current_id;
100 /* skip to first section */
101 index += bdb->header_size;
102 total = bdb->bdb_size;
104 /* walk the sections looking for section_id */
105 while (index + 3 < total) {
106 current_id = *(base + index);
107 current_size = _get_blocksize(base + index);
110 if (index + current_size > total)
113 if (current_id == section_id)
116 index += current_size;
123 * Offset from the start of BDB to the start of the
124 * block data (just past the block header).
126 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
130 block = find_raw_section(bdb, section_id);
137 struct bdb_block_entry {
138 struct list_head node;
139 enum bdb_block_id section_id;
144 bdb_find_section(struct drm_i915_private *i915,
145 enum bdb_block_id section_id)
147 struct bdb_block_entry *entry;
149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
150 if (entry->section_id == section_id)
151 return entry->data + 3;
157 static const struct {
158 enum bdb_block_id section_id;
161 { .section_id = BDB_GENERAL_FEATURES,
162 .min_size = sizeof(struct bdb_general_features), },
163 { .section_id = BDB_GENERAL_DEFINITIONS,
164 .min_size = sizeof(struct bdb_general_definitions), },
165 { .section_id = BDB_PSR,
166 .min_size = sizeof(struct bdb_psr), },
167 { .section_id = BDB_DRIVER_FEATURES,
168 .min_size = sizeof(struct bdb_driver_features), },
169 { .section_id = BDB_SDVO_LVDS_OPTIONS,
170 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
171 { .section_id = BDB_SDVO_PANEL_DTDS,
172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
173 { .section_id = BDB_EDP,
174 .min_size = sizeof(struct bdb_edp), },
175 { .section_id = BDB_LVDS_OPTIONS,
176 .min_size = sizeof(struct bdb_lvds_options), },
178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
179 * so keep the two ordered.
181 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
183 { .section_id = BDB_LVDS_LFP_DATA,
184 .min_size = 0, /* special case */ },
185 { .section_id = BDB_LVDS_BACKLIGHT,
186 .min_size = sizeof(struct bdb_lfp_backlight_data), },
187 { .section_id = BDB_LFP_POWER,
188 .min_size = sizeof(struct bdb_lfp_power), },
189 { .section_id = BDB_MIPI_CONFIG,
190 .min_size = sizeof(struct bdb_mipi_config), },
191 { .section_id = BDB_MIPI_SEQUENCE,
192 .min_size = sizeof(struct bdb_mipi_sequence) },
193 { .section_id = BDB_COMPRESSION_PARAMETERS,
194 .min_size = sizeof(struct bdb_compression_parameters), },
195 { .section_id = BDB_GENERIC_DTD,
196 .min_size = sizeof(struct bdb_generic_dtd), },
199 static size_t lfp_data_min_size(struct drm_i915_private *i915)
201 const struct bdb_lvds_lfp_data_ptrs *ptrs;
204 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
208 size = sizeof(struct bdb_lvds_lfp_data);
209 if (ptrs->panel_name.table_size)
210 size = max(size, ptrs->panel_name.offset +
211 sizeof(struct bdb_lvds_lfp_data_tail));
216 static bool validate_lfp_data_ptrs(const void *bdb,
217 const struct bdb_lvds_lfp_data_ptrs *ptrs)
219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
220 int data_block_size, lfp_data_size;
221 const void *data_block;
224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
228 data_block_size = get_blocksize(data_block);
229 if (data_block_size == 0)
232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
233 if (ptrs->lvds_entries != 3)
236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
239 panel_name_size = ptrs->panel_name.table_size;
241 /* fp_timing has variable size */
242 if (fp_timing_size < 32 ||
243 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
244 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
247 /* panel_name is not present in old VBTs */
248 if (panel_name_size != 0 &&
249 panel_name_size != sizeof(struct lvds_lfp_panel_name))
252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
253 if (16 * lfp_data_size > data_block_size)
256 /* make sure the table entries have uniform size */
257 for (i = 1; i < 16; i++) {
258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
270 * Except for vlv/chv machines all real VBTs seem to have 6
271 * unaccounted bytes in the fp_timing table. And it doesn't
272 * appear to be a really intentional hole as the fp_timing
273 * 0xffff terminator is always within those 6 missing bytes.
275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
286 /* make sure the tables fit inside the data block */
287 for (i = 0; i < 16; i++) {
288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
297 /* make sure fp_timing terminators are present at expected locations */
298 for (i = 0; i < 16; i++) {
299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
309 /* make the data table offsets relative to the data block */
310 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
318 for (i = 0; i < 16; i++) {
319 if (ptrs->ptr[i].fp_timing.offset < offset ||
320 ptrs->ptr[i].dvo_timing.offset < offset ||
321 ptrs->ptr[i].panel_pnp_id.offset < offset)
324 ptrs->ptr[i].fp_timing.offset -= offset;
325 ptrs->ptr[i].dvo_timing.offset -= offset;
326 ptrs->ptr[i].panel_pnp_id.offset -= offset;
329 if (ptrs->panel_name.table_size) {
330 if (ptrs->panel_name.offset < offset)
333 ptrs->panel_name.offset -= offset;
336 return validate_lfp_data_ptrs(bdb, ptrs);
339 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
340 int table_size, int total_size)
342 if (total_size < table_size)
345 table->table_size = table_size;
346 table->offset = total_size - table_size;
348 return total_size - table_size;
351 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
352 const struct lvds_lfp_data_ptr_table *prev,
355 next->table_size = prev->table_size;
356 next->offset = prev->offset + size;
359 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
362 int i, size, table_size, block_size, offset, fp_timing_size;
363 struct bdb_lvds_lfp_data_ptrs *ptrs;
368 * The hardcoded fp_timing_size is only valid for
369 * modernish VBTs. All older VBTs definitely should
370 * include block 41 and thus we don't need to
373 if (i915->display.vbt.version < 155)
378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
384 block_size = get_blocksize(block);
386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
387 sizeof(struct lvds_pnp_id);
388 if (size * 16 > block_size)
391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
397 ptrs = ptrs_block + 3;
399 table_size = sizeof(struct lvds_pnp_id);
400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
402 table_size = sizeof(struct lvds_dvo_timing);
403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
405 table_size = fp_timing_size;
406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
408 if (ptrs->ptr[0].fp_timing.table_size)
409 ptrs->lvds_entries++;
410 if (ptrs->ptr[0].dvo_timing.table_size)
411 ptrs->lvds_entries++;
412 if (ptrs->ptr[0].panel_pnp_id.table_size)
413 ptrs->lvds_entries++;
415 if (size != 0 || ptrs->lvds_entries != 3) {
420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
421 sizeof(struct lvds_pnp_id);
422 for (i = 1; i < 16; i++) {
423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
428 table_size = sizeof(struct lvds_lfp_panel_name);
430 if (16 * (size + table_size) <= block_size) {
431 ptrs->panel_name.table_size = table_size;
432 ptrs->panel_name.offset = size * 16;
435 offset = block - bdb;
437 for (i = 0; i < 16; i++) {
438 ptrs->ptr[i].fp_timing.offset += offset;
439 ptrs->ptr[i].dvo_timing.offset += offset;
440 ptrs->ptr[i].panel_pnp_id.offset += offset;
443 if (ptrs->panel_name.table_size)
444 ptrs->panel_name.offset += offset;
450 init_bdb_block(struct drm_i915_private *i915,
451 const void *bdb, enum bdb_block_id section_id,
454 struct bdb_block_entry *entry;
455 void *temp_block = NULL;
459 block = find_raw_section(bdb, section_id);
461 /* Modern VBTs lack the LFP data table pointers block, make one up */
462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
463 temp_block = generate_lfp_data_ptrs(i915, bdb);
465 block = temp_block + 3;
470 drm_WARN(&i915->drm, min_size == 0,
471 "Block %d min_size is zero\n", section_id);
473 block_size = get_blocksize(block);
476 * Version number and new block size are considered
477 * part of the header for MIPI sequenece block v3+.
479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
489 entry->section_id = section_id;
490 memcpy(entry->data, block - 3, block_size + 3);
494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495 section_id, block_size, min_size);
497 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
507 static void init_bdb_blocks(struct drm_i915_private *i915,
512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513 enum bdb_block_id section_id = bdb_blocks[i].section_id;
514 size_t min_size = bdb_blocks[i].min_size;
516 if (section_id == BDB_LVDS_LFP_DATA)
517 min_size = lfp_data_min_size(i915);
519 init_bdb_block(i915, bdb, section_id, min_size);
524 fill_detail_timing_data(struct drm_i915_private *i915,
525 struct drm_display_mode *panel_fixed_mode,
526 const struct lvds_dvo_timing *dvo_timing)
528 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
529 dvo_timing->hactive_lo;
530 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
531 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
532 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
533 ((dvo_timing->hsync_pulse_width_hi << 8) |
534 dvo_timing->hsync_pulse_width_lo);
535 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
536 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
538 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
539 dvo_timing->vactive_lo;
540 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
541 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
542 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
543 ((dvo_timing->vsync_pulse_width_hi << 4) |
544 dvo_timing->vsync_pulse_width_lo);
545 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
546 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
547 panel_fixed_mode->clock = dvo_timing->clock * 10;
548 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
550 if (dvo_timing->hsync_positive)
551 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
555 if (dvo_timing->vsync_positive)
556 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
560 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
561 dvo_timing->himage_lo;
562 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
563 dvo_timing->vimage_lo;
565 /* Some VBTs have bogus h/vsync_end values */
566 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
567 drm_dbg_kms(&i915->drm, "reducing hsync_end %d->%d\n",
568 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
569 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
571 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
572 drm_dbg_kms(&i915->drm, "reducing vsync_end %d->%d\n",
573 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
574 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
577 drm_mode_set_name(panel_fixed_mode);
580 static const struct lvds_dvo_timing *
581 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
582 const struct bdb_lvds_lfp_data_ptrs *ptrs,
585 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
588 static const struct lvds_fp_timing *
589 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
590 const struct bdb_lvds_lfp_data_ptrs *ptrs,
593 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
596 static const struct lvds_pnp_id *
597 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
598 const struct bdb_lvds_lfp_data_ptrs *ptrs,
601 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
604 static const struct bdb_lvds_lfp_data_tail *
605 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
606 const struct bdb_lvds_lfp_data_ptrs *ptrs)
608 if (ptrs->panel_name.table_size)
609 return (const void *)data + ptrs->panel_name.offset;
614 static void dump_pnp_id(struct drm_i915_private *i915,
615 const struct lvds_pnp_id *pnp_id,
618 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
621 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
622 name, drm_edid_decode_mfg_id(mfg_name, vend),
623 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
624 pnp_id->mfg_week, pnp_id->mfg_year + 1990);
627 static int opregion_get_panel_type(struct drm_i915_private *i915,
628 const struct intel_bios_encoder_data *devdata,
629 const struct drm_edid *drm_edid, bool use_fallback)
631 return intel_opregion_get_panel_type(i915);
634 static int vbt_get_panel_type(struct drm_i915_private *i915,
635 const struct intel_bios_encoder_data *devdata,
636 const struct drm_edid *drm_edid, bool use_fallback)
638 const struct bdb_lvds_options *lvds_options;
640 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
644 if (lvds_options->panel_type > 0xf &&
645 lvds_options->panel_type != 0xff) {
646 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
647 lvds_options->panel_type);
651 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
652 return lvds_options->panel_type2;
654 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
656 return lvds_options->panel_type;
659 static int pnpid_get_panel_type(struct drm_i915_private *i915,
660 const struct intel_bios_encoder_data *devdata,
661 const struct drm_edid *drm_edid, bool use_fallback)
663 const struct bdb_lvds_lfp_data *data;
664 const struct bdb_lvds_lfp_data_ptrs *ptrs;
665 const struct lvds_pnp_id *edid_id;
666 struct lvds_pnp_id edid_id_nodate;
667 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
673 edid_id = (const void *)&edid->mfg_id[0];
675 edid_id_nodate = *edid_id;
676 edid_id_nodate.mfg_week = 0;
677 edid_id_nodate.mfg_year = 0;
679 dump_pnp_id(i915, edid_id, "EDID");
681 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
685 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
689 for (i = 0; i < 16; i++) {
690 const struct lvds_pnp_id *vbt_id =
691 get_lvds_pnp_id(data, ptrs, i);
694 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
698 * Accept a match w/o date if no full match is found,
699 * and the VBT entry does not specify a date.
702 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
709 static int fallback_get_panel_type(struct drm_i915_private *i915,
710 const struct intel_bios_encoder_data *devdata,
711 const struct drm_edid *drm_edid, bool use_fallback)
713 return use_fallback ? 0 : -1;
723 static int get_panel_type(struct drm_i915_private *i915,
724 const struct intel_bios_encoder_data *devdata,
725 const struct drm_edid *drm_edid, bool use_fallback)
729 int (*get_panel_type)(struct drm_i915_private *i915,
730 const struct intel_bios_encoder_data *devdata,
731 const struct drm_edid *drm_edid, bool use_fallback);
734 [PANEL_TYPE_OPREGION] = {
736 .get_panel_type = opregion_get_panel_type,
740 .get_panel_type = vbt_get_panel_type,
742 [PANEL_TYPE_PNPID] = {
744 .get_panel_type = pnpid_get_panel_type,
746 [PANEL_TYPE_FALLBACK] = {
748 .get_panel_type = fallback_get_panel_type,
753 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
754 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
755 drm_edid, use_fallback);
757 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
758 panel_types[i].panel_type != 0xff);
760 if (panel_types[i].panel_type >= 0)
761 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
762 panel_types[i].name, panel_types[i].panel_type);
765 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
766 i = PANEL_TYPE_OPREGION;
767 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
768 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
769 i = PANEL_TYPE_PNPID;
770 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
771 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
774 i = PANEL_TYPE_FALLBACK;
776 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
777 panel_types[i].name, panel_types[i].panel_type);
779 return panel_types[i].panel_type;
782 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
784 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
787 static bool panel_bool(unsigned int value, int panel_type)
789 return panel_bits(value, panel_type, 1);
792 /* Parse general panel options */
794 parse_panel_options(struct drm_i915_private *i915,
795 struct intel_panel *panel)
797 const struct bdb_lvds_options *lvds_options;
798 int panel_type = panel->vbt.panel_type;
801 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
805 panel->vbt.lvds_dither = lvds_options->pixel_dither;
808 * Empirical evidence indicates the block size can be
809 * either 4,14,16,24+ bytes. For older VBTs no clear
810 * relationship between the block size vs. BDB version.
812 if (get_blocksize(lvds_options) < 16)
815 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
818 * VBT has static DRRS = 0 and seamless DRRS = 2.
819 * The below piece of code is required to adjust vbt.drrs_type
820 * to match the enum drrs_support_type.
824 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
825 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
828 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
829 drm_dbg_kms(&i915->drm,
830 "DRRS supported mode is seamless\n");
833 panel->vbt.drrs_type = DRRS_TYPE_NONE;
834 drm_dbg_kms(&i915->drm,
835 "DRRS not supported (VBT input)\n");
841 parse_lfp_panel_dtd(struct drm_i915_private *i915,
842 struct intel_panel *panel,
843 const struct bdb_lvds_lfp_data *lvds_lfp_data,
844 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
846 const struct lvds_dvo_timing *panel_dvo_timing;
847 const struct lvds_fp_timing *fp_timing;
848 struct drm_display_mode *panel_fixed_mode;
849 int panel_type = panel->vbt.panel_type;
851 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
855 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
856 if (!panel_fixed_mode)
859 fill_detail_timing_data(i915, panel_fixed_mode, panel_dvo_timing);
861 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
863 drm_dbg_kms(&i915->drm,
864 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
865 DRM_MODE_ARG(panel_fixed_mode));
867 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
871 /* check the resolution, just to be sure */
872 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
873 fp_timing->y_res == panel_fixed_mode->vdisplay) {
874 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
875 drm_dbg_kms(&i915->drm,
876 "VBT initial LVDS value %x\n",
877 panel->vbt.bios_lvds_val);
882 parse_lfp_data(struct drm_i915_private *i915,
883 struct intel_panel *panel)
885 const struct bdb_lvds_lfp_data *data;
886 const struct bdb_lvds_lfp_data_tail *tail;
887 const struct bdb_lvds_lfp_data_ptrs *ptrs;
888 const struct lvds_pnp_id *pnp_id;
889 int panel_type = panel->vbt.panel_type;
891 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
895 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
899 if (!panel->vbt.lfp_lvds_vbt_mode)
900 parse_lfp_panel_dtd(i915, panel, data, ptrs);
902 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
903 dump_pnp_id(i915, pnp_id, "Panel");
905 tail = get_lfp_data_tail(data, ptrs);
909 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
910 (int)sizeof(tail->panel_name[0].name),
911 tail->panel_name[panel_type].name);
913 if (i915->display.vbt.version >= 188) {
914 panel->vbt.seamless_drrs_min_refresh_rate =
915 tail->seamless_drrs_min_refresh_rate[panel_type];
916 drm_dbg_kms(&i915->drm,
917 "Seamless DRRS min refresh rate: %d Hz\n",
918 panel->vbt.seamless_drrs_min_refresh_rate);
923 parse_generic_dtd(struct drm_i915_private *i915,
924 struct intel_panel *panel)
926 const struct bdb_generic_dtd *generic_dtd;
927 const struct generic_dtd_entry *dtd;
928 struct drm_display_mode *panel_fixed_mode;
932 * Older VBTs provided DTD information for internal displays through
933 * the "LFP panel tables" block (42). As of VBT revision 229 the
934 * DTD information should be provided via a newer "generic DTD"
935 * block (58). Just to be safe, we'll try the new generic DTD block
936 * first on VBT >= 229, but still fall back to trying the old LFP
937 * block if that fails.
939 if (i915->display.vbt.version < 229)
942 generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
946 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
947 drm_err(&i915->drm, "GDTD size %u is too small.\n",
948 generic_dtd->gdtd_size);
950 } else if (generic_dtd->gdtd_size !=
951 sizeof(struct generic_dtd_entry)) {
952 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
953 generic_dtd->gdtd_size);
954 /* DTD has unknown fields, but keep going */
957 num_dtd = (get_blocksize(generic_dtd) -
958 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
959 if (panel->vbt.panel_type >= num_dtd) {
961 "Panel type %d not found in table of %d DTD's\n",
962 panel->vbt.panel_type, num_dtd);
966 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
968 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
969 if (!panel_fixed_mode)
972 panel_fixed_mode->hdisplay = dtd->hactive;
973 panel_fixed_mode->hsync_start =
974 panel_fixed_mode->hdisplay + dtd->hfront_porch;
975 panel_fixed_mode->hsync_end =
976 panel_fixed_mode->hsync_start + dtd->hsync;
977 panel_fixed_mode->htotal =
978 panel_fixed_mode->hdisplay + dtd->hblank;
980 panel_fixed_mode->vdisplay = dtd->vactive;
981 panel_fixed_mode->vsync_start =
982 panel_fixed_mode->vdisplay + dtd->vfront_porch;
983 panel_fixed_mode->vsync_end =
984 panel_fixed_mode->vsync_start + dtd->vsync;
985 panel_fixed_mode->vtotal =
986 panel_fixed_mode->vdisplay + dtd->vblank;
988 panel_fixed_mode->clock = dtd->pixel_clock;
989 panel_fixed_mode->width_mm = dtd->width_mm;
990 panel_fixed_mode->height_mm = dtd->height_mm;
992 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
993 drm_mode_set_name(panel_fixed_mode);
995 if (dtd->hsync_positive_polarity)
996 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
998 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
1000 if (dtd->vsync_positive_polarity)
1001 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1003 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1005 drm_dbg_kms(&i915->drm,
1006 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1007 DRM_MODE_ARG(panel_fixed_mode));
1009 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1013 parse_lfp_backlight(struct drm_i915_private *i915,
1014 struct intel_panel *panel)
1016 const struct bdb_lfp_backlight_data *backlight_data;
1017 const struct lfp_backlight_data_entry *entry;
1018 int panel_type = panel->vbt.panel_type;
1021 backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT);
1022 if (!backlight_data)
1025 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1026 drm_dbg_kms(&i915->drm,
1027 "Unsupported backlight data entry size %u\n",
1028 backlight_data->entry_size);
1032 entry = &backlight_data->data[panel_type];
1034 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1035 if (!panel->vbt.backlight.present) {
1036 drm_dbg_kms(&i915->drm,
1037 "PWM backlight not present in VBT (type %u)\n",
1042 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1043 panel->vbt.backlight.controller = 0;
1044 if (i915->display.vbt.version >= 191) {
1047 if (i915->display.vbt.version >= 236)
1048 exp_size = sizeof(struct bdb_lfp_backlight_data);
1049 else if (i915->display.vbt.version >= 234)
1050 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1052 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1054 if (get_blocksize(backlight_data) >= exp_size) {
1055 const struct lfp_backlight_control_method *method;
1057 method = &backlight_data->backlight_control[panel_type];
1058 panel->vbt.backlight.type = method->type;
1059 panel->vbt.backlight.controller = method->controller;
1063 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1064 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1066 if (i915->display.vbt.version >= 234) {
1070 level = backlight_data->brightness_level[panel_type].level;
1071 min_level = backlight_data->brightness_min_level[panel_type].level;
1073 if (i915->display.vbt.version >= 236)
1074 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1076 scale = level > 255;
1079 min_level = min_level / 255;
1081 if (min_level > 255) {
1082 drm_warn(&i915->drm, "Brightness min level > 255\n");
1085 panel->vbt.backlight.min_brightness = min_level;
1087 panel->vbt.backlight.brightness_precision_bits =
1088 backlight_data->brightness_precision_bits[panel_type];
1090 level = backlight_data->level[panel_type];
1091 panel->vbt.backlight.min_brightness = entry->min_brightness;
1094 if (i915->display.vbt.version >= 239)
1095 panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1096 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1098 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1100 drm_dbg_kms(&i915->drm,
1101 "VBT backlight PWM modulation frequency %u Hz, "
1102 "active %s, min brightness %u, level %u, controller %u\n",
1103 panel->vbt.backlight.pwm_freq_hz,
1104 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1105 panel->vbt.backlight.min_brightness,
1107 panel->vbt.backlight.controller);
1110 /* Try to find sdvo panel data */
1112 parse_sdvo_panel_data(struct drm_i915_private *i915,
1113 struct intel_panel *panel)
1115 const struct bdb_sdvo_panel_dtds *dtds;
1116 struct drm_display_mode *panel_fixed_mode;
1119 index = i915->params.vbt_sdvo_panel_type;
1121 drm_dbg_kms(&i915->drm,
1122 "Ignore SDVO panel mode from BIOS VBT tables.\n");
1127 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1129 sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1130 if (!sdvo_lvds_options)
1133 index = sdvo_lvds_options->panel_type;
1136 dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS);
1140 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1141 if (!panel_fixed_mode)
1144 fill_detail_timing_data(i915, panel_fixed_mode, &dtds->dtds[index]);
1146 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1148 drm_dbg_kms(&i915->drm,
1149 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1150 DRM_MODE_ARG(panel_fixed_mode));
1153 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1156 switch (DISPLAY_VER(i915)) {
1158 return alternate ? 66667 : 48000;
1161 return alternate ? 100000 : 96000;
1163 return alternate ? 100000 : 120000;
1168 parse_general_features(struct drm_i915_private *i915)
1170 const struct bdb_general_features *general;
1172 general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
1176 i915->display.vbt.int_tv_support = general->int_tv_support;
1177 /* int_crt_support can't be trusted on earlier platforms */
1178 if (i915->display.vbt.version >= 155 &&
1179 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1180 i915->display.vbt.int_crt_support = general->int_crt_support;
1181 i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1182 i915->display.vbt.lvds_ssc_freq =
1183 intel_bios_ssc_frequency(i915, general->ssc_freq);
1184 i915->display.vbt.display_clock_mode = general->display_clock_mode;
1185 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1186 if (i915->display.vbt.version >= 181) {
1187 i915->display.vbt.orientation = general->rotate_180 ?
1188 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1189 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1191 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1194 if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1195 i915->display.vbt.override_afc_startup = true;
1196 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1199 drm_dbg_kms(&i915->drm,
1200 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1201 i915->display.vbt.int_tv_support,
1202 i915->display.vbt.int_crt_support,
1203 i915->display.vbt.lvds_use_ssc,
1204 i915->display.vbt.lvds_ssc_freq,
1205 i915->display.vbt.display_clock_mode,
1206 i915->display.vbt.fdi_rx_polarity_inverted);
1209 static const struct child_device_config *
1210 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1212 return (const void *) &defs->devices[i * defs->child_dev_size];
1216 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1218 const struct intel_bios_encoder_data *devdata;
1222 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1223 * accurate and doesn't have to be, as long as it's not too strict.
1225 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1226 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1230 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1231 const struct child_device_config *child = &devdata->child;
1232 struct sdvo_device_mapping *mapping;
1234 if (child->slave_addr != SLAVE_ADDR1 &&
1235 child->slave_addr != SLAVE_ADDR2) {
1237 * If the slave address is neither 0x70 nor 0x72,
1238 * it is not a SDVO device. Skip it.
1242 if (child->dvo_port != DEVICE_PORT_DVOB &&
1243 child->dvo_port != DEVICE_PORT_DVOC) {
1244 /* skip the incorrect SDVO port */
1245 drm_dbg_kms(&i915->drm,
1246 "Incorrect SDVO port. Skip it\n");
1249 drm_dbg_kms(&i915->drm,
1250 "the SDVO device with slave addr %2x is found on"
1253 (child->dvo_port == DEVICE_PORT_DVOB) ?
1255 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1256 if (!mapping->initialized) {
1257 mapping->dvo_port = child->dvo_port;
1258 mapping->slave_addr = child->slave_addr;
1259 mapping->dvo_wiring = child->dvo_wiring;
1260 mapping->ddc_pin = child->ddc_pin;
1261 mapping->i2c_pin = child->i2c_pin;
1262 mapping->initialized = 1;
1263 drm_dbg_kms(&i915->drm,
1264 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1265 mapping->dvo_port, mapping->slave_addr,
1266 mapping->dvo_wiring, mapping->ddc_pin,
1269 drm_dbg_kms(&i915->drm,
1270 "Maybe one SDVO port is shared by "
1271 "two SDVO device.\n");
1273 if (child->slave2_addr) {
1274 /* Maybe this is a SDVO device with multiple inputs */
1275 /* And the mapping info is not added */
1276 drm_dbg_kms(&i915->drm,
1277 "there exists the slave2_addr. Maybe this"
1278 " is a SDVO device with multiple inputs.\n");
1284 /* No SDVO device info is found */
1285 drm_dbg_kms(&i915->drm,
1286 "No SDVO device info is found in VBT\n");
1291 parse_driver_features(struct drm_i915_private *i915)
1293 const struct bdb_driver_features *driver;
1295 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1299 if (DISPLAY_VER(i915) >= 5) {
1301 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1302 * to mean "eDP". The VBT spec doesn't agree with that
1303 * interpretation, but real world VBTs seem to.
1305 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1306 i915->display.vbt.int_lvds_support = 0;
1309 * FIXME it's not clear which BDB version has the LVDS config
1310 * bits defined. Revision history in the VBT spec says:
1311 * "0.92 | Add two definitions for VBT value of LVDS Active
1312 * Config (00b and 11b values defined) | 06/13/2005"
1313 * but does not the specify the BDB version.
1315 * So far version 134 (on i945gm) is the oldest VBT observed
1316 * in the wild with the bits correctly populated. Version
1317 * 108 (on i85x) does not have the bits correctly populated.
1319 if (i915->display.vbt.version >= 134 &&
1320 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1321 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1322 i915->display.vbt.int_lvds_support = 0;
1327 parse_panel_driver_features(struct drm_i915_private *i915,
1328 struct intel_panel *panel)
1330 const struct bdb_driver_features *driver;
1332 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1336 if (i915->display.vbt.version < 228) {
1337 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1338 driver->drrs_enabled);
1340 * If DRRS is not supported, drrs_type has to be set to 0.
1341 * This is because, VBT is configured in such a way that
1342 * static DRRS is 0 and DRRS not supported is represented by
1343 * driver->drrs_enabled=false
1345 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1347 * FIXME Should DMRRS perhaps be treated as seamless
1348 * but without the automatic downclocking?
1350 if (driver->dmrrs_enabled)
1351 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1353 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1356 panel->vbt.psr.enable = driver->psr_enabled;
1361 parse_power_conservation_features(struct drm_i915_private *i915,
1362 struct intel_panel *panel)
1364 const struct bdb_lfp_power *power;
1365 u8 panel_type = panel->vbt.panel_type;
1367 panel->vbt.vrr = true; /* matches Windows behaviour */
1369 if (i915->display.vbt.version < 228)
1372 power = bdb_find_section(i915, BDB_LFP_POWER);
1376 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1379 * If DRRS is not supported, drrs_type has to be set to 0.
1380 * This is because, VBT is configured in such a way that
1381 * static DRRS is 0 and DRRS not supported is represented by
1382 * power->drrs & BIT(panel_type)=false
1384 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1386 * FIXME Should DMRRS perhaps be treated as seamless
1387 * but without the automatic downclocking?
1389 if (panel_bool(power->dmrrs, panel_type))
1390 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1392 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1395 if (i915->display.vbt.version >= 232)
1396 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1398 if (i915->display.vbt.version >= 233)
1399 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1404 parse_edp(struct drm_i915_private *i915,
1405 struct intel_panel *panel)
1407 const struct bdb_edp *edp;
1408 const struct edp_power_seq *edp_pps;
1409 const struct edp_fast_link_params *edp_link_params;
1410 int panel_type = panel->vbt.panel_type;
1412 edp = bdb_find_section(i915, BDB_EDP);
1416 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1418 panel->vbt.edp.bpp = 18;
1421 panel->vbt.edp.bpp = 24;
1424 panel->vbt.edp.bpp = 30;
1428 /* Get the eDP sequencing and link info */
1429 edp_pps = &edp->power_seqs[panel_type];
1430 edp_link_params = &edp->fast_link_params[panel_type];
1432 panel->vbt.edp.pps = *edp_pps;
1434 if (i915->display.vbt.version >= 224) {
1435 panel->vbt.edp.rate =
1436 edp->edp_fast_link_training_rate[panel_type] * 20;
1438 switch (edp_link_params->rate) {
1440 panel->vbt.edp.rate = 162000;
1443 panel->vbt.edp.rate = 270000;
1446 panel->vbt.edp.rate = 540000;
1449 drm_dbg_kms(&i915->drm,
1450 "VBT has unknown eDP link rate value %u\n",
1451 edp_link_params->rate);
1456 switch (edp_link_params->lanes) {
1458 panel->vbt.edp.lanes = 1;
1461 panel->vbt.edp.lanes = 2;
1464 panel->vbt.edp.lanes = 4;
1467 drm_dbg_kms(&i915->drm,
1468 "VBT has unknown eDP lane count value %u\n",
1469 edp_link_params->lanes);
1473 switch (edp_link_params->preemphasis) {
1474 case EDP_PREEMPHASIS_NONE:
1475 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1477 case EDP_PREEMPHASIS_3_5dB:
1478 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1480 case EDP_PREEMPHASIS_6dB:
1481 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1483 case EDP_PREEMPHASIS_9_5dB:
1484 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1487 drm_dbg_kms(&i915->drm,
1488 "VBT has unknown eDP pre-emphasis value %u\n",
1489 edp_link_params->preemphasis);
1493 switch (edp_link_params->vswing) {
1494 case EDP_VSWING_0_4V:
1495 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1497 case EDP_VSWING_0_6V:
1498 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1500 case EDP_VSWING_0_8V:
1501 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1503 case EDP_VSWING_1_2V:
1504 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1507 drm_dbg_kms(&i915->drm,
1508 "VBT has unknown eDP voltage swing value %u\n",
1509 edp_link_params->vswing);
1513 if (i915->display.vbt.version >= 173) {
1516 /* Don't read from VBT if module parameter has valid value*/
1517 if (i915->params.edp_vswing) {
1518 panel->vbt.edp.low_vswing =
1519 i915->params.edp_vswing == 1;
1521 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1522 panel->vbt.edp.low_vswing = vswing == 0;
1526 panel->vbt.edp.drrs_msa_timing_delay =
1527 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1529 if (i915->display.vbt.version >= 244)
1530 panel->vbt.edp.max_link_rate =
1531 edp->edp_max_port_link_rate[panel_type] * 20;
1535 parse_psr(struct drm_i915_private *i915,
1536 struct intel_panel *panel)
1538 const struct bdb_psr *psr;
1539 const struct psr_table *psr_table;
1540 int panel_type = panel->vbt.panel_type;
1542 psr = bdb_find_section(i915, BDB_PSR);
1544 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1548 psr_table = &psr->psr_table[panel_type];
1550 panel->vbt.psr.full_link = psr_table->full_link;
1551 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1553 /* Allowed VBT values goes from 0 to 15 */
1554 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1555 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1558 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1559 * Old decimal value is wake up time in multiples of 100 us.
1561 if (i915->display.vbt.version >= 205 &&
1562 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1563 switch (psr_table->tp1_wakeup_time) {
1565 panel->vbt.psr.tp1_wakeup_time_us = 500;
1568 panel->vbt.psr.tp1_wakeup_time_us = 100;
1571 panel->vbt.psr.tp1_wakeup_time_us = 0;
1574 drm_dbg_kms(&i915->drm,
1575 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1576 psr_table->tp1_wakeup_time);
1579 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1583 switch (psr_table->tp2_tp3_wakeup_time) {
1585 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1588 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1591 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1594 drm_dbg_kms(&i915->drm,
1595 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1596 psr_table->tp2_tp3_wakeup_time);
1599 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1603 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1604 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1607 if (i915->display.vbt.version >= 226) {
1608 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1610 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1611 switch (wakeup_time) {
1626 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1628 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1629 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1633 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1634 struct intel_panel *panel,
1637 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1639 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1640 panel->vbt.dsi.bl_ports = BIT(port);
1641 if (panel->vbt.dsi.config->cabc_supported)
1642 panel->vbt.dsi.cabc_ports = BIT(port);
1647 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1649 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1652 panel->vbt.dsi.bl_ports = BIT(port_bc);
1655 case DL_DCS_PORT_A_AND_C:
1656 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1660 if (!panel->vbt.dsi.config->cabc_supported)
1663 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1665 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1668 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1671 case DL_DCS_PORT_A_AND_C:
1672 panel->vbt.dsi.cabc_ports =
1673 BIT(PORT_A) | BIT(port_bc);
1679 parse_mipi_config(struct drm_i915_private *i915,
1680 struct intel_panel *panel)
1682 const struct bdb_mipi_config *start;
1683 const struct mipi_config *config;
1684 const struct mipi_pps_data *pps;
1685 int panel_type = panel->vbt.panel_type;
1688 /* parse MIPI blocks only if LFP type is MIPI */
1689 if (!intel_bios_is_dsi_present(i915, &port))
1692 /* Initialize this to undefined indicating no generic MIPI support */
1693 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1695 /* Block #40 is already parsed and panel_fixed_mode is
1696 * stored in i915->lfp_lvds_vbt_mode
1697 * resuse this when needed
1700 /* Parse #52 for panel index used from panel_type already
1703 start = bdb_find_section(i915, BDB_MIPI_CONFIG);
1705 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1709 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1713 * get hold of the correct configuration block and pps data as per
1714 * the panel_type as index
1716 config = &start->config[panel_type];
1717 pps = &start->pps[panel_type];
1719 /* store as of now full data. Trim when we realise all is not needed */
1720 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1721 if (!panel->vbt.dsi.config)
1724 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1725 if (!panel->vbt.dsi.pps) {
1726 kfree(panel->vbt.dsi.config);
1730 parse_dsi_backlight_ports(i915, panel, port);
1732 /* FIXME is the 90 vs. 270 correct? */
1733 switch (config->rotation) {
1734 case ENABLE_ROTATION_0:
1736 * Most (all?) VBTs claim 0 degrees despite having
1737 * an upside down panel, thus we do not trust this.
1739 panel->vbt.dsi.orientation =
1740 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1742 case ENABLE_ROTATION_90:
1743 panel->vbt.dsi.orientation =
1744 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1746 case ENABLE_ROTATION_180:
1747 panel->vbt.dsi.orientation =
1748 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1750 case ENABLE_ROTATION_270:
1751 panel->vbt.dsi.orientation =
1752 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1756 /* We have mandatory mipi config blocks. Initialize as generic panel */
1757 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1760 /* Find the sequence block and size for the given panel. */
1762 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1763 u16 panel_id, u32 *seq_size)
1765 u32 total = get_blocksize(sequence);
1766 const u8 *data = &sequence->data[0];
1769 int header_size = sequence->version >= 3 ? 5 : 3;
1773 /* skip new block size */
1774 if (sequence->version >= 3)
1777 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1778 if (index + header_size > total) {
1779 DRM_ERROR("Invalid sequence block (header)\n");
1783 current_id = *(data + index);
1784 if (sequence->version >= 3)
1785 current_size = *((const u32 *)(data + index + 1));
1787 current_size = *((const u16 *)(data + index + 1));
1789 index += header_size;
1791 if (index + current_size > total) {
1792 DRM_ERROR("Invalid sequence block\n");
1796 if (current_id == panel_id) {
1797 *seq_size = current_size;
1798 return data + index;
1801 index += current_size;
1804 DRM_ERROR("Sequence block detected but no valid configuration\n");
1809 static int goto_next_sequence(const u8 *data, int index, int total)
1813 /* Skip Sequence Byte. */
1814 for (index = index + 1; index < total; index += len) {
1815 u8 operation_byte = *(data + index);
1818 switch (operation_byte) {
1819 case MIPI_SEQ_ELEM_END:
1821 case MIPI_SEQ_ELEM_SEND_PKT:
1822 if (index + 4 > total)
1825 len = *((const u16 *)(data + index + 2)) + 4;
1827 case MIPI_SEQ_ELEM_DELAY:
1830 case MIPI_SEQ_ELEM_GPIO:
1833 case MIPI_SEQ_ELEM_I2C:
1834 if (index + 7 > total)
1836 len = *(data + index + 6) + 7;
1839 DRM_ERROR("Unknown operation byte\n");
1847 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1851 u32 size_of_sequence;
1854 * Could skip sequence based on Size of Sequence alone, but also do some
1855 * checking on the structure.
1858 DRM_ERROR("Too small sequence size\n");
1862 /* Skip Sequence Byte. */
1866 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1867 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1870 size_of_sequence = *((const u32 *)(data + index));
1873 seq_end = index + size_of_sequence;
1874 if (seq_end > total) {
1875 DRM_ERROR("Invalid sequence size\n");
1879 for (; index < total; index += len) {
1880 u8 operation_byte = *(data + index);
1883 if (operation_byte == MIPI_SEQ_ELEM_END) {
1884 if (index != seq_end) {
1885 DRM_ERROR("Invalid element structure\n");
1891 len = *(data + index);
1895 * FIXME: Would be nice to check elements like for v1/v2 in
1896 * goto_next_sequence() above.
1898 switch (operation_byte) {
1899 case MIPI_SEQ_ELEM_SEND_PKT:
1900 case MIPI_SEQ_ELEM_DELAY:
1901 case MIPI_SEQ_ELEM_GPIO:
1902 case MIPI_SEQ_ELEM_I2C:
1903 case MIPI_SEQ_ELEM_SPI:
1904 case MIPI_SEQ_ELEM_PMIC:
1907 DRM_ERROR("Unknown operation byte %u\n",
1917 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1918 * skip all delay + gpio operands and stop at the first DSI packet op.
1920 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1921 struct intel_panel *panel)
1923 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1926 if (drm_WARN_ON(&i915->drm,
1927 !data || panel->vbt.dsi.seq_version != 1))
1930 /* index = 1 to skip sequence byte */
1931 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1932 switch (data[index]) {
1933 case MIPI_SEQ_ELEM_SEND_PKT:
1934 return index == 1 ? 0 : index;
1935 case MIPI_SEQ_ELEM_DELAY:
1936 len = 5; /* 1 byte for operand + uint32 */
1938 case MIPI_SEQ_ELEM_GPIO:
1939 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1950 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1951 * The deassert must be done before calling intel_dsi_device_ready, so for
1952 * these devices we split the init OTP sequence into a deassert sequence and
1953 * the actual init OTP part.
1955 static void fixup_mipi_sequences(struct drm_i915_private *i915,
1956 struct intel_panel *panel)
1961 /* Limit this to VLV for now. */
1962 if (!IS_VALLEYVIEW(i915))
1965 /* Limit this to v1 vid-mode sequences */
1966 if (panel->vbt.dsi.config->is_cmd_mode ||
1967 panel->vbt.dsi.seq_version != 1)
1970 /* Only do this if there are otp and assert seqs and no deassert seq */
1971 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1972 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1973 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1976 /* The deassert-sequence ends at the first DSI packet */
1977 len = get_init_otp_deassert_fragment_len(i915, panel);
1981 drm_dbg_kms(&i915->drm,
1982 "Using init OTP fragment to deassert reset\n");
1984 /* Copy the fragment, update seq byte and terminate it */
1985 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1986 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1987 if (!panel->vbt.dsi.deassert_seq)
1989 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1990 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1991 /* Use the copy for deassert */
1992 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1993 panel->vbt.dsi.deassert_seq;
1994 /* Replace the last byte of the fragment with init OTP seq byte */
1995 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1996 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1997 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
2001 parse_mipi_sequence(struct drm_i915_private *i915,
2002 struct intel_panel *panel)
2004 int panel_type = panel->vbt.panel_type;
2005 const struct bdb_mipi_sequence *sequence;
2011 /* Only our generic panel driver uses the sequence block. */
2012 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2015 sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE);
2017 drm_dbg_kms(&i915->drm,
2018 "No MIPI Sequence found, parsing complete\n");
2022 /* Fail gracefully for forward incompatible sequence block. */
2023 if (sequence->version >= 4) {
2025 "Unable to parse MIPI Sequence Block v%u\n",
2030 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2033 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2037 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2041 /* Parse the sequences, store pointers to each sequence. */
2043 u8 seq_id = *(data + index);
2044 if (seq_id == MIPI_SEQ_END)
2047 if (seq_id >= MIPI_SEQ_MAX) {
2048 drm_err(&i915->drm, "Unknown sequence %u\n",
2053 /* Log about presence of sequences we won't run. */
2054 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2055 drm_dbg_kms(&i915->drm,
2056 "Unsupported sequence %u\n", seq_id);
2058 panel->vbt.dsi.sequence[seq_id] = data + index;
2060 if (sequence->version >= 3)
2061 index = goto_next_sequence_v3(data, index, seq_size);
2063 index = goto_next_sequence(data, index, seq_size);
2065 drm_err(&i915->drm, "Invalid sequence %u\n",
2071 panel->vbt.dsi.data = data;
2072 panel->vbt.dsi.size = seq_size;
2073 panel->vbt.dsi.seq_version = sequence->version;
2075 fixup_mipi_sequences(i915, panel);
2077 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2082 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2086 parse_compression_parameters(struct drm_i915_private *i915)
2088 const struct bdb_compression_parameters *params;
2089 struct intel_bios_encoder_data *devdata;
2093 if (i915->display.vbt.version < 198)
2096 params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
2099 if (params->entry_size != sizeof(params->data[0])) {
2100 drm_dbg_kms(&i915->drm,
2101 "VBT: unsupported compression param entry size\n");
2105 block_size = get_blocksize(params);
2106 if (block_size < sizeof(*params)) {
2107 drm_dbg_kms(&i915->drm,
2108 "VBT: expected 16 compression param entries\n");
2113 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2114 const struct child_device_config *child = &devdata->child;
2116 if (!child->compression_enable)
2120 drm_dbg_kms(&i915->drm,
2121 "VBT: compression params not available\n");
2125 if (child->compression_method_cps) {
2126 drm_dbg_kms(&i915->drm,
2127 "VBT: CPS compression not supported\n");
2131 index = child->compression_structure_index;
2133 devdata->dsc = kmemdup(¶ms->data[index],
2134 sizeof(*devdata->dsc), GFP_KERNEL);
2138 static u8 translate_iboost(u8 val)
2140 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2142 if (val >= ARRAY_SIZE(mapping)) {
2143 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2146 return mapping[val];
2149 static const u8 cnp_ddc_pin_map[] = {
2151 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2152 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2153 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2154 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2157 static const u8 icp_ddc_pin_map[] = {
2158 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2159 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2160 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2161 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2162 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2163 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2164 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2165 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2166 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2169 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2170 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2171 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2172 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2173 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2176 static const u8 adls_ddc_pin_map[] = {
2177 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2178 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2179 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2180 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2181 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2184 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2185 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2186 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2187 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2190 static const u8 adlp_ddc_pin_map[] = {
2191 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2192 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2193 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2194 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2195 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2196 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2199 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2201 const u8 *ddc_pin_map;
2204 if (INTEL_PCH_TYPE(i915) >= PCH_LNL || HAS_PCH_MTP(i915) ||
2205 IS_ALDERLAKE_P(i915)) {
2206 ddc_pin_map = adlp_ddc_pin_map;
2207 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2208 } else if (IS_ALDERLAKE_S(i915)) {
2209 ddc_pin_map = adls_ddc_pin_map;
2210 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2211 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2213 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2214 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2215 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2216 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2217 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2218 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2219 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2220 ddc_pin_map = icp_ddc_pin_map;
2221 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2222 } else if (HAS_PCH_CNP(i915)) {
2223 ddc_pin_map = cnp_ddc_pin_map;
2224 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2226 /* Assuming direct map */
2230 for (i = 0; i < n_entries; i++) {
2231 if (ddc_pin_map[i] == vbt_pin)
2235 drm_dbg_kms(&i915->drm,
2236 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2241 static u8 dvo_port_type(u8 dvo_port)
2244 case DVO_PORT_HDMIA:
2245 case DVO_PORT_HDMIB:
2246 case DVO_PORT_HDMIC:
2247 case DVO_PORT_HDMID:
2248 case DVO_PORT_HDMIE:
2249 case DVO_PORT_HDMIF:
2250 case DVO_PORT_HDMIG:
2251 case DVO_PORT_HDMIH:
2252 case DVO_PORT_HDMII:
2253 return DVO_PORT_HDMIA;
2263 return DVO_PORT_DPA;
2264 case DVO_PORT_MIPIA:
2265 case DVO_PORT_MIPIB:
2266 case DVO_PORT_MIPIC:
2267 case DVO_PORT_MIPID:
2268 return DVO_PORT_MIPIA;
2274 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2275 const int port_mapping[][3], u8 dvo_port)
2280 for (port = PORT_A; port < n_ports; port++) {
2281 for (i = 0; i < n_dvo; i++) {
2282 if (port_mapping[port][i] == -1)
2285 if (dvo_port == port_mapping[port][i])
2293 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2297 * Each DDI port can have more than one value on the "DVO Port" field,
2298 * so look for all the possible values for each port.
2300 static const int port_mapping[][3] = {
2301 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2302 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2303 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2304 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2305 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2306 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2307 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2308 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2309 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2312 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2313 * map to DDI A,B,TC1,TC2 respectively.
2315 static const int rkl_port_mapping[][3] = {
2316 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2317 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2319 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2320 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2323 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2324 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2326 static const int adls_port_mapping[][3] = {
2327 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2330 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2331 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2332 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2333 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2335 static const int xelpd_port_mapping[][3] = {
2336 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2337 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2338 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2339 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2340 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2341 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2342 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2343 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2344 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2347 if (DISPLAY_VER(i915) >= 13)
2348 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2349 ARRAY_SIZE(xelpd_port_mapping[0]),
2352 else if (IS_ALDERLAKE_S(i915))
2353 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2354 ARRAY_SIZE(adls_port_mapping[0]),
2357 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2358 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2359 ARRAY_SIZE(rkl_port_mapping[0]),
2363 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2364 ARRAY_SIZE(port_mapping[0]),
2370 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2373 case DVO_PORT_MIPIA:
2375 case DVO_PORT_MIPIC:
2376 if (DISPLAY_VER(i915) >= 11)
2385 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2387 struct drm_i915_private *i915 = devdata->i915;
2388 const struct child_device_config *child = &devdata->child;
2391 port = dvo_port_to_port(i915, child->dvo_port);
2392 if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2393 port = dsi_dvo_port_to_port(i915, child->dvo_port);
2398 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2400 switch (vbt_max_link_rate) {
2402 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2404 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2406 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2408 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2410 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2412 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2414 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2416 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2421 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2423 switch (vbt_max_link_rate) {
2425 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2427 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2429 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2431 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2436 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2438 if (!devdata || devdata->i915->display.vbt.version < 216)
2441 if (devdata->i915->display.vbt.version >= 230)
2442 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2444 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2447 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2449 if (!devdata || devdata->i915->display.vbt.version < 244)
2452 return devdata->child.dp_max_lane_count + 1;
2455 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2458 struct drm_i915_private *i915 = devdata->i915;
2461 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2464 if (!intel_bios_encoder_supports_dvi(devdata))
2467 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2469 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2470 is_hdmi ? "/HDMI" : "");
2472 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2473 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2477 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2479 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2483 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2485 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2489 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2491 return intel_bios_encoder_supports_dvi(devdata) &&
2492 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2496 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2498 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2502 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2504 return intel_bios_encoder_supports_dp(devdata) &&
2505 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2509 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2511 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2515 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2517 return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2520 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2521 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2523 if (!devdata || devdata->i915->display.vbt.version < 158 ||
2524 DISPLAY_VER(devdata->i915) >= 14)
2527 return devdata->child.hdmi_level_shifter_value;
2530 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2532 if (!devdata || devdata->i915->display.vbt.version < 204)
2535 switch (devdata->child.hdmi_max_data_rate) {
2537 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2539 case HDMI_MAX_DATA_RATE_PLATFORM:
2541 case HDMI_MAX_DATA_RATE_594:
2543 case HDMI_MAX_DATA_RATE_340:
2545 case HDMI_MAX_DATA_RATE_300:
2547 case HDMI_MAX_DATA_RATE_297:
2549 case HDMI_MAX_DATA_RATE_165:
2554 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2557 * On some ICL SKUs port F is not present, but broken VBTs mark
2558 * the port as present. Only try to initialize port F for the
2559 * SKUs that may actually have it.
2561 if (port == PORT_F && IS_ICELAKE(i915))
2562 return IS_ICL_WITH_PORT_F(i915);
2567 static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2569 struct drm_i915_private *i915 = devdata->i915;
2570 const struct child_device_config *child = &devdata->child;
2571 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2572 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2575 port = intel_bios_encoder_port(devdata);
2576 if (port == PORT_NONE)
2579 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2580 is_dp = intel_bios_encoder_supports_dp(devdata);
2581 is_crt = intel_bios_encoder_supports_crt(devdata);
2582 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2583 is_edp = intel_bios_encoder_supports_edp(devdata);
2584 is_dsi = intel_bios_encoder_supports_dsi(devdata);
2586 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2587 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2589 drm_dbg_kms(&i915->drm,
2590 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2591 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2592 intel_bios_encoder_supports_dp_dual_mode(devdata),
2593 intel_bios_encoder_is_lspcon(devdata),
2594 supports_typec_usb, supports_tbt,
2595 devdata->dsc != NULL);
2597 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2598 if (hdmi_level_shift >= 0) {
2599 drm_dbg_kms(&i915->drm,
2600 "Port %c VBT HDMI level shift: %d\n",
2601 port_name(port), hdmi_level_shift);
2604 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2606 drm_dbg_kms(&i915->drm,
2607 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2608 port_name(port), max_tmds_clock);
2610 /* I_boost config for SKL and above */
2611 dp_boost_level = intel_bios_dp_boost_level(devdata);
2613 drm_dbg_kms(&i915->drm,
2614 "Port %c VBT (e)DP boost level: %d\n",
2615 port_name(port), dp_boost_level);
2617 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2618 if (hdmi_boost_level)
2619 drm_dbg_kms(&i915->drm,
2620 "Port %c VBT HDMI boost level: %d\n",
2621 port_name(port), hdmi_boost_level);
2623 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2624 if (dp_max_link_rate)
2625 drm_dbg_kms(&i915->drm,
2626 "Port %c VBT DP max link rate: %d\n",
2627 port_name(port), dp_max_link_rate);
2630 * FIXME need to implement support for VBT
2631 * vswing/preemph tables should this ever trigger.
2633 drm_WARN(&i915->drm, child->use_vbt_vswing,
2634 "Port %c asks to use VBT vswing/preemph tables\n",
2638 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2640 struct drm_i915_private *i915 = devdata->i915;
2643 port = intel_bios_encoder_port(devdata);
2644 if (port == PORT_NONE)
2647 if (!is_port_valid(i915, port)) {
2648 drm_dbg_kms(&i915->drm,
2649 "VBT reports port %c as supported, but that can't be true: skipping\n",
2654 sanitize_device_type(devdata, port);
2657 static bool has_ddi_port_info(struct drm_i915_private *i915)
2659 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2662 static void parse_ddi_ports(struct drm_i915_private *i915)
2664 struct intel_bios_encoder_data *devdata;
2666 if (!has_ddi_port_info(i915))
2669 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2670 parse_ddi_port(devdata);
2672 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2673 print_ddi_port(devdata);
2677 parse_general_definitions(struct drm_i915_private *i915)
2679 const struct bdb_general_definitions *defs;
2680 struct intel_bios_encoder_data *devdata;
2681 const struct child_device_config *child;
2682 int i, child_device_num;
2687 defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS);
2689 drm_dbg_kms(&i915->drm,
2690 "No general definition block is found, no devices defined.\n");
2694 block_size = get_blocksize(defs);
2695 if (block_size < sizeof(*defs)) {
2696 drm_dbg_kms(&i915->drm,
2697 "General definitions block too small (%u)\n",
2702 bus_pin = defs->crt_ddc_gmbus_pin;
2703 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2704 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2705 i915->display.vbt.crt_ddc_pin = bus_pin;
2707 if (i915->display.vbt.version < 106) {
2709 } else if (i915->display.vbt.version < 111) {
2711 } else if (i915->display.vbt.version < 195) {
2712 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2713 } else if (i915->display.vbt.version == 195) {
2715 } else if (i915->display.vbt.version <= 215) {
2717 } else if (i915->display.vbt.version <= 250) {
2720 expected_size = sizeof(*child);
2721 BUILD_BUG_ON(sizeof(*child) < 39);
2723 "Expected child device config size for VBT version %u not known; assuming %u\n",
2724 i915->display.vbt.version, expected_size);
2727 /* Flag an error for unexpected size, but continue anyway. */
2728 if (defs->child_dev_size != expected_size)
2730 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2731 defs->child_dev_size, expected_size, i915->display.vbt.version);
2733 /* The legacy sized child device config is the minimum we need. */
2734 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2735 drm_dbg_kms(&i915->drm,
2736 "Child device config size %u is too small.\n",
2737 defs->child_dev_size);
2741 /* get the number of child device */
2742 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2744 for (i = 0; i < child_device_num; i++) {
2745 child = child_device_ptr(defs, i);
2746 if (!child->device_type)
2749 drm_dbg_kms(&i915->drm,
2750 "Found VBT child device with type 0x%x\n",
2751 child->device_type);
2753 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2757 devdata->i915 = i915;
2760 * Copy as much as we know (sizeof) and is available
2761 * (child_dev_size) of the child device config. Accessing the
2762 * data must depend on VBT version.
2764 memcpy(&devdata->child, child,
2765 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2767 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2770 if (list_empty(&i915->display.vbt.display_devices))
2771 drm_dbg_kms(&i915->drm,
2772 "no child dev is parsed from VBT\n");
2775 /* Common defaults which may be overridden by VBT. */
2777 init_vbt_defaults(struct drm_i915_private *i915)
2779 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2781 /* general features */
2782 i915->display.vbt.int_tv_support = 1;
2783 i915->display.vbt.int_crt_support = 1;
2785 /* driver features */
2786 i915->display.vbt.int_lvds_support = 1;
2788 /* Default to using SSC */
2789 i915->display.vbt.lvds_use_ssc = 1;
2791 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2794 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2795 !HAS_PCH_SPLIT(i915));
2796 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2797 i915->display.vbt.lvds_ssc_freq);
2800 /* Common defaults which may be overridden by VBT. */
2802 init_vbt_panel_defaults(struct intel_panel *panel)
2804 /* Default to having backlight */
2805 panel->vbt.backlight.present = true;
2807 /* LFP panel data */
2808 panel->vbt.lvds_dither = true;
2811 /* Defaults to initialize only if there is no VBT. */
2813 init_vbt_missing_defaults(struct drm_i915_private *i915)
2816 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2817 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2819 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2822 for_each_port_masked(port, ports) {
2823 struct intel_bios_encoder_data *devdata;
2824 struct child_device_config *child;
2825 enum phy phy = intel_port_to_phy(i915, port);
2828 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2831 if (intel_phy_is_tc(i915, phy))
2834 /* Create fake child device config */
2835 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2839 devdata->i915 = i915;
2840 child = &devdata->child;
2843 child->dvo_port = DVO_PORT_HDMIF;
2844 else if (port == PORT_E)
2845 child->dvo_port = DVO_PORT_HDMIE;
2847 child->dvo_port = DVO_PORT_HDMIA + port;
2849 if (port != PORT_A && port != PORT_E)
2850 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2853 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2856 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2858 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2860 drm_dbg_kms(&i915->drm,
2861 "Generating default VBT child device with type 0x04%x on port %c\n",
2862 child->device_type, port_name(port));
2865 /* Bypass some minimum baseline VBT version checks */
2866 i915->display.vbt.version = 155;
2869 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2871 const void *_vbt = vbt;
2873 return _vbt + vbt->bdb_offset;
2877 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2878 * @buf: pointer to a buffer to validate
2879 * @size: size of the buffer
2881 * Returns true on valid VBT.
2883 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2885 const struct vbt_header *vbt = buf;
2886 const struct bdb_header *bdb;
2891 if (sizeof(struct vbt_header) > size) {
2892 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2896 if (memcmp(vbt->signature, "$VBT", 4)) {
2897 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2901 if (vbt->vbt_size > size) {
2902 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2906 size = vbt->vbt_size;
2908 if (range_overflows_t(size_t,
2910 sizeof(struct bdb_header),
2912 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2916 bdb = get_bdb_header(vbt);
2917 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2918 DRM_DEBUG_DRIVER("BDB incomplete\n");
2925 static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
2927 intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
2929 return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
2932 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2934 u32 count, data, found, store = 0;
2935 u32 static_region, oprom_offset;
2936 u32 oprom_size = 0x200000;
2940 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2941 static_region &= OPTIONROM_SPI_REGIONID_MASK;
2942 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2944 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2945 oprom_offset &= OROM_OFFSET_MASK;
2947 for (count = 0; count < oprom_size; count += 4) {
2948 data = intel_spi_read(&i915->uncore, oprom_offset + count);
2949 if (data == *((const u32 *)"$VBT")) {
2950 found = oprom_offset + count;
2955 if (count >= oprom_size)
2958 /* Get VBT size and allocate space for the VBT */
2959 vbt_size = intel_spi_read(&i915->uncore,
2960 found + offsetof(struct vbt_header, vbt_size));
2963 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
2967 for (count = 0; count < vbt_size; count += 4)
2968 *(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
2970 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2973 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
2975 return (struct vbt_header *)vbt;
2983 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2985 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2986 void __iomem *p = NULL, *oprom;
2987 struct vbt_header *vbt;
2991 oprom = pci_map_rom(pdev, &size);
2995 /* Scour memory looking for the VBT signature. */
2996 for (i = 0; i + 4 < size; i += 4) {
2997 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3006 goto err_unmap_oprom;
3008 if (sizeof(struct vbt_header) > size) {
3009 drm_dbg(&i915->drm, "VBT header incomplete\n");
3010 goto err_unmap_oprom;
3013 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3014 if (vbt_size > size) {
3016 "VBT incomplete (vbt_size overflows)\n");
3017 goto err_unmap_oprom;
3020 /* The rest will be validated by intel_bios_is_valid_vbt() */
3021 vbt = kmalloc(vbt_size, GFP_KERNEL);
3023 goto err_unmap_oprom;
3025 memcpy_fromio(vbt, p, vbt_size);
3027 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3030 pci_unmap_rom(pdev, oprom);
3032 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3039 pci_unmap_rom(pdev, oprom);
3045 * intel_bios_init - find VBT and initialize settings from the BIOS
3046 * @i915: i915 device instance
3048 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3049 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3050 * initialize some defaults if the VBT is not present at all.
3052 void intel_bios_init(struct drm_i915_private *i915)
3054 const struct vbt_header *vbt = i915->display.opregion.vbt;
3055 struct vbt_header *oprom_vbt = NULL;
3056 const struct bdb_header *bdb;
3058 INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3059 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3061 if (!HAS_DISPLAY(i915)) {
3062 drm_dbg_kms(&i915->drm,
3063 "Skipping VBT init due to disabled display.\n");
3067 init_vbt_defaults(i915);
3070 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3073 if (!vbt && IS_DGFX(i915)) {
3074 oprom_vbt = spi_oprom_get_vbt(i915);
3079 oprom_vbt = oprom_get_vbt(i915);
3086 bdb = get_bdb_header(vbt);
3087 i915->display.vbt.version = bdb->version;
3089 drm_dbg_kms(&i915->drm,
3090 "VBT signature \"%.*s\", BDB version %d\n",
3091 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3093 init_bdb_blocks(i915, bdb);
3095 /* Grab useful general definitions */
3096 parse_general_features(i915);
3097 parse_general_definitions(i915);
3098 parse_driver_features(i915);
3100 /* Depends on child device list */
3101 parse_compression_parameters(i915);
3105 drm_info(&i915->drm,
3106 "Failed to find VBIOS tables (VBT)\n");
3107 init_vbt_missing_defaults(i915);
3110 /* Further processing on pre-parsed or generated child device data */
3111 parse_sdvo_device_mapping(i915);
3112 parse_ddi_ports(i915);
3117 static void intel_bios_init_panel(struct drm_i915_private *i915,
3118 struct intel_panel *panel,
3119 const struct intel_bios_encoder_data *devdata,
3120 const struct drm_edid *drm_edid,
3123 /* already have it? */
3124 if (panel->vbt.panel_type >= 0) {
3125 drm_WARN_ON(&i915->drm, !use_fallback);
3129 panel->vbt.panel_type = get_panel_type(i915, devdata,
3130 drm_edid, use_fallback);
3131 if (panel->vbt.panel_type < 0) {
3132 drm_WARN_ON(&i915->drm, use_fallback);
3136 init_vbt_panel_defaults(panel);
3138 parse_panel_options(i915, panel);
3139 parse_generic_dtd(i915, panel);
3140 parse_lfp_data(i915, panel);
3141 parse_lfp_backlight(i915, panel);
3142 parse_sdvo_panel_data(i915, panel);
3143 parse_panel_driver_features(i915, panel);
3144 parse_power_conservation_features(i915, panel);
3145 parse_edp(i915, panel);
3146 parse_psr(i915, panel);
3147 parse_mipi_config(i915, panel);
3148 parse_mipi_sequence(i915, panel);
3151 void intel_bios_init_panel_early(struct drm_i915_private *i915,
3152 struct intel_panel *panel,
3153 const struct intel_bios_encoder_data *devdata)
3155 intel_bios_init_panel(i915, panel, devdata, NULL, false);
3158 void intel_bios_init_panel_late(struct drm_i915_private *i915,
3159 struct intel_panel *panel,
3160 const struct intel_bios_encoder_data *devdata,
3161 const struct drm_edid *drm_edid)
3163 intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3167 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3168 * @i915: i915 device instance
3170 void intel_bios_driver_remove(struct drm_i915_private *i915)
3172 struct intel_bios_encoder_data *devdata, *nd;
3173 struct bdb_block_entry *entry, *ne;
3175 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3176 list_del(&devdata->node);
3177 kfree(devdata->dsc);
3181 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3182 list_del(&entry->node);
3187 void intel_bios_fini_panel(struct intel_panel *panel)
3189 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3190 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3191 kfree(panel->vbt.lfp_lvds_vbt_mode);
3192 panel->vbt.lfp_lvds_vbt_mode = NULL;
3193 kfree(panel->vbt.dsi.data);
3194 panel->vbt.dsi.data = NULL;
3195 kfree(panel->vbt.dsi.pps);
3196 panel->vbt.dsi.pps = NULL;
3197 kfree(panel->vbt.dsi.config);
3198 panel->vbt.dsi.config = NULL;
3199 kfree(panel->vbt.dsi.deassert_seq);
3200 panel->vbt.dsi.deassert_seq = NULL;
3204 * intel_bios_is_tv_present - is integrated TV present in VBT
3205 * @i915: i915 device instance
3207 * Return true if TV is present. If no child devices were parsed from VBT,
3208 * assume TV is present.
3210 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3212 const struct intel_bios_encoder_data *devdata;
3214 if (!i915->display.vbt.int_tv_support)
3217 if (list_empty(&i915->display.vbt.display_devices))
3220 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3221 const struct child_device_config *child = &devdata->child;
3224 * If the device type is not TV, continue.
3226 switch (child->device_type) {
3227 case DEVICE_TYPE_INT_TV:
3228 case DEVICE_TYPE_TV:
3229 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3234 /* Only when the addin_offset is non-zero, it is regarded
3237 if (child->addin_offset)
3245 * intel_bios_is_lvds_present - is LVDS present in VBT
3246 * @i915: i915 device instance
3247 * @i2c_pin: i2c pin for LVDS if present
3249 * Return true if LVDS is present. If no child devices were parsed from VBT,
3250 * assume LVDS is present.
3252 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3254 const struct intel_bios_encoder_data *devdata;
3256 if (list_empty(&i915->display.vbt.display_devices))
3259 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3260 const struct child_device_config *child = &devdata->child;
3262 /* If the device type is not LFP, continue.
3263 * We have to check both the new identifiers as well as the
3264 * old for compatibility with some BIOSes.
3266 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3267 child->device_type != DEVICE_TYPE_LFP)
3270 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3271 *i2c_pin = child->i2c_pin;
3273 /* However, we cannot trust the BIOS writers to populate
3274 * the VBT correctly. Since LVDS requires additional
3275 * information from AIM blocks, a non-zero addin offset is
3276 * a good indicator that the LVDS is actually present.
3278 if (child->addin_offset)
3281 /* But even then some BIOS writers perform some black magic
3282 * and instantiate the device without reference to any
3283 * additional data. Trust that if the VBT was written into
3284 * the OpRegion then they have validated the LVDS's existence.
3286 if (i915->display.opregion.vbt)
3294 * intel_bios_is_port_present - is the specified digital port present
3295 * @i915: i915 device instance
3296 * @port: port to check
3298 * Return true if the device in %port is present.
3300 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3302 const struct intel_bios_encoder_data *devdata;
3304 if (WARN_ON(!has_ddi_port_info(i915)))
3307 if (!is_port_valid(i915, port))
3310 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3311 const struct child_device_config *child = &devdata->child;
3313 if (dvo_port_to_port(i915, child->dvo_port) == port)
3320 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3322 const struct child_device_config *child = &devdata->child;
3324 if (!intel_bios_encoder_supports_dp(devdata) ||
3325 !intel_bios_encoder_supports_hdmi(devdata))
3328 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3331 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3332 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3333 child->aux_channel != 0)
3340 * intel_bios_is_dsi_present - is DSI present in VBT
3341 * @i915: i915 device instance
3342 * @port: port for DSI if present
3344 * Return true if DSI is present, and return the port in %port.
3346 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3349 const struct intel_bios_encoder_data *devdata;
3351 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3352 const struct child_device_config *child = &devdata->child;
3353 u8 dvo_port = child->dvo_port;
3355 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3358 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3359 drm_dbg_kms(&i915->drm,
3360 "VBT has unsupported DSI port %c\n",
3361 port_name(dvo_port - DVO_PORT_MIPIA));
3366 *port = dsi_dvo_port_to_port(i915, dvo_port);
3373 static void fill_dsc(struct intel_crtc_state *crtc_state,
3374 struct dsc_compression_parameters_entry *dsc,
3377 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3380 vdsc_cfg->dsc_version_major = dsc->version_major;
3381 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3383 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3385 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3387 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3390 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3393 crtc_state->pipe_bpp = bpc * 3;
3395 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3396 VBT_DSC_MAX_BPP(dsc->max_bpp));
3399 * FIXME: This is ugly, and slice count should take DSC engine
3400 * throughput etc. into account.
3402 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3404 if (dsc->slices_per_line & BIT(2)) {
3405 crtc_state->dsc.slice_count = 4;
3406 } else if (dsc->slices_per_line & BIT(1)) {
3407 crtc_state->dsc.slice_count = 2;
3410 if (!(dsc->slices_per_line & BIT(0)))
3411 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3413 crtc_state->dsc.slice_count = 1;
3416 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3417 crtc_state->dsc.slice_count != 0)
3418 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3419 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3420 crtc_state->dsc.slice_count);
3423 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3424 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3426 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3427 dsc->rc_buffer_size);
3429 /* FIXME: DSI spec says bpc + 1 for this one */
3430 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3432 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3434 vdsc_cfg->slice_height = dsc->slice_height;
3437 /* FIXME: initially DSI specific */
3438 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3439 struct intel_crtc_state *crtc_state,
3442 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3443 const struct intel_bios_encoder_data *devdata;
3445 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3446 const struct child_device_config *child = &devdata->child;
3448 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3451 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3456 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3465 static const u8 adlp_aux_ch_map[] = {
3466 [AUX_CH_A] = DP_AUX_A,
3467 [AUX_CH_B] = DP_AUX_B,
3468 [AUX_CH_C] = DP_AUX_C,
3469 [AUX_CH_D_XELPD] = DP_AUX_D,
3470 [AUX_CH_E_XELPD] = DP_AUX_E,
3471 [AUX_CH_USBC1] = DP_AUX_F,
3472 [AUX_CH_USBC2] = DP_AUX_G,
3473 [AUX_CH_USBC3] = DP_AUX_H,
3474 [AUX_CH_USBC4] = DP_AUX_I,
3478 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3479 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3481 static const u8 adls_aux_ch_map[] = {
3482 [AUX_CH_A] = DP_AUX_A,
3483 [AUX_CH_USBC1] = DP_AUX_B,
3484 [AUX_CH_USBC2] = DP_AUX_C,
3485 [AUX_CH_USBC3] = DP_AUX_D,
3486 [AUX_CH_USBC4] = DP_AUX_E,
3490 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3491 * map to DDI A,B,TC1,TC2 respectively.
3493 static const u8 rkl_aux_ch_map[] = {
3494 [AUX_CH_A] = DP_AUX_A,
3495 [AUX_CH_B] = DP_AUX_B,
3496 [AUX_CH_USBC1] = DP_AUX_C,
3497 [AUX_CH_USBC2] = DP_AUX_D,
3500 static const u8 direct_aux_ch_map[] = {
3501 [AUX_CH_A] = DP_AUX_A,
3502 [AUX_CH_B] = DP_AUX_B,
3503 [AUX_CH_C] = DP_AUX_C,
3504 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3505 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3506 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3507 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3508 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3509 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3512 static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3514 const u8 *aux_ch_map;
3517 if (DISPLAY_VER(i915) >= 13) {
3518 aux_ch_map = adlp_aux_ch_map;
3519 n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3520 } else if (IS_ALDERLAKE_S(i915)) {
3521 aux_ch_map = adls_aux_ch_map;
3522 n_entries = ARRAY_SIZE(adls_aux_ch_map);
3523 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3524 aux_ch_map = rkl_aux_ch_map;
3525 n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3527 aux_ch_map = direct_aux_ch_map;
3528 n_entries = ARRAY_SIZE(direct_aux_ch_map);
3531 for (i = 0; i < n_entries; i++) {
3532 if (aux_ch_map[i] == aux_channel)
3536 drm_dbg_kms(&i915->drm,
3537 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3543 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3545 if (!devdata || !devdata->child.aux_channel)
3548 return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3551 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3553 struct drm_i915_private *i915;
3557 if (!devdata || !devdata->child.aux_channel)
3560 i915 = devdata->i915;
3561 aux_channel = devdata->child.aux_channel;
3563 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3564 if (intel_bios_encoder_supports_dp(devdata) &&
3565 aux_channel == devdata->child.aux_channel)
3572 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3574 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3577 return translate_iboost(devdata->child.dp_iboost_level);
3580 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3582 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3585 return translate_iboost(devdata->child.hdmi_iboost_level);
3588 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3590 if (!devdata || !devdata->child.ddc_pin)
3593 return map_ddc_pin(devdata->i915, devdata->child.ddc_pin);
3596 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3598 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3601 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3603 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3606 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3608 return devdata && devdata->child.lane_reversal;
3611 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3613 return devdata && devdata->child.hpd_invert;
3616 const struct intel_bios_encoder_data *
3617 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3619 struct intel_bios_encoder_data *devdata;
3621 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3622 if (intel_bios_encoder_port(devdata) == port)
3629 void intel_bios_for_each_encoder(struct drm_i915_private *i915,
3630 void (*func)(struct drm_i915_private *i915,
3631 const struct intel_bios_encoder_data *devdata))
3633 struct intel_bios_encoder_data *devdata;
3635 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
3636 func(i915, devdata);