2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 #include <linux/debugfs.h>
29 #include <linux/firmware.h>
31 #include <drm/display/drm_dp_helper.h>
32 #include <drm/display/drm_dsc_helper.h>
33 #include <drm/drm_edid.h>
34 #include <drm/drm_fixed.h>
36 #include "soc/intel_rom.h"
39 #include "intel_display.h"
40 #include "intel_display_types.h"
41 #include "intel_gmbus.h"
43 #define _INTEL_BIOS_PRIVATE
44 #include "intel_vbt_defs.h"
47 * DOC: Video BIOS Table (VBT)
49 * The Video BIOS Table, or VBT, provides platform and board specific
50 * configuration information to the driver that is not discoverable or available
51 * through other means. The configuration is mostly related to display
52 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
55 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
56 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
57 * contain the actual configuration information. The VBT Header, and thus the
58 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
59 * BDB Header. The data blocks are concatenated after the BDB Header. The data
60 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
61 * data. (Block 53, the MIPI Sequence Block is an exception.)
63 * The driver parses the VBT during load. The relevant information is stored in
64 * driver private data for ease of use, and the actual VBT is not read after
68 /* Wrapper for VBT child device config */
69 struct intel_bios_encoder_data {
70 struct intel_display *display;
72 struct child_device_config child;
73 struct dsc_compression_parameters_entry *dsc;
74 struct list_head node;
77 #define TARGET_ADDR1 0x70
78 #define TARGET_ADDR2 0x72
80 /* Get BDB block size given a pointer to Block ID. */
81 static u32 _get_blocksize(const u8 *block_base)
83 /* The MIPI Sequence Block v3+ has a separate size field. */
84 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
85 return *((const u32 *)(block_base + 4));
87 return *((const u16 *)(block_base + 1));
90 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
91 static u32 get_blocksize(const void *block_data)
93 return _get_blocksize(block_data - 3);
97 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
99 const struct bdb_header *bdb = _bdb;
100 const u8 *base = _bdb;
102 u32 total, current_size;
103 enum bdb_block_id current_id;
105 /* skip to first section */
106 index += bdb->header_size;
107 total = bdb->bdb_size;
109 /* walk the sections looking for section_id */
110 while (index + 3 < total) {
111 current_id = *(base + index);
112 current_size = _get_blocksize(base + index);
115 if (index + current_size > total)
118 if (current_id == section_id)
121 index += current_size;
128 * Offset from the start of BDB to the start of the
129 * block data (just past the block header).
131 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
135 block = find_raw_section(bdb, section_id);
142 struct bdb_block_entry {
143 struct list_head node;
144 enum bdb_block_id section_id;
149 bdb_find_section(struct intel_display *display,
150 enum bdb_block_id section_id)
152 struct bdb_block_entry *entry;
154 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) {
155 if (entry->section_id == section_id)
156 return entry->data + 3;
162 static const struct {
163 enum bdb_block_id section_id;
166 { .section_id = BDB_GENERAL_FEATURES,
167 .min_size = sizeof(struct bdb_general_features), },
168 { .section_id = BDB_GENERAL_DEFINITIONS,
169 .min_size = sizeof(struct bdb_general_definitions), },
170 { .section_id = BDB_PSR,
171 .min_size = sizeof(struct bdb_psr), },
172 { .section_id = BDB_DRIVER_FEATURES,
173 .min_size = sizeof(struct bdb_driver_features), },
174 { .section_id = BDB_SDVO_LVDS_OPTIONS,
175 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
176 { .section_id = BDB_SDVO_LVDS_DTD,
177 .min_size = sizeof(struct bdb_sdvo_lvds_dtd), },
178 { .section_id = BDB_EDP,
179 .min_size = sizeof(struct bdb_edp), },
180 { .section_id = BDB_LFP_OPTIONS,
181 .min_size = sizeof(struct bdb_lfp_options), },
183 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS,
184 * so keep the two ordered.
186 { .section_id = BDB_LFP_DATA_PTRS,
187 .min_size = sizeof(struct bdb_lfp_data_ptrs), },
188 { .section_id = BDB_LFP_DATA,
189 .min_size = 0, /* special case */ },
190 { .section_id = BDB_LFP_BACKLIGHT,
191 .min_size = sizeof(struct bdb_lfp_backlight), },
192 { .section_id = BDB_LFP_POWER,
193 .min_size = sizeof(struct bdb_lfp_power), },
194 { .section_id = BDB_MIPI_CONFIG,
195 .min_size = sizeof(struct bdb_mipi_config), },
196 { .section_id = BDB_MIPI_SEQUENCE,
197 .min_size = sizeof(struct bdb_mipi_sequence) },
198 { .section_id = BDB_COMPRESSION_PARAMETERS,
199 .min_size = sizeof(struct bdb_compression_parameters), },
200 { .section_id = BDB_GENERIC_DTD,
201 .min_size = sizeof(struct bdb_generic_dtd), },
204 static size_t lfp_data_min_size(struct intel_display *display)
206 const struct bdb_lfp_data_ptrs *ptrs;
209 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
213 size = sizeof(struct bdb_lfp_data);
214 if (ptrs->panel_name.table_size)
215 size = max(size, ptrs->panel_name.offset +
216 sizeof(struct bdb_lfp_data_tail));
221 static bool validate_lfp_data_ptrs(const void *bdb,
222 const struct bdb_lfp_data_ptrs *ptrs)
224 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
225 int data_block_size, lfp_data_size;
226 const void *data_block;
229 data_block = find_raw_section(bdb, BDB_LFP_DATA);
233 data_block_size = get_blocksize(data_block);
234 if (data_block_size == 0)
237 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
238 if (ptrs->num_entries != 3)
241 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
242 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
243 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
244 panel_name_size = ptrs->panel_name.table_size;
246 /* fp_timing has variable size */
247 if (fp_timing_size < 32 ||
248 dvo_timing_size != sizeof(struct bdb_edid_dtd) ||
249 panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id))
252 /* panel_name is not present in old VBTs */
253 if (panel_name_size != 0 &&
254 panel_name_size != sizeof(struct bdb_edid_product_name))
257 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
258 if (16 * lfp_data_size > data_block_size)
261 /* make sure the table entries have uniform size */
262 for (i = 1; i < 16; i++) {
263 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
264 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
265 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
268 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
269 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
270 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
275 * Except for vlv/chv machines all real VBTs seem to have 6
276 * unaccounted bytes in the fp_timing table. And it doesn't
277 * appear to be a really intentional hole as the fp_timing
278 * 0xffff terminator is always within those 6 missing bytes.
280 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
283 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
286 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
287 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
288 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
291 /* make sure the tables fit inside the data block */
292 for (i = 0; i < 16; i++) {
293 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
294 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
295 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
299 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
302 /* make sure fp_timing terminators are present at expected locations */
303 for (i = 0; i < 16; i++) {
304 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
314 /* make the data table offsets relative to the data block */
315 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
317 struct bdb_lfp_data_ptrs *ptrs = ptrs_block;
321 offset = raw_block_offset(bdb, BDB_LFP_DATA);
323 for (i = 0; i < 16; i++) {
324 if (ptrs->ptr[i].fp_timing.offset < offset ||
325 ptrs->ptr[i].dvo_timing.offset < offset ||
326 ptrs->ptr[i].panel_pnp_id.offset < offset)
329 ptrs->ptr[i].fp_timing.offset -= offset;
330 ptrs->ptr[i].dvo_timing.offset -= offset;
331 ptrs->ptr[i].panel_pnp_id.offset -= offset;
334 if (ptrs->panel_name.table_size) {
335 if (ptrs->panel_name.offset < offset)
338 ptrs->panel_name.offset -= offset;
341 return validate_lfp_data_ptrs(bdb, ptrs);
344 static int make_lfp_data_ptr(struct lfp_data_ptr_table *table,
345 int table_size, int total_size)
347 if (total_size < table_size)
350 table->table_size = table_size;
351 table->offset = total_size - table_size;
353 return total_size - table_size;
356 static void next_lfp_data_ptr(struct lfp_data_ptr_table *next,
357 const struct lfp_data_ptr_table *prev,
360 next->table_size = prev->table_size;
361 next->offset = prev->offset + size;
364 static void *generate_lfp_data_ptrs(struct intel_display *display,
367 int i, size, table_size, block_size, offset, fp_timing_size;
368 struct bdb_lfp_data_ptrs *ptrs;
373 * The hardcoded fp_timing_size is only valid for
374 * modernish VBTs. All older VBTs definitely should
375 * include block 41 and thus we don't need to
378 if (display->vbt.version < 155)
383 block = find_raw_section(bdb, BDB_LFP_DATA);
387 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n");
389 block_size = get_blocksize(block);
391 size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
392 sizeof(struct bdb_edid_pnp_id);
393 if (size * 16 > block_size)
396 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
400 *(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS;
401 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
402 ptrs = ptrs_block + 3;
404 table_size = sizeof(struct bdb_edid_pnp_id);
405 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
407 table_size = sizeof(struct bdb_edid_dtd);
408 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
410 table_size = fp_timing_size;
411 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
413 if (ptrs->ptr[0].fp_timing.table_size)
415 if (ptrs->ptr[0].dvo_timing.table_size)
417 if (ptrs->ptr[0].panel_pnp_id.table_size)
420 if (size != 0 || ptrs->num_entries != 3) {
425 size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
426 sizeof(struct bdb_edid_pnp_id);
427 for (i = 1; i < 16; i++) {
428 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
429 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
430 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
433 table_size = sizeof(struct bdb_edid_product_name);
435 if (16 * (size + table_size) <= block_size) {
436 ptrs->panel_name.table_size = table_size;
437 ptrs->panel_name.offset = size * 16;
440 offset = block - bdb;
442 for (i = 0; i < 16; i++) {
443 ptrs->ptr[i].fp_timing.offset += offset;
444 ptrs->ptr[i].dvo_timing.offset += offset;
445 ptrs->ptr[i].panel_pnp_id.offset += offset;
448 if (ptrs->panel_name.table_size)
449 ptrs->panel_name.offset += offset;
455 init_bdb_block(struct intel_display *display,
456 const void *bdb, enum bdb_block_id section_id,
459 struct bdb_block_entry *entry;
460 void *temp_block = NULL;
464 block = find_raw_section(bdb, section_id);
466 /* Modern VBTs lack the LFP data table pointers block, make one up */
467 if (!block && section_id == BDB_LFP_DATA_PTRS) {
468 temp_block = generate_lfp_data_ptrs(display, bdb);
470 block = temp_block + 3;
475 drm_WARN(display->drm, min_size == 0,
476 "Block %d min_size is zero\n", section_id);
478 block_size = get_blocksize(block);
481 * Version number and new block size are considered
482 * part of the header for MIPI sequenece block v3+.
484 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
487 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
494 entry->section_id = section_id;
495 memcpy(entry->data, block - 3, block_size + 3);
499 drm_dbg_kms(display->drm,
500 "Found BDB block %d (size %zu, min size %zu)\n",
501 section_id, block_size, min_size);
503 if (section_id == BDB_LFP_DATA_PTRS &&
504 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
505 drm_err(display->drm,
506 "VBT has malformed LFP data table pointers\n");
511 list_add_tail(&entry->node, &display->vbt.bdb_blocks);
514 static void init_bdb_blocks(struct intel_display *display,
519 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
520 enum bdb_block_id section_id = bdb_blocks[i].section_id;
521 size_t min_size = bdb_blocks[i].min_size;
523 if (section_id == BDB_LFP_DATA)
524 min_size = lfp_data_min_size(display);
526 init_bdb_block(display, bdb, section_id, min_size);
531 fill_detail_timing_data(struct intel_display *display,
532 struct drm_display_mode *panel_fixed_mode,
533 const struct bdb_edid_dtd *dvo_timing)
535 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
536 dvo_timing->hactive_lo;
537 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
538 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
539 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
540 ((dvo_timing->hsync_pulse_width_hi << 8) |
541 dvo_timing->hsync_pulse_width_lo);
542 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
543 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
545 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
546 dvo_timing->vactive_lo;
547 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
548 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
549 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
550 ((dvo_timing->vsync_pulse_width_hi << 4) |
551 dvo_timing->vsync_pulse_width_lo);
552 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
553 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
554 panel_fixed_mode->clock = dvo_timing->clock * 10;
555 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
557 if (dvo_timing->hsync_positive)
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
560 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
562 if (dvo_timing->vsync_positive)
563 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
565 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
567 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
568 dvo_timing->himage_lo;
569 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
570 dvo_timing->vimage_lo;
572 /* Some VBTs have bogus h/vsync_end values */
573 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
574 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n",
575 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
576 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
578 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
579 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n",
580 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
581 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
584 drm_mode_set_name(panel_fixed_mode);
587 static const struct bdb_edid_dtd *
588 get_lfp_dvo_timing(const struct bdb_lfp_data *data,
589 const struct bdb_lfp_data_ptrs *ptrs,
592 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
595 static const struct fp_timing *
596 get_lfp_fp_timing(const struct bdb_lfp_data *data,
597 const struct bdb_lfp_data_ptrs *ptrs,
600 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
603 static const struct drm_edid_product_id *
604 get_lfp_pnp_id(const struct bdb_lfp_data *data,
605 const struct bdb_lfp_data_ptrs *ptrs,
608 /* These two are supposed to have the same layout in memory. */
609 BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id));
611 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
614 static const struct bdb_lfp_data_tail *
615 get_lfp_data_tail(const struct bdb_lfp_data *data,
616 const struct bdb_lfp_data_ptrs *ptrs)
618 if (ptrs->panel_name.table_size)
619 return (const void *)data + ptrs->panel_name.offset;
624 static int opregion_get_panel_type(struct intel_display *display,
625 const struct intel_bios_encoder_data *devdata,
626 const struct drm_edid *drm_edid, bool use_fallback)
628 return intel_opregion_get_panel_type(display);
631 static int vbt_get_panel_type(struct intel_display *display,
632 const struct intel_bios_encoder_data *devdata,
633 const struct drm_edid *drm_edid, bool use_fallback)
635 const struct bdb_lfp_options *lfp_options;
637 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS);
641 if (lfp_options->panel_type > 0xf &&
642 lfp_options->panel_type != 0xff) {
643 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n",
644 lfp_options->panel_type);
648 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
649 return lfp_options->panel_type2;
651 drm_WARN_ON(display->drm,
652 devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
654 return lfp_options->panel_type;
657 static int pnpid_get_panel_type(struct intel_display *display,
658 const struct intel_bios_encoder_data *devdata,
659 const struct drm_edid *drm_edid, bool use_fallback)
661 const struct bdb_lfp_data *data;
662 const struct bdb_lfp_data_ptrs *ptrs;
663 struct drm_edid_product_id product_id, product_id_nodate;
664 struct drm_printer p;
670 drm_edid_get_product_id(drm_edid, &product_id);
672 product_id_nodate = product_id;
673 product_id_nodate.week_of_manufacture = 0;
674 product_id_nodate.year_of_manufacture = 0;
676 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "EDID");
677 drm_edid_print_product_id(&p, &product_id, true);
679 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
683 data = bdb_find_section(display, BDB_LFP_DATA);
687 for (i = 0; i < 16; i++) {
688 const struct drm_edid_product_id *vbt_id =
689 get_lfp_pnp_id(data, ptrs, i);
692 if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id)))
696 * Accept a match w/o date if no full match is found,
697 * and the VBT entry does not specify a date.
700 !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id)))
707 static int fallback_get_panel_type(struct intel_display *display,
708 const struct intel_bios_encoder_data *devdata,
709 const struct drm_edid *drm_edid, bool use_fallback)
711 return use_fallback ? 0 : -1;
721 static int get_panel_type(struct intel_display *display,
722 const struct intel_bios_encoder_data *devdata,
723 const struct drm_edid *drm_edid, bool use_fallback)
727 int (*get_panel_type)(struct intel_display *display,
728 const struct intel_bios_encoder_data *devdata,
729 const struct drm_edid *drm_edid, bool use_fallback);
732 [PANEL_TYPE_OPREGION] = {
734 .get_panel_type = opregion_get_panel_type,
738 .get_panel_type = vbt_get_panel_type,
740 [PANEL_TYPE_PNPID] = {
742 .get_panel_type = pnpid_get_panel_type,
744 [PANEL_TYPE_FALLBACK] = {
746 .get_panel_type = fallback_get_panel_type,
751 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
752 panel_types[i].panel_type = panel_types[i].get_panel_type(display, devdata,
753 drm_edid, use_fallback);
755 drm_WARN_ON(display->drm, panel_types[i].panel_type > 0xf &&
756 panel_types[i].panel_type != 0xff);
758 if (panel_types[i].panel_type >= 0)
759 drm_dbg_kms(display->drm, "Panel type (%s): %d\n",
760 panel_types[i].name, panel_types[i].panel_type);
763 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
764 i = PANEL_TYPE_OPREGION;
765 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
766 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
767 i = PANEL_TYPE_PNPID;
768 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
769 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
772 i = PANEL_TYPE_FALLBACK;
774 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n",
775 panel_types[i].name, panel_types[i].panel_type);
777 return panel_types[i].panel_type;
780 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
782 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
785 static bool panel_bool(unsigned int value, int panel_type)
787 return panel_bits(value, panel_type, 1);
790 /* Parse general panel options */
792 parse_panel_options(struct intel_display *display,
793 struct intel_panel *panel)
795 const struct bdb_lfp_options *lfp_options;
796 int panel_type = panel->vbt.panel_type;
799 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS);
803 panel->vbt.lvds_dither = lfp_options->pixel_dither;
806 * Empirical evidence indicates the block size can be
807 * either 4,14,16,24+ bytes. For older VBTs no clear
808 * relationship between the block size vs. BDB version.
810 if (get_blocksize(lfp_options) < 16)
813 drrs_mode = panel_bits(lfp_options->dps_panel_type_bits,
816 * VBT has static DRRS = 0 and seamless DRRS = 2.
817 * The below piece of code is required to adjust vbt.drrs_type
818 * to match the enum drrs_support_type.
822 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
823 drm_dbg_kms(display->drm, "DRRS supported mode is static\n");
826 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
827 drm_dbg_kms(display->drm,
828 "DRRS supported mode is seamless\n");
831 panel->vbt.drrs_type = DRRS_TYPE_NONE;
832 drm_dbg_kms(display->drm,
833 "DRRS not supported (VBT input)\n");
839 parse_lfp_panel_dtd(struct intel_display *display,
840 struct intel_panel *panel,
841 const struct bdb_lfp_data *lfp_data,
842 const struct bdb_lfp_data_ptrs *lfp_data_ptrs)
844 const struct bdb_edid_dtd *panel_dvo_timing;
845 const struct fp_timing *fp_timing;
846 struct drm_display_mode *panel_fixed_mode;
847 int panel_type = panel->vbt.panel_type;
849 panel_dvo_timing = get_lfp_dvo_timing(lfp_data,
853 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
854 if (!panel_fixed_mode)
857 fill_detail_timing_data(display, panel_fixed_mode, panel_dvo_timing);
859 panel->vbt.lfp_vbt_mode = panel_fixed_mode;
861 drm_dbg_kms(display->drm,
862 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
863 DRM_MODE_ARG(panel_fixed_mode));
865 fp_timing = get_lfp_fp_timing(lfp_data,
869 /* check the resolution, just to be sure */
870 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
871 fp_timing->y_res == panel_fixed_mode->vdisplay) {
872 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
873 drm_dbg_kms(display->drm,
874 "VBT initial LVDS value %x\n",
875 panel->vbt.bios_lvds_val);
880 parse_lfp_data(struct intel_display *display,
881 struct intel_panel *panel)
883 const struct bdb_lfp_data *data;
884 const struct bdb_lfp_data_tail *tail;
885 const struct bdb_lfp_data_ptrs *ptrs;
886 const struct drm_edid_product_id *pnp_id;
887 struct drm_printer p;
888 int panel_type = panel->vbt.panel_type;
890 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
894 data = bdb_find_section(display, BDB_LFP_DATA);
898 if (!panel->vbt.lfp_vbt_mode)
899 parse_lfp_panel_dtd(display, panel, data, ptrs);
901 pnp_id = get_lfp_pnp_id(data, ptrs, panel_type);
903 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "Panel");
904 drm_edid_print_product_id(&p, pnp_id, false);
906 tail = get_lfp_data_tail(data, ptrs);
910 drm_dbg_kms(display->drm, "Panel name: %.*s\n",
911 (int)sizeof(tail->panel_name[0].name),
912 tail->panel_name[panel_type].name);
914 if (display->vbt.version >= 188) {
915 panel->vbt.seamless_drrs_min_refresh_rate =
916 tail->seamless_drrs_min_refresh_rate[panel_type];
917 drm_dbg_kms(display->drm,
918 "Seamless DRRS min refresh rate: %d Hz\n",
919 panel->vbt.seamless_drrs_min_refresh_rate);
924 parse_generic_dtd(struct intel_display *display,
925 struct intel_panel *panel)
927 const struct bdb_generic_dtd *generic_dtd;
928 const struct generic_dtd_entry *dtd;
929 struct drm_display_mode *panel_fixed_mode;
933 * Older VBTs provided DTD information for internal displays through
934 * the "LFP panel tables" block (42). As of VBT revision 229 the
935 * DTD information should be provided via a newer "generic DTD"
936 * block (58). Just to be safe, we'll try the new generic DTD block
937 * first on VBT >= 229, but still fall back to trying the old LFP
938 * block if that fails.
940 if (display->vbt.version < 229)
943 generic_dtd = bdb_find_section(display, BDB_GENERIC_DTD);
947 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
948 drm_err(display->drm, "GDTD size %u is too small.\n",
949 generic_dtd->gdtd_size);
951 } else if (generic_dtd->gdtd_size !=
952 sizeof(struct generic_dtd_entry)) {
953 drm_err(display->drm, "Unexpected GDTD size %u\n",
954 generic_dtd->gdtd_size);
955 /* DTD has unknown fields, but keep going */
958 num_dtd = (get_blocksize(generic_dtd) -
959 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
960 if (panel->vbt.panel_type >= num_dtd) {
961 drm_err(display->drm,
962 "Panel type %d not found in table of %d DTD's\n",
963 panel->vbt.panel_type, num_dtd);
967 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
969 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
970 if (!panel_fixed_mode)
973 panel_fixed_mode->hdisplay = dtd->hactive;
974 panel_fixed_mode->hsync_start =
975 panel_fixed_mode->hdisplay + dtd->hfront_porch;
976 panel_fixed_mode->hsync_end =
977 panel_fixed_mode->hsync_start + dtd->hsync;
978 panel_fixed_mode->htotal =
979 panel_fixed_mode->hdisplay + dtd->hblank;
981 panel_fixed_mode->vdisplay = dtd->vactive;
982 panel_fixed_mode->vsync_start =
983 panel_fixed_mode->vdisplay + dtd->vfront_porch;
984 panel_fixed_mode->vsync_end =
985 panel_fixed_mode->vsync_start + dtd->vsync;
986 panel_fixed_mode->vtotal =
987 panel_fixed_mode->vdisplay + dtd->vblank;
989 panel_fixed_mode->clock = dtd->pixel_clock;
990 panel_fixed_mode->width_mm = dtd->width_mm;
991 panel_fixed_mode->height_mm = dtd->height_mm;
993 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
994 drm_mode_set_name(panel_fixed_mode);
996 if (dtd->hsync_positive_polarity)
997 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
999 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
1001 if (dtd->vsync_positive_polarity)
1002 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1004 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1006 drm_dbg_kms(display->drm,
1007 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1008 DRM_MODE_ARG(panel_fixed_mode));
1010 panel->vbt.lfp_vbt_mode = panel_fixed_mode;
1014 parse_lfp_backlight(struct intel_display *display,
1015 struct intel_panel *panel)
1017 const struct bdb_lfp_backlight *backlight_data;
1018 const struct lfp_backlight_data_entry *entry;
1019 int panel_type = panel->vbt.panel_type;
1022 backlight_data = bdb_find_section(display, BDB_LFP_BACKLIGHT);
1023 if (!backlight_data)
1026 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1027 drm_dbg_kms(display->drm,
1028 "Unsupported backlight data entry size %u\n",
1029 backlight_data->entry_size);
1033 entry = &backlight_data->data[panel_type];
1035 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1036 if (!panel->vbt.backlight.present) {
1037 drm_dbg_kms(display->drm,
1038 "PWM backlight not present in VBT (type %u)\n",
1043 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1044 panel->vbt.backlight.controller = 0;
1045 if (display->vbt.version >= 191) {
1046 const struct lfp_backlight_control_method *method;
1048 method = &backlight_data->backlight_control[panel_type];
1049 panel->vbt.backlight.type = method->type;
1050 panel->vbt.backlight.controller = method->controller;
1053 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1054 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1056 if (display->vbt.version >= 234) {
1060 level = backlight_data->brightness_level[panel_type].level;
1061 min_level = backlight_data->brightness_min_level[panel_type].level;
1063 if (display->vbt.version >= 236)
1064 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1066 scale = level > 255;
1069 min_level = min_level / 255;
1071 if (min_level > 255) {
1072 drm_warn(display->drm, "Brightness min level > 255\n");
1075 panel->vbt.backlight.min_brightness = min_level;
1077 panel->vbt.backlight.brightness_precision_bits =
1078 backlight_data->brightness_precision_bits[panel_type];
1080 level = backlight_data->level[panel_type];
1081 panel->vbt.backlight.min_brightness = entry->min_brightness;
1084 if (display->vbt.version >= 239)
1085 panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1086 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1088 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1090 drm_dbg_kms(display->drm,
1091 "VBT backlight PWM modulation frequency %u Hz, "
1092 "active %s, min brightness %u, level %u, controller %u\n",
1093 panel->vbt.backlight.pwm_freq_hz,
1094 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1095 panel->vbt.backlight.min_brightness,
1097 panel->vbt.backlight.controller);
1101 parse_sdvo_lvds_data(struct intel_display *display,
1102 struct intel_panel *panel)
1104 const struct bdb_sdvo_lvds_dtd *dtd;
1105 struct drm_display_mode *panel_fixed_mode;
1108 index = display->params.vbt_sdvo_panel_type;
1110 drm_dbg_kms(display->drm,
1111 "Ignore SDVO LVDS mode from BIOS VBT tables.\n");
1116 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1118 sdvo_lvds_options = bdb_find_section(display, BDB_SDVO_LVDS_OPTIONS);
1119 if (!sdvo_lvds_options)
1122 index = sdvo_lvds_options->panel_type;
1125 dtd = bdb_find_section(display, BDB_SDVO_LVDS_DTD);
1130 * This should not happen, as long as the panel_type
1131 * enumeration doesn't grow over 4 items. But if it does, it
1132 * could lead to hard-to-detect bugs, so better double-check
1133 * it here to be sure.
1135 if (index >= ARRAY_SIZE(dtd->dtd)) {
1136 drm_err(display->drm,
1137 "index %d is larger than dtd->dtd[4] array\n",
1142 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1143 if (!panel_fixed_mode)
1146 fill_detail_timing_data(display, panel_fixed_mode, &dtd->dtd[index]);
1148 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1150 drm_dbg_kms(display->drm,
1151 "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1152 DRM_MODE_ARG(panel_fixed_mode));
1155 static int intel_bios_ssc_frequency(struct intel_display *display,
1158 switch (DISPLAY_VER(display)) {
1160 return alternate ? 66667 : 48000;
1163 return alternate ? 100000 : 96000;
1165 return alternate ? 100000 : 120000;
1170 parse_general_features(struct intel_display *display)
1172 const struct bdb_general_features *general;
1174 general = bdb_find_section(display, BDB_GENERAL_FEATURES);
1178 display->vbt.int_tv_support = general->int_tv_support;
1179 /* int_crt_support can't be trusted on earlier platforms */
1180 if (display->vbt.version >= 155 &&
1181 (HAS_DDI(display) || display->platform.valleyview))
1182 display->vbt.int_crt_support = general->int_crt_support;
1183 display->vbt.lvds_use_ssc = general->enable_ssc;
1184 display->vbt.lvds_ssc_freq =
1185 intel_bios_ssc_frequency(display, general->ssc_freq);
1186 display->vbt.display_clock_mode = general->display_clock_mode;
1187 display->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1188 if (display->vbt.version >= 181) {
1189 display->vbt.orientation = general->rotate_180 ?
1190 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1191 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1193 display->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1196 if (display->vbt.version >= 249 && general->afc_startup_config) {
1197 display->vbt.override_afc_startup = true;
1198 display->vbt.override_afc_startup_val = general->afc_startup_config == 1 ? 0 : 7;
1201 drm_dbg_kms(display->drm,
1202 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1203 display->vbt.int_tv_support,
1204 display->vbt.int_crt_support,
1205 display->vbt.lvds_use_ssc,
1206 display->vbt.lvds_ssc_freq,
1207 display->vbt.display_clock_mode,
1208 display->vbt.fdi_rx_polarity_inverted);
1211 static const struct child_device_config *
1212 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1214 return (const void *) &defs->devices[i * defs->child_dev_size];
1218 parse_sdvo_device_mapping(struct intel_display *display)
1220 const struct intel_bios_encoder_data *devdata;
1224 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1225 * accurate and doesn't have to be, as long as it's not too strict.
1227 if (!IS_DISPLAY_VER(display, 3, 7)) {
1228 drm_dbg_kms(display->drm, "Skipping SDVO device mapping\n");
1232 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
1233 const struct child_device_config *child = &devdata->child;
1234 struct sdvo_device_mapping *mapping;
1236 if (child->target_addr != TARGET_ADDR1 &&
1237 child->target_addr != TARGET_ADDR2) {
1239 * If the target address is neither 0x70 nor 0x72,
1240 * it is not a SDVO device. Skip it.
1244 if (child->dvo_port != DEVICE_PORT_DVOB &&
1245 child->dvo_port != DEVICE_PORT_DVOC) {
1246 /* skip the incorrect SDVO port */
1247 drm_dbg_kms(display->drm,
1248 "Incorrect SDVO port. Skip it\n");
1251 drm_dbg_kms(display->drm,
1252 "the SDVO device with target addr %2x is found on"
1255 (child->dvo_port == DEVICE_PORT_DVOB) ?
1257 mapping = &display->vbt.sdvo_mappings[child->dvo_port - 1];
1258 if (!mapping->initialized) {
1259 mapping->dvo_port = child->dvo_port;
1260 mapping->target_addr = child->target_addr;
1261 mapping->dvo_wiring = child->dvo_wiring;
1262 mapping->ddc_pin = child->ddc_pin;
1263 mapping->i2c_pin = child->i2c_pin;
1264 mapping->initialized = 1;
1265 drm_dbg_kms(display->drm,
1266 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1267 mapping->dvo_port, mapping->target_addr,
1268 mapping->dvo_wiring, mapping->ddc_pin,
1271 drm_dbg_kms(display->drm,
1272 "Maybe one SDVO port is shared by "
1273 "two SDVO device.\n");
1275 if (child->target2_addr) {
1276 /* Maybe this is a SDVO device with multiple inputs */
1277 /* And the mapping info is not added */
1278 drm_dbg_kms(display->drm,
1279 "there exists the target2_addr. Maybe this"
1280 " is a SDVO device with multiple inputs.\n");
1286 /* No SDVO device info is found */
1287 drm_dbg_kms(display->drm,
1288 "No SDVO device info is found in VBT\n");
1293 parse_driver_features(struct intel_display *display)
1295 const struct bdb_driver_features *driver;
1297 driver = bdb_find_section(display, BDB_DRIVER_FEATURES);
1301 if (DISPLAY_VER(display) >= 5) {
1303 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1304 * to mean "eDP". The VBT spec doesn't agree with that
1305 * interpretation, but real world VBTs seem to.
1307 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1308 display->vbt.int_lvds_support = 0;
1311 * FIXME it's not clear which BDB version has the LVDS config
1312 * bits defined. Revision history in the VBT spec says:
1313 * "0.92 | Add two definitions for VBT value of LVDS Active
1314 * Config (00b and 11b values defined) | 06/13/2005"
1315 * but does not the specify the BDB version.
1317 * So far version 134 (on i945gm) is the oldest VBT observed
1318 * in the wild with the bits correctly populated. Version
1319 * 108 (on i85x) does not have the bits correctly populated.
1321 if (display->vbt.version >= 134 &&
1322 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1323 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1324 display->vbt.int_lvds_support = 0;
1329 parse_panel_driver_features(struct intel_display *display,
1330 struct intel_panel *panel)
1332 const struct bdb_driver_features *driver;
1334 driver = bdb_find_section(display, BDB_DRIVER_FEATURES);
1338 if (display->vbt.version < 228) {
1339 drm_dbg_kms(display->drm, "DRRS State Enabled:%d\n",
1340 driver->drrs_enabled);
1342 * If DRRS is not supported, drrs_type has to be set to 0.
1343 * This is because, VBT is configured in such a way that
1344 * static DRRS is 0 and DRRS not supported is represented by
1345 * driver->drrs_enabled=false
1347 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1349 * FIXME Should DMRRS perhaps be treated as seamless
1350 * but without the automatic downclocking?
1352 if (driver->dmrrs_enabled)
1353 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1355 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1358 panel->vbt.psr.enable = driver->psr_enabled;
1363 parse_power_conservation_features(struct intel_display *display,
1364 struct intel_panel *panel)
1366 const struct bdb_lfp_power *power;
1367 u8 panel_type = panel->vbt.panel_type;
1369 panel->vbt.vrr = true; /* matches Windows behaviour */
1371 if (display->vbt.version < 228)
1374 power = bdb_find_section(display, BDB_LFP_POWER);
1378 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1381 * If DRRS is not supported, drrs_type has to be set to 0.
1382 * This is because, VBT is configured in such a way that
1383 * static DRRS is 0 and DRRS not supported is represented by
1384 * power->drrs & BIT(panel_type)=false
1386 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1388 * FIXME Should DMRRS perhaps be treated as seamless
1389 * but without the automatic downclocking?
1391 if (panel_bool(power->dmrrs, panel_type))
1392 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1394 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1397 if (display->vbt.version >= 232)
1398 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1400 if (display->vbt.version >= 233)
1401 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1405 static void vbt_edp_to_pps_delays(struct intel_pps_delays *pps,
1406 const struct edp_power_seq *edp_pps)
1408 pps->power_up = edp_pps->t1_t3;
1409 pps->backlight_on = edp_pps->t8;
1410 pps->backlight_off = edp_pps->t9;
1411 pps->power_down = edp_pps->t10;
1412 pps->power_cycle = edp_pps->t11_t12;
1416 parse_edp(struct intel_display *display,
1417 struct intel_panel *panel)
1419 const struct bdb_edp *edp;
1420 const struct edp_fast_link_params *edp_link_params;
1421 int panel_type = panel->vbt.panel_type;
1423 edp = bdb_find_section(display, BDB_EDP);
1427 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1429 panel->vbt.edp.bpp = 18;
1432 panel->vbt.edp.bpp = 24;
1435 panel->vbt.edp.bpp = 30;
1439 /* Get the eDP sequencing and link info */
1440 edp_link_params = &edp->fast_link_params[panel_type];
1442 vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
1443 &edp->power_seqs[panel_type]);
1445 if (display->vbt.version >= 224) {
1446 panel->vbt.edp.rate =
1447 edp->edp_fast_link_training_rate[panel_type] * 20;
1449 switch (edp_link_params->rate) {
1451 panel->vbt.edp.rate = 162000;
1454 panel->vbt.edp.rate = 270000;
1457 panel->vbt.edp.rate = 540000;
1460 drm_dbg_kms(display->drm,
1461 "VBT has unknown eDP link rate value %u\n",
1462 edp_link_params->rate);
1467 switch (edp_link_params->lanes) {
1469 panel->vbt.edp.lanes = 1;
1472 panel->vbt.edp.lanes = 2;
1475 panel->vbt.edp.lanes = 4;
1478 drm_dbg_kms(display->drm,
1479 "VBT has unknown eDP lane count value %u\n",
1480 edp_link_params->lanes);
1484 switch (edp_link_params->preemphasis) {
1485 case EDP_PREEMPHASIS_NONE:
1486 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1488 case EDP_PREEMPHASIS_3_5dB:
1489 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1491 case EDP_PREEMPHASIS_6dB:
1492 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1494 case EDP_PREEMPHASIS_9_5dB:
1495 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1498 drm_dbg_kms(display->drm,
1499 "VBT has unknown eDP pre-emphasis value %u\n",
1500 edp_link_params->preemphasis);
1504 switch (edp_link_params->vswing) {
1505 case EDP_VSWING_0_4V:
1506 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1508 case EDP_VSWING_0_6V:
1509 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1511 case EDP_VSWING_0_8V:
1512 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1514 case EDP_VSWING_1_2V:
1515 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1518 drm_dbg_kms(display->drm,
1519 "VBT has unknown eDP voltage swing value %u\n",
1520 edp_link_params->vswing);
1524 if (display->vbt.version >= 173) {
1527 /* Don't read from VBT if module parameter has valid value*/
1528 if (display->params.edp_vswing) {
1529 panel->vbt.edp.low_vswing =
1530 display->params.edp_vswing == 1;
1532 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1533 panel->vbt.edp.low_vswing = vswing == 0;
1537 panel->vbt.edp.drrs_msa_timing_delay =
1538 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1540 if (display->vbt.version >= 244)
1541 panel->vbt.edp.max_link_rate =
1542 edp->edp_max_port_link_rate[panel_type] * 20;
1544 if (display->vbt.version >= 251)
1545 panel->vbt.edp.dsc_disable =
1546 panel_bool(edp->edp_dsc_disable, panel_type);
1550 parse_psr(struct intel_display *display,
1551 struct intel_panel *panel)
1553 const struct bdb_psr *psr;
1554 const struct psr_table *psr_table;
1555 int panel_type = panel->vbt.panel_type;
1557 psr = bdb_find_section(display, BDB_PSR);
1559 drm_dbg_kms(display->drm, "No PSR BDB found.\n");
1563 psr_table = &psr->psr_table[panel_type];
1565 panel->vbt.psr.full_link = psr_table->full_link;
1566 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1568 /* Allowed VBT values goes from 0 to 15 */
1569 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1570 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1573 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1574 * Old decimal value is wake up time in multiples of 100 us.
1576 if (display->vbt.version >= 205 &&
1577 (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) {
1578 switch (psr_table->tp1_wakeup_time) {
1580 panel->vbt.psr.tp1_wakeup_time_us = 500;
1583 panel->vbt.psr.tp1_wakeup_time_us = 100;
1586 panel->vbt.psr.tp1_wakeup_time_us = 0;
1589 drm_dbg_kms(display->drm,
1590 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1591 psr_table->tp1_wakeup_time);
1594 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1598 switch (psr_table->tp2_tp3_wakeup_time) {
1600 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1603 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1606 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1609 drm_dbg_kms(display->drm,
1610 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1611 psr_table->tp2_tp3_wakeup_time);
1614 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1618 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1619 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1622 if (display->vbt.version >= 226) {
1623 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1625 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1626 switch (wakeup_time) {
1641 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1643 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1644 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1648 static void parse_dsi_backlight_ports(struct intel_display *display,
1649 struct intel_panel *panel,
1652 enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C;
1654 if (!panel->vbt.dsi.config->dual_link || display->vbt.version < 197) {
1655 panel->vbt.dsi.bl_ports = BIT(port);
1656 if (panel->vbt.dsi.config->cabc_supported)
1657 panel->vbt.dsi.cabc_ports = BIT(port);
1662 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1664 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1667 panel->vbt.dsi.bl_ports = BIT(port_bc);
1670 case DL_DCS_PORT_A_AND_C:
1671 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1675 if (!panel->vbt.dsi.config->cabc_supported)
1678 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1680 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1683 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1686 case DL_DCS_PORT_A_AND_C:
1687 panel->vbt.dsi.cabc_ports =
1688 BIT(PORT_A) | BIT(port_bc);
1694 parse_mipi_config(struct intel_display *display,
1695 struct intel_panel *panel)
1697 const struct bdb_mipi_config *start;
1698 const struct mipi_config *config;
1699 const struct mipi_pps_data *pps;
1700 int panel_type = panel->vbt.panel_type;
1703 /* parse MIPI blocks only if LFP type is MIPI */
1704 if (!intel_bios_is_dsi_present(display, &port))
1707 /* Initialize this to undefined indicating no generic MIPI support */
1708 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1710 start = bdb_find_section(display, BDB_MIPI_CONFIG);
1712 drm_dbg_kms(display->drm, "No MIPI config BDB found");
1716 drm_dbg_kms(display->drm, "Found MIPI Config block, panel index = %d\n",
1720 * get hold of the correct configuration block and pps data as per
1721 * the panel_type as index
1723 config = &start->config[panel_type];
1724 pps = &start->pps[panel_type];
1726 /* store as of now full data. Trim when we realise all is not needed */
1727 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1728 if (!panel->vbt.dsi.config)
1731 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1732 if (!panel->vbt.dsi.pps) {
1733 kfree(panel->vbt.dsi.config);
1737 parse_dsi_backlight_ports(display, panel, port);
1739 /* FIXME is the 90 vs. 270 correct? */
1740 switch (config->rotation) {
1741 case ENABLE_ROTATION_0:
1743 * Most (all?) VBTs claim 0 degrees despite having
1744 * an upside down panel, thus we do not trust this.
1746 panel->vbt.dsi.orientation =
1747 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1749 case ENABLE_ROTATION_90:
1750 panel->vbt.dsi.orientation =
1751 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1753 case ENABLE_ROTATION_180:
1754 panel->vbt.dsi.orientation =
1755 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1757 case ENABLE_ROTATION_270:
1758 panel->vbt.dsi.orientation =
1759 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1763 /* We have mandatory mipi config blocks. Initialize as generic panel */
1764 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1767 /* Find the sequence block and size for the given panel. */
1769 find_panel_sequence_block(struct intel_display *display,
1770 const struct bdb_mipi_sequence *sequence,
1771 u16 panel_id, u32 *seq_size)
1773 u32 total = get_blocksize(sequence);
1774 const u8 *data = &sequence->data[0];
1777 int header_size = sequence->version >= 3 ? 5 : 3;
1781 /* skip new block size */
1782 if (sequence->version >= 3)
1785 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1786 if (index + header_size > total) {
1787 drm_err(display->drm,
1788 "Invalid sequence block (header)\n");
1792 current_id = *(data + index);
1793 if (sequence->version >= 3)
1794 current_size = *((const u32 *)(data + index + 1));
1796 current_size = *((const u16 *)(data + index + 1));
1798 index += header_size;
1800 if (index + current_size > total) {
1801 drm_err(display->drm, "Invalid sequence block\n");
1805 if (current_id == panel_id) {
1806 *seq_size = current_size;
1807 return data + index;
1810 index += current_size;
1813 drm_err(display->drm,
1814 "Sequence block detected but no valid configuration\n");
1819 static int goto_next_sequence(struct intel_display *display,
1820 const u8 *data, int index, int total)
1824 /* Skip Sequence Byte. */
1825 for (index = index + 1; index < total; index += len) {
1826 u8 operation_byte = *(data + index);
1829 switch (operation_byte) {
1830 case MIPI_SEQ_ELEM_END:
1832 case MIPI_SEQ_ELEM_SEND_PKT:
1833 if (index + 4 > total)
1836 len = *((const u16 *)(data + index + 2)) + 4;
1838 case MIPI_SEQ_ELEM_DELAY:
1841 case MIPI_SEQ_ELEM_GPIO:
1844 case MIPI_SEQ_ELEM_I2C:
1845 if (index + 7 > total)
1847 len = *(data + index + 6) + 7;
1850 drm_err(display->drm, "Unknown operation byte\n");
1858 static int goto_next_sequence_v3(struct intel_display *display,
1859 const u8 *data, int index, int total)
1863 u32 size_of_sequence;
1866 * Could skip sequence based on Size of Sequence alone, but also do some
1867 * checking on the structure.
1870 drm_err(display->drm, "Too small sequence size\n");
1874 /* Skip Sequence Byte. */
1878 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1879 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1882 size_of_sequence = *((const u32 *)(data + index));
1885 seq_end = index + size_of_sequence;
1886 if (seq_end > total) {
1887 drm_err(display->drm, "Invalid sequence size\n");
1891 for (; index < total; index += len) {
1892 u8 operation_byte = *(data + index);
1895 if (operation_byte == MIPI_SEQ_ELEM_END) {
1896 if (index != seq_end) {
1897 drm_err(display->drm,
1898 "Invalid element structure\n");
1904 len = *(data + index);
1908 * FIXME: Would be nice to check elements like for v1/v2 in
1909 * goto_next_sequence() above.
1911 switch (operation_byte) {
1912 case MIPI_SEQ_ELEM_SEND_PKT:
1913 case MIPI_SEQ_ELEM_DELAY:
1914 case MIPI_SEQ_ELEM_GPIO:
1915 case MIPI_SEQ_ELEM_I2C:
1916 case MIPI_SEQ_ELEM_SPI:
1917 case MIPI_SEQ_ELEM_PMIC:
1920 drm_err(display->drm, "Unknown operation byte %u\n",
1930 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1931 * skip all delay + gpio operands and stop at the first DSI packet op.
1933 static int get_init_otp_deassert_fragment_len(struct intel_display *display,
1934 struct intel_panel *panel)
1936 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1939 if (drm_WARN_ON(display->drm,
1940 !data || panel->vbt.dsi.seq_version != 1))
1943 /* index = 1 to skip sequence byte */
1944 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1945 switch (data[index]) {
1946 case MIPI_SEQ_ELEM_SEND_PKT:
1947 return index == 1 ? 0 : index;
1948 case MIPI_SEQ_ELEM_DELAY:
1949 len = 5; /* 1 byte for operand + uint32 */
1951 case MIPI_SEQ_ELEM_GPIO:
1952 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1963 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1964 * The deassert must be done before calling intel_dsi_device_ready, so for
1965 * these devices we split the init OTP sequence into a deassert sequence and
1966 * the actual init OTP part.
1968 static void vlv_fixup_mipi_sequences(struct intel_display *display,
1969 struct intel_panel *panel)
1974 /* Limit this to v1 vid-mode sequences */
1975 if (panel->vbt.dsi.config->is_cmd_mode ||
1976 panel->vbt.dsi.seq_version != 1)
1979 /* Only do this if there are otp and assert seqs and no deassert seq */
1980 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1981 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1982 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1985 /* The deassert-sequence ends at the first DSI packet */
1986 len = get_init_otp_deassert_fragment_len(display, panel);
1990 drm_dbg_kms(display->drm,
1991 "Using init OTP fragment to deassert reset\n");
1993 /* Copy the fragment, update seq byte and terminate it */
1994 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1995 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1996 if (!panel->vbt.dsi.deassert_seq)
1998 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1999 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
2000 /* Use the copy for deassert */
2001 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
2002 panel->vbt.dsi.deassert_seq;
2003 /* Replace the last byte of the fragment with init OTP seq byte */
2004 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
2005 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
2006 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
2010 * Some machines (eg. Lenovo 82TQ) appear to have broken
2012 * - INIT_OTP is not present at all
2013 * - what should be in INIT_OTP is in DISPLAY_ON
2014 * - what should be in DISPLAY_ON is in BACKLIGHT_ON
2015 * (along with the actual backlight stuff)
2017 * To make those work we simply swap DISPLAY_ON and INIT_OTP.
2019 * TODO: Do we need to limit this to specific machines,
2020 * or examine the contents of the sequences to
2021 * avoid false positives?
2023 static void icl_fixup_mipi_sequences(struct intel_display *display,
2024 struct intel_panel *panel)
2026 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
2027 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
2028 drm_dbg_kms(display->drm,
2029 "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n");
2031 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
2032 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
2036 static void fixup_mipi_sequences(struct intel_display *display,
2037 struct intel_panel *panel)
2039 if (DISPLAY_VER(display) >= 11)
2040 icl_fixup_mipi_sequences(display, panel);
2041 else if (display->platform.valleyview)
2042 vlv_fixup_mipi_sequences(display, panel);
2046 parse_mipi_sequence(struct intel_display *display,
2047 struct intel_panel *panel)
2049 int panel_type = panel->vbt.panel_type;
2050 const struct bdb_mipi_sequence *sequence;
2056 /* Only our generic panel driver uses the sequence block. */
2057 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2060 sequence = bdb_find_section(display, BDB_MIPI_SEQUENCE);
2062 drm_dbg_kms(display->drm,
2063 "No MIPI Sequence found, parsing complete\n");
2067 /* Fail gracefully for forward incompatible sequence block. */
2068 if (sequence->version >= 4) {
2069 drm_err(display->drm,
2070 "Unable to parse MIPI Sequence Block v%u\n",
2075 drm_dbg_kms(display->drm, "Found MIPI sequence block v%u\n",
2078 seq_data = find_panel_sequence_block(display, sequence, panel_type, &seq_size);
2082 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2086 /* Parse the sequences, store pointers to each sequence. */
2088 u8 seq_id = *(data + index);
2089 if (seq_id == MIPI_SEQ_END)
2092 if (seq_id >= MIPI_SEQ_MAX) {
2093 drm_err(display->drm, "Unknown sequence %u\n",
2098 /* Log about presence of sequences we won't run. */
2099 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2100 drm_dbg_kms(display->drm,
2101 "Unsupported sequence %u\n", seq_id);
2103 panel->vbt.dsi.sequence[seq_id] = data + index;
2105 if (sequence->version >= 3)
2106 index = goto_next_sequence_v3(display, data, index, seq_size);
2108 index = goto_next_sequence(display, data, index, seq_size);
2110 drm_err(display->drm, "Invalid sequence %u\n",
2116 panel->vbt.dsi.data = data;
2117 panel->vbt.dsi.size = seq_size;
2118 panel->vbt.dsi.seq_version = sequence->version;
2120 fixup_mipi_sequences(display, panel);
2122 drm_dbg_kms(display->drm, "MIPI related VBT parsing complete\n");
2127 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2131 parse_compression_parameters(struct intel_display *display)
2133 const struct bdb_compression_parameters *params;
2134 struct intel_bios_encoder_data *devdata;
2138 if (display->vbt.version < 198)
2141 params = bdb_find_section(display, BDB_COMPRESSION_PARAMETERS);
2144 if (params->entry_size != sizeof(params->data[0])) {
2145 drm_dbg_kms(display->drm,
2146 "VBT: unsupported compression param entry size\n");
2150 block_size = get_blocksize(params);
2151 if (block_size < sizeof(*params)) {
2152 drm_dbg_kms(display->drm,
2153 "VBT: expected 16 compression param entries\n");
2158 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
2159 const struct child_device_config *child = &devdata->child;
2161 if (!child->compression_enable)
2165 drm_dbg_kms(display->drm,
2166 "VBT: compression params not available\n");
2170 if (child->compression_method_cps) {
2171 drm_dbg_kms(display->drm,
2172 "VBT: CPS compression not supported\n");
2176 index = child->compression_structure_index;
2178 devdata->dsc = kmemdup(¶ms->data[index],
2179 sizeof(*devdata->dsc), GFP_KERNEL);
2183 static u8 translate_iboost(struct intel_display *display, u8 val)
2185 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2187 if (val >= ARRAY_SIZE(mapping)) {
2188 drm_dbg_kms(display->drm,
2189 "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2192 return mapping[val];
2195 static const u8 cnp_ddc_pin_map[] = {
2197 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2198 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2199 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2200 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2203 static const u8 icp_ddc_pin_map[] = {
2204 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2205 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2206 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2207 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2208 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2209 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2210 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2211 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2212 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2215 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2216 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2217 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2218 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2219 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2222 static const u8 adls_ddc_pin_map[] = {
2223 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2224 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2225 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2226 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2227 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2230 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2231 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2232 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2233 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2236 static const u8 adlp_ddc_pin_map[] = {
2237 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2238 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2239 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2240 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2241 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2242 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2245 static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin)
2247 struct drm_i915_private *i915 = to_i915(display->drm);
2248 const u8 *ddc_pin_map;
2251 if (INTEL_PCH_TYPE(i915) >= PCH_MTL || display->platform.alderlake_p) {
2252 ddc_pin_map = adlp_ddc_pin_map;
2253 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2254 } else if (display->platform.alderlake_s) {
2255 ddc_pin_map = adls_ddc_pin_map;
2256 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2257 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2259 } else if (display->platform.rocketlake && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2260 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2261 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2262 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) {
2263 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2264 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2265 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2266 ddc_pin_map = icp_ddc_pin_map;
2267 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2268 } else if (HAS_PCH_CNP(i915)) {
2269 ddc_pin_map = cnp_ddc_pin_map;
2270 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2272 /* Assuming direct map */
2276 for (i = 0; i < n_entries; i++) {
2277 if (ddc_pin_map[i] == vbt_pin)
2281 drm_dbg_kms(display->drm,
2282 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2287 static u8 dvo_port_type(u8 dvo_port)
2290 case DVO_PORT_HDMIA:
2291 case DVO_PORT_HDMIB:
2292 case DVO_PORT_HDMIC:
2293 case DVO_PORT_HDMID:
2294 case DVO_PORT_HDMIE:
2295 case DVO_PORT_HDMIF:
2296 case DVO_PORT_HDMIG:
2297 case DVO_PORT_HDMIH:
2298 case DVO_PORT_HDMII:
2299 return DVO_PORT_HDMIA;
2309 return DVO_PORT_DPA;
2310 case DVO_PORT_MIPIA:
2311 case DVO_PORT_MIPIB:
2312 case DVO_PORT_MIPIC:
2313 case DVO_PORT_MIPID:
2314 return DVO_PORT_MIPIA;
2320 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2321 const int port_mapping[][3], u8 dvo_port)
2326 for (port = PORT_A; port < n_ports; port++) {
2327 for (i = 0; i < n_dvo; i++) {
2328 if (port_mapping[port][i] == -1)
2331 if (dvo_port == port_mapping[port][i])
2339 static enum port dvo_port_to_port(struct intel_display *display,
2343 * Each DDI port can have more than one value on the "DVO Port" field,
2344 * so look for all the possible values for each port.
2346 static const int port_mapping[][3] = {
2347 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2348 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2349 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2350 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2351 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2352 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2353 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2354 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2355 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2358 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2359 * map to DDI A,B,TC1,TC2 respectively.
2361 static const int rkl_port_mapping[][3] = {
2362 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2363 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2365 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2366 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2369 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2370 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2372 static const int adls_port_mapping[][3] = {
2373 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2376 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2377 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2378 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2379 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2381 static const int xelpd_port_mapping[][3] = {
2382 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2383 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2384 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2385 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2386 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2387 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2388 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2389 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2390 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2393 if (DISPLAY_VER(display) >= 13)
2394 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2395 ARRAY_SIZE(xelpd_port_mapping[0]),
2398 else if (display->platform.alderlake_s)
2399 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2400 ARRAY_SIZE(adls_port_mapping[0]),
2403 else if (display->platform.dg1 || display->platform.rocketlake)
2404 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2405 ARRAY_SIZE(rkl_port_mapping[0]),
2409 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2410 ARRAY_SIZE(port_mapping[0]),
2416 dsi_dvo_port_to_port(struct intel_display *display, u8 dvo_port)
2419 case DVO_PORT_MIPIA:
2421 case DVO_PORT_MIPIC:
2422 if (DISPLAY_VER(display) >= 11)
2431 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2433 struct intel_display *display = devdata->display;
2434 const struct child_device_config *child = &devdata->child;
2437 port = dvo_port_to_port(display, child->dvo_port);
2438 if (port == PORT_NONE && DISPLAY_VER(display) >= 11)
2439 port = dsi_dvo_port_to_port(display, child->dvo_port);
2444 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2446 switch (vbt_max_link_rate) {
2448 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2450 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2452 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2454 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2456 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2458 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2460 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2462 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2467 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2469 switch (vbt_max_link_rate) {
2471 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2473 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2475 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2477 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2482 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2484 if (!devdata || devdata->display->vbt.version < 216)
2487 if (devdata->display->vbt.version >= 230)
2488 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2490 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2493 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2495 if (!devdata || devdata->display->vbt.version < 244)
2498 return devdata->child.dp_max_lane_count + 1;
2501 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2504 struct intel_display *display = devdata->display;
2507 if (port != PORT_A || DISPLAY_VER(display) >= 12)
2510 if (!intel_bios_encoder_supports_dvi(devdata))
2513 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2515 drm_dbg_kms(display->drm, "VBT claims port A supports DVI%s, ignoring\n",
2516 is_hdmi ? "/HDMI" : "");
2518 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2519 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2522 static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2525 struct intel_display *display = devdata->display;
2527 if (!intel_bios_encoder_supports_dvi(devdata))
2531 * Some BDW machines (eg. HP Pavilion 15-ab) shipped
2532 * with a HSW VBT where the level shifter value goes
2533 * up to 11, whereas the BDW max is 9.
2535 if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) {
2536 drm_dbg_kms(display->drm,
2537 "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2538 port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2540 devdata->child.hdmi_level_shifter_value = 9;
2545 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2547 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2551 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2553 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2557 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2559 return intel_bios_encoder_supports_dvi(devdata) &&
2560 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2564 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2566 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2570 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2572 return intel_bios_encoder_supports_dp(devdata) &&
2573 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2577 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2579 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2583 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2585 return devdata && HAS_LSPCON(devdata->display) && devdata->child.lspcon;
2588 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2589 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2591 if (!devdata || devdata->display->vbt.version < 158 ||
2592 DISPLAY_VER(devdata->display) >= 14)
2595 return devdata->child.hdmi_level_shifter_value;
2598 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2600 if (!devdata || devdata->display->vbt.version < 204)
2603 switch (devdata->child.hdmi_max_data_rate) {
2605 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2607 case HDMI_MAX_DATA_RATE_PLATFORM:
2609 case HDMI_MAX_DATA_RATE_594:
2611 case HDMI_MAX_DATA_RATE_340:
2613 case HDMI_MAX_DATA_RATE_300:
2615 case HDMI_MAX_DATA_RATE_297:
2617 case HDMI_MAX_DATA_RATE_165:
2622 static bool is_port_valid(struct intel_display *display, enum port port)
2625 * On some ICL SKUs port F is not present, but broken VBTs mark
2626 * the port as present. Only try to initialize port F for the
2627 * SKUs that may actually have it.
2629 if (port == PORT_F && display->platform.icelake)
2630 return display->platform.icelake_port_f;
2635 static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2637 struct intel_display *display = devdata->display;
2638 const struct child_device_config *child = &devdata->child;
2639 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2640 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2643 port = intel_bios_encoder_port(devdata);
2644 if (port == PORT_NONE)
2647 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2648 is_dp = intel_bios_encoder_supports_dp(devdata);
2649 is_crt = intel_bios_encoder_supports_crt(devdata);
2650 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2651 is_edp = intel_bios_encoder_supports_edp(devdata);
2652 is_dsi = intel_bios_encoder_supports_dsi(devdata);
2654 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2655 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2657 drm_dbg_kms(display->drm,
2658 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2659 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2660 intel_bios_encoder_supports_dp_dual_mode(devdata),
2661 intel_bios_encoder_is_lspcon(devdata),
2662 supports_typec_usb, supports_tbt,
2663 devdata->dsc != NULL);
2665 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2666 if (hdmi_level_shift >= 0) {
2667 drm_dbg_kms(display->drm,
2668 "Port %c VBT HDMI level shift: %d\n",
2669 port_name(port), hdmi_level_shift);
2672 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2674 drm_dbg_kms(display->drm,
2675 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2676 port_name(port), max_tmds_clock);
2678 /* I_boost config for SKL and above */
2679 dp_boost_level = intel_bios_dp_boost_level(devdata);
2681 drm_dbg_kms(display->drm,
2682 "Port %c VBT (e)DP boost level: %d\n",
2683 port_name(port), dp_boost_level);
2685 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2686 if (hdmi_boost_level)
2687 drm_dbg_kms(display->drm,
2688 "Port %c VBT HDMI boost level: %d\n",
2689 port_name(port), hdmi_boost_level);
2691 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2692 if (dp_max_link_rate)
2693 drm_dbg_kms(display->drm,
2694 "Port %c VBT DP max link rate: %d\n",
2695 port_name(port), dp_max_link_rate);
2698 * FIXME need to implement support for VBT
2699 * vswing/preemph tables should this ever trigger.
2701 drm_WARN(display->drm, child->use_vbt_vswing,
2702 "Port %c asks to use VBT vswing/preemph tables\n",
2706 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2708 struct intel_display *display = devdata->display;
2711 port = intel_bios_encoder_port(devdata);
2712 if (port == PORT_NONE)
2715 if (!is_port_valid(display, port)) {
2716 drm_dbg_kms(display->drm,
2717 "VBT reports port %c as supported, but that can't be true: skipping\n",
2722 sanitize_device_type(devdata, port);
2723 sanitize_hdmi_level_shift(devdata, port);
2726 static bool has_ddi_port_info(struct intel_display *display)
2728 return DISPLAY_VER(display) >= 5 || display->platform.g4x;
2731 static void parse_ddi_ports(struct intel_display *display)
2733 struct intel_bios_encoder_data *devdata;
2735 if (!has_ddi_port_info(display))
2738 list_for_each_entry(devdata, &display->vbt.display_devices, node)
2739 parse_ddi_port(devdata);
2741 list_for_each_entry(devdata, &display->vbt.display_devices, node)
2742 print_ddi_port(devdata);
2745 static int child_device_expected_size(u16 version)
2747 BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
2751 else if (version >= 256)
2753 else if (version >= 216)
2755 else if (version >= 196)
2757 else if (version >= 195)
2759 else if (version >= 111)
2760 return LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2761 else if (version >= 106)
2767 static bool child_device_size_valid(struct intel_display *display, int size)
2771 expected_size = child_device_expected_size(display->vbt.version);
2772 if (expected_size < 0) {
2773 expected_size = sizeof(struct child_device_config);
2774 drm_dbg_kms(display->drm,
2775 "Expected child device config size for VBT version %u not known; assuming %d\n",
2776 display->vbt.version, expected_size);
2779 /* Flag an error for unexpected size, but continue anyway. */
2780 if (size != expected_size)
2781 drm_err(display->drm,
2782 "Unexpected child device config size %d (expected %d for VBT version %u)\n",
2783 size, expected_size, display->vbt.version);
2785 /* The legacy sized child device config is the minimum we need. */
2786 if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2787 drm_dbg_kms(display->drm,
2788 "Child device config size %d is too small.\n",
2797 parse_general_definitions(struct intel_display *display)
2799 const struct bdb_general_definitions *defs;
2800 struct intel_bios_encoder_data *devdata;
2801 const struct child_device_config *child;
2802 int i, child_device_num;
2806 defs = bdb_find_section(display, BDB_GENERAL_DEFINITIONS);
2808 drm_dbg_kms(display->drm,
2809 "No general definition block is found, no devices defined.\n");
2813 block_size = get_blocksize(defs);
2814 if (block_size < sizeof(*defs)) {
2815 drm_dbg_kms(display->drm,
2816 "General definitions block too small (%u)\n",
2821 bus_pin = defs->crt_ddc_gmbus_pin;
2822 drm_dbg_kms(display->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2823 if (intel_gmbus_is_valid_pin(display, bus_pin))
2824 display->vbt.crt_ddc_pin = bus_pin;
2826 if (!child_device_size_valid(display, defs->child_dev_size))
2829 /* get the number of child device */
2830 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2832 for (i = 0; i < child_device_num; i++) {
2833 child = child_device_ptr(defs, i);
2834 if (!child->device_type)
2837 drm_dbg_kms(display->drm,
2838 "Found VBT child device with type 0x%x\n",
2839 child->device_type);
2841 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2845 devdata->display = display;
2848 * Copy as much as we know (sizeof) and is available
2849 * (child_dev_size) of the child device config. Accessing the
2850 * data must depend on VBT version.
2852 memcpy(&devdata->child, child,
2853 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2855 list_add_tail(&devdata->node, &display->vbt.display_devices);
2858 if (list_empty(&display->vbt.display_devices))
2859 drm_dbg_kms(display->drm,
2860 "no child dev is parsed from VBT\n");
2863 /* Common defaults which may be overridden by VBT. */
2865 init_vbt_defaults(struct intel_display *display)
2867 struct drm_i915_private *i915 = to_i915(display->drm);
2869 display->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2871 /* general features */
2872 display->vbt.int_tv_support = 1;
2873 display->vbt.int_crt_support = 1;
2875 /* driver features */
2876 display->vbt.int_lvds_support = 1;
2878 /* Default to using SSC */
2879 display->vbt.lvds_use_ssc = 1;
2881 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2884 display->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(display,
2885 !HAS_PCH_SPLIT(i915));
2886 drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n",
2887 display->vbt.lvds_ssc_freq);
2890 /* Common defaults which may be overridden by VBT. */
2892 init_vbt_panel_defaults(struct intel_panel *panel)
2894 /* Default to having backlight */
2895 panel->vbt.backlight.present = true;
2897 /* LFP panel data */
2898 panel->vbt.lvds_dither = true;
2901 /* Defaults to initialize only if there is no VBT. */
2903 init_vbt_missing_defaults(struct intel_display *display)
2905 struct drm_i915_private *i915 = to_i915(display->drm);
2906 unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask;
2909 if (!HAS_DDI(display) && !display->platform.cherryview)
2912 for_each_port_masked(port, ports) {
2913 struct intel_bios_encoder_data *devdata;
2914 struct child_device_config *child;
2915 enum phy phy = intel_port_to_phy(i915, port);
2918 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2921 if (intel_phy_is_tc(i915, phy))
2924 /* Create fake child device config */
2925 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2929 devdata->display = display;
2930 child = &devdata->child;
2933 child->dvo_port = DVO_PORT_HDMIF;
2934 else if (port == PORT_E)
2935 child->dvo_port = DVO_PORT_HDMIE;
2937 child->dvo_port = DVO_PORT_HDMIA + port;
2939 if (port != PORT_A && port != PORT_E)
2940 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2943 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2946 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2948 list_add_tail(&devdata->node, &display->vbt.display_devices);
2950 drm_dbg_kms(display->drm,
2951 "Generating default VBT child device with type 0x%04x on port %c\n",
2952 child->device_type, port_name(port));
2955 /* Bypass some minimum baseline VBT version checks */
2956 display->vbt.version = 155;
2959 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2961 const void *_vbt = vbt;
2963 return _vbt + vbt->bdb_offset;
2966 static const char vbt_signature[] = "$VBT";
2967 static const int vbt_signature_len = 4;
2970 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2971 * @display: display device
2972 * @buf: pointer to a buffer to validate
2973 * @size: size of the buffer
2975 * Returns true on valid VBT.
2977 bool intel_bios_is_valid_vbt(struct intel_display *display,
2978 const void *buf, size_t size)
2980 const struct vbt_header *vbt = buf;
2981 const struct bdb_header *bdb;
2986 if (sizeof(struct vbt_header) > size) {
2987 drm_dbg_kms(display->drm, "VBT header incomplete\n");
2991 if (memcmp(vbt->signature, vbt_signature, vbt_signature_len)) {
2992 drm_dbg_kms(display->drm, "VBT invalid signature\n");
2996 if (vbt->vbt_size > size) {
2997 drm_dbg_kms(display->drm,
2998 "VBT incomplete (vbt_size overflows)\n");
3002 size = vbt->vbt_size;
3004 if (range_overflows_t(size_t,
3006 sizeof(struct bdb_header),
3008 drm_dbg_kms(display->drm, "BDB header incomplete\n");
3012 bdb = get_bdb_header(vbt);
3013 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3014 drm_dbg_kms(display->drm, "BDB incomplete\n");
3021 static struct vbt_header *firmware_get_vbt(struct intel_display *display,
3024 struct vbt_header *vbt = NULL;
3025 const struct firmware *fw = NULL;
3026 const char *name = display->params.vbt_firmware;
3029 if (!name || !*name)
3032 ret = request_firmware(&fw, name, display->drm->dev);
3034 drm_err(display->drm,
3035 "Requesting VBT firmware \"%s\" failed (%d)\n",
3040 if (intel_bios_is_valid_vbt(display, fw->data, fw->size)) {
3041 vbt = kmemdup(fw->data, fw->size, GFP_KERNEL);
3043 drm_dbg_kms(display->drm,
3044 "Found valid VBT firmware \"%s\"\n", name);
3049 drm_dbg_kms(display->drm, "Invalid VBT firmware \"%s\"\n",
3053 release_firmware(fw);
3058 static struct vbt_header *oprom_get_vbt(struct intel_display *display,
3059 struct intel_rom *rom,
3060 size_t *size, const char *type)
3062 struct vbt_header *vbt;
3069 BUILD_BUG_ON(vbt_signature_len != sizeof(vbt_signature) - 1);
3070 BUILD_BUG_ON(vbt_signature_len != sizeof(u32));
3072 offset = intel_rom_find(rom, *(const u32 *)vbt_signature);
3076 if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) {
3077 drm_dbg_kms(display->drm, "VBT header incomplete\n");
3081 BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16));
3083 vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size));
3084 if (vbt_size > intel_rom_size(rom) - offset) {
3085 drm_dbg_kms(display->drm, "VBT incomplete (vbt_size overflows)\n");
3089 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3093 intel_rom_read_block(rom, vbt, offset, vbt_size);
3095 if (!intel_bios_is_valid_vbt(display, vbt, vbt_size))
3098 drm_dbg_kms(display->drm, "Found valid VBT in %s\n", type);
3103 intel_rom_free(rom);
3110 intel_rom_free(rom);
3114 static const struct vbt_header *intel_bios_get_vbt(struct intel_display *display,
3117 struct drm_i915_private *i915 = to_i915(display->drm);
3118 const struct vbt_header *vbt = NULL;
3119 intel_wakeref_t wakeref;
3121 vbt = firmware_get_vbt(display, sizep);
3124 vbt = intel_opregion_get_vbt(display, sizep);
3127 * If the OpRegion does not have VBT, look in SPI flash
3128 * through MMIO or PCI mapping
3130 if (!vbt && IS_DGFX(i915))
3131 with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3132 vbt = oprom_get_vbt(display, intel_rom_spi(i915), sizep, "SPI flash");
3135 with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3136 vbt = oprom_get_vbt(display, intel_rom_pci(i915), sizep, "PCI ROM");
3142 * intel_bios_init - find VBT and initialize settings from the BIOS
3143 * @display: display device instance
3145 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3146 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3147 * initialize some defaults if the VBT is not present at all.
3149 void intel_bios_init(struct intel_display *display)
3151 const struct vbt_header *vbt;
3152 const struct bdb_header *bdb;
3154 INIT_LIST_HEAD(&display->vbt.display_devices);
3155 INIT_LIST_HEAD(&display->vbt.bdb_blocks);
3157 if (!HAS_DISPLAY(display)) {
3158 drm_dbg_kms(display->drm,
3159 "Skipping VBT init due to disabled display.\n");
3163 init_vbt_defaults(display);
3165 vbt = intel_bios_get_vbt(display, NULL);
3170 bdb = get_bdb_header(vbt);
3171 display->vbt.version = bdb->version;
3173 drm_dbg_kms(display->drm,
3174 "VBT signature \"%.*s\", BDB version %d\n",
3175 (int)sizeof(vbt->signature), vbt->signature,
3176 display->vbt.version);
3178 init_bdb_blocks(display, bdb);
3180 /* Grab useful general definitions */
3181 parse_general_features(display);
3182 parse_general_definitions(display);
3183 parse_driver_features(display);
3185 /* Depends on child device list */
3186 parse_compression_parameters(display);
3190 drm_info(display->drm,
3191 "Failed to find VBIOS tables (VBT)\n");
3192 init_vbt_missing_defaults(display);
3195 /* Further processing on pre-parsed or generated child device data */
3196 parse_sdvo_device_mapping(display);
3197 parse_ddi_ports(display);
3202 static void intel_bios_init_panel(struct intel_display *display,
3203 struct intel_panel *panel,
3204 const struct intel_bios_encoder_data *devdata,
3205 const struct drm_edid *drm_edid,
3208 /* already have it? */
3209 if (panel->vbt.panel_type >= 0) {
3210 drm_WARN_ON(display->drm, !use_fallback);
3214 panel->vbt.panel_type = get_panel_type(display, devdata,
3215 drm_edid, use_fallback);
3216 if (panel->vbt.panel_type < 0) {
3217 drm_WARN_ON(display->drm, use_fallback);
3221 init_vbt_panel_defaults(panel);
3223 parse_panel_options(display, panel);
3224 parse_generic_dtd(display, panel);
3225 parse_lfp_data(display, panel);
3226 parse_lfp_backlight(display, panel);
3227 parse_sdvo_lvds_data(display, panel);
3228 parse_panel_driver_features(display, panel);
3229 parse_power_conservation_features(display, panel);
3230 parse_edp(display, panel);
3231 parse_psr(display, panel);
3232 parse_mipi_config(display, panel);
3233 parse_mipi_sequence(display, panel);
3236 void intel_bios_init_panel_early(struct intel_display *display,
3237 struct intel_panel *panel,
3238 const struct intel_bios_encoder_data *devdata)
3240 intel_bios_init_panel(display, panel, devdata, NULL, false);
3243 void intel_bios_init_panel_late(struct intel_display *display,
3244 struct intel_panel *panel,
3245 const struct intel_bios_encoder_data *devdata,
3246 const struct drm_edid *drm_edid)
3248 intel_bios_init_panel(display, panel, devdata, drm_edid, true);
3252 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3253 * @display: display device instance
3255 void intel_bios_driver_remove(struct intel_display *display)
3257 struct intel_bios_encoder_data *devdata, *nd;
3258 struct bdb_block_entry *entry, *ne;
3260 list_for_each_entry_safe(devdata, nd, &display->vbt.display_devices,
3262 list_del(&devdata->node);
3263 kfree(devdata->dsc);
3267 list_for_each_entry_safe(entry, ne, &display->vbt.bdb_blocks, node) {
3268 list_del(&entry->node);
3273 void intel_bios_fini_panel(struct intel_panel *panel)
3275 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3276 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3277 kfree(panel->vbt.lfp_vbt_mode);
3278 panel->vbt.lfp_vbt_mode = NULL;
3279 kfree(panel->vbt.dsi.data);
3280 panel->vbt.dsi.data = NULL;
3281 kfree(panel->vbt.dsi.pps);
3282 panel->vbt.dsi.pps = NULL;
3283 kfree(panel->vbt.dsi.config);
3284 panel->vbt.dsi.config = NULL;
3285 kfree(panel->vbt.dsi.deassert_seq);
3286 panel->vbt.dsi.deassert_seq = NULL;
3290 * intel_bios_is_tv_present - is integrated TV present in VBT
3291 * @display: display device instance
3293 * Return true if TV is present. If no child devices were parsed from VBT,
3294 * assume TV is present.
3296 bool intel_bios_is_tv_present(struct intel_display *display)
3298 const struct intel_bios_encoder_data *devdata;
3300 if (!display->vbt.int_tv_support)
3303 if (list_empty(&display->vbt.display_devices))
3306 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3307 const struct child_device_config *child = &devdata->child;
3310 * If the device type is not TV, continue.
3312 switch (child->device_type) {
3313 case DEVICE_TYPE_INT_TV:
3314 case DEVICE_TYPE_TV:
3315 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3320 /* Only when the addin_offset is non-zero, it is regarded
3323 if (child->addin_offset)
3331 * intel_bios_is_lvds_present - is LVDS present in VBT
3332 * @display: display device instance
3333 * @i2c_pin: i2c pin for LVDS if present
3335 * Return true if LVDS is present. If no child devices were parsed from VBT,
3336 * assume LVDS is present.
3338 bool intel_bios_is_lvds_present(struct intel_display *display, u8 *i2c_pin)
3340 const struct intel_bios_encoder_data *devdata;
3342 if (list_empty(&display->vbt.display_devices))
3345 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3346 const struct child_device_config *child = &devdata->child;
3348 /* If the device type is not LFP, continue.
3349 * We have to check both the new identifiers as well as the
3350 * old for compatibility with some BIOSes.
3352 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3353 child->device_type != DEVICE_TYPE_LFP)
3356 if (intel_gmbus_is_valid_pin(display, child->i2c_pin))
3357 *i2c_pin = child->i2c_pin;
3359 /* However, we cannot trust the BIOS writers to populate
3360 * the VBT correctly. Since LVDS requires additional
3361 * information from AIM blocks, a non-zero addin offset is
3362 * a good indicator that the LVDS is actually present.
3364 if (child->addin_offset)
3367 /* But even then some BIOS writers perform some black magic
3368 * and instantiate the device without reference to any
3369 * additional data. Trust that if the VBT was written into
3370 * the OpRegion then they have validated the LVDS's existence.
3372 return intel_opregion_vbt_present(display);
3379 * intel_bios_is_port_present - is the specified digital port present
3380 * @display: display device instance
3381 * @port: port to check
3383 * Return true if the device in %port is present.
3385 bool intel_bios_is_port_present(struct intel_display *display, enum port port)
3387 const struct intel_bios_encoder_data *devdata;
3389 if (WARN_ON(!has_ddi_port_info(display)))
3392 if (!is_port_valid(display, port))
3395 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3396 const struct child_device_config *child = &devdata->child;
3398 if (dvo_port_to_port(display, child->dvo_port) == port)
3405 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3407 const struct child_device_config *child = &devdata->child;
3412 if (!intel_bios_encoder_supports_dp(devdata) ||
3413 !intel_bios_encoder_supports_hdmi(devdata))
3416 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3419 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3420 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3421 child->aux_channel != 0)
3428 * intel_bios_is_dsi_present - is DSI present in VBT
3429 * @display: display device instance
3430 * @port: port for DSI if present
3432 * Return true if DSI is present, and return the port in %port.
3434 bool intel_bios_is_dsi_present(struct intel_display *display,
3437 const struct intel_bios_encoder_data *devdata;
3439 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3440 const struct child_device_config *child = &devdata->child;
3441 u8 dvo_port = child->dvo_port;
3443 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3446 if (dsi_dvo_port_to_port(display, dvo_port) == PORT_NONE) {
3447 drm_dbg_kms(display->drm,
3448 "VBT has unsupported DSI port %c\n",
3449 port_name(dvo_port - DVO_PORT_MIPIA));
3454 *port = dsi_dvo_port_to_port(display, dvo_port);
3461 static void fill_dsc(struct intel_crtc_state *crtc_state,
3462 struct dsc_compression_parameters_entry *dsc,
3465 struct intel_display *display = to_intel_display(crtc_state);
3466 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3469 vdsc_cfg->dsc_version_major = dsc->version_major;
3470 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3472 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3474 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3476 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3479 drm_dbg_kms(display->drm, "VBT: Unsupported BPC %d for DCS\n",
3482 crtc_state->pipe_bpp = bpc * 3;
3484 crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp,
3485 VBT_DSC_MAX_BPP(dsc->max_bpp)));
3488 * FIXME: This is ugly, and slice count should take DSC engine
3489 * throughput etc. into account.
3491 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3493 if (dsc->slices_per_line & BIT(2)) {
3494 crtc_state->dsc.slice_count = 4;
3495 } else if (dsc->slices_per_line & BIT(1)) {
3496 crtc_state->dsc.slice_count = 2;
3499 if (!(dsc->slices_per_line & BIT(0)))
3500 drm_dbg_kms(display->drm,
3501 "VBT: Unsupported DSC slice count for DSI\n");
3503 crtc_state->dsc.slice_count = 1;
3506 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3507 crtc_state->dsc.slice_count != 0)
3508 drm_dbg_kms(display->drm,
3509 "VBT: DSC hdisplay %d not divisible by slice count %d\n",
3510 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3511 crtc_state->dsc.slice_count);
3514 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3515 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3517 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3518 dsc->rc_buffer_size);
3520 /* FIXME: DSI spec says bpc + 1 for this one */
3521 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3523 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3525 vdsc_cfg->slice_height = dsc->slice_height;
3528 /* FIXME: initially DSI specific */
3529 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3530 struct intel_crtc_state *crtc_state,
3533 struct intel_display *display = to_intel_display(encoder);
3534 const struct intel_bios_encoder_data *devdata;
3536 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3537 const struct child_device_config *child = &devdata->child;
3539 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3542 if (dsi_dvo_port_to_port(display, child->dvo_port) == encoder->port) {
3546 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3555 static const u8 adlp_aux_ch_map[] = {
3556 [AUX_CH_A] = DP_AUX_A,
3557 [AUX_CH_B] = DP_AUX_B,
3558 [AUX_CH_C] = DP_AUX_C,
3559 [AUX_CH_D_XELPD] = DP_AUX_D,
3560 [AUX_CH_E_XELPD] = DP_AUX_E,
3561 [AUX_CH_USBC1] = DP_AUX_F,
3562 [AUX_CH_USBC2] = DP_AUX_G,
3563 [AUX_CH_USBC3] = DP_AUX_H,
3564 [AUX_CH_USBC4] = DP_AUX_I,
3568 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3569 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3571 static const u8 adls_aux_ch_map[] = {
3572 [AUX_CH_A] = DP_AUX_A,
3573 [AUX_CH_USBC1] = DP_AUX_B,
3574 [AUX_CH_USBC2] = DP_AUX_C,
3575 [AUX_CH_USBC3] = DP_AUX_D,
3576 [AUX_CH_USBC4] = DP_AUX_E,
3580 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3581 * map to DDI A,B,TC1,TC2 respectively.
3583 static const u8 rkl_aux_ch_map[] = {
3584 [AUX_CH_A] = DP_AUX_A,
3585 [AUX_CH_B] = DP_AUX_B,
3586 [AUX_CH_USBC1] = DP_AUX_C,
3587 [AUX_CH_USBC2] = DP_AUX_D,
3590 static const u8 direct_aux_ch_map[] = {
3591 [AUX_CH_A] = DP_AUX_A,
3592 [AUX_CH_B] = DP_AUX_B,
3593 [AUX_CH_C] = DP_AUX_C,
3594 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3595 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3596 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3597 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3598 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3599 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3602 static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel)
3604 const u8 *aux_ch_map;
3607 if (DISPLAY_VER(display) >= 13) {
3608 aux_ch_map = adlp_aux_ch_map;
3609 n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3610 } else if (display->platform.alderlake_s) {
3611 aux_ch_map = adls_aux_ch_map;
3612 n_entries = ARRAY_SIZE(adls_aux_ch_map);
3613 } else if (display->platform.dg1 || display->platform.rocketlake) {
3614 aux_ch_map = rkl_aux_ch_map;
3615 n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3617 aux_ch_map = direct_aux_ch_map;
3618 n_entries = ARRAY_SIZE(direct_aux_ch_map);
3621 for (i = 0; i < n_entries; i++) {
3622 if (aux_ch_map[i] == aux_channel)
3626 drm_dbg_kms(display->drm,
3627 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3633 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3635 if (!devdata || !devdata->child.aux_channel)
3638 return map_aux_ch(devdata->display, devdata->child.aux_channel);
3641 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3643 struct intel_display *display;
3647 if (!devdata || !devdata->child.aux_channel)
3650 display = devdata->display;
3651 aux_channel = devdata->child.aux_channel;
3653 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3654 if (intel_bios_encoder_supports_dp(devdata) &&
3655 aux_channel == devdata->child.aux_channel)
3662 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3664 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost)
3667 return translate_iboost(devdata->display, devdata->child.dp_iboost_level);
3670 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3672 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost)
3675 return translate_iboost(devdata->display, devdata->child.hdmi_iboost_level);
3678 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3680 if (!devdata || !devdata->child.ddc_pin)
3683 return map_ddc_pin(devdata->display, devdata->child.ddc_pin);
3686 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3688 return devdata->display->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3691 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3693 return devdata->display->vbt.version >= 209 && devdata->child.tbt;
3696 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3698 return devdata && devdata->child.lane_reversal;
3701 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3703 return devdata && devdata->child.hpd_invert;
3706 const struct intel_bios_encoder_data *
3707 intel_bios_encoder_data_lookup(struct intel_display *display, enum port port)
3709 struct intel_bios_encoder_data *devdata;
3711 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3712 if (intel_bios_encoder_port(devdata) == port)
3719 void intel_bios_for_each_encoder(struct intel_display *display,
3720 void (*func)(struct intel_display *display,
3721 const struct intel_bios_encoder_data *devdata))
3723 struct intel_bios_encoder_data *devdata;
3725 list_for_each_entry(devdata, &display->vbt.display_devices, node)
3726 func(display, devdata);
3729 static int intel_bios_vbt_show(struct seq_file *m, void *unused)
3731 struct intel_display *display = m->private;
3735 vbt = intel_bios_get_vbt(display, &vbt_size);
3738 seq_write(m, vbt, vbt_size);
3745 DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt);
3747 void intel_bios_debugfs_register(struct intel_display *display)
3749 struct drm_minor *minor = display->drm->primary;
3751 debugfs_create_file("i915_vbt", 0444, minor->debugfs_root,
3752 display, &intel_bios_vbt_fops);