drivers/gpu/drm/virtio/virtgpu_ioctl.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Authors:
   6  *    Dave Airlie
   7  *    Alon Levy
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include <linux/file.h>
  29 #include <linux/sync_file.h>
  30
  31 #include <drm/drm_file.h>
  32 #include <drm/virtgpu_drm.h>
  33
  34 #include "virtgpu_drv.h"
  35
  36 static void convert_to_hw_box(struct virtio_gpu_box *dst,
  37                               const struct drm_virtgpu_3d_box *src)
  38 {
  39         dst->x = cpu_to_le32(src->x);
  40         dst->y = cpu_to_le32(src->y);
  41         dst->z = cpu_to_le32(src->z);
  42         dst->w = cpu_to_le32(src->w);
  43         dst->h = cpu_to_le32(src->h);
  44         dst->d = cpu_to_le32(src->d);
  45 }
  46
  47 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
  48                                 struct drm_file *file_priv)
  49 {
  50         struct virtio_gpu_device *vgdev = dev->dev_private;
  51         struct drm_virtgpu_map *virtio_gpu_map = data;
  52
  53         return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
  54                                          virtio_gpu_map->handle,
  55                                          &virtio_gpu_map->offset);
  56 }
  57
  58 /*
  59  * Usage of execbuffer:
  60  * Relocations need to take into account the full VIRTIO_GPUDrawable size.
  61  * However, the command as passed from user space must *not* contain the initial
  62  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
  63  */
  64 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
  65                                  struct drm_file *drm_file)
  66 {
  67         struct drm_virtgpu_execbuffer *exbuf = data;
  68         struct virtio_gpu_device *vgdev = dev->dev_private;
  69         struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
  70         struct virtio_gpu_fence *out_fence;
  71         int ret;
  72         uint32_t *bo_handles = NULL;
  73         void __user *user_bo_handles = NULL;
  74         struct virtio_gpu_object_array *buflist = NULL;
  75         struct sync_file *sync_file;
  76         int in_fence_fd = exbuf->fence_fd;
  77         int out_fence_fd = -1;
  78         void *buf;
  79
  80         if (vgdev->has_virgl_3d == false)
  81                 return -ENOSYS;
  82
  83         if ((exbuf->flags & ~VIRTGPU_EXECBUF_FLAGS))
  84                 return -EINVAL;
  85
  86         exbuf->fence_fd = -1;
  87
  88         if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) {
  89                 struct dma_fence *in_fence;
  90
  91                 in_fence = sync_file_get_fence(in_fence_fd);
  92
  93                 if (!in_fence)
  94                         return -EINVAL;
  95
  96                 /*
  97                  * Wait if the fence is from a foreign context, or if the fence
  98                  * array contains any fence from a foreign context.
  99                  */
 100                 ret = 0;
 101                 if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context))
 102                         ret = dma_fence_wait(in_fence, true);
 103
 104                 dma_fence_put(in_fence);
 105                 if (ret)
 106                         return ret;
 107         }
 108
 109         if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_OUT) {
 110                 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
 111                 if (out_fence_fd < 0)
 112                         return out_fence_fd;
 113         }
 114
 115         if (exbuf->num_bo_handles) {
 116                 bo_handles = kvmalloc_array(exbuf->num_bo_handles,
 117                                             sizeof(uint32_t), GFP_KERNEL);
 118                 if (!bo_handles) {
 119                         ret = -ENOMEM;
 120                         goto out_unused_fd;
 121                 }
 122
 123                 user_bo_handles = u64_to_user_ptr(exbuf->bo_handles);
 124                 if (copy_from_user(bo_handles, user_bo_handles,
 125                                    exbuf->num_bo_handles * sizeof(uint32_t))) {
 126                         ret = -EFAULT;
 127                         goto out_unused_fd;
 128                 }
 129
 130                 buflist = virtio_gpu_array_from_handles(drm_file, bo_handles,
 131                                                         exbuf->num_bo_handles);
 132                 if (!buflist) {
 133                         ret = -ENOENT;
 134                         goto out_unused_fd;
 135                 }
 136                 kvfree(bo_handles);
 137                 bo_handles = NULL;
 138         }
 139
 140         if (buflist) {
 141                 ret = virtio_gpu_array_lock_resv(buflist);
 142                 if (ret)
 143                         goto out_unused_fd;
 144         }
 145
 146         buf = vmemdup_user(u64_to_user_ptr(exbuf->command), exbuf->size);
 147         if (IS_ERR(buf)) {
 148                 ret = PTR_ERR(buf);
 149                 goto out_unresv;
 150         }
 151
 152         out_fence = virtio_gpu_fence_alloc(vgdev);
 153         if(!out_fence) {
 154                 ret = -ENOMEM;
 155                 goto out_memdup;
 156         }
 157
 158         if (out_fence_fd >= 0) {
 159                 sync_file = sync_file_create(&out_fence->f);
 160                 if (!sync_file) {
 161                         dma_fence_put(&out_fence->f);
 162                         ret = -ENOMEM;
 163                         goto out_memdup;
 164                 }
 165
 166                 exbuf->fence_fd = out_fence_fd;
 167                 fd_install(out_fence_fd, sync_file->file);
 168         }
 169
 170         virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
 171                               vfpriv->ctx_id, buflist, out_fence);
 172         return 0;
 173
 174 out_memdup:
 175         kvfree(buf);
 176 out_unresv:
 177         if (buflist)
 178                 virtio_gpu_array_unlock_resv(buflist);
 179 out_unused_fd:
 180         kvfree(bo_handles);
 181         if (buflist)
 182                 virtio_gpu_array_put_free(buflist);
 183
 184         if (out_fence_fd >= 0)
 185                 put_unused_fd(out_fence_fd);
 186
 187         return ret;
 188 }
 189
 190 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 191                                      struct drm_file *file_priv)
 192 {
 193         struct virtio_gpu_device *vgdev = dev->dev_private;
 194         struct drm_virtgpu_getparam *param = data;
 195         int value;
 196
 197         switch (param->param) {
 198         case VIRTGPU_PARAM_3D_FEATURES:
 199                 value = vgdev->has_virgl_3d == true ? 1 : 0;
 200                 break;
 201         case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
 202                 value = 1;
 203                 break;
 204         default:
 205                 return -EINVAL;
 206         }
 207         if (copy_to_user(u64_to_user_ptr(param->value), &value, sizeof(int)))
 208                 return -EFAULT;
 209
 210         return 0;
 211 }
 212
 213 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
 214                                             struct drm_file *file_priv)
 215 {
 216         struct virtio_gpu_device *vgdev = dev->dev_private;
 217         struct drm_virtgpu_resource_create *rc = data;
 218         struct virtio_gpu_fence *fence;
 219         int ret;
 220         struct virtio_gpu_object *qobj;
 221         struct drm_gem_object *obj;
 222         uint32_t handle = 0;
 223         struct virtio_gpu_object_params params = { 0 };
 224
 225         if (vgdev->has_virgl_3d == false) {
 226                 if (rc->depth > 1)
 227                         return -EINVAL;
 228                 if (rc->nr_samples > 1)
 229                         return -EINVAL;
 230                 if (rc->last_level > 1)
 231                         return -EINVAL;
 232                 if (rc->target != 2)
 233                         return -EINVAL;
 234                 if (rc->array_size > 1)
 235                         return -EINVAL;
 236         }
 237
 238         params.format = rc->format;
 239         params.width = rc->width;
 240         params.height = rc->height;
 241         params.size = rc->size;
 242         if (vgdev->has_virgl_3d) {
 243                 params.virgl = true;
 244                 params.target = rc->target;
 245                 params.bind = rc->bind;
 246                 params.depth = rc->depth;
 247                 params.array_size = rc->array_size;
 248                 params.last_level = rc->last_level;
 249                 params.nr_samples = rc->nr_samples;
 250                 params.flags = rc->flags;
 251         }
 252         /* allocate a single page size object */
 253         if (params.size == 0)
 254                 params.size = PAGE_SIZE;
 255
 256         fence = virtio_gpu_fence_alloc(vgdev);
 257         if (!fence)
 258                 return -ENOMEM;
 259         ret = virtio_gpu_object_create(vgdev, &params, &qobj, fence);
 260         dma_fence_put(&fence->f);
 261         if (ret < 0)
 262                 return ret;
 263         obj = &qobj->base.base;
 264
 265         ret = drm_gem_handle_create(file_priv, obj, &handle);
 266         if (ret) {
 267                 drm_gem_object_release(obj);
 268                 return ret;
 269         }
 270         drm_gem_object_put_unlocked(obj);
 271
 272         rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */
 273         rc->bo_handle = handle;
 274         return 0;
 275 }
 276
 277 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
 278                                           struct drm_file *file_priv)
 279 {
 280         struct drm_virtgpu_resource_info *ri = data;
 281         struct drm_gem_object *gobj = NULL;
 282         struct virtio_gpu_object *qobj = NULL;
 283
 284         gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
 285         if (gobj == NULL)
 286                 return -ENOENT;
 287
 288         qobj = gem_to_virtio_gpu_obj(gobj);
 289
 290         ri->size = qobj->base.base.size;
 291         ri->res_handle = qobj->hw_res_handle;
 292         drm_gem_object_put_unlocked(gobj);
 293         return 0;
 294 }
 295
 296 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
 297                                                void *data,
 298                                                struct drm_file *file)
 299 {
 300         struct virtio_gpu_device *vgdev = dev->dev_private;
 301         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 302         struct drm_virtgpu_3d_transfer_from_host *args = data;
 303         struct virtio_gpu_object_array *objs;
 304         struct virtio_gpu_fence *fence;
 305         int ret;
 306         u32 offset = args->offset;
 307         struct virtio_gpu_box box;
 308
 309         if (vgdev->has_virgl_3d == false)
 310                 return -ENOSYS;
 311
 312         objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
 313         if (objs == NULL)
 314                 return -ENOENT;
 315
 316         ret = virtio_gpu_array_lock_resv(objs);
 317         if (ret != 0)
 318                 goto err_put_free;
 319
 320         convert_to_hw_box(&box, &args->box);
 321
 322         fence = virtio_gpu_fence_alloc(vgdev);
 323         if (!fence) {
 324                 ret = -ENOMEM;
 325                 goto err_unlock;
 326         }
 327         virtio_gpu_cmd_transfer_from_host_3d
 328                 (vgdev, vfpriv->ctx_id, offset, args->level,
 329                  &box, objs, fence);
 330         dma_fence_put(&fence->f);
 331         return 0;
 332
 333 err_unlock:
 334         virtio_gpu_array_unlock_resv(objs);
 335 err_put_free:
 336         virtio_gpu_array_put_free(objs);
 337         return ret;
 338 }
 339
 340 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
 341                                              struct drm_file *file)
 342 {
 343         struct virtio_gpu_device *vgdev = dev->dev_private;
 344         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 345         struct drm_virtgpu_3d_transfer_to_host *args = data;
 346         struct virtio_gpu_object_array *objs;
 347         struct virtio_gpu_fence *fence;
 348         struct virtio_gpu_box box;
 349         int ret;
 350         u32 offset = args->offset;
 351
 352         objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
 353         if (objs == NULL)
 354                 return -ENOENT;
 355
 356         convert_to_hw_box(&box, &args->box);
 357         if (!vgdev->has_virgl_3d) {
 358                 virtio_gpu_cmd_transfer_to_host_2d
 359                         (vgdev, offset,
 360                          box.w, box.h, box.x, box.y,
 361                          objs, NULL);
 362         } else {
 363                 ret = virtio_gpu_array_lock_resv(objs);
 364                 if (ret != 0)
 365                         goto err_put_free;
 366
 367                 ret = -ENOMEM;
 368                 fence = virtio_gpu_fence_alloc(vgdev);
 369                 if (!fence)
 370                         goto err_unlock;
 371
 372                 virtio_gpu_cmd_transfer_to_host_3d
 373                         (vgdev,
 374                          vfpriv ? vfpriv->ctx_id : 0, offset,
 375                          args->level, &box, objs, fence);
 376                 dma_fence_put(&fence->f);
 377         }
 378         return 0;
 379
 380 err_unlock:
 381         virtio_gpu_array_unlock_resv(objs);
 382 err_put_free:
 383         virtio_gpu_array_put_free(objs);
 384         return ret;
 385 }
 386
 387 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
 388                                  struct drm_file *file)
 389 {
 390         struct drm_virtgpu_3d_wait *args = data;
 391         struct drm_gem_object *obj;
 392         long timeout = 15 * HZ;
 393         int ret;
 394
 395         obj = drm_gem_object_lookup(file, args->handle);
 396         if (obj == NULL)
 397                 return -ENOENT;
 398
 399         if (args->flags & VIRTGPU_WAIT_NOWAIT) {
 400                 ret = dma_resv_test_signaled_rcu(obj->resv, true);
 401         } else {
 402                 ret = dma_resv_wait_timeout_rcu(obj->resv, true, true,
 403                                                 timeout);
 404         }
 405         if (ret == 0)
 406                 ret = -EBUSY;
 407         else if (ret > 0)
 408                 ret = 0;
 409
 410         drm_gem_object_put_unlocked(obj);
 411         return ret;
 412 }
 413
 414 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 415                                 void *data, struct drm_file *file)
 416 {
 417         struct virtio_gpu_device *vgdev = dev->dev_private;
 418         struct drm_virtgpu_get_caps *args = data;
 419         unsigned size, host_caps_size;
 420         int i;
 421         int found_valid = -1;
 422         int ret;
 423         struct virtio_gpu_drv_cap_cache *cache_ent;
 424         void *ptr;
 425
 426         if (vgdev->num_capsets == 0)
 427                 return -ENOSYS;
 428
 429         /* don't allow userspace to pass 0 */
 430         if (args->size == 0)
 431                 return -EINVAL;
 432
 433         spin_lock(&vgdev->display_info_lock);
 434         for (i = 0; i < vgdev->num_capsets; i++) {
 435                 if (vgdev->capsets[i].id == args->cap_set_id) {
 436                         if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
 437                                 found_valid = i;
 438                                 break;
 439                         }
 440                 }
 441         }
 442
 443         if (found_valid == -1) {
 444                 spin_unlock(&vgdev->display_info_lock);
 445                 return -EINVAL;
 446         }
 447
 448         host_caps_size = vgdev->capsets[found_valid].max_size;
 449         /* only copy to user the minimum of the host caps size or the guest caps size */
 450         size = min(args->size, host_caps_size);
 451
 452         list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 453                 if (cache_ent->id == args->cap_set_id &&
 454                     cache_ent->version == args->cap_set_ver) {
 455                         spin_unlock(&vgdev->display_info_lock);
 456                         goto copy_exit;
 457                 }
 458         }
 459         spin_unlock(&vgdev->display_info_lock);
 460
 461         /* not in cache - need to talk to hw */
 462         virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
 463                                   &cache_ent);
 464
 465 copy_exit:
 466         ret = wait_event_timeout(vgdev->resp_wq,
 467                                  atomic_read(&cache_ent->is_valid), 5 * HZ);
 468         if (!ret)
 469                 return -EBUSY;
 470
 471         /* is_valid check must proceed before copy of the cache entry. */
 472         smp_rmb();
 473
 474         ptr = cache_ent->caps_cache;
 475
 476         if (copy_to_user(u64_to_user_ptr(args->addr), ptr, size))
 477                 return -EFAULT;
 478
 479         return 0;
 480 }
 481
 482 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
 483         DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
 484                           DRM_RENDER_ALLOW),
 485
 486         DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
 487                           DRM_RENDER_ALLOW),
 488
 489         DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
 490                           DRM_RENDER_ALLOW),
 491
 492         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
 493                           virtio_gpu_resource_create_ioctl,
 494                           DRM_RENDER_ALLOW),
 495
 496         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
 497                           DRM_RENDER_ALLOW),
 498
 499         /* make transfer async to the main ring? - no sure, can we
 500          * thread these in the underlying GL
 501          */
 502         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
 503                           virtio_gpu_transfer_from_host_ioctl,
 504                           DRM_RENDER_ALLOW),
 505         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
 506                           virtio_gpu_transfer_to_host_ioctl,
 507                           DRM_RENDER_ALLOW),
 508
 509         DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
 510                           DRM_RENDER_ALLOW),
 511
 512         DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
 513                           DRM_RENDER_ALLOW),
 514 };