2 * Copyright (C) 2015 Red Hat, Inc.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
28 #include <linux/file.h>
29 #include <linux/sync_file.h>
30 #include <linux/uaccess.h>
32 #include <drm/drm_file.h>
33 #include <drm/virtgpu_drm.h>
35 #include "virtgpu_drv.h"
37 #define VIRTGPU_BLOB_FLAG_USE_MASK (VIRTGPU_BLOB_FLAG_USE_MAPPABLE | \
38 VIRTGPU_BLOB_FLAG_USE_SHAREABLE | \
39 VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE)
41 /* Must be called with &virtio_gpu_fpriv.struct_mutex held. */
42 static void virtio_gpu_create_context_locked(struct virtio_gpu_device *vgdev,
43 struct virtio_gpu_fpriv *vfpriv)
45 if (vfpriv->explicit_debug_name) {
46 virtio_gpu_cmd_context_create(vgdev, vfpriv->ctx_id,
48 strlen(vfpriv->debug_name),
51 char dbgname[TASK_COMM_LEN];
53 get_task_comm(dbgname, current);
54 virtio_gpu_cmd_context_create(vgdev, vfpriv->ctx_id,
55 vfpriv->context_init, strlen(dbgname),
59 vfpriv->context_created = true;
62 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file)
64 struct virtio_gpu_device *vgdev = dev->dev_private;
65 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
67 mutex_lock(&vfpriv->context_lock);
68 if (vfpriv->context_created)
71 virtio_gpu_create_context_locked(vgdev, vfpriv);
74 mutex_unlock(&vfpriv->context_lock);
77 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
78 struct drm_file *file)
80 struct virtio_gpu_device *vgdev = dev->dev_private;
81 struct drm_virtgpu_map *virtio_gpu_map = data;
83 return drm_gem_dumb_map_offset(file, vgdev->ddev,
84 virtio_gpu_map->handle,
85 &virtio_gpu_map->offset);
88 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
89 struct drm_file *file)
91 struct virtio_gpu_device *vgdev = dev->dev_private;
92 struct drm_virtgpu_getparam *param = data;
95 switch (param->param) {
96 case VIRTGPU_PARAM_3D_FEATURES:
97 value = vgdev->has_virgl_3d ? 1 : 0;
99 case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
102 case VIRTGPU_PARAM_RESOURCE_BLOB:
103 value = vgdev->has_resource_blob ? 1 : 0;
105 case VIRTGPU_PARAM_HOST_VISIBLE:
106 value = vgdev->has_host_visible ? 1 : 0;
108 case VIRTGPU_PARAM_CROSS_DEVICE:
109 value = vgdev->has_resource_assign_uuid ? 1 : 0;
111 case VIRTGPU_PARAM_CONTEXT_INIT:
112 value = vgdev->has_context_init ? 1 : 0;
114 case VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs:
115 value = vgdev->capset_id_mask;
117 case VIRTGPU_PARAM_EXPLICIT_DEBUG_NAME:
118 value = vgdev->has_context_init ? 1 : 0;
123 if (copy_to_user(u64_to_user_ptr(param->value), &value, sizeof(int)))
129 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
130 struct drm_file *file)
132 struct virtio_gpu_device *vgdev = dev->dev_private;
133 struct drm_virtgpu_resource_create *rc = data;
134 struct virtio_gpu_fence *fence;
136 struct virtio_gpu_object *qobj;
137 struct drm_gem_object *obj;
139 struct virtio_gpu_object_params params = { 0 };
141 if (vgdev->has_virgl_3d) {
142 virtio_gpu_create_context(dev, file);
144 params.target = rc->target;
145 params.bind = rc->bind;
146 params.depth = rc->depth;
147 params.array_size = rc->array_size;
148 params.last_level = rc->last_level;
149 params.nr_samples = rc->nr_samples;
150 params.flags = rc->flags;
154 if (rc->nr_samples > 1)
156 if (rc->last_level > 1)
160 if (rc->array_size > 1)
164 params.format = rc->format;
165 params.width = rc->width;
166 params.height = rc->height;
167 params.size = rc->size;
168 /* allocate a single page size object */
169 if (params.size == 0)
170 params.size = PAGE_SIZE;
172 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0);
175 ret = virtio_gpu_object_create(vgdev, ¶ms, &qobj, fence);
176 dma_fence_put(&fence->f);
179 obj = &qobj->base.base;
181 ret = drm_gem_handle_create(file, obj, &handle);
183 drm_gem_object_release(obj);
187 rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */
188 rc->bo_handle = handle;
191 * The handle owns the reference now. But we must drop our
192 * remaining reference *after* we no longer need to dereference
193 * the obj. Otherwise userspace could guess the handle and
194 * race closing it from another thread.
196 drm_gem_object_put(obj);
201 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
202 struct drm_file *file)
204 struct drm_virtgpu_resource_info *ri = data;
205 struct drm_gem_object *gobj = NULL;
206 struct virtio_gpu_object *qobj = NULL;
208 gobj = drm_gem_object_lookup(file, ri->bo_handle);
212 qobj = gem_to_virtio_gpu_obj(gobj);
214 ri->size = qobj->base.base.size;
215 ri->res_handle = qobj->hw_res_handle;
216 if (qobj->host3d_blob || qobj->guest_blob)
217 ri->blob_mem = qobj->blob_mem;
219 drm_gem_object_put(gobj);
223 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
225 struct drm_file *file)
227 struct virtio_gpu_device *vgdev = dev->dev_private;
228 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
229 struct drm_virtgpu_3d_transfer_from_host *args = data;
230 struct virtio_gpu_object *bo;
231 struct virtio_gpu_object_array *objs;
232 struct virtio_gpu_fence *fence;
234 u32 offset = args->offset;
236 if (vgdev->has_virgl_3d == false)
239 virtio_gpu_create_context(dev, file);
240 objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
244 bo = gem_to_virtio_gpu_obj(objs->objs[0]);
245 if (bo->guest_blob && !bo->host3d_blob) {
250 if (!bo->host3d_blob && (args->stride || args->layer_stride)) {
255 ret = virtio_gpu_array_lock_resv(objs);
259 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0);
265 virtio_gpu_cmd_transfer_from_host_3d
266 (vgdev, vfpriv->ctx_id, offset, args->level, args->stride,
267 args->layer_stride, &args->box, objs, fence);
268 dma_fence_put(&fence->f);
269 virtio_gpu_notify(vgdev);
273 virtio_gpu_array_unlock_resv(objs);
275 virtio_gpu_array_put_free(objs);
279 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
280 struct drm_file *file)
282 struct virtio_gpu_device *vgdev = dev->dev_private;
283 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
284 struct drm_virtgpu_3d_transfer_to_host *args = data;
285 struct virtio_gpu_object *bo;
286 struct virtio_gpu_object_array *objs;
287 struct virtio_gpu_fence *fence;
289 u32 offset = args->offset;
291 objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
295 bo = gem_to_virtio_gpu_obj(objs->objs[0]);
296 if (bo->guest_blob && !bo->host3d_blob) {
301 if (!vgdev->has_virgl_3d) {
302 virtio_gpu_cmd_transfer_to_host_2d
304 args->box.w, args->box.h, args->box.x, args->box.y,
307 virtio_gpu_create_context(dev, file);
309 if (!bo->host3d_blob && (args->stride || args->layer_stride)) {
314 ret = virtio_gpu_array_lock_resv(objs);
319 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context,
324 virtio_gpu_cmd_transfer_to_host_3d
326 vfpriv ? vfpriv->ctx_id : 0, offset, args->level,
327 args->stride, args->layer_stride, &args->box, objs,
329 dma_fence_put(&fence->f);
331 virtio_gpu_notify(vgdev);
335 virtio_gpu_array_unlock_resv(objs);
337 virtio_gpu_array_put_free(objs);
341 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
342 struct drm_file *file)
344 struct drm_virtgpu_3d_wait *args = data;
345 struct drm_gem_object *obj;
346 long timeout = 15 * HZ;
349 obj = drm_gem_object_lookup(file, args->handle);
353 if (args->flags & VIRTGPU_WAIT_NOWAIT) {
354 ret = dma_resv_test_signaled(obj->resv, DMA_RESV_USAGE_READ);
356 ret = dma_resv_wait_timeout(obj->resv, DMA_RESV_USAGE_READ,
364 drm_gem_object_put(obj);
368 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
369 void *data, struct drm_file *file)
371 struct virtio_gpu_device *vgdev = dev->dev_private;
372 struct drm_virtgpu_get_caps *args = data;
373 unsigned size, host_caps_size;
375 int found_valid = -1;
377 struct virtio_gpu_drv_cap_cache *cache_ent;
380 if (vgdev->num_capsets == 0)
383 /* don't allow userspace to pass 0 */
387 spin_lock(&vgdev->display_info_lock);
388 for (i = 0; i < vgdev->num_capsets; i++) {
389 if (vgdev->capsets[i].id == args->cap_set_id) {
390 if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
397 if (found_valid == -1) {
398 spin_unlock(&vgdev->display_info_lock);
402 host_caps_size = vgdev->capsets[found_valid].max_size;
403 /* only copy to user the minimum of the host caps size or the guest caps size */
404 size = min(args->size, host_caps_size);
406 list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
407 if (cache_ent->id == args->cap_set_id &&
408 cache_ent->version == args->cap_set_ver) {
409 spin_unlock(&vgdev->display_info_lock);
413 spin_unlock(&vgdev->display_info_lock);
415 /* not in cache - need to talk to hw */
416 ret = virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
420 virtio_gpu_notify(vgdev);
423 ret = wait_event_timeout(vgdev->resp_wq,
424 atomic_read(&cache_ent->is_valid), 5 * HZ);
428 /* is_valid check must proceed before copy of the cache entry. */
431 ptr = cache_ent->caps_cache;
433 if (copy_to_user(u64_to_user_ptr(args->addr), ptr, size))
439 static int verify_blob(struct virtio_gpu_device *vgdev,
440 struct virtio_gpu_fpriv *vfpriv,
441 struct virtio_gpu_object_params *params,
442 struct drm_virtgpu_resource_create_blob *rc_blob,
443 bool *guest_blob, bool *host3d_blob)
445 if (!vgdev->has_resource_blob)
448 if (rc_blob->blob_flags & ~VIRTGPU_BLOB_FLAG_USE_MASK)
451 if (rc_blob->blob_flags & VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE) {
452 if (!vgdev->has_resource_assign_uuid)
456 switch (rc_blob->blob_mem) {
457 case VIRTGPU_BLOB_MEM_GUEST:
460 case VIRTGPU_BLOB_MEM_HOST3D_GUEST:
463 case VIRTGPU_BLOB_MEM_HOST3D:
471 if (!vgdev->has_virgl_3d)
474 /* Must be dword aligned. */
475 if (rc_blob->cmd_size % 4 != 0)
478 params->ctx_id = vfpriv->ctx_id;
479 params->blob_id = rc_blob->blob_id;
481 if (rc_blob->blob_id != 0)
484 if (rc_blob->cmd_size != 0)
488 params->blob_mem = rc_blob->blob_mem;
489 params->size = rc_blob->size;
491 params->blob_flags = rc_blob->blob_flags;
495 static int virtio_gpu_resource_create_blob_ioctl(struct drm_device *dev,
497 struct drm_file *file)
501 bool guest_blob = false;
502 bool host3d_blob = false;
503 struct drm_gem_object *obj;
504 struct virtio_gpu_object *bo;
505 struct virtio_gpu_object_params params = { 0 };
506 struct virtio_gpu_device *vgdev = dev->dev_private;
507 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
508 struct drm_virtgpu_resource_create_blob *rc_blob = data;
510 if (verify_blob(vgdev, vfpriv, ¶ms, rc_blob,
511 &guest_blob, &host3d_blob))
514 if (vgdev->has_virgl_3d)
515 virtio_gpu_create_context(dev, file);
517 if (rc_blob->cmd_size) {
520 buf = memdup_user(u64_to_user_ptr(rc_blob->cmd),
526 virtio_gpu_cmd_submit(vgdev, buf, rc_blob->cmd_size,
527 vfpriv->ctx_id, NULL, NULL);
531 ret = virtio_gpu_object_create(vgdev, ¶ms, &bo, NULL);
532 else if (!guest_blob && host3d_blob)
533 ret = virtio_gpu_vram_create(vgdev, ¶ms, &bo);
540 bo->guest_blob = guest_blob;
541 bo->host3d_blob = host3d_blob;
542 bo->blob_mem = rc_blob->blob_mem;
543 bo->blob_flags = rc_blob->blob_flags;
545 obj = &bo->base.base;
546 if (params.blob_flags & VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE) {
547 ret = virtio_gpu_resource_assign_uuid(vgdev, bo);
549 drm_gem_object_release(obj);
554 ret = drm_gem_handle_create(file, obj, &handle);
556 drm_gem_object_release(obj);
560 rc_blob->res_handle = bo->hw_res_handle;
561 rc_blob->bo_handle = handle;
564 * The handle owns the reference now. But we must drop our
565 * remaining reference *after* we no longer need to dereference
566 * the obj. Otherwise userspace could guess the handle and
567 * race closing it from another thread.
569 drm_gem_object_put(obj);
574 static int virtio_gpu_context_init_ioctl(struct drm_device *dev,
575 void *data, struct drm_file *file)
578 uint32_t num_params, i;
579 uint64_t valid_ring_mask, param, value;
581 struct drm_virtgpu_context_set_param *ctx_set_params = NULL;
582 struct virtio_gpu_device *vgdev = dev->dev_private;
583 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
584 struct drm_virtgpu_context_init *args = data;
586 num_params = args->num_params;
587 len = num_params * sizeof(struct drm_virtgpu_context_set_param);
589 if (!vgdev->has_context_init || !vgdev->has_virgl_3d)
592 /* Number of unique parameters supported at this time. */
596 ctx_set_params = memdup_user(u64_to_user_ptr(args->ctx_set_params),
599 if (IS_ERR(ctx_set_params))
600 return PTR_ERR(ctx_set_params);
602 mutex_lock(&vfpriv->context_lock);
603 if (vfpriv->context_created) {
608 for (i = 0; i < num_params; i++) {
609 param = ctx_set_params[i].param;
610 value = ctx_set_params[i].value;
613 case VIRTGPU_CONTEXT_PARAM_CAPSET_ID:
614 if (value > MAX_CAPSET_ID) {
619 if ((vgdev->capset_id_mask & (1ULL << value)) == 0) {
624 /* Context capset ID already set */
625 if (vfpriv->context_init &
626 VIRTIO_GPU_CONTEXT_INIT_CAPSET_ID_MASK) {
631 vfpriv->context_init |= value;
633 case VIRTGPU_CONTEXT_PARAM_NUM_RINGS:
634 if (vfpriv->base_fence_ctx) {
639 if (value > MAX_RINGS) {
644 vfpriv->base_fence_ctx = dma_fence_context_alloc(value);
645 vfpriv->num_rings = value;
647 case VIRTGPU_CONTEXT_PARAM_POLL_RINGS_MASK:
648 if (vfpriv->ring_idx_mask) {
653 vfpriv->ring_idx_mask = value;
655 case VIRTGPU_CONTEXT_PARAM_DEBUG_NAME:
656 if (vfpriv->explicit_debug_name) {
661 ret = strncpy_from_user(vfpriv->debug_name,
662 u64_to_user_ptr(value),
663 DEBUG_NAME_MAX_LEN - 1);
667 vfpriv->explicit_debug_name = true;
676 if (vfpriv->ring_idx_mask) {
678 for (i = 0; i < vfpriv->num_rings; i++)
679 valid_ring_mask |= 1ULL << i;
681 if (~valid_ring_mask & vfpriv->ring_idx_mask) {
687 virtio_gpu_create_context_locked(vgdev, vfpriv);
688 virtio_gpu_notify(vgdev);
691 mutex_unlock(&vfpriv->context_lock);
692 kfree(ctx_set_params);
696 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
697 DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
700 DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
703 DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
706 DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
707 virtio_gpu_resource_create_ioctl,
710 DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
713 /* make transfer async to the main ring? - no sure, can we
714 * thread these in the underlying GL
716 DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
717 virtio_gpu_transfer_from_host_ioctl,
719 DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
720 virtio_gpu_transfer_to_host_ioctl,
723 DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
726 DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
729 DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE_BLOB,
730 virtio_gpu_resource_create_blob_ioctl,
733 DRM_IOCTL_DEF_DRV(VIRTGPU_CONTEXT_INIT, virtio_gpu_context_init_ioctl,