drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/bpf.h>
  34 #include <linux/bpf_trace.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/etherdevice.h>
  37 #ifdef CONFIG_IGB_DCA
  38 #include <linux/dca.h>
  39 #endif
  40 #include <linux/i2c.h>
  41 #include "igb.h"
  42
  43 enum queue_mode {
  44         QUEUE_MODE_STRICT_PRIORITY,
  45         QUEUE_MODE_STREAM_RESERVATION,
  46 };
  47
  48 enum tx_queue_prio {
  49         TX_QUEUE_PRIO_HIGH,
  50         TX_QUEUE_PRIO_LOW,
  51 };
  52
  53 char igb_driver_name[] = "igb";
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] =
  57                                 "Copyright (c) 2007-2014 Intel Corporation.";
  58
  59 static const struct e1000_info *igb_info_tbl[] = {
  60         [board_82575] = &e1000_82575_info,
  61 };
  62
  63 static const struct pci_device_id igb_pci_tbl[] = {
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  99         /* required last entry */
 100         {0, }
 101 };
 102
 103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 104
 105 static int igb_setup_all_tx_resources(struct igb_adapter *);
 106 static int igb_setup_all_rx_resources(struct igb_adapter *);
 107 static void igb_free_all_tx_resources(struct igb_adapter *);
 108 static void igb_free_all_rx_resources(struct igb_adapter *);
 109 static void igb_setup_mrqc(struct igb_adapter *);
 110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 111 static void igb_remove(struct pci_dev *pdev);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 179 static int igb_disable_sriov(struct pci_dev *dev);
 180 static int igb_pci_disable_sriov(struct pci_dev *dev);
 181 #endif
 182
 183 static int igb_suspend(struct device *);
 184 static int igb_resume(struct device *);
 185 static int igb_runtime_suspend(struct device *dev);
 186 static int igb_runtime_resume(struct device *dev);
 187 static int igb_runtime_idle(struct device *dev);
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <[email protected]>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state) {
 581                 i2cctl |= E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
 582         } else {
 583                 i2cctl &= ~E1000_I2C_DATA_OE_N;
 584                 i2cctl &= ~E1000_I2C_DATA_OUT;
 585         }
 586
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589 }
 590
 591 /**
 592  *  igb_set_i2c_clk - Sets the I2C SCL clock
 593  *  @data: pointer to hardware structure
 594  *  @state: state to set clock
 595  *
 596  *  Sets the I2C clock line to state
 597  **/
 598 static void igb_set_i2c_clk(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state) {
 605                 i2cctl |= E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N;
 606         } else {
 607                 i2cctl &= ~E1000_I2C_CLK_OUT;
 608                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 609         }
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612 }
 613
 614 /**
 615  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 616  *  @data: pointer to hardware structure
 617  *
 618  *  Gets the I2C clock state
 619  **/
 620 static int igb_get_i2c_clk(void *data)
 621 {
 622         struct igb_adapter *adapter = (struct igb_adapter *)data;
 623         struct e1000_hw *hw = &adapter->hw;
 624         s32 i2cctl = rd32(E1000_I2CPARAMS);
 625
 626         return !!(i2cctl & E1000_I2C_CLK_IN);
 627 }
 628
 629 static const struct i2c_algo_bit_data igb_i2c_algo = {
 630         .setsda         = igb_set_i2c_data,
 631         .setscl         = igb_set_i2c_clk,
 632         .getsda         = igb_get_i2c_data,
 633         .getscl         = igb_get_i2c_clk,
 634         .udelay         = 5,
 635         .timeout        = 20,
 636 };
 637
 638 /**
 639  *  igb_get_hw_dev - return device
 640  *  @hw: pointer to hardware structure
 641  *
 642  *  used by hardware layer to print debugging information
 643  **/
 644 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 645 {
 646         struct igb_adapter *adapter = hw->back;
 647         return adapter->netdev;
 648 }
 649
 650 /**
 651  *  igb_init_module - Driver Registration Routine
 652  *
 653  *  igb_init_module is the first routine called when the driver is
 654  *  loaded. All it does is register with the PCI subsystem.
 655  **/
 656 static int __init igb_init_module(void)
 657 {
 658         int ret;
 659
 660         pr_info("%s\n", igb_driver_string);
 661         pr_info("%s\n", igb_copyright);
 662
 663 #ifdef CONFIG_IGB_DCA
 664         dca_register_notify(&dca_notifier);
 665 #endif
 666         ret = pci_register_driver(&igb_driver);
 667         return ret;
 668 }
 669
 670 module_init(igb_init_module);
 671
 672 /**
 673  *  igb_exit_module - Driver Exit Cleanup Routine
 674  *
 675  *  igb_exit_module is called just before the driver is removed
 676  *  from memory.
 677  **/
 678 static void __exit igb_exit_module(void)
 679 {
 680 #ifdef CONFIG_IGB_DCA
 681         dca_unregister_notify(&dca_notifier);
 682 #endif
 683         pci_unregister_driver(&igb_driver);
 684 }
 685
 686 module_exit(igb_exit_module);
 687
 688 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 689 /**
 690  *  igb_cache_ring_register - Descriptor ring to register mapping
 691  *  @adapter: board private structure to initialize
 692  *
 693  *  Once we know the feature-set enabled for the device, we'll cache
 694  *  the register offset the descriptor ring is assigned to.
 695  **/
 696 static void igb_cache_ring_register(struct igb_adapter *adapter)
 697 {
 698         int i = 0, j = 0;
 699         u32 rbase_offset = adapter->vfs_allocated_count;
 700
 701         switch (adapter->hw.mac.type) {
 702         case e1000_82576:
 703                 /* The queues are allocated for virtualization such that VF 0
 704                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 705                  * In order to avoid collision we start at the first free queue
 706                  * and continue consuming queues in the same sequence
 707                  */
 708                 if (adapter->vfs_allocated_count) {
 709                         for (; i < adapter->rss_queues; i++)
 710                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 711                                                                Q_IDX_82576(i);
 712                 }
 713                 fallthrough;
 714         case e1000_82575:
 715         case e1000_82580:
 716         case e1000_i350:
 717         case e1000_i354:
 718         case e1000_i210:
 719         case e1000_i211:
 720         default:
 721                 for (; i < adapter->num_rx_queues; i++)
 722                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 723                 for (; j < adapter->num_tx_queues; j++)
 724                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 725                 break;
 726         }
 727 }
 728
 729 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 730 {
 731         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 732         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 733         u32 value = 0;
 734
 735         if (E1000_REMOVED(hw_addr))
 736                 return ~value;
 737
 738         value = readl(&hw_addr[reg]);
 739
 740         /* reads should not return all F's */
 741         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 742                 struct net_device *netdev = igb->netdev;
 743                 hw->hw_addr = NULL;
 744                 netdev_err(netdev, "PCIe link lost\n");
 745                 WARN(pci_device_is_present(igb->pdev),
 746                      "igb: Failed to read reg 0x%x!\n", reg);
 747         }
 748
 749         return value;
 750 }
 751
 752 /**
 753  *  igb_write_ivar - configure ivar for given MSI-X vector
 754  *  @hw: pointer to the HW structure
 755  *  @msix_vector: vector number we are allocating to a given ring
 756  *  @index: row index of IVAR register to write within IVAR table
 757  *  @offset: column offset of in IVAR, should be multiple of 8
 758  *
 759  *  This function is intended to handle the writing of the IVAR register
 760  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 761  *  each containing an cause allocation for an Rx and Tx ring, and a
 762  *  variable number of rows depending on the number of queues supported.
 763  **/
 764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 765                            int index, int offset)
 766 {
 767         u32 ivar = array_rd32(E1000_IVAR0, index);
 768
 769         /* clear any bits that are currently set */
 770         ivar &= ~((u32)0xFF << offset);
 771
 772         /* write vector and valid bit */
 773         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 774
 775         array_wr32(E1000_IVAR0, index, ivar);
 776 }
 777
 778 #define IGB_N0_QUEUE -1
 779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 780 {
 781         struct igb_adapter *adapter = q_vector->adapter;
 782         struct e1000_hw *hw = &adapter->hw;
 783         int rx_queue = IGB_N0_QUEUE;
 784         int tx_queue = IGB_N0_QUEUE;
 785         u32 msixbm = 0;
 786
 787         if (q_vector->rx.ring)
 788                 rx_queue = q_vector->rx.ring->reg_idx;
 789         if (q_vector->tx.ring)
 790                 tx_queue = q_vector->tx.ring->reg_idx;
 791
 792         switch (hw->mac.type) {
 793         case e1000_82575:
 794                 /* The 82575 assigns vectors using a bitmask, which matches the
 795                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 796                  * or more queues to a vector, we write the appropriate bits
 797                  * into the MSIXBM register for that vector.
 798                  */
 799                 if (rx_queue > IGB_N0_QUEUE)
 800                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 801                 if (tx_queue > IGB_N0_QUEUE)
 802                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 803                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 804                         msixbm |= E1000_EIMS_OTHER;
 805                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 806                 q_vector->eims_value = msixbm;
 807                 break;
 808         case e1000_82576:
 809                 /* 82576 uses a table that essentially consists of 2 columns
 810                  * with 8 rows.  The ordering is column-major so we use the
 811                  * lower 3 bits as the row index, and the 4th bit as the
 812                  * column offset.
 813                  */
 814                 if (rx_queue > IGB_N0_QUEUE)
 815                         igb_write_ivar(hw, msix_vector,
 816                                        rx_queue & 0x7,
 817                                        (rx_queue & 0x8) << 1);
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         igb_write_ivar(hw, msix_vector,
 820                                        tx_queue & 0x7,
 821                                        ((tx_queue & 0x8) << 1) + 8);
 822                 q_vector->eims_value = BIT(msix_vector);
 823                 break;
 824         case e1000_82580:
 825         case e1000_i350:
 826         case e1000_i354:
 827         case e1000_i210:
 828         case e1000_i211:
 829                 /* On 82580 and newer adapters the scheme is similar to 82576
 830                  * however instead of ordering column-major we have things
 831                  * ordered row-major.  So we traverse the table by using
 832                  * bit 0 as the column offset, and the remaining bits as the
 833                  * row index.
 834                  */
 835                 if (rx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        rx_queue >> 1,
 838                                        (rx_queue & 0x1) << 4);
 839                 if (tx_queue > IGB_N0_QUEUE)
 840                         igb_write_ivar(hw, msix_vector,
 841                                        tx_queue >> 1,
 842                                        ((tx_queue & 0x1) << 4) + 8);
 843                 q_vector->eims_value = BIT(msix_vector);
 844                 break;
 845         default:
 846                 BUG();
 847                 break;
 848         }
 849
 850         /* add q_vector eims value to global eims_enable_mask */
 851         adapter->eims_enable_mask |= q_vector->eims_value;
 852
 853         /* configure q_vector to set itr on first interrupt */
 854         q_vector->set_itr = 1;
 855 }
 856
 857 /**
 858  *  igb_configure_msix - Configure MSI-X hardware
 859  *  @adapter: board private structure to initialize
 860  *
 861  *  igb_configure_msix sets up the hardware to properly
 862  *  generate MSI-X interrupts.
 863  **/
 864 static void igb_configure_msix(struct igb_adapter *adapter)
 865 {
 866         u32 tmp;
 867         int i, vector = 0;
 868         struct e1000_hw *hw = &adapter->hw;
 869
 870         adapter->eims_enable_mask = 0;
 871
 872         /* set vector for other causes, i.e. link changes */
 873         switch (hw->mac.type) {
 874         case e1000_82575:
 875                 tmp = rd32(E1000_CTRL_EXT);
 876                 /* enable MSI-X PBA support*/
 877                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 878
 879                 /* Auto-Mask interrupts upon ICR read. */
 880                 tmp |= E1000_CTRL_EXT_EIAME;
 881                 tmp |= E1000_CTRL_EXT_IRCA;
 882
 883                 wr32(E1000_CTRL_EXT, tmp);
 884
 885                 /* enable msix_other interrupt */
 886                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 887                 adapter->eims_other = E1000_EIMS_OTHER;
 888
 889                 break;
 890
 891         case e1000_82576:
 892         case e1000_82580:
 893         case e1000_i350:
 894         case e1000_i354:
 895         case e1000_i210:
 896         case e1000_i211:
 897                 /* Turn on MSI-X capability first, or our settings
 898                  * won't stick.  And it will take days to debug.
 899                  */
 900                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 901                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 902                      E1000_GPIE_NSICR);
 903
 904                 /* enable msix_other interrupt */
 905                 adapter->eims_other = BIT(vector);
 906                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 907
 908                 wr32(E1000_IVAR_MISC, tmp);
 909                 break;
 910         default:
 911                 /* do nothing, since nothing else supports MSI-X */
 912                 break;
 913         } /* switch (hw->mac.type) */
 914
 915         adapter->eims_enable_mask |= adapter->eims_other;
 916
 917         for (i = 0; i < adapter->num_q_vectors; i++)
 918                 igb_assign_vector(adapter->q_vector[i], vector++);
 919
 920         wrfl();
 921 }
 922
 923 /**
 924  *  igb_request_msix - Initialize MSI-X interrupts
 925  *  @adapter: board private structure to initialize
 926  *
 927  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 928  *  kernel.
 929  **/
 930 static int igb_request_msix(struct igb_adapter *adapter)
 931 {
 932         unsigned int num_q_vectors = adapter->num_q_vectors;
 933         struct net_device *netdev = adapter->netdev;
 934         int i, err = 0, vector = 0, free_vector = 0;
 935
 936         err = request_irq(adapter->msix_entries[vector].vector,
 937                           igb_msix_other, 0, netdev->name, adapter);
 938         if (err)
 939                 goto err_out;
 940
 941         if (num_q_vectors > MAX_Q_VECTORS) {
 942                 num_q_vectors = MAX_Q_VECTORS;
 943                 dev_warn(&adapter->pdev->dev,
 944                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 945                          adapter->num_q_vectors, MAX_Q_VECTORS);
 946         }
 947         for (i = 0; i < num_q_vectors; i++) {
 948                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 949
 950                 vector++;
 951
 952                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 953
 954                 if (q_vector->rx.ring && q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 956                                 q_vector->rx.ring->queue_index);
 957                 else if (q_vector->tx.ring)
 958                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 959                                 q_vector->tx.ring->queue_index);
 960                 else if (q_vector->rx.ring)
 961                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 962                                 q_vector->rx.ring->queue_index);
 963                 else
 964                         sprintf(q_vector->name, "%s-unused", netdev->name);
 965
 966                 err = request_irq(adapter->msix_entries[vector].vector,
 967                                   igb_msix_ring, 0, q_vector->name,
 968                                   q_vector);
 969                 if (err)
 970                         goto err_free;
 971         }
 972
 973         igb_configure_msix(adapter);
 974         return 0;
 975
 976 err_free:
 977         /* free already assigned IRQs */
 978         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 979
 980         vector--;
 981         for (i = 0; i < vector; i++) {
 982                 free_irq(adapter->msix_entries[free_vector++].vector,
 983                          adapter->q_vector[i]);
 984         }
 985 err_out:
 986         return err;
 987 }
 988
 989 /**
 990  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 991  *  @adapter: board private structure to initialize
 992  *  @v_idx: Index of vector to be freed
 993  *
 994  *  This function frees the memory allocated to the q_vector.
 995  **/
 996 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 997 {
 998         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 999
1000         adapter->q_vector[v_idx] = NULL;
1001
1002         /* igb_get_stats64() might access the rings on this vector,
1003          * we must wait a grace period before freeing it.
1004          */
1005         if (q_vector)
1006                 kfree_rcu(q_vector, rcu);
1007 }
1008
1009 /**
1010  *  igb_reset_q_vector - Reset config for interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be reset
1013  *
1014  *  If NAPI is enabled it will delete any references to the
1015  *  NAPI struct. This is preparation for igb_free_q_vector.
1016  **/
1017 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1018 {
1019         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1020
1021         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1022          * allocated. So, q_vector is NULL so we should stop here.
1023          */
1024         if (!q_vector)
1025                 return;
1026
1027         if (q_vector->tx.ring)
1028                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1029
1030         if (q_vector->rx.ring)
1031                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1032
1033         netif_napi_del(&q_vector->napi);
1034
1035 }
1036
1037 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1038 {
1039         int v_idx = adapter->num_q_vectors;
1040
1041         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1042                 pci_disable_msix(adapter->pdev);
1043         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1044                 pci_disable_msi(adapter->pdev);
1045
1046         while (v_idx--)
1047                 igb_reset_q_vector(adapter, v_idx);
1048 }
1049
1050 /**
1051  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1052  *  @adapter: board private structure to initialize
1053  *
1054  *  This function frees the memory allocated to the q_vectors.  In addition if
1055  *  NAPI is enabled it will delete any references to the NAPI struct prior
1056  *  to freeing the q_vector.
1057  **/
1058 static void igb_free_q_vectors(struct igb_adapter *adapter)
1059 {
1060         int v_idx = adapter->num_q_vectors;
1061
1062         adapter->num_tx_queues = 0;
1063         adapter->num_rx_queues = 0;
1064         adapter->num_q_vectors = 0;
1065
1066         while (v_idx--) {
1067                 igb_reset_q_vector(adapter, v_idx);
1068                 igb_free_q_vector(adapter, v_idx);
1069         }
1070 }
1071
1072 /**
1073  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1074  *  @adapter: board private structure to initialize
1075  *
1076  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1077  *  MSI-X interrupts allocated.
1078  */
1079 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1080 {
1081         igb_free_q_vectors(adapter);
1082         igb_reset_interrupt_capability(adapter);
1083 }
1084
1085 /**
1086  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1087  *  @adapter: board private structure to initialize
1088  *  @msix: boolean value of MSIX capability
1089  *
1090  *  Attempt to configure interrupts using the best available
1091  *  capabilities of the hardware and kernel.
1092  **/
1093 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1094 {
1095         int err;
1096         int numvecs, i;
1097
1098         if (!msix)
1099                 goto msi_only;
1100         adapter->flags |= IGB_FLAG_HAS_MSIX;
1101
1102         /* Number of supported queues. */
1103         adapter->num_rx_queues = adapter->rss_queues;
1104         if (adapter->vfs_allocated_count)
1105                 adapter->num_tx_queues = 1;
1106         else
1107                 adapter->num_tx_queues = adapter->rss_queues;
1108
1109         /* start with one vector for every Rx queue */
1110         numvecs = adapter->num_rx_queues;
1111
1112         /* if Tx handler is separate add 1 for every Tx queue */
1113         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1114                 numvecs += adapter->num_tx_queues;
1115
1116         /* store the number of vectors reserved for queues */
1117         adapter->num_q_vectors = numvecs;
1118
1119         /* add 1 vector for link status interrupts */
1120         numvecs++;
1121         for (i = 0; i < numvecs; i++)
1122                 adapter->msix_entries[i].entry = i;
1123
1124         err = pci_enable_msix_range(adapter->pdev,
1125                                     adapter->msix_entries,
1126                                     numvecs,
1127                                     numvecs);
1128         if (err > 0)
1129                 return;
1130
1131         igb_reset_interrupt_capability(adapter);
1132
1133         /* If we can't do MSI-X, try MSI */
1134 msi_only:
1135         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1136 #ifdef CONFIG_PCI_IOV
1137         /* disable SR-IOV for non MSI-X configurations */
1138         if (adapter->vf_data) {
1139                 struct e1000_hw *hw = &adapter->hw;
1140                 /* disable iov and allow time for transactions to clear */
1141                 pci_disable_sriov(adapter->pdev);
1142                 msleep(500);
1143
1144                 kfree(adapter->vf_mac_list);
1145                 adapter->vf_mac_list = NULL;
1146                 kfree(adapter->vf_data);
1147                 adapter->vf_data = NULL;
1148                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1149                 wrfl();
1150                 msleep(100);
1151                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1152         }
1153 #endif
1154         adapter->vfs_allocated_count = 0;
1155         adapter->rss_queues = 1;
1156         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1157         adapter->num_rx_queues = 1;
1158         adapter->num_tx_queues = 1;
1159         adapter->num_q_vectors = 1;
1160         if (!pci_enable_msi(adapter->pdev))
1161                 adapter->flags |= IGB_FLAG_HAS_MSI;
1162 }
1163
1164 static void igb_add_ring(struct igb_ring *ring,
1165                          struct igb_ring_container *head)
1166 {
1167         head->ring = ring;
1168         head->count++;
1169 }
1170
1171 /**
1172  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1173  *  @adapter: board private structure to initialize
1174  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1175  *  @v_idx: index of vector in adapter struct
1176  *  @txr_count: total number of Tx rings to allocate
1177  *  @txr_idx: index of first Tx ring to allocate
1178  *  @rxr_count: total number of Rx rings to allocate
1179  *  @rxr_idx: index of first Rx ring to allocate
1180  *
1181  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1182  **/
1183 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1184                               int v_count, int v_idx,
1185                               int txr_count, int txr_idx,
1186                               int rxr_count, int rxr_idx)
1187 {
1188         struct igb_q_vector *q_vector;
1189         struct igb_ring *ring;
1190         int ring_count;
1191         size_t size;
1192
1193         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1194         if (txr_count > 1 || rxr_count > 1)
1195                 return -ENOMEM;
1196
1197         ring_count = txr_count + rxr_count;
1198         size = struct_size(q_vector, ring, ring_count);
1199
1200         /* allocate q_vector and rings */
1201         q_vector = adapter->q_vector[v_idx];
1202         if (!q_vector) {
1203                 q_vector = kzalloc(size, GFP_KERNEL);
1204         } else if (size > ksize(q_vector)) {
1205                 kfree_rcu(q_vector, rcu);
1206                 q_vector = kzalloc(size, GFP_KERNEL);
1207         } else {
1208                 memset(q_vector, 0, size);
1209         }
1210         if (!q_vector)
1211                 return -ENOMEM;
1212
1213         /* initialize NAPI */
1214         netif_napi_add(adapter->netdev, &q_vector->napi,
1215                        igb_poll, 64);
1216
1217         /* tie q_vector and adapter together */
1218         adapter->q_vector[v_idx] = q_vector;
1219         q_vector->adapter = adapter;
1220
1221         /* initialize work limits */
1222         q_vector->tx.work_limit = adapter->tx_work_limit;
1223
1224         /* initialize ITR configuration */
1225         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1226         q_vector->itr_val = IGB_START_ITR;
1227
1228         /* initialize pointer to rings */
1229         ring = q_vector->ring;
1230
1231         /* intialize ITR */
1232         if (rxr_count) {
1233                 /* rx or rx/tx vector */
1234                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1235                         q_vector->itr_val = adapter->rx_itr_setting;
1236         } else {
1237                 /* tx only vector */
1238                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1239                         q_vector->itr_val = adapter->tx_itr_setting;
1240         }
1241
1242         if (txr_count) {
1243                 /* assign generic ring traits */
1244                 ring->dev = &adapter->pdev->dev;
1245                 ring->netdev = adapter->netdev;
1246
1247                 /* configure backlink on ring */
1248                 ring->q_vector = q_vector;
1249
1250                 /* update q_vector Tx values */
1251                 igb_add_ring(ring, &q_vector->tx);
1252
1253                 /* For 82575, context index must be unique per ring. */
1254                 if (adapter->hw.mac.type == e1000_82575)
1255                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1256
1257                 /* apply Tx specific ring traits */
1258                 ring->count = adapter->tx_ring_count;
1259                 ring->queue_index = txr_idx;
1260
1261                 ring->cbs_enable = false;
1262                 ring->idleslope = 0;
1263                 ring->sendslope = 0;
1264                 ring->hicredit = 0;
1265                 ring->locredit = 0;
1266
1267                 u64_stats_init(&ring->tx_syncp);
1268                 u64_stats_init(&ring->tx_syncp2);
1269
1270                 /* assign ring to adapter */
1271                 adapter->tx_ring[txr_idx] = ring;
1272
1273                 /* push pointer to next ring */
1274                 ring++;
1275         }
1276
1277         if (rxr_count) {
1278                 /* assign generic ring traits */
1279                 ring->dev = &adapter->pdev->dev;
1280                 ring->netdev = adapter->netdev;
1281
1282                 /* configure backlink on ring */
1283                 ring->q_vector = q_vector;
1284
1285                 /* update q_vector Rx values */
1286                 igb_add_ring(ring, &q_vector->rx);
1287
1288                 /* set flag indicating ring supports SCTP checksum offload */
1289                 if (adapter->hw.mac.type >= e1000_82576)
1290                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1291
1292                 /* On i350, i354, i210, and i211, loopback VLAN packets
1293                  * have the tag byte-swapped.
1294                  */
1295                 if (adapter->hw.mac.type >= e1000_i350)
1296                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1297
1298                 /* apply Rx specific ring traits */
1299                 ring->count = adapter->rx_ring_count;
1300                 ring->queue_index = rxr_idx;
1301
1302                 u64_stats_init(&ring->rx_syncp);
1303
1304                 /* assign ring to adapter */
1305                 adapter->rx_ring[rxr_idx] = ring;
1306         }
1307
1308         return 0;
1309 }
1310
1311
1312 /**
1313  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1314  *  @adapter: board private structure to initialize
1315  *
1316  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1317  *  return -ENOMEM.
1318  **/
1319 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1320 {
1321         int q_vectors = adapter->num_q_vectors;
1322         int rxr_remaining = adapter->num_rx_queues;
1323         int txr_remaining = adapter->num_tx_queues;
1324         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1325         int err;
1326
1327         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1328                 for (; rxr_remaining; v_idx++) {
1329                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1330                                                  0, 0, 1, rxr_idx);
1331
1332                         if (err)
1333                                 goto err_out;
1334
1335                         /* update counts and index */
1336                         rxr_remaining--;
1337                         rxr_idx++;
1338                 }
1339         }
1340
1341         for (; v_idx < q_vectors; v_idx++) {
1342                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1343                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1344
1345                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1346                                          tqpv, txr_idx, rqpv, rxr_idx);
1347
1348                 if (err)
1349                         goto err_out;
1350
1351                 /* update counts and index */
1352                 rxr_remaining -= rqpv;
1353                 txr_remaining -= tqpv;
1354                 rxr_idx++;
1355                 txr_idx++;
1356         }
1357
1358         return 0;
1359
1360 err_out:
1361         adapter->num_tx_queues = 0;
1362         adapter->num_rx_queues = 0;
1363         adapter->num_q_vectors = 0;
1364
1365         while (v_idx--)
1366                 igb_free_q_vector(adapter, v_idx);
1367
1368         return -ENOMEM;
1369 }
1370
1371 /**
1372  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1373  *  @adapter: board private structure to initialize
1374  *  @msix: boolean value of MSIX capability
1375  *
1376  *  This function initializes the interrupts and allocates all of the queues.
1377  **/
1378 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1379 {
1380         struct pci_dev *pdev = adapter->pdev;
1381         int err;
1382
1383         igb_set_interrupt_capability(adapter, msix);
1384
1385         err = igb_alloc_q_vectors(adapter);
1386         if (err) {
1387                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1388                 goto err_alloc_q_vectors;
1389         }
1390
1391         igb_cache_ring_register(adapter);
1392
1393         return 0;
1394
1395 err_alloc_q_vectors:
1396         igb_reset_interrupt_capability(adapter);
1397         return err;
1398 }
1399
1400 /**
1401  *  igb_request_irq - initialize interrupts
1402  *  @adapter: board private structure to initialize
1403  *
1404  *  Attempts to configure interrupts using the best available
1405  *  capabilities of the hardware and kernel.
1406  **/
1407 static int igb_request_irq(struct igb_adapter *adapter)
1408 {
1409         struct net_device *netdev = adapter->netdev;
1410         struct pci_dev *pdev = adapter->pdev;
1411         int err = 0;
1412
1413         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1414                 err = igb_request_msix(adapter);
1415                 if (!err)
1416                         goto request_done;
1417                 /* fall back to MSI */
1418                 igb_free_all_tx_resources(adapter);
1419                 igb_free_all_rx_resources(adapter);
1420
1421                 igb_clear_interrupt_scheme(adapter);
1422                 err = igb_init_interrupt_scheme(adapter, false);
1423                 if (err)
1424                         goto request_done;
1425
1426                 igb_setup_all_tx_resources(adapter);
1427                 igb_setup_all_rx_resources(adapter);
1428                 igb_configure(adapter);
1429         }
1430
1431         igb_assign_vector(adapter->q_vector[0], 0);
1432
1433         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1434                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1435                                   netdev->name, adapter);
1436                 if (!err)
1437                         goto request_done;
1438
1439                 /* fall back to legacy interrupts */
1440                 igb_reset_interrupt_capability(adapter);
1441                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1442         }
1443
1444         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1445                           netdev->name, adapter);
1446
1447         if (err)
1448                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1449                         err);
1450
1451 request_done:
1452         return err;
1453 }
1454
1455 static void igb_free_irq(struct igb_adapter *adapter)
1456 {
1457         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1458                 int vector = 0, i;
1459
1460                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1461
1462                 for (i = 0; i < adapter->num_q_vectors; i++)
1463                         free_irq(adapter->msix_entries[vector++].vector,
1464                                  adapter->q_vector[i]);
1465         } else {
1466                 free_irq(adapter->pdev->irq, adapter);
1467         }
1468 }
1469
1470 /**
1471  *  igb_irq_disable - Mask off interrupt generation on the NIC
1472  *  @adapter: board private structure
1473  **/
1474 static void igb_irq_disable(struct igb_adapter *adapter)
1475 {
1476         struct e1000_hw *hw = &adapter->hw;
1477
1478         /* we need to be careful when disabling interrupts.  The VFs are also
1479          * mapped into these registers and so clearing the bits can cause
1480          * issues on the VF drivers so we only need to clear what we set
1481          */
1482         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1483                 u32 regval = rd32(E1000_EIAM);
1484
1485                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1486                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1487                 regval = rd32(E1000_EIAC);
1488                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1489         }
1490
1491         wr32(E1000_IAM, 0);
1492         wr32(E1000_IMC, ~0);
1493         wrfl();
1494         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1495                 int i;
1496
1497                 for (i = 0; i < adapter->num_q_vectors; i++)
1498                         synchronize_irq(adapter->msix_entries[i].vector);
1499         } else {
1500                 synchronize_irq(adapter->pdev->irq);
1501         }
1502 }
1503
1504 /**
1505  *  igb_irq_enable - Enable default interrupt generation settings
1506  *  @adapter: board private structure
1507  **/
1508 static void igb_irq_enable(struct igb_adapter *adapter)
1509 {
1510         struct e1000_hw *hw = &adapter->hw;
1511
1512         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1513                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1514                 u32 regval = rd32(E1000_EIAC);
1515
1516                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1517                 regval = rd32(E1000_EIAM);
1518                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1519                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1520                 if (adapter->vfs_allocated_count) {
1521                         wr32(E1000_MBVFIMR, 0xFF);
1522                         ims |= E1000_IMS_VMMB;
1523                 }
1524                 wr32(E1000_IMS, ims);
1525         } else {
1526                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1527                                 E1000_IMS_DRSTA);
1528                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530         }
1531 }
1532
1533 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1534 {
1535         struct e1000_hw *hw = &adapter->hw;
1536         u16 pf_id = adapter->vfs_allocated_count;
1537         u16 vid = adapter->hw.mng_cookie.vlan_id;
1538         u16 old_vid = adapter->mng_vlan_id;
1539
1540         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1541                 /* add VID to filter table */
1542                 igb_vfta_set(hw, vid, pf_id, true, true);
1543                 adapter->mng_vlan_id = vid;
1544         } else {
1545                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1546         }
1547
1548         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1549             (vid != old_vid) &&
1550             !test_bit(old_vid, adapter->active_vlans)) {
1551                 /* remove VID from filter table */
1552                 igb_vfta_set(hw, vid, pf_id, false, true);
1553         }
1554 }
1555
1556 /**
1557  *  igb_release_hw_control - release control of the h/w to f/w
1558  *  @adapter: address of board private structure
1559  *
1560  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1561  *  For ASF and Pass Through versions of f/w this means that the
1562  *  driver is no longer loaded.
1563  **/
1564 static void igb_release_hw_control(struct igb_adapter *adapter)
1565 {
1566         struct e1000_hw *hw = &adapter->hw;
1567         u32 ctrl_ext;
1568
1569         /* Let firmware take over control of h/w */
1570         ctrl_ext = rd32(E1000_CTRL_EXT);
1571         wr32(E1000_CTRL_EXT,
1572                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1573 }
1574
1575 /**
1576  *  igb_get_hw_control - get control of the h/w from f/w
1577  *  @adapter: address of board private structure
1578  *
1579  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1580  *  For ASF and Pass Through versions of f/w this means that
1581  *  the driver is loaded.
1582  **/
1583 static void igb_get_hw_control(struct igb_adapter *adapter)
1584 {
1585         struct e1000_hw *hw = &adapter->hw;
1586         u32 ctrl_ext;
1587
1588         /* Let firmware know the driver has taken over */
1589         ctrl_ext = rd32(E1000_CTRL_EXT);
1590         wr32(E1000_CTRL_EXT,
1591                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1592 }
1593
1594 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1595 {
1596         struct net_device *netdev = adapter->netdev;
1597         struct e1000_hw *hw = &adapter->hw;
1598
1599         WARN_ON(hw->mac.type != e1000_i210);
1600
1601         if (enable)
1602                 adapter->flags |= IGB_FLAG_FQTSS;
1603         else
1604                 adapter->flags &= ~IGB_FLAG_FQTSS;
1605
1606         if (netif_running(netdev))
1607                 schedule_work(&adapter->reset_task);
1608 }
1609
1610 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1611 {
1612         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1613 }
1614
1615 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1616                                    enum tx_queue_prio prio)
1617 {
1618         u32 val;
1619
1620         WARN_ON(hw->mac.type != e1000_i210);
1621         WARN_ON(queue < 0 || queue > 4);
1622
1623         val = rd32(E1000_I210_TXDCTL(queue));
1624
1625         if (prio == TX_QUEUE_PRIO_HIGH)
1626                 val |= E1000_TXDCTL_PRIORITY;
1627         else
1628                 val &= ~E1000_TXDCTL_PRIORITY;
1629
1630         wr32(E1000_I210_TXDCTL(queue), val);
1631 }
1632
1633 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1634 {
1635         u32 val;
1636
1637         WARN_ON(hw->mac.type != e1000_i210);
1638         WARN_ON(queue < 0 || queue > 1);
1639
1640         val = rd32(E1000_I210_TQAVCC(queue));
1641
1642         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1643                 val |= E1000_TQAVCC_QUEUEMODE;
1644         else
1645                 val &= ~E1000_TQAVCC_QUEUEMODE;
1646
1647         wr32(E1000_I210_TQAVCC(queue), val);
1648 }
1649
1650 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1651 {
1652         int i;
1653
1654         for (i = 0; i < adapter->num_tx_queues; i++) {
1655                 if (adapter->tx_ring[i]->cbs_enable)
1656                         return true;
1657         }
1658
1659         return false;
1660 }
1661
1662 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1663 {
1664         int i;
1665
1666         for (i = 0; i < adapter->num_tx_queues; i++) {
1667                 if (adapter->tx_ring[i]->launchtime_enable)
1668                         return true;
1669         }
1670
1671         return false;
1672 }
1673
1674 /**
1675  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1676  *  @adapter: pointer to adapter struct
1677  *  @queue: queue number
1678  *
1679  *  Configure CBS and Launchtime for a given hardware queue.
1680  *  Parameters are retrieved from the correct Tx ring, so
1681  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1682  *  for setting those correctly prior to this function being called.
1683  **/
1684 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1685 {
1686         struct net_device *netdev = adapter->netdev;
1687         struct e1000_hw *hw = &adapter->hw;
1688         struct igb_ring *ring;
1689         u32 tqavcc, tqavctrl;
1690         u16 value;
1691
1692         WARN_ON(hw->mac.type != e1000_i210);
1693         WARN_ON(queue < 0 || queue > 1);
1694         ring = adapter->tx_ring[queue];
1695
1696         /* If any of the Qav features is enabled, configure queues as SR and
1697          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1698          * as SP.
1699          */
1700         if (ring->cbs_enable || ring->launchtime_enable) {
1701                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1702                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1703         } else {
1704                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1705                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1706         }
1707
1708         /* If CBS is enabled, set DataTranARB and config its parameters. */
1709         if (ring->cbs_enable || queue == 0) {
1710                 /* i210 does not allow the queue 0 to be in the Strict
1711                  * Priority mode while the Qav mode is enabled, so,
1712                  * instead of disabling strict priority mode, we give
1713                  * queue 0 the maximum of credits possible.
1714                  *
1715                  * See section 8.12.19 of the i210 datasheet, "Note:
1716                  * Queue0 QueueMode must be set to 1b when
1717                  * TransmitMode is set to Qav."
1718                  */
1719                 if (queue == 0 && !ring->cbs_enable) {
1720                         /* max "linkspeed" idleslope in kbps */
1721                         ring->idleslope = 1000000;
1722                         ring->hicredit = ETH_FRAME_LEN;
1723                 }
1724
1725                 /* Always set data transfer arbitration to credit-based
1726                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1727                  * the queues.
1728                  */
1729                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1730                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1731                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1732
1733                 /* According to i210 datasheet section 7.2.7.7, we should set
1734                  * the 'idleSlope' field from TQAVCC register following the
1735                  * equation:
1736                  *
1737                  * For 100 Mbps link speed:
1738                  *
1739                  *     value = BW * 0x7735 * 0.2                          (E1)
1740                  *
1741                  * For 1000Mbps link speed:
1742                  *
1743                  *     value = BW * 0x7735 * 2                            (E2)
1744                  *
1745                  * E1 and E2 can be merged into one equation as shown below.
1746                  * Note that 'link-speed' is in Mbps.
1747                  *
1748                  *     value = BW * 0x7735 * 2 * link-speed
1749                  *                           --------------               (E3)
1750                  *                                1000
1751                  *
1752                  * 'BW' is the percentage bandwidth out of full link speed
1753                  * which can be found with the following equation. Note that
1754                  * idleSlope here is the parameter from this function which
1755                  * is in kbps.
1756                  *
1757                  *     BW =     idleSlope
1758                  *          -----------------                             (E4)
1759                  *          link-speed * 1000
1760                  *
1761                  * That said, we can come up with a generic equation to
1762                  * calculate the value we should set it TQAVCC register by
1763                  * replacing 'BW' in E3 by E4. The resulting equation is:
1764                  *
1765                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1766                  *         -----------------            --------------    (E5)
1767                  *         link-speed * 1000                 1000
1768                  *
1769                  * 'link-speed' is present in both sides of the fraction so
1770                  * it is canceled out. The final equation is the following:
1771                  *
1772                  *     value = idleSlope * 61034
1773                  *             -----------------                          (E6)
1774                  *                  1000000
1775                  *
1776                  * NOTE: For i210, given the above, we can see that idleslope
1777                  *       is represented in 16.38431 kbps units by the value at
1778                  *       the TQAVCC register (1Gbps / 61034), which reduces
1779                  *       the granularity for idleslope increments.
1780                  *       For instance, if you want to configure a 2576kbps
1781                  *       idleslope, the value to be written on the register
1782                  *       would have to be 157.23. If rounded down, you end
1783                  *       up with less bandwidth available than originally
1784                  *       required (~2572 kbps). If rounded up, you end up
1785                  *       with a higher bandwidth (~2589 kbps). Below the
1786                  *       approach we take is to always round up the
1787                  *       calculated value, so the resulting bandwidth might
1788                  *       be slightly higher for some configurations.
1789                  */
1790                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1791
1792                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1793                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1794                 tqavcc |= value;
1795                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1796
1797                 wr32(E1000_I210_TQAVHC(queue),
1798                      0x80000000 + ring->hicredit * 0x7735);
1799         } else {
1800
1801                 /* Set idleSlope to zero. */
1802                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1803                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1804                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1805
1806                 /* Set hiCredit to zero. */
1807                 wr32(E1000_I210_TQAVHC(queue), 0);
1808
1809                 /* If CBS is not enabled for any queues anymore, then return to
1810                  * the default state of Data Transmission Arbitration on
1811                  * TQAVCTRL.
1812                  */
1813                 if (!is_any_cbs_enabled(adapter)) {
1814                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1815                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1816                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1817                 }
1818         }
1819
1820         /* If LaunchTime is enabled, set DataTranTIM. */
1821         if (ring->launchtime_enable) {
1822                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1823                  * for any of the SR queues, and configure fetchtime delta.
1824                  * XXX NOTE:
1825                  *     - LaunchTime will be enabled for all SR queues.
1826                  *     - A fixed offset can be added relative to the launch
1827                  *       time of all packets if configured at reg LAUNCH_OS0.
1828                  *       We are keeping it as 0 for now (default value).
1829                  */
1830                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1831                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1832                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1833                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1834         } else {
1835                 /* If Launchtime is not enabled for any SR queues anymore,
1836                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1837                  * effectively disabling Launchtime.
1838                  */
1839                 if (!is_any_txtime_enabled(adapter)) {
1840                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1841                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1842                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1843                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1844                 }
1845         }
1846
1847         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1848          * CBS are not configurable by software so we don't do any 'controller
1849          * configuration' in respect to these parameters.
1850          */
1851
1852         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1853                    ring->cbs_enable ? "enabled" : "disabled",
1854                    ring->launchtime_enable ? "enabled" : "disabled",
1855                    queue,
1856                    ring->idleslope, ring->sendslope,
1857                    ring->hicredit, ring->locredit);
1858 }
1859
1860 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1861                                   bool enable)
1862 {
1863         struct igb_ring *ring;
1864
1865         if (queue < 0 || queue > adapter->num_tx_queues)
1866                 return -EINVAL;
1867
1868         ring = adapter->tx_ring[queue];
1869         ring->launchtime_enable = enable;
1870
1871         return 0;
1872 }
1873
1874 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1875                                bool enable, int idleslope, int sendslope,
1876                                int hicredit, int locredit)
1877 {
1878         struct igb_ring *ring;
1879
1880         if (queue < 0 || queue > adapter->num_tx_queues)
1881                 return -EINVAL;
1882
1883         ring = adapter->tx_ring[queue];
1884
1885         ring->cbs_enable = enable;
1886         ring->idleslope = idleslope;
1887         ring->sendslope = sendslope;
1888         ring->hicredit = hicredit;
1889         ring->locredit = locredit;
1890
1891         return 0;
1892 }
1893
1894 /**
1895  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1896  *  @adapter: pointer to adapter struct
1897  *
1898  *  Configure TQAVCTRL register switching the controller's Tx mode
1899  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1900  *  a call to igb_config_tx_modes() per queue so any previously saved
1901  *  Tx parameters are applied.
1902  **/
1903 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1904 {
1905         struct net_device *netdev = adapter->netdev;
1906         struct e1000_hw *hw = &adapter->hw;
1907         u32 val;
1908
1909         /* Only i210 controller supports changing the transmission mode. */
1910         if (hw->mac.type != e1000_i210)
1911                 return;
1912
1913         if (is_fqtss_enabled(adapter)) {
1914                 int i, max_queue;
1915
1916                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1917                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1918                  * so SP queues wait for SR ones.
1919                  */
1920                 val = rd32(E1000_I210_TQAVCTRL);
1921                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1922                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1923                 wr32(E1000_I210_TQAVCTRL, val);
1924
1925                 /* Configure Tx and Rx packet buffers sizes as described in
1926                  * i210 datasheet section 7.2.7.7.
1927                  */
1928                 val = rd32(E1000_TXPBS);
1929                 val &= ~I210_TXPBSIZE_MASK;
1930                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1931                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1932                 wr32(E1000_TXPBS, val);
1933
1934                 val = rd32(E1000_RXPBS);
1935                 val &= ~I210_RXPBSIZE_MASK;
1936                 val |= I210_RXPBSIZE_PB_30KB;
1937                 wr32(E1000_RXPBS, val);
1938
1939                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1940                  * register should not exceed the buffer size programmed in
1941                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1942                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1943                  * 4kB / 64.
1944                  *
1945                  * However, when we do so, no frame from queue 2 and 3 are
1946                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1947                  * or _equal_ to the buffer size programmed in TXPBS. For this
1948                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1949                  */
1950                 val = (4096 - 1) / 64;
1951                 wr32(E1000_I210_DTXMXPKTSZ, val);
1952
1953                 /* Since FQTSS mode is enabled, apply any CBS configuration
1954                  * previously set. If no previous CBS configuration has been
1955                  * done, then the initial configuration is applied, which means
1956                  * CBS is disabled.
1957                  */
1958                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1959                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1960
1961                 for (i = 0; i < max_queue; i++) {
1962                         igb_config_tx_modes(adapter, i);
1963                 }
1964         } else {
1965                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1966                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1967                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1968
1969                 val = rd32(E1000_I210_TQAVCTRL);
1970                 /* According to Section 8.12.21, the other flags we've set when
1971                  * enabling FQTSS are not relevant when disabling FQTSS so we
1972                  * don't set they here.
1973                  */
1974                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1975                 wr32(E1000_I210_TQAVCTRL, val);
1976         }
1977
1978         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1979                    "enabled" : "disabled");
1980 }
1981
1982 /**
1983  *  igb_configure - configure the hardware for RX and TX
1984  *  @adapter: private board structure
1985  **/
1986 static void igb_configure(struct igb_adapter *adapter)
1987 {
1988         struct net_device *netdev = adapter->netdev;
1989         int i;
1990
1991         igb_get_hw_control(adapter);
1992         igb_set_rx_mode(netdev);
1993         igb_setup_tx_mode(adapter);
1994
1995         igb_restore_vlan(adapter);
1996
1997         igb_setup_tctl(adapter);
1998         igb_setup_mrqc(adapter);
1999         igb_setup_rctl(adapter);
2000
2001         igb_nfc_filter_restore(adapter);
2002         igb_configure_tx(adapter);
2003         igb_configure_rx(adapter);
2004
2005         igb_rx_fifo_flush_82575(&adapter->hw);
2006
2007         /* call igb_desc_unused which always leaves
2008          * at least 1 descriptor unused to make sure
2009          * next_to_use != next_to_clean
2010          */
2011         for (i = 0; i < adapter->num_rx_queues; i++) {
2012                 struct igb_ring *ring = adapter->rx_ring[i];
2013                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2014         }
2015 }
2016
2017 /**
2018  *  igb_power_up_link - Power up the phy/serdes link
2019  *  @adapter: address of board private structure
2020  **/
2021 void igb_power_up_link(struct igb_adapter *adapter)
2022 {
2023         igb_reset_phy(&adapter->hw);
2024
2025         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2026                 igb_power_up_phy_copper(&adapter->hw);
2027         else
2028                 igb_power_up_serdes_link_82575(&adapter->hw);
2029
2030         igb_setup_link(&adapter->hw);
2031 }
2032
2033 /**
2034  *  igb_power_down_link - Power down the phy/serdes link
2035  *  @adapter: address of board private structure
2036  */
2037 static void igb_power_down_link(struct igb_adapter *adapter)
2038 {
2039         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2040                 igb_power_down_phy_copper_82575(&adapter->hw);
2041         else
2042                 igb_shutdown_serdes_link_82575(&adapter->hw);
2043 }
2044
2045 /**
2046  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2047  * @adapter: address of the board private structure
2048  **/
2049 static void igb_check_swap_media(struct igb_adapter *adapter)
2050 {
2051         struct e1000_hw *hw = &adapter->hw;
2052         u32 ctrl_ext, connsw;
2053         bool swap_now = false;
2054
2055         ctrl_ext = rd32(E1000_CTRL_EXT);
2056         connsw = rd32(E1000_CONNSW);
2057
2058         /* need to live swap if current media is copper and we have fiber/serdes
2059          * to go to.
2060          */
2061
2062         if ((hw->phy.media_type == e1000_media_type_copper) &&
2063             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2064                 swap_now = true;
2065         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2066                    !(connsw & E1000_CONNSW_SERDESD)) {
2067                 /* copper signal takes time to appear */
2068                 if (adapter->copper_tries < 4) {
2069                         adapter->copper_tries++;
2070                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2071                         wr32(E1000_CONNSW, connsw);
2072                         return;
2073                 } else {
2074                         adapter->copper_tries = 0;
2075                         if ((connsw & E1000_CONNSW_PHYSD) &&
2076                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2077                                 swap_now = true;
2078                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2079                                 wr32(E1000_CONNSW, connsw);
2080                         }
2081                 }
2082         }
2083
2084         if (!swap_now)
2085                 return;
2086
2087         switch (hw->phy.media_type) {
2088         case e1000_media_type_copper:
2089                 netdev_info(adapter->netdev,
2090                         "MAS: changing media to fiber/serdes\n");
2091                 ctrl_ext |=
2092                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2093                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2094                 adapter->copper_tries = 0;
2095                 break;
2096         case e1000_media_type_internal_serdes:
2097         case e1000_media_type_fiber:
2098                 netdev_info(adapter->netdev,
2099                         "MAS: changing media to copper\n");
2100                 ctrl_ext &=
2101                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2102                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2103                 break;
2104         default:
2105                 /* shouldn't get here during regular operation */
2106                 netdev_err(adapter->netdev,
2107                         "AMS: Invalid media type found, returning\n");
2108                 break;
2109         }
2110         wr32(E1000_CTRL_EXT, ctrl_ext);
2111 }
2112
2113 /**
2114  *  igb_up - Open the interface and prepare it to handle traffic
2115  *  @adapter: board private structure
2116  **/
2117 int igb_up(struct igb_adapter *adapter)
2118 {
2119         struct e1000_hw *hw = &adapter->hw;
2120         int i;
2121
2122         /* hardware has been reset, we need to reload some things */
2123         igb_configure(adapter);
2124
2125         clear_bit(__IGB_DOWN, &adapter->state);
2126
2127         for (i = 0; i < adapter->num_q_vectors; i++)
2128                 napi_enable(&(adapter->q_vector[i]->napi));
2129
2130         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2131                 igb_configure_msix(adapter);
2132         else
2133                 igb_assign_vector(adapter->q_vector[0], 0);
2134
2135         /* Clear any pending interrupts. */
2136         rd32(E1000_TSICR);
2137         rd32(E1000_ICR);
2138         igb_irq_enable(adapter);
2139
2140         /* notify VFs that reset has been completed */
2141         if (adapter->vfs_allocated_count) {
2142                 u32 reg_data = rd32(E1000_CTRL_EXT);
2143
2144                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2145                 wr32(E1000_CTRL_EXT, reg_data);
2146         }
2147
2148         netif_tx_start_all_queues(adapter->netdev);
2149
2150         /* start the watchdog. */
2151         hw->mac.get_link_status = 1;
2152         schedule_work(&adapter->watchdog_task);
2153
2154         if ((adapter->flags & IGB_FLAG_EEE) &&
2155             (!hw->dev_spec._82575.eee_disable))
2156                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2157
2158         return 0;
2159 }
2160
2161 void igb_down(struct igb_adapter *adapter)
2162 {
2163         struct net_device *netdev = adapter->netdev;
2164         struct e1000_hw *hw = &adapter->hw;
2165         u32 tctl, rctl;
2166         int i;
2167
2168         /* signal that we're down so the interrupt handler does not
2169          * reschedule our watchdog timer
2170          */
2171         set_bit(__IGB_DOWN, &adapter->state);
2172
2173         /* disable receives in the hardware */
2174         rctl = rd32(E1000_RCTL);
2175         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2176         /* flush and sleep below */
2177
2178         igb_nfc_filter_exit(adapter);
2179
2180         netif_carrier_off(netdev);
2181         netif_tx_stop_all_queues(netdev);
2182
2183         /* disable transmits in the hardware */
2184         tctl = rd32(E1000_TCTL);
2185         tctl &= ~E1000_TCTL_EN;
2186         wr32(E1000_TCTL, tctl);
2187         /* flush both disables and wait for them to finish */
2188         wrfl();
2189         usleep_range(10000, 11000);
2190
2191         igb_irq_disable(adapter);
2192
2193         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2194
2195         for (i = 0; i < adapter->num_q_vectors; i++) {
2196                 if (adapter->q_vector[i]) {
2197                         napi_synchronize(&adapter->q_vector[i]->napi);
2198                         napi_disable(&adapter->q_vector[i]->napi);
2199                 }
2200         }
2201
2202         del_timer_sync(&adapter->watchdog_timer);
2203         del_timer_sync(&adapter->phy_info_timer);
2204
2205         /* record the stats before reset*/
2206         spin_lock(&adapter->stats64_lock);
2207         igb_update_stats(adapter);
2208         spin_unlock(&adapter->stats64_lock);
2209
2210         adapter->link_speed = 0;
2211         adapter->link_duplex = 0;
2212
2213         if (!pci_channel_offline(adapter->pdev))
2214                 igb_reset(adapter);
2215
2216         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2217         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2218
2219         igb_clean_all_tx_rings(adapter);
2220         igb_clean_all_rx_rings(adapter);
2221 #ifdef CONFIG_IGB_DCA
2222
2223         /* since we reset the hardware DCA settings were cleared */
2224         igb_setup_dca(adapter);
2225 #endif
2226 }
2227
2228 void igb_reinit_locked(struct igb_adapter *adapter)
2229 {
2230         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2231                 usleep_range(1000, 2000);
2232         igb_down(adapter);
2233         igb_up(adapter);
2234         clear_bit(__IGB_RESETTING, &adapter->state);
2235 }
2236
2237 /** igb_enable_mas - Media Autosense re-enable after swap
2238  *
2239  * @adapter: adapter struct
2240  **/
2241 static void igb_enable_mas(struct igb_adapter *adapter)
2242 {
2243         struct e1000_hw *hw = &adapter->hw;
2244         u32 connsw = rd32(E1000_CONNSW);
2245
2246         /* configure for SerDes media detect */
2247         if ((hw->phy.media_type == e1000_media_type_copper) &&
2248             (!(connsw & E1000_CONNSW_SERDESD))) {
2249                 connsw |= E1000_CONNSW_ENRGSRC;
2250                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2251                 wr32(E1000_CONNSW, connsw);
2252                 wrfl();
2253         }
2254 }
2255
2256 void igb_reset(struct igb_adapter *adapter)
2257 {
2258         struct pci_dev *pdev = adapter->pdev;
2259         struct e1000_hw *hw = &adapter->hw;
2260         struct e1000_mac_info *mac = &hw->mac;
2261         struct e1000_fc_info *fc = &hw->fc;
2262         u32 pba, hwm;
2263
2264         /* Repartition Pba for greater than 9k mtu
2265          * To take effect CTRL.RST is required.
2266          */
2267         switch (mac->type) {
2268         case e1000_i350:
2269         case e1000_i354:
2270         case e1000_82580:
2271                 pba = rd32(E1000_RXPBS);
2272                 pba = igb_rxpbs_adjust_82580(pba);
2273                 break;
2274         case e1000_82576:
2275                 pba = rd32(E1000_RXPBS);
2276                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2277                 break;
2278         case e1000_82575:
2279         case e1000_i210:
2280         case e1000_i211:
2281         default:
2282                 pba = E1000_PBA_34K;
2283                 break;
2284         }
2285
2286         if (mac->type == e1000_82575) {
2287                 u32 min_rx_space, min_tx_space, needed_tx_space;
2288
2289                 /* write Rx PBA so that hardware can report correct Tx PBA */
2290                 wr32(E1000_PBA, pba);
2291
2292                 /* To maintain wire speed transmits, the Tx FIFO should be
2293                  * large enough to accommodate two full transmit packets,
2294                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2295                  * the Rx FIFO should be large enough to accommodate at least
2296                  * one full receive packet and is similarly rounded up and
2297                  * expressed in KB.
2298                  */
2299                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2300
2301                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2302                  * but don't include Ethernet FCS because hardware appends it.
2303                  * We only need to round down to the nearest 512 byte block
2304                  * count since the value we care about is 2 frames, not 1.
2305                  */
2306                 min_tx_space = adapter->max_frame_size;
2307                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2308                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2309
2310                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2311                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2312
2313                 /* If current Tx allocation is less than the min Tx FIFO size,
2314                  * and the min Tx FIFO size is less than the current Rx FIFO
2315                  * allocation, take space away from current Rx allocation.
2316                  */
2317                 if (needed_tx_space < pba) {
2318                         pba -= needed_tx_space;
2319
2320                         /* if short on Rx space, Rx wins and must trump Tx
2321                          * adjustment
2322                          */
2323                         if (pba < min_rx_space)
2324                                 pba = min_rx_space;
2325                 }
2326
2327                 /* adjust PBA for jumbo frames */
2328                 wr32(E1000_PBA, pba);
2329         }
2330
2331         /* flow control settings
2332          * The high water mark must be low enough to fit one full frame
2333          * after transmitting the pause frame.  As such we must have enough
2334          * space to allow for us to complete our current transmit and then
2335          * receive the frame that is in progress from the link partner.
2336          * Set it to:
2337          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2338          */
2339         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2340
2341         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2342         fc->low_water = fc->high_water - 16;
2343         fc->pause_time = 0xFFFF;
2344         fc->send_xon = 1;
2345         fc->current_mode = fc->requested_mode;
2346
2347         /* disable receive for all VFs and wait one second */
2348         if (adapter->vfs_allocated_count) {
2349                 int i;
2350
2351                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2352                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2353
2354                 /* ping all the active vfs to let them know we are going down */
2355                 igb_ping_all_vfs(adapter);
2356
2357                 /* disable transmits and receives */
2358                 wr32(E1000_VFRE, 0);
2359                 wr32(E1000_VFTE, 0);
2360         }
2361
2362         /* Allow time for pending master requests to run */
2363         hw->mac.ops.reset_hw(hw);
2364         wr32(E1000_WUC, 0);
2365
2366         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2367                 /* need to resetup here after media swap */
2368                 adapter->ei.get_invariants(hw);
2369                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2370         }
2371         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2372             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2373                 igb_enable_mas(adapter);
2374         }
2375         if (hw->mac.ops.init_hw(hw))
2376                 dev_err(&pdev->dev, "Hardware Error\n");
2377
2378         /* RAR registers were cleared during init_hw, clear mac table */
2379         igb_flush_mac_table(adapter);
2380         __dev_uc_unsync(adapter->netdev, NULL);
2381
2382         /* Recover default RAR entry */
2383         igb_set_default_mac_filter(adapter);
2384
2385         /* Flow control settings reset on hardware reset, so guarantee flow
2386          * control is off when forcing speed.
2387          */
2388         if (!hw->mac.autoneg)
2389                 igb_force_mac_fc(hw);
2390
2391         igb_init_dmac(adapter, pba);
2392 #ifdef CONFIG_IGB_HWMON
2393         /* Re-initialize the thermal sensor on i350 devices. */
2394         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2395                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2396                         /* If present, re-initialize the external thermal sensor
2397                          * interface.
2398                          */
2399                         if (adapter->ets)
2400                                 mac->ops.init_thermal_sensor_thresh(hw);
2401                 }
2402         }
2403 #endif
2404         /* Re-establish EEE setting */
2405         if (hw->phy.media_type == e1000_media_type_copper) {
2406                 switch (mac->type) {
2407                 case e1000_i350:
2408                 case e1000_i210:
2409                 case e1000_i211:
2410                         igb_set_eee_i350(hw, true, true);
2411                         break;
2412                 case e1000_i354:
2413                         igb_set_eee_i354(hw, true, true);
2414                         break;
2415                 default:
2416                         break;
2417                 }
2418         }
2419         if (!netif_running(adapter->netdev))
2420                 igb_power_down_link(adapter);
2421
2422         igb_update_mng_vlan(adapter);
2423
2424         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2425         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2426
2427         /* Re-enable PTP, where applicable. */
2428         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2429                 igb_ptp_reset(adapter);
2430
2431         igb_get_phy_info(hw);
2432 }
2433
2434 static netdev_features_t igb_fix_features(struct net_device *netdev,
2435         netdev_features_t features)
2436 {
2437         /* Since there is no support for separate Rx/Tx vlan accel
2438          * enable/disable make sure Tx flag is always in same state as Rx.
2439          */
2440         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2441                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2442         else
2443                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2444
2445         return features;
2446 }
2447
2448 static int igb_set_features(struct net_device *netdev,
2449         netdev_features_t features)
2450 {
2451         netdev_features_t changed = netdev->features ^ features;
2452         struct igb_adapter *adapter = netdev_priv(netdev);
2453
2454         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2455                 igb_vlan_mode(netdev, features);
2456
2457         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2458                 return 0;
2459
2460         if (!(features & NETIF_F_NTUPLE)) {
2461                 struct hlist_node *node2;
2462                 struct igb_nfc_filter *rule;
2463
2464                 spin_lock(&adapter->nfc_lock);
2465                 hlist_for_each_entry_safe(rule, node2,
2466                                           &adapter->nfc_filter_list, nfc_node) {
2467                         igb_erase_filter(adapter, rule);
2468                         hlist_del(&rule->nfc_node);
2469                         kfree(rule);
2470                 }
2471                 spin_unlock(&adapter->nfc_lock);
2472                 adapter->nfc_filter_count = 0;
2473         }
2474
2475         netdev->features = features;
2476
2477         if (netif_running(netdev))
2478                 igb_reinit_locked(adapter);
2479         else
2480                 igb_reset(adapter);
2481
2482         return 1;
2483 }
2484
2485 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2486                            struct net_device *dev,
2487                            const unsigned char *addr, u16 vid,
2488                            u16 flags,
2489                            struct netlink_ext_ack *extack)
2490 {
2491         /* guarantee we can provide a unique filter for the unicast address */
2492         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2493                 struct igb_adapter *adapter = netdev_priv(dev);
2494                 int vfn = adapter->vfs_allocated_count;
2495
2496                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2497                         return -ENOMEM;
2498         }
2499
2500         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2501 }
2502
2503 #define IGB_MAX_MAC_HDR_LEN     127
2504 #define IGB_MAX_NETWORK_HDR_LEN 511
2505
2506 static netdev_features_t
2507 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2508                    netdev_features_t features)
2509 {
2510         unsigned int network_hdr_len, mac_hdr_len;
2511
2512         /* Make certain the headers can be described by a context descriptor */
2513         mac_hdr_len = skb_network_header(skb) - skb->data;
2514         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2515                 return features & ~(NETIF_F_HW_CSUM |
2516                                     NETIF_F_SCTP_CRC |
2517                                     NETIF_F_GSO_UDP_L4 |
2518                                     NETIF_F_HW_VLAN_CTAG_TX |
2519                                     NETIF_F_TSO |
2520                                     NETIF_F_TSO6);
2521
2522         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2523         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2524                 return features & ~(NETIF_F_HW_CSUM |
2525                                     NETIF_F_SCTP_CRC |
2526                                     NETIF_F_GSO_UDP_L4 |
2527                                     NETIF_F_TSO |
2528                                     NETIF_F_TSO6);
2529
2530         /* We can only support IPV4 TSO in tunnels if we can mangle the
2531          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2532          */
2533         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2534                 features &= ~NETIF_F_TSO;
2535
2536         return features;
2537 }
2538
2539 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2540 {
2541         if (!is_fqtss_enabled(adapter)) {
2542                 enable_fqtss(adapter, true);
2543                 return;
2544         }
2545
2546         igb_config_tx_modes(adapter, queue);
2547
2548         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2549                 enable_fqtss(adapter, false);
2550 }
2551
2552 static int igb_offload_cbs(struct igb_adapter *adapter,
2553                            struct tc_cbs_qopt_offload *qopt)
2554 {
2555         struct e1000_hw *hw = &adapter->hw;
2556         int err;
2557
2558         /* CBS offloading is only supported by i210 controller. */
2559         if (hw->mac.type != e1000_i210)
2560                 return -EOPNOTSUPP;
2561
2562         /* CBS offloading is only supported by queue 0 and queue 1. */
2563         if (qopt->queue < 0 || qopt->queue > 1)
2564                 return -EINVAL;
2565
2566         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2567                                   qopt->idleslope, qopt->sendslope,
2568                                   qopt->hicredit, qopt->locredit);
2569         if (err)
2570                 return err;
2571
2572         igb_offload_apply(adapter, qopt->queue);
2573
2574         return 0;
2575 }
2576
2577 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2578 #define VLAN_PRIO_FULL_MASK (0x07)
2579
2580 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2581                                 struct flow_cls_offload *f,
2582                                 int traffic_class,
2583                                 struct igb_nfc_filter *input)
2584 {
2585         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2586         struct flow_dissector *dissector = rule->match.dissector;
2587         struct netlink_ext_ack *extack = f->common.extack;
2588
2589         if (dissector->used_keys &
2590             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2591               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2592               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2593               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2594                 NL_SET_ERR_MSG_MOD(extack,
2595                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2596                 return -EOPNOTSUPP;
2597         }
2598
2599         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2600                 struct flow_match_eth_addrs match;
2601
2602                 flow_rule_match_eth_addrs(rule, &match);
2603                 if (!is_zero_ether_addr(match.mask->dst)) {
2604                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2605                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2606                                 return -EINVAL;
2607                         }
2608
2609                         input->filter.match_flags |=
2610                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2611                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2612                 }
2613
2614                 if (!is_zero_ether_addr(match.mask->src)) {
2615                         if (!is_broadcast_ether_addr(match.mask->src)) {
2616                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2617                                 return -EINVAL;
2618                         }
2619
2620                         input->filter.match_flags |=
2621                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2622                         ether_addr_copy(input->filter.src_addr, match.key->src);
2623                 }
2624         }
2625
2626         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2627                 struct flow_match_basic match;
2628
2629                 flow_rule_match_basic(rule, &match);
2630                 if (match.mask->n_proto) {
2631                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2632                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2633                                 return -EINVAL;
2634                         }
2635
2636                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2637                         input->filter.etype = match.key->n_proto;
2638                 }
2639         }
2640
2641         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2642                 struct flow_match_vlan match;
2643
2644                 flow_rule_match_vlan(rule, &match);
2645                 if (match.mask->vlan_priority) {
2646                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2647                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2648                                 return -EINVAL;
2649                         }
2650
2651                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2652                         input->filter.vlan_tci =
2653                                 (__force __be16)match.key->vlan_priority;
2654                 }
2655         }
2656
2657         input->action = traffic_class;
2658         input->cookie = f->cookie;
2659
2660         return 0;
2661 }
2662
2663 static int igb_configure_clsflower(struct igb_adapter *adapter,
2664                                    struct flow_cls_offload *cls_flower)
2665 {
2666         struct netlink_ext_ack *extack = cls_flower->common.extack;
2667         struct igb_nfc_filter *filter, *f;
2668         int err, tc;
2669
2670         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2671         if (tc < 0) {
2672                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2673                 return -EINVAL;
2674         }
2675
2676         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2677         if (!filter)
2678                 return -ENOMEM;
2679
2680         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2681         if (err < 0)
2682                 goto err_parse;
2683
2684         spin_lock(&adapter->nfc_lock);
2685
2686         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2687                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2688                         err = -EEXIST;
2689                         NL_SET_ERR_MSG_MOD(extack,
2690                                            "This filter is already set in ethtool");
2691                         goto err_locked;
2692                 }
2693         }
2694
2695         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2696                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2697                         err = -EEXIST;
2698                         NL_SET_ERR_MSG_MOD(extack,
2699                                            "This filter is already set in cls_flower");
2700                         goto err_locked;
2701                 }
2702         }
2703
2704         err = igb_add_filter(adapter, filter);
2705         if (err < 0) {
2706                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2707                 goto err_locked;
2708         }
2709
2710         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2711
2712         spin_unlock(&adapter->nfc_lock);
2713
2714         return 0;
2715
2716 err_locked:
2717         spin_unlock(&adapter->nfc_lock);
2718
2719 err_parse:
2720         kfree(filter);
2721
2722         return err;
2723 }
2724
2725 static int igb_delete_clsflower(struct igb_adapter *adapter,
2726                                 struct flow_cls_offload *cls_flower)
2727 {
2728         struct igb_nfc_filter *filter;
2729         int err;
2730
2731         spin_lock(&adapter->nfc_lock);
2732
2733         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2734                 if (filter->cookie == cls_flower->cookie)
2735                         break;
2736
2737         if (!filter) {
2738                 err = -ENOENT;
2739                 goto out;
2740         }
2741
2742         err = igb_erase_filter(adapter, filter);
2743         if (err < 0)
2744                 goto out;
2745
2746         hlist_del(&filter->nfc_node);
2747         kfree(filter);
2748
2749 out:
2750         spin_unlock(&adapter->nfc_lock);
2751
2752         return err;
2753 }
2754
2755 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2756                                    struct flow_cls_offload *cls_flower)
2757 {
2758         switch (cls_flower->command) {
2759         case FLOW_CLS_REPLACE:
2760                 return igb_configure_clsflower(adapter, cls_flower);
2761         case FLOW_CLS_DESTROY:
2762                 return igb_delete_clsflower(adapter, cls_flower);
2763         case FLOW_CLS_STATS:
2764                 return -EOPNOTSUPP;
2765         default:
2766                 return -EOPNOTSUPP;
2767         }
2768 }
2769
2770 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2771                                  void *cb_priv)
2772 {
2773         struct igb_adapter *adapter = cb_priv;
2774
2775         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2776                 return -EOPNOTSUPP;
2777
2778         switch (type) {
2779         case TC_SETUP_CLSFLOWER:
2780                 return igb_setup_tc_cls_flower(adapter, type_data);
2781
2782         default:
2783                 return -EOPNOTSUPP;
2784         }
2785 }
2786
2787 static int igb_offload_txtime(struct igb_adapter *adapter,
2788                               struct tc_etf_qopt_offload *qopt)
2789 {
2790         struct e1000_hw *hw = &adapter->hw;
2791         int err;
2792
2793         /* Launchtime offloading is only supported by i210 controller. */
2794         if (hw->mac.type != e1000_i210)
2795                 return -EOPNOTSUPP;
2796
2797         /* Launchtime offloading is only supported by queues 0 and 1. */
2798         if (qopt->queue < 0 || qopt->queue > 1)
2799                 return -EINVAL;
2800
2801         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2802         if (err)
2803                 return err;
2804
2805         igb_offload_apply(adapter, qopt->queue);
2806
2807         return 0;
2808 }
2809
2810 static LIST_HEAD(igb_block_cb_list);
2811
2812 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2813                         void *type_data)
2814 {
2815         struct igb_adapter *adapter = netdev_priv(dev);
2816
2817         switch (type) {
2818         case TC_SETUP_QDISC_CBS:
2819                 return igb_offload_cbs(adapter, type_data);
2820         case TC_SETUP_BLOCK:
2821                 return flow_block_cb_setup_simple(type_data,
2822                                                   &igb_block_cb_list,
2823                                                   igb_setup_tc_block_cb,
2824                                                   adapter, adapter, true);
2825
2826         case TC_SETUP_QDISC_ETF:
2827                 return igb_offload_txtime(adapter, type_data);
2828
2829         default:
2830                 return -EOPNOTSUPP;
2831         }
2832 }
2833
2834 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2835 {
2836         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2837         struct igb_adapter *adapter = netdev_priv(dev);
2838         struct bpf_prog *prog = bpf->prog, *old_prog;
2839         bool running = netif_running(dev);
2840         bool need_reset;
2841
2842         /* verify igb ring attributes are sufficient for XDP */
2843         for (i = 0; i < adapter->num_rx_queues; i++) {
2844                 struct igb_ring *ring = adapter->rx_ring[i];
2845
2846                 if (frame_size > igb_rx_bufsz(ring)) {
2847                         NL_SET_ERR_MSG_MOD(bpf->extack,
2848                                            "The RX buffer size is too small for the frame size");
2849                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2850                                     igb_rx_bufsz(ring), frame_size);
2851                         return -EINVAL;
2852                 }
2853         }
2854
2855         old_prog = xchg(&adapter->xdp_prog, prog);
2856         need_reset = (!!prog != !!old_prog);
2857
2858         /* device is up and bpf is added/removed, must setup the RX queues */
2859         if (need_reset && running) {
2860                 igb_close(dev);
2861         } else {
2862                 for (i = 0; i < adapter->num_rx_queues; i++)
2863                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2864                             adapter->xdp_prog);
2865         }
2866
2867         if (old_prog)
2868                 bpf_prog_put(old_prog);
2869
2870         /* bpf is just replaced, RXQ and MTU are already setup */
2871         if (!need_reset)
2872                 return 0;
2873
2874         if (running)
2875                 igb_open(dev);
2876
2877         return 0;
2878 }
2879
2880 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2881 {
2882         switch (xdp->command) {
2883         case XDP_SETUP_PROG:
2884                 return igb_xdp_setup(dev, xdp);
2885         default:
2886                 return -EINVAL;
2887         }
2888 }
2889
2890 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2891 {
2892         /* Force memory writes to complete before letting h/w know there
2893          * are new descriptors to fetch.
2894          */
2895         wmb();
2896         writel(ring->next_to_use, ring->tail);
2897 }
2898
2899 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2900 {
2901         unsigned int r_idx = smp_processor_id();
2902
2903         if (r_idx >= adapter->num_tx_queues)
2904                 r_idx = r_idx % adapter->num_tx_queues;
2905
2906         return adapter->tx_ring[r_idx];
2907 }
2908
2909 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2910 {
2911         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2912         int cpu = smp_processor_id();
2913         struct igb_ring *tx_ring;
2914         struct netdev_queue *nq;
2915         u32 ret;
2916
2917         if (unlikely(!xdpf))
2918                 return IGB_XDP_CONSUMED;
2919
2920         /* During program transitions its possible adapter->xdp_prog is assigned
2921          * but ring has not been configured yet. In this case simply abort xmit.
2922          */
2923         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2924         if (unlikely(!tx_ring))
2925                 return IGB_XDP_CONSUMED;
2926
2927         nq = txring_txq(tx_ring);
2928         __netif_tx_lock(nq, cpu);
2929         /* Avoid transmit queue timeout since we share it with the slow path */
2930         txq_trans_cond_update(nq);
2931         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2932         __netif_tx_unlock(nq);
2933
2934         return ret;
2935 }
2936
2937 static int igb_xdp_xmit(struct net_device *dev, int n,
2938                         struct xdp_frame **frames, u32 flags)
2939 {
2940         struct igb_adapter *adapter = netdev_priv(dev);
2941         int cpu = smp_processor_id();
2942         struct igb_ring *tx_ring;
2943         struct netdev_queue *nq;
2944         int nxmit = 0;
2945         int i;
2946
2947         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
2948                 return -ENETDOWN;
2949
2950         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2951                 return -EINVAL;
2952
2953         /* During program transitions its possible adapter->xdp_prog is assigned
2954          * but ring has not been configured yet. In this case simply abort xmit.
2955          */
2956         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2957         if (unlikely(!tx_ring))
2958                 return -ENXIO;
2959
2960         nq = txring_txq(tx_ring);
2961         __netif_tx_lock(nq, cpu);
2962
2963         /* Avoid transmit queue timeout since we share it with the slow path */
2964         txq_trans_cond_update(nq);
2965
2966         for (i = 0; i < n; i++) {
2967                 struct xdp_frame *xdpf = frames[i];
2968                 int err;
2969
2970                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2971                 if (err != IGB_XDP_TX)
2972                         break;
2973                 nxmit++;
2974         }
2975
2976         __netif_tx_unlock(nq);
2977
2978         if (unlikely(flags & XDP_XMIT_FLUSH))
2979                 igb_xdp_ring_update_tail(tx_ring);
2980
2981         return nxmit;
2982 }
2983
2984 static const struct net_device_ops igb_netdev_ops = {
2985         .ndo_open               = igb_open,
2986         .ndo_stop               = igb_close,
2987         .ndo_start_xmit         = igb_xmit_frame,
2988         .ndo_get_stats64        = igb_get_stats64,
2989         .ndo_set_rx_mode        = igb_set_rx_mode,
2990         .ndo_set_mac_address    = igb_set_mac,
2991         .ndo_change_mtu         = igb_change_mtu,
2992         .ndo_eth_ioctl          = igb_ioctl,
2993         .ndo_tx_timeout         = igb_tx_timeout,
2994         .ndo_validate_addr      = eth_validate_addr,
2995         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2996         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2997         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2998         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2999         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3000         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3001         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3002         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3003         .ndo_fix_features       = igb_fix_features,
3004         .ndo_set_features       = igb_set_features,
3005         .ndo_fdb_add            = igb_ndo_fdb_add,
3006         .ndo_features_check     = igb_features_check,
3007         .ndo_setup_tc           = igb_setup_tc,
3008         .ndo_bpf                = igb_xdp,
3009         .ndo_xdp_xmit           = igb_xdp_xmit,
3010 };
3011
3012 /**
3013  * igb_set_fw_version - Configure version string for ethtool
3014  * @adapter: adapter struct
3015  **/
3016 void igb_set_fw_version(struct igb_adapter *adapter)
3017 {
3018         struct e1000_hw *hw = &adapter->hw;
3019         struct e1000_fw_version fw;
3020
3021         igb_get_fw_version(hw, &fw);
3022
3023         switch (hw->mac.type) {
3024         case e1000_i210:
3025         case e1000_i211:
3026                 if (!(igb_get_flash_presence_i210(hw))) {
3027                         snprintf(adapter->fw_version,
3028                                  sizeof(adapter->fw_version),
3029                                  "%2d.%2d-%d",
3030                                  fw.invm_major, fw.invm_minor,
3031                                  fw.invm_img_type);
3032                         break;
3033                 }
3034                 fallthrough;
3035         default:
3036                 /* if option is rom valid, display its version too */
3037                 if (fw.or_valid) {
3038                         snprintf(adapter->fw_version,
3039                                  sizeof(adapter->fw_version),
3040                                  "%d.%d, 0x%08x, %d.%d.%d",
3041                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3042                                  fw.or_major, fw.or_build, fw.or_patch);
3043                 /* no option rom */
3044                 } else if (fw.etrack_id != 0X0000) {
3045                         snprintf(adapter->fw_version,
3046                             sizeof(adapter->fw_version),
3047                             "%d.%d, 0x%08x",
3048                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3049                 } else {
3050                 snprintf(adapter->fw_version,
3051                     sizeof(adapter->fw_version),
3052                     "%d.%d.%d",
3053                     fw.eep_major, fw.eep_minor, fw.eep_build);
3054                 }
3055                 break;
3056         }
3057 }
3058
3059 /**
3060  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3061  *
3062  * @adapter: adapter struct
3063  **/
3064 static void igb_init_mas(struct igb_adapter *adapter)
3065 {
3066         struct e1000_hw *hw = &adapter->hw;
3067         u16 eeprom_data;
3068
3069         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3070         switch (hw->bus.func) {
3071         case E1000_FUNC_0:
3072                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3073                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3074                         netdev_info(adapter->netdev,
3075                                 "MAS: Enabling Media Autosense for port %d\n",
3076                                 hw->bus.func);
3077                 }
3078                 break;
3079         case E1000_FUNC_1:
3080                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3081                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3082                         netdev_info(adapter->netdev,
3083                                 "MAS: Enabling Media Autosense for port %d\n",
3084                                 hw->bus.func);
3085                 }
3086                 break;
3087         case E1000_FUNC_2:
3088                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3089                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3090                         netdev_info(adapter->netdev,
3091                                 "MAS: Enabling Media Autosense for port %d\n",
3092                                 hw->bus.func);
3093                 }
3094                 break;
3095         case E1000_FUNC_3:
3096                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3097                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3098                         netdev_info(adapter->netdev,
3099                                 "MAS: Enabling Media Autosense for port %d\n",
3100                                 hw->bus.func);
3101                 }
3102                 break;
3103         default:
3104                 /* Shouldn't get here */
3105                 netdev_err(adapter->netdev,
3106                         "MAS: Invalid port configuration, returning\n");
3107                 break;
3108         }
3109 }
3110
3111 /**
3112  *  igb_init_i2c - Init I2C interface
3113  *  @adapter: pointer to adapter structure
3114  **/
3115 static s32 igb_init_i2c(struct igb_adapter *adapter)
3116 {
3117         struct e1000_hw *hw = &adapter->hw;
3118         s32 status = 0;
3119         s32 i2cctl;
3120
3121         /* I2C interface supported on i350 devices */
3122         if (adapter->hw.mac.type != e1000_i350)
3123                 return 0;
3124
3125         i2cctl = rd32(E1000_I2CPARAMS);
3126         i2cctl |= E1000_I2CBB_EN
3127                 | E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N
3128                 | E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
3129         wr32(E1000_I2CPARAMS, i2cctl);
3130         wrfl();
3131
3132         /* Initialize the i2c bus which is controlled by the registers.
3133          * This bus will use the i2c_algo_bit structure that implements
3134          * the protocol through toggling of the 4 bits in the register.
3135          */
3136         adapter->i2c_adap.owner = THIS_MODULE;
3137         adapter->i2c_algo = igb_i2c_algo;
3138         adapter->i2c_algo.data = adapter;
3139         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3140         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3141         strlcpy(adapter->i2c_adap.name, "igb BB",
3142                 sizeof(adapter->i2c_adap.name));
3143         status = i2c_bit_add_bus(&adapter->i2c_adap);
3144         return status;
3145 }
3146
3147 /**
3148  *  igb_probe - Device Initialization Routine
3149  *  @pdev: PCI device information struct
3150  *  @ent: entry in igb_pci_tbl
3151  *
3152  *  Returns 0 on success, negative on failure
3153  *
3154  *  igb_probe initializes an adapter identified by a pci_dev structure.
3155  *  The OS initialization, configuring of the adapter private structure,
3156  *  and a hardware reset occur.
3157  **/
3158 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3159 {
3160         struct net_device *netdev;
3161         struct igb_adapter *adapter;
3162         struct e1000_hw *hw;
3163         u16 eeprom_data = 0;
3164         s32 ret_val;
3165         static int global_quad_port_a; /* global quad port a indication */
3166         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3167         u8 part_str[E1000_PBANUM_LENGTH];
3168         int err;
3169
3170         /* Catch broken hardware that put the wrong VF device ID in
3171          * the PCIe SR-IOV capability.
3172          */
3173         if (pdev->is_virtfn) {
3174                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3175                         pci_name(pdev), pdev->vendor, pdev->device);
3176                 return -EINVAL;
3177         }
3178
3179         err = pci_enable_device_mem(pdev);
3180         if (err)
3181                 return err;
3182
3183         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3184         if (err) {
3185                 dev_err(&pdev->dev,
3186                         "No usable DMA configuration, aborting\n");
3187                 goto err_dma;
3188         }
3189
3190         err = pci_request_mem_regions(pdev, igb_driver_name);
3191         if (err)
3192                 goto err_pci_reg;
3193
3194         pci_enable_pcie_error_reporting(pdev);
3195
3196         pci_set_master(pdev);
3197         pci_save_state(pdev);
3198
3199         err = -ENOMEM;
3200         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3201                                    IGB_MAX_TX_QUEUES);
3202         if (!netdev)
3203                 goto err_alloc_etherdev;
3204
3205         SET_NETDEV_DEV(netdev, &pdev->dev);
3206
3207         pci_set_drvdata(pdev, netdev);
3208         adapter = netdev_priv(netdev);
3209         adapter->netdev = netdev;
3210         adapter->pdev = pdev;
3211         hw = &adapter->hw;
3212         hw->back = adapter;
3213         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3214
3215         err = -EIO;
3216         adapter->io_addr = pci_iomap(pdev, 0, 0);
3217         if (!adapter->io_addr)
3218                 goto err_ioremap;
3219         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3220         hw->hw_addr = adapter->io_addr;
3221
3222         netdev->netdev_ops = &igb_netdev_ops;
3223         igb_set_ethtool_ops(netdev);
3224         netdev->watchdog_timeo = 5 * HZ;
3225
3226         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3227
3228         netdev->mem_start = pci_resource_start(pdev, 0);
3229         netdev->mem_end = pci_resource_end(pdev, 0);
3230
3231         /* PCI config space info */
3232         hw->vendor_id = pdev->vendor;
3233         hw->device_id = pdev->device;
3234         hw->revision_id = pdev->revision;
3235         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3236         hw->subsystem_device_id = pdev->subsystem_device;
3237
3238         /* Copy the default MAC, PHY and NVM function pointers */
3239         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3240         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3241         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3242         /* Initialize skew-specific constants */
3243         err = ei->get_invariants(hw);
3244         if (err)
3245                 goto err_sw_init;
3246
3247         /* setup the private structure */
3248         err = igb_sw_init(adapter);
3249         if (err)
3250                 goto err_sw_init;
3251
3252         igb_get_bus_info_pcie(hw);
3253
3254         hw->phy.autoneg_wait_to_complete = false;
3255
3256         /* Copper options */
3257         if (hw->phy.media_type == e1000_media_type_copper) {
3258                 hw->phy.mdix = AUTO_ALL_MODES;
3259                 hw->phy.disable_polarity_correction = false;
3260                 hw->phy.ms_type = e1000_ms_hw_default;
3261         }
3262
3263         if (igb_check_reset_block(hw))
3264                 dev_info(&pdev->dev,
3265                         "PHY reset is blocked due to SOL/IDER session.\n");
3266
3267         /* features is initialized to 0 in allocation, it might have bits
3268          * set by igb_sw_init so we should use an or instead of an
3269          * assignment.
3270          */
3271         netdev->features |= NETIF_F_SG |
3272                             NETIF_F_TSO |
3273                             NETIF_F_TSO6 |
3274                             NETIF_F_RXHASH |
3275                             NETIF_F_RXCSUM |
3276                             NETIF_F_HW_CSUM;
3277
3278         if (hw->mac.type >= e1000_82576)
3279                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3280
3281         if (hw->mac.type >= e1000_i350)
3282                 netdev->features |= NETIF_F_HW_TC;
3283
3284 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3285                                   NETIF_F_GSO_GRE_CSUM | \
3286                                   NETIF_F_GSO_IPXIP4 | \
3287                                   NETIF_F_GSO_IPXIP6 | \
3288                                   NETIF_F_GSO_UDP_TUNNEL | \
3289                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3290
3291         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3292         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3293
3294         /* copy netdev features into list of user selectable features */
3295         netdev->hw_features |= netdev->features |
3296                                NETIF_F_HW_VLAN_CTAG_RX |
3297                                NETIF_F_HW_VLAN_CTAG_TX |
3298                                NETIF_F_RXALL;
3299
3300         if (hw->mac.type >= e1000_i350)
3301                 netdev->hw_features |= NETIF_F_NTUPLE;
3302
3303         netdev->features |= NETIF_F_HIGHDMA;
3304
3305         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3306         netdev->mpls_features |= NETIF_F_HW_CSUM;
3307         netdev->hw_enc_features |= netdev->vlan_features;
3308
3309         /* set this bit last since it cannot be part of vlan_features */
3310         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3311                             NETIF_F_HW_VLAN_CTAG_RX |
3312                             NETIF_F_HW_VLAN_CTAG_TX;
3313
3314         netdev->priv_flags |= IFF_SUPP_NOFCS;
3315
3316         netdev->priv_flags |= IFF_UNICAST_FLT;
3317
3318         /* MTU range: 68 - 9216 */
3319         netdev->min_mtu = ETH_MIN_MTU;
3320         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3321
3322         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3323
3324         /* before reading the NVM, reset the controller to put the device in a
3325          * known good starting state
3326          */
3327         hw->mac.ops.reset_hw(hw);
3328
3329         /* make sure the NVM is good , i211/i210 parts can have special NVM
3330          * that doesn't contain a checksum
3331          */
3332         switch (hw->mac.type) {
3333         case e1000_i210:
3334         case e1000_i211:
3335                 if (igb_get_flash_presence_i210(hw)) {
3336                         if (hw->nvm.ops.validate(hw) < 0) {
3337                                 dev_err(&pdev->dev,
3338                                         "The NVM Checksum Is Not Valid\n");
3339                                 err = -EIO;
3340                                 goto err_eeprom;
3341                         }
3342                 }
3343                 break;
3344         default:
3345                 if (hw->nvm.ops.validate(hw) < 0) {
3346                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3347                         err = -EIO;
3348                         goto err_eeprom;
3349                 }
3350                 break;
3351         }
3352
3353         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3354                 /* copy the MAC address out of the NVM */
3355                 if (hw->mac.ops.read_mac_addr(hw))
3356                         dev_err(&pdev->dev, "NVM Read Error\n");
3357         }
3358
3359         eth_hw_addr_set(netdev, hw->mac.addr);
3360
3361         if (!is_valid_ether_addr(netdev->dev_addr)) {
3362                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3363                 err = -EIO;
3364                 goto err_eeprom;
3365         }
3366
3367         igb_set_default_mac_filter(adapter);
3368
3369         /* get firmware version for ethtool -i */
3370         igb_set_fw_version(adapter);
3371
3372         /* configure RXPBSIZE and TXPBSIZE */
3373         if (hw->mac.type == e1000_i210) {
3374                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3375                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3376         }
3377
3378         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3379         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3380
3381         INIT_WORK(&adapter->reset_task, igb_reset_task);
3382         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3383
3384         /* Initialize link properties that are user-changeable */
3385         adapter->fc_autoneg = true;
3386         hw->mac.autoneg = true;
3387         hw->phy.autoneg_advertised = 0x2f;
3388
3389         hw->fc.requested_mode = e1000_fc_default;
3390         hw->fc.current_mode = e1000_fc_default;
3391
3392         igb_validate_mdi_setting(hw);
3393
3394         /* By default, support wake on port A */
3395         if (hw->bus.func == 0)
3396                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3397
3398         /* Check the NVM for wake support on non-port A ports */
3399         if (hw->mac.type >= e1000_82580)
3400                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3401                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3402                                  &eeprom_data);
3403         else if (hw->bus.func == 1)
3404                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3405
3406         if (eeprom_data & IGB_EEPROM_APME)
3407                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3408
3409         /* now that we have the eeprom settings, apply the special cases where
3410          * the eeprom may be wrong or the board simply won't support wake on
3411          * lan on a particular port
3412          */
3413         switch (pdev->device) {
3414         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3415                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3416                 break;
3417         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3418         case E1000_DEV_ID_82576_FIBER:
3419         case E1000_DEV_ID_82576_SERDES:
3420                 /* Wake events only supported on port A for dual fiber
3421                  * regardless of eeprom setting
3422                  */
3423                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3424                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3425                 break;
3426         case E1000_DEV_ID_82576_QUAD_COPPER:
3427         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3428                 /* if quad port adapter, disable WoL on all but port A */
3429                 if (global_quad_port_a != 0)
3430                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3431                 else
3432                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3433                 /* Reset for multiple quad port adapters */
3434                 if (++global_quad_port_a == 4)
3435                         global_quad_port_a = 0;
3436                 break;
3437         default:
3438                 /* If the device can't wake, don't set software support */
3439                 if (!device_can_wakeup(&adapter->pdev->dev))
3440                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3441         }
3442
3443         /* initialize the wol settings based on the eeprom settings */
3444         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3445                 adapter->wol |= E1000_WUFC_MAG;
3446
3447         /* Some vendors want WoL disabled by default, but still supported */
3448         if ((hw->mac.type == e1000_i350) &&
3449             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3450                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3451                 adapter->wol = 0;
3452         }
3453
3454         /* Some vendors want the ability to Use the EEPROM setting as
3455          * enable/disable only, and not for capability
3456          */
3457         if (((hw->mac.type == e1000_i350) ||
3458              (hw->mac.type == e1000_i354)) &&
3459             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3460                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3461                 adapter->wol = 0;
3462         }
3463         if (hw->mac.type == e1000_i350) {
3464                 if (((pdev->subsystem_device == 0x5001) ||
3465                      (pdev->subsystem_device == 0x5002)) &&
3466                                 (hw->bus.func == 0)) {
3467                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3468                         adapter->wol = 0;
3469                 }
3470                 if (pdev->subsystem_device == 0x1F52)
3471                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3472         }
3473
3474         device_set_wakeup_enable(&adapter->pdev->dev,
3475                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3476
3477         /* reset the hardware with the new settings */
3478         igb_reset(adapter);
3479
3480         /* Init the I2C interface */
3481         err = igb_init_i2c(adapter);
3482         if (err) {
3483                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3484                 goto err_eeprom;
3485         }
3486
3487         /* let the f/w know that the h/w is now under the control of the
3488          * driver.
3489          */
3490         igb_get_hw_control(adapter);
3491
3492         strcpy(netdev->name, "eth%d");
3493         err = register_netdev(netdev);
3494         if (err)
3495                 goto err_register;
3496
3497         /* carrier off reporting is important to ethtool even BEFORE open */
3498         netif_carrier_off(netdev);
3499
3500 #ifdef CONFIG_IGB_DCA
3501         if (dca_add_requester(&pdev->dev) == 0) {
3502                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3503                 dev_info(&pdev->dev, "DCA enabled\n");
3504                 igb_setup_dca(adapter);
3505         }
3506
3507 #endif
3508 #ifdef CONFIG_IGB_HWMON
3509         /* Initialize the thermal sensor on i350 devices. */
3510         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3511                 u16 ets_word;
3512
3513                 /* Read the NVM to determine if this i350 device supports an
3514                  * external thermal sensor.
3515                  */
3516                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3517                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3518                         adapter->ets = true;
3519                 else
3520                         adapter->ets = false;
3521                 if (igb_sysfs_init(adapter))
3522                         dev_err(&pdev->dev,
3523                                 "failed to allocate sysfs resources\n");
3524         } else {
3525                 adapter->ets = false;
3526         }
3527 #endif
3528         /* Check if Media Autosense is enabled */
3529         adapter->ei = *ei;
3530         if (hw->dev_spec._82575.mas_capable)
3531                 igb_init_mas(adapter);
3532
3533         /* do hw tstamp init after resetting */
3534         igb_ptp_init(adapter);
3535
3536         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3537         /* print bus type/speed/width info, not applicable to i354 */
3538         if (hw->mac.type != e1000_i354) {
3539                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3540                          netdev->name,
3541                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3542                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3543                            "unknown"),
3544                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3545                           "Width x4" :
3546                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3547                           "Width x2" :
3548                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3549                           "Width x1" : "unknown"), netdev->dev_addr);
3550         }
3551
3552         if ((hw->mac.type == e1000_82576 &&
3553              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3554             (hw->mac.type >= e1000_i210 ||
3555              igb_get_flash_presence_i210(hw))) {
3556                 ret_val = igb_read_part_string(hw, part_str,
3557                                                E1000_PBANUM_LENGTH);
3558         } else {
3559                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3560         }
3561
3562         if (ret_val)
3563                 strcpy(part_str, "Unknown");
3564         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3565         dev_info(&pdev->dev,
3566                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3567                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3568                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3569                 adapter->num_rx_queues, adapter->num_tx_queues);
3570         if (hw->phy.media_type == e1000_media_type_copper) {
3571                 switch (hw->mac.type) {
3572                 case e1000_i350:
3573                 case e1000_i210:
3574                 case e1000_i211:
3575                         /* Enable EEE for internal copper PHY devices */
3576                         err = igb_set_eee_i350(hw, true, true);
3577                         if ((!err) &&
3578                             (!hw->dev_spec._82575.eee_disable)) {
3579                                 adapter->eee_advert =
3580                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3581                                 adapter->flags |= IGB_FLAG_EEE;
3582                         }
3583                         break;
3584                 case e1000_i354:
3585                         if ((rd32(E1000_CTRL_EXT) &
3586                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3587                                 err = igb_set_eee_i354(hw, true, true);
3588                                 if ((!err) &&
3589                                         (!hw->dev_spec._82575.eee_disable)) {
3590                                         adapter->eee_advert =
3591                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3592                                         adapter->flags |= IGB_FLAG_EEE;
3593                                 }
3594                         }
3595                         break;
3596                 default:
3597                         break;
3598                 }
3599         }
3600
3601         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3602
3603         pm_runtime_put_noidle(&pdev->dev);
3604         return 0;
3605
3606 err_register:
3607         igb_release_hw_control(adapter);
3608         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3609 err_eeprom:
3610         if (!igb_check_reset_block(hw))
3611                 igb_reset_phy(hw);
3612
3613         if (hw->flash_address)
3614                 iounmap(hw->flash_address);
3615 err_sw_init:
3616         kfree(adapter->mac_table);
3617         kfree(adapter->shadow_vfta);
3618         igb_clear_interrupt_scheme(adapter);
3619 #ifdef CONFIG_PCI_IOV
3620         igb_disable_sriov(pdev);
3621 #endif
3622         pci_iounmap(pdev, adapter->io_addr);
3623 err_ioremap:
3624         free_netdev(netdev);
3625 err_alloc_etherdev:
3626         pci_disable_pcie_error_reporting(pdev);
3627         pci_release_mem_regions(pdev);
3628 err_pci_reg:
3629 err_dma:
3630         pci_disable_device(pdev);
3631         return err;
3632 }
3633
3634 #ifdef CONFIG_PCI_IOV
3635 static int igb_disable_sriov(struct pci_dev *pdev)
3636 {
3637         struct net_device *netdev = pci_get_drvdata(pdev);
3638         struct igb_adapter *adapter = netdev_priv(netdev);
3639         struct e1000_hw *hw = &adapter->hw;
3640
3641         /* reclaim resources allocated to VFs */
3642         if (adapter->vf_data) {
3643                 /* disable iov and allow time for transactions to clear */
3644                 if (pci_vfs_assigned(pdev)) {
3645                         dev_warn(&pdev->dev,
3646                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3647                         return -EPERM;
3648                 } else {
3649                         pci_disable_sriov(pdev);
3650                         msleep(500);
3651                 }
3652
3653                 kfree(adapter->vf_mac_list);
3654                 adapter->vf_mac_list = NULL;
3655                 kfree(adapter->vf_data);
3656                 adapter->vf_data = NULL;
3657                 adapter->vfs_allocated_count = 0;
3658                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3659                 wrfl();
3660                 msleep(100);
3661                 dev_info(&pdev->dev, "IOV Disabled\n");
3662
3663                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3664                 adapter->flags |= IGB_FLAG_DMAC;
3665         }
3666
3667         return 0;
3668 }
3669
3670 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3671 {
3672         struct net_device *netdev = pci_get_drvdata(pdev);
3673         struct igb_adapter *adapter = netdev_priv(netdev);
3674         int old_vfs = pci_num_vf(pdev);
3675         struct vf_mac_filter *mac_list;
3676         int err = 0;
3677         int num_vf_mac_filters, i;
3678
3679         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3680                 err = -EPERM;
3681                 goto out;
3682         }
3683         if (!num_vfs)
3684                 goto out;
3685
3686         if (old_vfs) {
3687                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3688                          old_vfs, max_vfs);
3689                 adapter->vfs_allocated_count = old_vfs;
3690         } else
3691                 adapter->vfs_allocated_count = num_vfs;
3692
3693         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3694                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3695
3696         /* if allocation failed then we do not support SR-IOV */
3697         if (!adapter->vf_data) {
3698                 adapter->vfs_allocated_count = 0;
3699                 err = -ENOMEM;
3700                 goto out;
3701         }
3702
3703         /* Due to the limited number of RAR entries calculate potential
3704          * number of MAC filters available for the VFs. Reserve entries
3705          * for PF default MAC, PF MAC filters and at least one RAR entry
3706          * for each VF for VF MAC.
3707          */
3708         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3709                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3710                               adapter->vfs_allocated_count);
3711
3712         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3713                                        sizeof(struct vf_mac_filter),
3714                                        GFP_KERNEL);
3715
3716         mac_list = adapter->vf_mac_list;
3717         INIT_LIST_HEAD(&adapter->vf_macs.l);
3718
3719         if (adapter->vf_mac_list) {
3720                 /* Initialize list of VF MAC filters */
3721                 for (i = 0; i < num_vf_mac_filters; i++) {
3722                         mac_list->vf = -1;
3723                         mac_list->free = true;
3724                         list_add(&mac_list->l, &adapter->vf_macs.l);
3725                         mac_list++;
3726                 }
3727         } else {
3728                 /* If we could not allocate memory for the VF MAC filters
3729                  * we can continue without this feature but warn user.
3730                  */
3731                 dev_err(&pdev->dev,
3732                         "Unable to allocate memory for VF MAC filter list\n");
3733         }
3734
3735         /* only call pci_enable_sriov() if no VFs are allocated already */
3736         if (!old_vfs) {
3737                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3738                 if (err)
3739                         goto err_out;
3740         }
3741         dev_info(&pdev->dev, "%d VFs allocated\n",
3742                  adapter->vfs_allocated_count);
3743         for (i = 0; i < adapter->vfs_allocated_count; i++)
3744                 igb_vf_configure(adapter, i);
3745
3746         /* DMA Coalescing is not supported in IOV mode. */
3747         adapter->flags &= ~IGB_FLAG_DMAC;
3748         goto out;
3749
3750 err_out:
3751         kfree(adapter->vf_mac_list);
3752         adapter->vf_mac_list = NULL;
3753         kfree(adapter->vf_data);
3754         adapter->vf_data = NULL;
3755         adapter->vfs_allocated_count = 0;
3756 out:
3757         return err;
3758 }
3759
3760 #endif
3761 /**
3762  *  igb_remove_i2c - Cleanup  I2C interface
3763  *  @adapter: pointer to adapter structure
3764  **/
3765 static void igb_remove_i2c(struct igb_adapter *adapter)
3766 {
3767         /* free the adapter bus structure */
3768         i2c_del_adapter(&adapter->i2c_adap);
3769 }
3770
3771 /**
3772  *  igb_remove - Device Removal Routine
3773  *  @pdev: PCI device information struct
3774  *
3775  *  igb_remove is called by the PCI subsystem to alert the driver
3776  *  that it should release a PCI device.  The could be caused by a
3777  *  Hot-Plug event, or because the driver is going to be removed from
3778  *  memory.
3779  **/
3780 static void igb_remove(struct pci_dev *pdev)
3781 {
3782         struct net_device *netdev = pci_get_drvdata(pdev);
3783         struct igb_adapter *adapter = netdev_priv(netdev);
3784         struct e1000_hw *hw = &adapter->hw;
3785
3786         pm_runtime_get_noresume(&pdev->dev);
3787 #ifdef CONFIG_IGB_HWMON
3788         igb_sysfs_exit(adapter);
3789 #endif
3790         igb_remove_i2c(adapter);
3791         igb_ptp_stop(adapter);
3792         /* The watchdog timer may be rescheduled, so explicitly
3793          * disable watchdog from being rescheduled.
3794          */
3795         set_bit(__IGB_DOWN, &adapter->state);
3796         del_timer_sync(&adapter->watchdog_timer);
3797         del_timer_sync(&adapter->phy_info_timer);
3798
3799         cancel_work_sync(&adapter->reset_task);
3800         cancel_work_sync(&adapter->watchdog_task);
3801
3802 #ifdef CONFIG_IGB_DCA
3803         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3804                 dev_info(&pdev->dev, "DCA disabled\n");
3805                 dca_remove_requester(&pdev->dev);
3806                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3807                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3808         }
3809 #endif
3810
3811         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3812          * would have already happened in close and is redundant.
3813          */
3814         igb_release_hw_control(adapter);
3815
3816 #ifdef CONFIG_PCI_IOV
3817         igb_disable_sriov(pdev);
3818 #endif
3819
3820         unregister_netdev(netdev);
3821
3822         igb_clear_interrupt_scheme(adapter);
3823
3824         pci_iounmap(pdev, adapter->io_addr);
3825         if (hw->flash_address)
3826                 iounmap(hw->flash_address);
3827         pci_release_mem_regions(pdev);
3828
3829         kfree(adapter->mac_table);
3830         kfree(adapter->shadow_vfta);
3831         free_netdev(netdev);
3832
3833         pci_disable_pcie_error_reporting(pdev);
3834
3835         pci_disable_device(pdev);
3836 }
3837
3838 /**
3839  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3840  *  @adapter: board private structure to initialize
3841  *
3842  *  This function initializes the vf specific data storage and then attempts to
3843  *  allocate the VFs.  The reason for ordering it this way is because it is much
3844  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3845  *  the memory for the VFs.
3846  **/
3847 static void igb_probe_vfs(struct igb_adapter *adapter)
3848 {
3849 #ifdef CONFIG_PCI_IOV
3850         struct pci_dev *pdev = adapter->pdev;
3851         struct e1000_hw *hw = &adapter->hw;
3852
3853         /* Virtualization features not supported on i210 family. */
3854         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3855                 return;
3856
3857         /* Of the below we really only want the effect of getting
3858          * IGB_FLAG_HAS_MSIX set (if available), without which
3859          * igb_enable_sriov() has no effect.
3860          */
3861         igb_set_interrupt_capability(adapter, true);
3862         igb_reset_interrupt_capability(adapter);
3863
3864         pci_sriov_set_totalvfs(pdev, 7);
3865         igb_enable_sriov(pdev, max_vfs);
3866
3867 #endif /* CONFIG_PCI_IOV */
3868 }
3869
3870 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3871 {
3872         struct e1000_hw *hw = &adapter->hw;
3873         unsigned int max_rss_queues;
3874
3875         /* Determine the maximum number of RSS queues supported. */
3876         switch (hw->mac.type) {
3877         case e1000_i211:
3878                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3879                 break;
3880         case e1000_82575:
3881         case e1000_i210:
3882                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3883                 break;
3884         case e1000_i350:
3885                 /* I350 cannot do RSS and SR-IOV at the same time */
3886                 if (!!adapter->vfs_allocated_count) {
3887                         max_rss_queues = 1;
3888                         break;
3889                 }
3890                 fallthrough;
3891         case e1000_82576:
3892                 if (!!adapter->vfs_allocated_count) {
3893                         max_rss_queues = 2;
3894                         break;
3895                 }
3896                 fallthrough;
3897         case e1000_82580:
3898         case e1000_i354:
3899         default:
3900                 max_rss_queues = IGB_MAX_RX_QUEUES;
3901                 break;
3902         }
3903
3904         return max_rss_queues;
3905 }
3906
3907 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3908 {
3909         u32 max_rss_queues;
3910
3911         max_rss_queues = igb_get_max_rss_queues(adapter);
3912         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3913
3914         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3915 }
3916
3917 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3918                               const u32 max_rss_queues)
3919 {
3920         struct e1000_hw *hw = &adapter->hw;
3921
3922         /* Determine if we need to pair queues. */
3923         switch (hw->mac.type) {
3924         case e1000_82575:
3925         case e1000_i211:
3926                 /* Device supports enough interrupts without queue pairing. */
3927                 break;
3928         case e1000_82576:
3929         case e1000_82580:
3930         case e1000_i350:
3931         case e1000_i354:
3932         case e1000_i210:
3933         default:
3934                 /* If rss_queues > half of max_rss_queues, pair the queues in
3935                  * order to conserve interrupts due to limited supply.
3936                  */
3937                 if (adapter->rss_queues > (max_rss_queues / 2))
3938                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3939                 else
3940                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3941                 break;
3942         }
3943 }
3944
3945 /**
3946  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3947  *  @adapter: board private structure to initialize
3948  *
3949  *  igb_sw_init initializes the Adapter private data structure.
3950  *  Fields are initialized based on PCI device information and
3951  *  OS network device settings (MTU size).
3952  **/
3953 static int igb_sw_init(struct igb_adapter *adapter)
3954 {
3955         struct e1000_hw *hw = &adapter->hw;
3956         struct net_device *netdev = adapter->netdev;
3957         struct pci_dev *pdev = adapter->pdev;
3958
3959         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3960
3961         /* set default ring sizes */
3962         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3963         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3964
3965         /* set default ITR values */
3966         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3967         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3968
3969         /* set default work limits */
3970         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3971
3972         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
3973         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3974
3975         spin_lock_init(&adapter->nfc_lock);
3976         spin_lock_init(&adapter->stats64_lock);
3977 #ifdef CONFIG_PCI_IOV
3978         switch (hw->mac.type) {
3979         case e1000_82576:
3980         case e1000_i350:
3981                 if (max_vfs > 7) {
3982                         dev_warn(&pdev->dev,
3983                                  "Maximum of 7 VFs per PF, using max\n");
3984                         max_vfs = adapter->vfs_allocated_count = 7;
3985                 } else
3986                         adapter->vfs_allocated_count = max_vfs;
3987                 if (adapter->vfs_allocated_count)
3988                         dev_warn(&pdev->dev,
3989                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3990                 break;
3991         default:
3992                 break;
3993         }
3994 #endif /* CONFIG_PCI_IOV */
3995
3996         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3997         adapter->flags |= IGB_FLAG_HAS_MSIX;
3998
3999         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4000                                      sizeof(struct igb_mac_addr),
4001                                      GFP_KERNEL);
4002         if (!adapter->mac_table)
4003                 return -ENOMEM;
4004
4005         igb_probe_vfs(adapter);
4006
4007         igb_init_queue_configuration(adapter);
4008
4009         /* Setup and initialize a copy of the hw vlan table array */
4010         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4011                                        GFP_KERNEL);
4012         if (!adapter->shadow_vfta)
4013                 return -ENOMEM;
4014
4015         /* This call may decrease the number of queues */
4016         if (igb_init_interrupt_scheme(adapter, true)) {
4017                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4018                 return -ENOMEM;
4019         }
4020
4021         /* Explicitly disable IRQ since the NIC can be in any state. */
4022         igb_irq_disable(adapter);
4023
4024         if (hw->mac.type >= e1000_i350)
4025                 adapter->flags &= ~IGB_FLAG_DMAC;
4026
4027         set_bit(__IGB_DOWN, &adapter->state);
4028         return 0;
4029 }
4030
4031 /**
4032  *  __igb_open - Called when a network interface is made active
4033  *  @netdev: network interface device structure
4034  *  @resuming: indicates whether we are in a resume call
4035  *
4036  *  Returns 0 on success, negative value on failure
4037  *
4038  *  The open entry point is called when a network interface is made
4039  *  active by the system (IFF_UP).  At this point all resources needed
4040  *  for transmit and receive operations are allocated, the interrupt
4041  *  handler is registered with the OS, the watchdog timer is started,
4042  *  and the stack is notified that the interface is ready.
4043  **/
4044 static int __igb_open(struct net_device *netdev, bool resuming)
4045 {
4046         struct igb_adapter *adapter = netdev_priv(netdev);
4047         struct e1000_hw *hw = &adapter->hw;
4048         struct pci_dev *pdev = adapter->pdev;
4049         int err;
4050         int i;
4051
4052         /* disallow open during test */
4053         if (test_bit(__IGB_TESTING, &adapter->state)) {
4054                 WARN_ON(resuming);
4055                 return -EBUSY;
4056         }
4057
4058         if (!resuming)
4059                 pm_runtime_get_sync(&pdev->dev);
4060
4061         netif_carrier_off(netdev);
4062
4063         /* allocate transmit descriptors */
4064         err = igb_setup_all_tx_resources(adapter);
4065         if (err)
4066                 goto err_setup_tx;
4067
4068         /* allocate receive descriptors */
4069         err = igb_setup_all_rx_resources(adapter);
4070         if (err)
4071                 goto err_setup_rx;
4072
4073         igb_power_up_link(adapter);
4074
4075         /* before we allocate an interrupt, we must be ready to handle it.
4076          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4077          * as soon as we call pci_request_irq, so we have to setup our
4078          * clean_rx handler before we do so.
4079          */
4080         igb_configure(adapter);
4081
4082         err = igb_request_irq(adapter);
4083         if (err)
4084                 goto err_req_irq;
4085
4086         /* Notify the stack of the actual queue counts. */
4087         err = netif_set_real_num_tx_queues(adapter->netdev,
4088                                            adapter->num_tx_queues);
4089         if (err)
4090                 goto err_set_queues;
4091
4092         err = netif_set_real_num_rx_queues(adapter->netdev,
4093                                            adapter->num_rx_queues);
4094         if (err)
4095                 goto err_set_queues;
4096
4097         /* From here on the code is the same as igb_up() */
4098         clear_bit(__IGB_DOWN, &adapter->state);
4099
4100         for (i = 0; i < adapter->num_q_vectors; i++)
4101                 napi_enable(&(adapter->q_vector[i]->napi));
4102
4103         /* Clear any pending interrupts. */
4104         rd32(E1000_TSICR);
4105         rd32(E1000_ICR);
4106
4107         igb_irq_enable(adapter);
4108
4109         /* notify VFs that reset has been completed */
4110         if (adapter->vfs_allocated_count) {
4111                 u32 reg_data = rd32(E1000_CTRL_EXT);
4112
4113                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4114                 wr32(E1000_CTRL_EXT, reg_data);
4115         }
4116
4117         netif_tx_start_all_queues(netdev);
4118
4119         if (!resuming)
4120                 pm_runtime_put(&pdev->dev);
4121
4122         /* start the watchdog. */
4123         hw->mac.get_link_status = 1;
4124         schedule_work(&adapter->watchdog_task);
4125
4126         return 0;
4127
4128 err_set_queues:
4129         igb_free_irq(adapter);
4130 err_req_irq:
4131         igb_release_hw_control(adapter);
4132         igb_power_down_link(adapter);
4133         igb_free_all_rx_resources(adapter);
4134 err_setup_rx:
4135         igb_free_all_tx_resources(adapter);
4136 err_setup_tx:
4137         igb_reset(adapter);
4138         if (!resuming)
4139                 pm_runtime_put(&pdev->dev);
4140
4141         return err;
4142 }
4143
4144 int igb_open(struct net_device *netdev)
4145 {
4146         return __igb_open(netdev, false);
4147 }
4148
4149 /**
4150  *  __igb_close - Disables a network interface
4151  *  @netdev: network interface device structure
4152  *  @suspending: indicates we are in a suspend call
4153  *
4154  *  Returns 0, this is not allowed to fail
4155  *
4156  *  The close entry point is called when an interface is de-activated
4157  *  by the OS.  The hardware is still under the driver's control, but
4158  *  needs to be disabled.  A global MAC reset is issued to stop the
4159  *  hardware, and all transmit and receive resources are freed.
4160  **/
4161 static int __igb_close(struct net_device *netdev, bool suspending)
4162 {
4163         struct igb_adapter *adapter = netdev_priv(netdev);
4164         struct pci_dev *pdev = adapter->pdev;
4165
4166         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4167
4168         if (!suspending)
4169                 pm_runtime_get_sync(&pdev->dev);
4170
4171         igb_down(adapter);
4172         igb_free_irq(adapter);
4173
4174         igb_free_all_tx_resources(adapter);
4175         igb_free_all_rx_resources(adapter);
4176
4177         if (!suspending)
4178                 pm_runtime_put_sync(&pdev->dev);
4179         return 0;
4180 }
4181
4182 int igb_close(struct net_device *netdev)
4183 {
4184         if (netif_device_present(netdev) || netdev->dismantle)
4185                 return __igb_close(netdev, false);
4186         return 0;
4187 }
4188
4189 /**
4190  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4191  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4192  *
4193  *  Return 0 on success, negative on failure
4194  **/
4195 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4196 {
4197         struct device *dev = tx_ring->dev;
4198         int size;
4199
4200         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4201
4202         tx_ring->tx_buffer_info = vmalloc(size);
4203         if (!tx_ring->tx_buffer_info)
4204                 goto err;
4205
4206         /* round up to nearest 4K */
4207         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4208         tx_ring->size = ALIGN(tx_ring->size, 4096);
4209
4210         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4211                                            &tx_ring->dma, GFP_KERNEL);
4212         if (!tx_ring->desc)
4213                 goto err;
4214
4215         tx_ring->next_to_use = 0;
4216         tx_ring->next_to_clean = 0;
4217
4218         return 0;
4219
4220 err:
4221         vfree(tx_ring->tx_buffer_info);
4222         tx_ring->tx_buffer_info = NULL;
4223         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4224         return -ENOMEM;
4225 }
4226
4227 /**
4228  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4229  *                               (Descriptors) for all queues
4230  *  @adapter: board private structure
4231  *
4232  *  Return 0 on success, negative on failure
4233  **/
4234 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4235 {
4236         struct pci_dev *pdev = adapter->pdev;
4237         int i, err = 0;
4238
4239         for (i = 0; i < adapter->num_tx_queues; i++) {
4240                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4241                 if (err) {
4242                         dev_err(&pdev->dev,
4243                                 "Allocation for Tx Queue %u failed\n", i);
4244                         for (i--; i >= 0; i--)
4245                                 igb_free_tx_resources(adapter->tx_ring[i]);
4246                         break;
4247                 }
4248         }
4249
4250         return err;
4251 }
4252
4253 /**
4254  *  igb_setup_tctl - configure the transmit control registers
4255  *  @adapter: Board private structure
4256  **/
4257 void igb_setup_tctl(struct igb_adapter *adapter)
4258 {
4259         struct e1000_hw *hw = &adapter->hw;
4260         u32 tctl;
4261
4262         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4263         wr32(E1000_TXDCTL(0), 0);
4264
4265         /* Program the Transmit Control Register */
4266         tctl = rd32(E1000_TCTL);
4267         tctl &= ~E1000_TCTL_CT;
4268         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4269                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4270
4271         igb_config_collision_dist(hw);
4272
4273         /* Enable transmits */
4274         tctl |= E1000_TCTL_EN;
4275
4276         wr32(E1000_TCTL, tctl);
4277 }
4278
4279 /**
4280  *  igb_configure_tx_ring - Configure transmit ring after Reset
4281  *  @adapter: board private structure
4282  *  @ring: tx ring to configure
4283  *
4284  *  Configure a transmit ring after a reset.
4285  **/
4286 void igb_configure_tx_ring(struct igb_adapter *adapter,
4287                            struct igb_ring *ring)
4288 {
4289         struct e1000_hw *hw = &adapter->hw;
4290         u32 txdctl = 0;
4291         u64 tdba = ring->dma;
4292         int reg_idx = ring->reg_idx;
4293
4294         wr32(E1000_TDLEN(reg_idx),
4295              ring->count * sizeof(union e1000_adv_tx_desc));
4296         wr32(E1000_TDBAL(reg_idx),
4297              tdba & 0x00000000ffffffffULL);
4298         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4299
4300         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4301         wr32(E1000_TDH(reg_idx), 0);
4302         writel(0, ring->tail);
4303
4304         txdctl |= IGB_TX_PTHRESH;
4305         txdctl |= IGB_TX_HTHRESH << 8;
4306         txdctl |= IGB_TX_WTHRESH << 16;
4307
4308         /* reinitialize tx_buffer_info */
4309         memset(ring->tx_buffer_info, 0,
4310                sizeof(struct igb_tx_buffer) * ring->count);
4311
4312         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4313         wr32(E1000_TXDCTL(reg_idx), txdctl);
4314 }
4315
4316 /**
4317  *  igb_configure_tx - Configure transmit Unit after Reset
4318  *  @adapter: board private structure
4319  *
4320  *  Configure the Tx unit of the MAC after a reset.
4321  **/
4322 static void igb_configure_tx(struct igb_adapter *adapter)
4323 {
4324         struct e1000_hw *hw = &adapter->hw;
4325         int i;
4326
4327         /* disable the queues */
4328         for (i = 0; i < adapter->num_tx_queues; i++)
4329                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4330
4331         wrfl();
4332         usleep_range(10000, 20000);
4333
4334         for (i = 0; i < adapter->num_tx_queues; i++)
4335                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4336 }
4337
4338 /**
4339  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4340  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4341  *
4342  *  Returns 0 on success, negative on failure
4343  **/
4344 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4345 {
4346         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4347         struct device *dev = rx_ring->dev;
4348         int size, res;
4349
4350         /* XDP RX-queue info */
4351         if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4352                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4353         res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4354                                rx_ring->queue_index, 0);
4355         if (res < 0) {
4356                 dev_err(dev, "Failed to register xdp_rxq index %u\n",
4357                         rx_ring->queue_index);
4358                 return res;
4359         }
4360
4361         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4362
4363         rx_ring->rx_buffer_info = vmalloc(size);
4364         if (!rx_ring->rx_buffer_info)
4365                 goto err;
4366
4367         /* Round up to nearest 4K */
4368         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4369         rx_ring->size = ALIGN(rx_ring->size, 4096);
4370
4371         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4372                                            &rx_ring->dma, GFP_KERNEL);
4373         if (!rx_ring->desc)
4374                 goto err;
4375
4376         rx_ring->next_to_alloc = 0;
4377         rx_ring->next_to_clean = 0;
4378         rx_ring->next_to_use = 0;
4379
4380         rx_ring->xdp_prog = adapter->xdp_prog;
4381
4382         return 0;
4383
4384 err:
4385         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4386         vfree(rx_ring->rx_buffer_info);
4387         rx_ring->rx_buffer_info = NULL;
4388         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4389         return -ENOMEM;
4390 }
4391
4392 /**
4393  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4394  *                               (Descriptors) for all queues
4395  *  @adapter: board private structure
4396  *
4397  *  Return 0 on success, negative on failure
4398  **/
4399 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4400 {
4401         struct pci_dev *pdev = adapter->pdev;
4402         int i, err = 0;
4403
4404         for (i = 0; i < adapter->num_rx_queues; i++) {
4405                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4406                 if (err) {
4407                         dev_err(&pdev->dev,
4408                                 "Allocation for Rx Queue %u failed\n", i);
4409                         for (i--; i >= 0; i--)
4410                                 igb_free_rx_resources(adapter->rx_ring[i]);
4411                         break;
4412                 }
4413         }
4414
4415         return err;
4416 }
4417
4418 /**
4419  *  igb_setup_mrqc - configure the multiple receive queue control registers
4420  *  @adapter: Board private structure
4421  **/
4422 static void igb_setup_mrqc(struct igb_adapter *adapter)
4423 {
4424         struct e1000_hw *hw = &adapter->hw;
4425         u32 mrqc, rxcsum;
4426         u32 j, num_rx_queues;
4427         u32 rss_key[10];
4428
4429         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4430         for (j = 0; j < 10; j++)
4431                 wr32(E1000_RSSRK(j), rss_key[j]);
4432
4433         num_rx_queues = adapter->rss_queues;
4434
4435         switch (hw->mac.type) {
4436         case e1000_82576:
4437                 /* 82576 supports 2 RSS queues for SR-IOV */
4438                 if (adapter->vfs_allocated_count)
4439                         num_rx_queues = 2;
4440                 break;
4441         default:
4442                 break;
4443         }
4444
4445         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4446                 for (j = 0; j < IGB_RETA_SIZE; j++)
4447                         adapter->rss_indir_tbl[j] =
4448                         (j * num_rx_queues) / IGB_RETA_SIZE;
4449                 adapter->rss_indir_tbl_init = num_rx_queues;
4450         }
4451         igb_write_rss_indir_tbl(adapter);
4452
4453         /* Disable raw packet checksumming so that RSS hash is placed in
4454          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4455          * offloads as they are enabled by default
4456          */
4457         rxcsum = rd32(E1000_RXCSUM);
4458         rxcsum |= E1000_RXCSUM_PCSD;
4459
4460         if (adapter->hw.mac.type >= e1000_82576)
4461                 /* Enable Receive Checksum Offload for SCTP */
4462                 rxcsum |= E1000_RXCSUM_CRCOFL;
4463
4464         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4465         wr32(E1000_RXCSUM, rxcsum);
4466
4467         /* Generate RSS hash based on packet types, TCP/UDP
4468          * port numbers and/or IPv4/v6 src and dst addresses
4469          */
4470         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4471                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4472                E1000_MRQC_RSS_FIELD_IPV6 |
4473                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4474                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4475
4476         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4477                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4478         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4479                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4480
4481         /* If VMDq is enabled then we set the appropriate mode for that, else
4482          * we default to RSS so that an RSS hash is calculated per packet even
4483          * if we are only using one queue
4484          */
4485         if (adapter->vfs_allocated_count) {
4486                 if (hw->mac.type > e1000_82575) {
4487                         /* Set the default pool for the PF's first queue */
4488                         u32 vtctl = rd32(E1000_VT_CTL);
4489
4490                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4491                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4492                         vtctl |= adapter->vfs_allocated_count <<
4493                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4494                         wr32(E1000_VT_CTL, vtctl);
4495                 }
4496                 if (adapter->rss_queues > 1)
4497                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4498                 else
4499                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4500         } else {
4501                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4502         }
4503         igb_vmm_control(adapter);
4504
4505         wr32(E1000_MRQC, mrqc);
4506 }
4507
4508 /**
4509  *  igb_setup_rctl - configure the receive control registers
4510  *  @adapter: Board private structure
4511  **/
4512 void igb_setup_rctl(struct igb_adapter *adapter)
4513 {
4514         struct e1000_hw *hw = &adapter->hw;
4515         u32 rctl;
4516
4517         rctl = rd32(E1000_RCTL);
4518
4519         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4520         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4521
4522         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4523                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4524
4525         /* enable stripping of CRC. It's unlikely this will break BMC
4526          * redirection as it did with e1000. Newer features require
4527          * that the HW strips the CRC.
4528          */
4529         rctl |= E1000_RCTL_SECRC;
4530
4531         /* disable store bad packets and clear size bits. */
4532         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4533
4534         /* enable LPE to allow for reception of jumbo frames */
4535         rctl |= E1000_RCTL_LPE;
4536
4537         /* disable queue 0 to prevent tail write w/o re-config */
4538         wr32(E1000_RXDCTL(0), 0);
4539
4540         /* Attention!!!  For SR-IOV PF driver operations you must enable
4541          * queue drop for all VF and PF queues to prevent head of line blocking
4542          * if an un-trusted VF does not provide descriptors to hardware.
4543          */
4544         if (adapter->vfs_allocated_count) {
4545                 /* set all queue drop enable bits */
4546                 wr32(E1000_QDE, ALL_QUEUES);
4547         }
4548
4549         /* This is useful for sniffing bad packets. */
4550         if (adapter->netdev->features & NETIF_F_RXALL) {
4551                 /* UPE and MPE will be handled by normal PROMISC logic
4552                  * in e1000e_set_rx_mode
4553                  */
4554                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4555                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4556                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4557
4558                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4559                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4560                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4561                  * and that breaks VLANs.
4562                  */
4563         }
4564
4565         wr32(E1000_RCTL, rctl);
4566 }
4567
4568 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4569                                    int vfn)
4570 {
4571         struct e1000_hw *hw = &adapter->hw;
4572         u32 vmolr;
4573
4574         if (size > MAX_JUMBO_FRAME_SIZE)
4575                 size = MAX_JUMBO_FRAME_SIZE;
4576
4577         vmolr = rd32(E1000_VMOLR(vfn));
4578         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4579         vmolr |= size | E1000_VMOLR_LPE;
4580         wr32(E1000_VMOLR(vfn), vmolr);
4581
4582         return 0;
4583 }
4584
4585 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4586                                          int vfn, bool enable)
4587 {
4588         struct e1000_hw *hw = &adapter->hw;
4589         u32 val, reg;
4590
4591         if (hw->mac.type < e1000_82576)
4592                 return;
4593
4594         if (hw->mac.type == e1000_i350)
4595                 reg = E1000_DVMOLR(vfn);
4596         else
4597                 reg = E1000_VMOLR(vfn);
4598
4599         val = rd32(reg);
4600         if (enable)
4601                 val |= E1000_VMOLR_STRVLAN;
4602         else
4603                 val &= ~(E1000_VMOLR_STRVLAN);
4604         wr32(reg, val);
4605 }
4606
4607 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4608                                  int vfn, bool aupe)
4609 {
4610         struct e1000_hw *hw = &adapter->hw;
4611         u32 vmolr;
4612
4613         /* This register exists only on 82576 and newer so if we are older then
4614          * we should exit and do nothing
4615          */
4616         if (hw->mac.type < e1000_82576)
4617                 return;
4618
4619         vmolr = rd32(E1000_VMOLR(vfn));
4620         if (aupe)
4621                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4622         else
4623                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4624
4625         /* clear all bits that might not be set */
4626         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4627
4628         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4629                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4630         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4631          * multicast packets
4632          */
4633         if (vfn <= adapter->vfs_allocated_count)
4634                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4635
4636         wr32(E1000_VMOLR(vfn), vmolr);
4637 }
4638
4639 /**
4640  *  igb_setup_srrctl - configure the split and replication receive control
4641  *                     registers
4642  *  @adapter: Board private structure
4643  *  @ring: receive ring to be configured
4644  **/
4645 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4646 {
4647         struct e1000_hw *hw = &adapter->hw;
4648         int reg_idx = ring->reg_idx;
4649         u32 srrctl = 0;
4650
4651         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4652         if (ring_uses_large_buffer(ring))
4653                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4654         else
4655                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4656         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4657         if (hw->mac.type >= e1000_82580)
4658                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4659         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4660          * queues and rx flow control is disabled
4661          */
4662         if (adapter->vfs_allocated_count ||
4663             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4664              adapter->num_rx_queues > 1))
4665                 srrctl |= E1000_SRRCTL_DROP_EN;
4666
4667         wr32(E1000_SRRCTL(reg_idx), srrctl);
4668 }
4669
4670 /**
4671  *  igb_configure_rx_ring - Configure a receive ring after Reset
4672  *  @adapter: board private structure
4673  *  @ring: receive ring to be configured
4674  *
4675  *  Configure the Rx unit of the MAC after a reset.
4676  **/
4677 void igb_configure_rx_ring(struct igb_adapter *adapter,
4678                            struct igb_ring *ring)
4679 {
4680         struct e1000_hw *hw = &adapter->hw;
4681         union e1000_adv_rx_desc *rx_desc;
4682         u64 rdba = ring->dma;
4683         int reg_idx = ring->reg_idx;
4684         u32 rxdctl = 0;
4685
4686         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4687         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4688                                            MEM_TYPE_PAGE_SHARED, NULL));
4689
4690         /* disable the queue */
4691         wr32(E1000_RXDCTL(reg_idx), 0);
4692
4693         /* Set DMA base address registers */
4694         wr32(E1000_RDBAL(reg_idx),
4695              rdba & 0x00000000ffffffffULL);
4696         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4697         wr32(E1000_RDLEN(reg_idx),
4698              ring->count * sizeof(union e1000_adv_rx_desc));
4699
4700         /* initialize head and tail */
4701         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4702         wr32(E1000_RDH(reg_idx), 0);
4703         writel(0, ring->tail);
4704
4705         /* set descriptor configuration */
4706         igb_setup_srrctl(adapter, ring);
4707
4708         /* set filtering for VMDQ pools */
4709         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4710
4711         rxdctl |= IGB_RX_PTHRESH;
4712         rxdctl |= IGB_RX_HTHRESH << 8;
4713         rxdctl |= IGB_RX_WTHRESH << 16;
4714
4715         /* initialize rx_buffer_info */
4716         memset(ring->rx_buffer_info, 0,
4717                sizeof(struct igb_rx_buffer) * ring->count);
4718
4719         /* initialize Rx descriptor 0 */
4720         rx_desc = IGB_RX_DESC(ring, 0);
4721         rx_desc->wb.upper.length = 0;
4722
4723         /* enable receive descriptor fetching */
4724         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4725         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4726 }
4727
4728 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4729                                   struct igb_ring *rx_ring)
4730 {
4731         /* set build_skb and buffer size flags */
4732         clear_ring_build_skb_enabled(rx_ring);
4733         clear_ring_uses_large_buffer(rx_ring);
4734
4735         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4736                 return;
4737
4738         set_ring_build_skb_enabled(rx_ring);
4739
4740 #if (PAGE_SIZE < 8192)
4741         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4742                 return;
4743
4744         set_ring_uses_large_buffer(rx_ring);
4745 #endif
4746 }
4747
4748 /**
4749  *  igb_configure_rx - Configure receive Unit after Reset
4750  *  @adapter: board private structure
4751  *
4752  *  Configure the Rx unit of the MAC after a reset.
4753  **/
4754 static void igb_configure_rx(struct igb_adapter *adapter)
4755 {
4756         int i;
4757
4758         /* set the correct pool for the PF default MAC address in entry 0 */
4759         igb_set_default_mac_filter(adapter);
4760
4761         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4762          * the Base and Length of the Rx Descriptor Ring
4763          */
4764         for (i = 0; i < adapter->num_rx_queues; i++) {
4765                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4766
4767                 igb_set_rx_buffer_len(adapter, rx_ring);
4768                 igb_configure_rx_ring(adapter, rx_ring);
4769         }
4770 }
4771
4772 /**
4773  *  igb_free_tx_resources - Free Tx Resources per Queue
4774  *  @tx_ring: Tx descriptor ring for a specific queue
4775  *
4776  *  Free all transmit software resources
4777  **/
4778 void igb_free_tx_resources(struct igb_ring *tx_ring)
4779 {
4780         igb_clean_tx_ring(tx_ring);
4781
4782         vfree(tx_ring->tx_buffer_info);
4783         tx_ring->tx_buffer_info = NULL;
4784
4785         /* if not set, then don't free */
4786         if (!tx_ring->desc)
4787                 return;
4788
4789         dma_free_coherent(tx_ring->dev, tx_ring->size,
4790                           tx_ring->desc, tx_ring->dma);
4791
4792         tx_ring->desc = NULL;
4793 }
4794
4795 /**
4796  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4797  *  @adapter: board private structure
4798  *
4799  *  Free all transmit software resources
4800  **/
4801 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4802 {
4803         int i;
4804
4805         for (i = 0; i < adapter->num_tx_queues; i++)
4806                 if (adapter->tx_ring[i])
4807                         igb_free_tx_resources(adapter->tx_ring[i]);
4808 }
4809
4810 /**
4811  *  igb_clean_tx_ring - Free Tx Buffers
4812  *  @tx_ring: ring to be cleaned
4813  **/
4814 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4815 {
4816         u16 i = tx_ring->next_to_clean;
4817         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4818
4819         while (i != tx_ring->next_to_use) {
4820                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4821
4822                 /* Free all the Tx ring sk_buffs */
4823                 dev_kfree_skb_any(tx_buffer->skb);
4824
4825                 /* unmap skb header data */
4826                 dma_unmap_single(tx_ring->dev,
4827                                  dma_unmap_addr(tx_buffer, dma),
4828                                  dma_unmap_len(tx_buffer, len),
4829                                  DMA_TO_DEVICE);
4830
4831                 /* check for eop_desc to determine the end of the packet */
4832                 eop_desc = tx_buffer->next_to_watch;
4833                 tx_desc = IGB_TX_DESC(tx_ring, i);
4834
4835                 /* unmap remaining buffers */
4836                 while (tx_desc != eop_desc) {
4837                         tx_buffer++;
4838                         tx_desc++;
4839                         i++;
4840                         if (unlikely(i == tx_ring->count)) {
4841                                 i = 0;
4842                                 tx_buffer = tx_ring->tx_buffer_info;
4843                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4844                         }
4845
4846                         /* unmap any remaining paged data */
4847                         if (dma_unmap_len(tx_buffer, len))
4848                                 dma_unmap_page(tx_ring->dev,
4849                                                dma_unmap_addr(tx_buffer, dma),
4850                                                dma_unmap_len(tx_buffer, len),
4851                                                DMA_TO_DEVICE);
4852                 }
4853
4854                 tx_buffer->next_to_watch = NULL;
4855
4856                 /* move us one more past the eop_desc for start of next pkt */
4857                 tx_buffer++;
4858                 i++;
4859                 if (unlikely(i == tx_ring->count)) {
4860                         i = 0;
4861                         tx_buffer = tx_ring->tx_buffer_info;
4862                 }
4863         }
4864
4865         /* reset BQL for queue */
4866         netdev_tx_reset_queue(txring_txq(tx_ring));
4867
4868         /* reset next_to_use and next_to_clean */
4869         tx_ring->next_to_use = 0;
4870         tx_ring->next_to_clean = 0;
4871 }
4872
4873 /**
4874  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4875  *  @adapter: board private structure
4876  **/
4877 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4878 {
4879         int i;
4880
4881         for (i = 0; i < adapter->num_tx_queues; i++)
4882                 if (adapter->tx_ring[i])
4883                         igb_clean_tx_ring(adapter->tx_ring[i]);
4884 }
4885
4886 /**
4887  *  igb_free_rx_resources - Free Rx Resources
4888  *  @rx_ring: ring to clean the resources from
4889  *
4890  *  Free all receive software resources
4891  **/
4892 void igb_free_rx_resources(struct igb_ring *rx_ring)
4893 {
4894         igb_clean_rx_ring(rx_ring);
4895
4896         rx_ring->xdp_prog = NULL;
4897         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4898         vfree(rx_ring->rx_buffer_info);
4899         rx_ring->rx_buffer_info = NULL;
4900
4901         /* if not set, then don't free */
4902         if (!rx_ring->desc)
4903                 return;
4904
4905         dma_free_coherent(rx_ring->dev, rx_ring->size,
4906                           rx_ring->desc, rx_ring->dma);
4907
4908         rx_ring->desc = NULL;
4909 }
4910
4911 /**
4912  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4913  *  @adapter: board private structure
4914  *
4915  *  Free all receive software resources
4916  **/
4917 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4918 {
4919         int i;
4920
4921         for (i = 0; i < adapter->num_rx_queues; i++)
4922                 if (adapter->rx_ring[i])
4923                         igb_free_rx_resources(adapter->rx_ring[i]);
4924 }
4925
4926 /**
4927  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4928  *  @rx_ring: ring to free buffers from
4929  **/
4930 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4931 {
4932         u16 i = rx_ring->next_to_clean;
4933
4934         dev_kfree_skb(rx_ring->skb);
4935         rx_ring->skb = NULL;
4936
4937         /* Free all the Rx ring sk_buffs */
4938         while (i != rx_ring->next_to_alloc) {
4939                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4940
4941                 /* Invalidate cache lines that may have been written to by
4942                  * device so that we avoid corrupting memory.
4943                  */
4944                 dma_sync_single_range_for_cpu(rx_ring->dev,
4945                                               buffer_info->dma,
4946                                               buffer_info->page_offset,
4947                                               igb_rx_bufsz(rx_ring),
4948                                               DMA_FROM_DEVICE);
4949
4950                 /* free resources associated with mapping */
4951                 dma_unmap_page_attrs(rx_ring->dev,
4952                                      buffer_info->dma,
4953                                      igb_rx_pg_size(rx_ring),
4954                                      DMA_FROM_DEVICE,
4955                                      IGB_RX_DMA_ATTR);
4956                 __page_frag_cache_drain(buffer_info->page,
4957                                         buffer_info->pagecnt_bias);
4958
4959                 i++;
4960                 if (i == rx_ring->count)
4961                         i = 0;
4962         }
4963
4964         rx_ring->next_to_alloc = 0;
4965         rx_ring->next_to_clean = 0;
4966         rx_ring->next_to_use = 0;
4967 }
4968
4969 /**
4970  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4971  *  @adapter: board private structure
4972  **/
4973 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4974 {
4975         int i;
4976
4977         for (i = 0; i < adapter->num_rx_queues; i++)
4978                 if (adapter->rx_ring[i])
4979                         igb_clean_rx_ring(adapter->rx_ring[i]);
4980 }
4981
4982 /**
4983  *  igb_set_mac - Change the Ethernet Address of the NIC
4984  *  @netdev: network interface device structure
4985  *  @p: pointer to an address structure
4986  *
4987  *  Returns 0 on success, negative on failure
4988  **/
4989 static int igb_set_mac(struct net_device *netdev, void *p)
4990 {
4991         struct igb_adapter *adapter = netdev_priv(netdev);
4992         struct e1000_hw *hw = &adapter->hw;
4993         struct sockaddr *addr = p;
4994
4995         if (!is_valid_ether_addr(addr->sa_data))
4996                 return -EADDRNOTAVAIL;
4997
4998         eth_hw_addr_set(netdev, addr->sa_data);
4999         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5000
5001         /* set the correct pool for the new PF MAC address in entry 0 */
5002         igb_set_default_mac_filter(adapter);
5003
5004         return 0;
5005 }
5006
5007 /**
5008  *  igb_write_mc_addr_list - write multicast addresses to MTA
5009  *  @netdev: network interface device structure
5010  *
5011  *  Writes multicast address list to the MTA hash table.
5012  *  Returns: -ENOMEM on failure
5013  *           0 on no addresses written
5014  *           X on writing X addresses to MTA
5015  **/
5016 static int igb_write_mc_addr_list(struct net_device *netdev)
5017 {
5018         struct igb_adapter *adapter = netdev_priv(netdev);
5019         struct e1000_hw *hw = &adapter->hw;
5020         struct netdev_hw_addr *ha;
5021         u8  *mta_list;
5022         int i;
5023
5024         if (netdev_mc_empty(netdev)) {
5025                 /* nothing to program, so clear mc list */
5026                 igb_update_mc_addr_list(hw, NULL, 0);
5027                 igb_restore_vf_multicasts(adapter);
5028                 return 0;
5029         }
5030
5031         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5032         if (!mta_list)
5033                 return -ENOMEM;
5034
5035         /* The shared function expects a packed array of only addresses. */
5036         i = 0;
5037         netdev_for_each_mc_addr(ha, netdev)
5038                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5039
5040         igb_update_mc_addr_list(hw, mta_list, i);
5041         kfree(mta_list);
5042
5043         return netdev_mc_count(netdev);
5044 }
5045
5046 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5047 {
5048         struct e1000_hw *hw = &adapter->hw;
5049         u32 i, pf_id;
5050
5051         switch (hw->mac.type) {
5052         case e1000_i210:
5053         case e1000_i211:
5054         case e1000_i350:
5055                 /* VLAN filtering needed for VLAN prio filter */
5056                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5057                         break;
5058                 fallthrough;
5059         case e1000_82576:
5060         case e1000_82580:
5061         case e1000_i354:
5062                 /* VLAN filtering needed for pool filtering */
5063                 if (adapter->vfs_allocated_count)
5064                         break;
5065                 fallthrough;
5066         default:
5067                 return 1;
5068         }
5069
5070         /* We are already in VLAN promisc, nothing to do */
5071         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5072                 return 0;
5073
5074         if (!adapter->vfs_allocated_count)
5075                 goto set_vfta;
5076
5077         /* Add PF to all active pools */
5078         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5079
5080         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5081                 u32 vlvf = rd32(E1000_VLVF(i));
5082
5083                 vlvf |= BIT(pf_id);
5084                 wr32(E1000_VLVF(i), vlvf);
5085         }
5086
5087 set_vfta:
5088         /* Set all bits in the VLAN filter table array */
5089         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5090                 hw->mac.ops.write_vfta(hw, i, ~0U);
5091
5092         /* Set flag so we don't redo unnecessary work */
5093         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5094
5095         return 0;
5096 }
5097
5098 #define VFTA_BLOCK_SIZE 8
5099 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5100 {
5101         struct e1000_hw *hw = &adapter->hw;
5102         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5103         u32 vid_start = vfta_offset * 32;
5104         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5105         u32 i, vid, word, bits, pf_id;
5106
5107         /* guarantee that we don't scrub out management VLAN */
5108         vid = adapter->mng_vlan_id;
5109         if (vid >= vid_start && vid < vid_end)
5110                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5111
5112         if (!adapter->vfs_allocated_count)
5113                 goto set_vfta;
5114
5115         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5116
5117         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5118                 u32 vlvf = rd32(E1000_VLVF(i));
5119
5120                 /* pull VLAN ID from VLVF */
5121                 vid = vlvf & VLAN_VID_MASK;
5122
5123                 /* only concern ourselves with a certain range */
5124                 if (vid < vid_start || vid >= vid_end)
5125                         continue;
5126
5127                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5128                         /* record VLAN ID in VFTA */
5129                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5130
5131                         /* if PF is part of this then continue */
5132                         if (test_bit(vid, adapter->active_vlans))
5133                                 continue;
5134                 }
5135
5136                 /* remove PF from the pool */
5137                 bits = ~BIT(pf_id);
5138                 bits &= rd32(E1000_VLVF(i));
5139                 wr32(E1000_VLVF(i), bits);
5140         }
5141
5142 set_vfta:
5143         /* extract values from active_vlans and write back to VFTA */
5144         for (i = VFTA_BLOCK_SIZE; i--;) {
5145                 vid = (vfta_offset + i) * 32;
5146                 word = vid / BITS_PER_LONG;
5147                 bits = vid % BITS_PER_LONG;
5148
5149                 vfta[i] |= adapter->active_vlans[word] >> bits;
5150
5151                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5152         }
5153 }
5154
5155 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5156 {
5157         u32 i;
5158
5159         /* We are not in VLAN promisc, nothing to do */
5160         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5161                 return;
5162
5163         /* Set flag so we don't redo unnecessary work */
5164         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5165
5166         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5167                 igb_scrub_vfta(adapter, i);
5168 }
5169
5170 /**
5171  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5172  *  @netdev: network interface device structure
5173  *
5174  *  The set_rx_mode entry point is called whenever the unicast or multicast
5175  *  address lists or the network interface flags are updated.  This routine is
5176  *  responsible for configuring the hardware for proper unicast, multicast,
5177  *  promiscuous mode, and all-multi behavior.
5178  **/
5179 static void igb_set_rx_mode(struct net_device *netdev)
5180 {
5181         struct igb_adapter *adapter = netdev_priv(netdev);
5182         struct e1000_hw *hw = &adapter->hw;
5183         unsigned int vfn = adapter->vfs_allocated_count;
5184         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5185         int count;
5186
5187         /* Check for Promiscuous and All Multicast modes */
5188         if (netdev->flags & IFF_PROMISC) {
5189                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5190                 vmolr |= E1000_VMOLR_MPME;
5191
5192                 /* enable use of UTA filter to force packets to default pool */
5193                 if (hw->mac.type == e1000_82576)
5194                         vmolr |= E1000_VMOLR_ROPE;
5195         } else {
5196                 if (netdev->flags & IFF_ALLMULTI) {
5197                         rctl |= E1000_RCTL_MPE;
5198                         vmolr |= E1000_VMOLR_MPME;
5199                 } else {
5200                         /* Write addresses to the MTA, if the attempt fails
5201                          * then we should just turn on promiscuous mode so
5202                          * that we can at least receive multicast traffic
5203                          */
5204                         count = igb_write_mc_addr_list(netdev);
5205                         if (count < 0) {
5206                                 rctl |= E1000_RCTL_MPE;
5207                                 vmolr |= E1000_VMOLR_MPME;
5208                         } else if (count) {
5209                                 vmolr |= E1000_VMOLR_ROMPE;
5210                         }
5211                 }
5212         }
5213
5214         /* Write addresses to available RAR registers, if there is not
5215          * sufficient space to store all the addresses then enable
5216          * unicast promiscuous mode
5217          */
5218         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5219                 rctl |= E1000_RCTL_UPE;
5220                 vmolr |= E1000_VMOLR_ROPE;
5221         }
5222
5223         /* enable VLAN filtering by default */
5224         rctl |= E1000_RCTL_VFE;
5225
5226         /* disable VLAN filtering for modes that require it */
5227         if ((netdev->flags & IFF_PROMISC) ||
5228             (netdev->features & NETIF_F_RXALL)) {
5229                 /* if we fail to set all rules then just clear VFE */
5230                 if (igb_vlan_promisc_enable(adapter))
5231                         rctl &= ~E1000_RCTL_VFE;
5232         } else {
5233                 igb_vlan_promisc_disable(adapter);
5234         }
5235
5236         /* update state of unicast, multicast, and VLAN filtering modes */
5237         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5238                                      E1000_RCTL_VFE);
5239         wr32(E1000_RCTL, rctl);
5240
5241 #if (PAGE_SIZE < 8192)
5242         if (!adapter->vfs_allocated_count) {
5243                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5244                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5245         }
5246 #endif
5247         wr32(E1000_RLPML, rlpml);
5248
5249         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5250          * the VMOLR to enable the appropriate modes.  Without this workaround
5251          * we will have issues with VLAN tag stripping not being done for frames
5252          * that are only arriving because we are the default pool
5253          */
5254         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5255                 return;
5256
5257         /* set UTA to appropriate mode */
5258         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5259
5260         vmolr |= rd32(E1000_VMOLR(vfn)) &
5261                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5262
5263         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5264         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5265 #if (PAGE_SIZE < 8192)
5266         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5267                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5268         else
5269 #endif
5270                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5271         vmolr |= E1000_VMOLR_LPE;
5272
5273         wr32(E1000_VMOLR(vfn), vmolr);
5274
5275         igb_restore_vf_multicasts(adapter);
5276 }
5277
5278 static void igb_check_wvbr(struct igb_adapter *adapter)
5279 {
5280         struct e1000_hw *hw = &adapter->hw;
5281         u32 wvbr = 0;
5282
5283         switch (hw->mac.type) {
5284         case e1000_82576:
5285         case e1000_i350:
5286                 wvbr = rd32(E1000_WVBR);
5287                 if (!wvbr)
5288                         return;
5289                 break;
5290         default:
5291                 break;
5292         }
5293
5294         adapter->wvbr |= wvbr;
5295 }
5296
5297 #define IGB_STAGGERED_QUEUE_OFFSET 8
5298
5299 static void igb_spoof_check(struct igb_adapter *adapter)
5300 {
5301         int j;
5302
5303         if (!adapter->wvbr)
5304                 return;
5305
5306         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5307                 if (adapter->wvbr & BIT(j) ||
5308                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5309                         dev_warn(&adapter->pdev->dev,
5310                                 "Spoof event(s) detected on VF %d\n", j);
5311                         adapter->wvbr &=
5312                                 ~(BIT(j) |
5313                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5314                 }
5315         }
5316 }
5317
5318 /* Need to wait a few seconds after link up to get diagnostic information from
5319  * the phy
5320  */
5321 static void igb_update_phy_info(struct timer_list *t)
5322 {
5323         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5324         igb_get_phy_info(&adapter->hw);
5325 }
5326
5327 /**
5328  *  igb_has_link - check shared code for link and determine up/down
5329  *  @adapter: pointer to driver private info
5330  **/
5331 bool igb_has_link(struct igb_adapter *adapter)
5332 {
5333         struct e1000_hw *hw = &adapter->hw;
5334         bool link_active = false;
5335
5336         /* get_link_status is set on LSC (link status) interrupt or
5337          * rx sequence error interrupt.  get_link_status will stay
5338          * false until the e1000_check_for_link establishes link
5339          * for copper adapters ONLY
5340          */
5341         switch (hw->phy.media_type) {
5342         case e1000_media_type_copper:
5343                 if (!hw->mac.get_link_status)
5344                         return true;
5345                 fallthrough;
5346         case e1000_media_type_internal_serdes:
5347                 hw->mac.ops.check_for_link(hw);
5348                 link_active = !hw->mac.get_link_status;
5349                 break;
5350         default:
5351         case e1000_media_type_unknown:
5352                 break;
5353         }
5354
5355         if (((hw->mac.type == e1000_i210) ||
5356              (hw->mac.type == e1000_i211)) &&
5357              (hw->phy.id == I210_I_PHY_ID)) {
5358                 if (!netif_carrier_ok(adapter->netdev)) {
5359                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5360                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5361                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5362                         adapter->link_check_timeout = jiffies;
5363                 }
5364         }
5365
5366         return link_active;
5367 }
5368
5369 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5370 {
5371         bool ret = false;
5372         u32 ctrl_ext, thstat;
5373
5374         /* check for thermal sensor event on i350 copper only */
5375         if (hw->mac.type == e1000_i350) {
5376                 thstat = rd32(E1000_THSTAT);
5377                 ctrl_ext = rd32(E1000_CTRL_EXT);
5378
5379                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5380                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5381                         ret = !!(thstat & event);
5382         }
5383
5384         return ret;
5385 }
5386
5387 /**
5388  *  igb_check_lvmmc - check for malformed packets received
5389  *  and indicated in LVMMC register
5390  *  @adapter: pointer to adapter
5391  **/
5392 static void igb_check_lvmmc(struct igb_adapter *adapter)
5393 {
5394         struct e1000_hw *hw = &adapter->hw;
5395         u32 lvmmc;
5396
5397         lvmmc = rd32(E1000_LVMMC);
5398         if (lvmmc) {
5399                 if (unlikely(net_ratelimit())) {
5400                         netdev_warn(adapter->netdev,
5401                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5402                                     lvmmc);
5403                 }
5404         }
5405 }
5406
5407 /**
5408  *  igb_watchdog - Timer Call-back
5409  *  @t: pointer to timer_list containing our private info pointer
5410  **/
5411 static void igb_watchdog(struct timer_list *t)
5412 {
5413         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5414         /* Do the rest outside of interrupt context */
5415         schedule_work(&adapter->watchdog_task);
5416 }
5417
5418 static void igb_watchdog_task(struct work_struct *work)
5419 {
5420         struct igb_adapter *adapter = container_of(work,
5421                                                    struct igb_adapter,
5422                                                    watchdog_task);
5423         struct e1000_hw *hw = &adapter->hw;
5424         struct e1000_phy_info *phy = &hw->phy;
5425         struct net_device *netdev = adapter->netdev;
5426         u32 link;
5427         int i;
5428         u32 connsw;
5429         u16 phy_data, retry_count = 20;
5430
5431         link = igb_has_link(adapter);
5432
5433         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5434                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5435                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5436                 else
5437                         link = false;
5438         }
5439
5440         /* Force link down if we have fiber to swap to */
5441         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5442                 if (hw->phy.media_type == e1000_media_type_copper) {
5443                         connsw = rd32(E1000_CONNSW);
5444                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5445                                 link = 0;
5446                 }
5447         }
5448         if (link) {
5449                 /* Perform a reset if the media type changed. */
5450                 if (hw->dev_spec._82575.media_changed) {
5451                         hw->dev_spec._82575.media_changed = false;
5452                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5453                         igb_reset(adapter);
5454                 }
5455                 /* Cancel scheduled suspend requests. */
5456                 pm_runtime_resume(netdev->dev.parent);
5457
5458                 if (!netif_carrier_ok(netdev)) {
5459                         u32 ctrl;
5460
5461                         hw->mac.ops.get_speed_and_duplex(hw,
5462                                                          &adapter->link_speed,
5463                                                          &adapter->link_duplex);
5464
5465                         ctrl = rd32(E1000_CTRL);
5466                         /* Links status message must follow this format */
5467                         netdev_info(netdev,
5468                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5469                                netdev->name,
5470                                adapter->link_speed,
5471                                adapter->link_duplex == FULL_DUPLEX ?
5472                                "Full" : "Half",
5473                                (ctrl & E1000_CTRL_TFCE) &&
5474                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5475                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5476                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5477
5478                         /* disable EEE if enabled */
5479                         if ((adapter->flags & IGB_FLAG_EEE) &&
5480                                 (adapter->link_duplex == HALF_DUPLEX)) {
5481                                 dev_info(&adapter->pdev->dev,
5482                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5483                                 adapter->hw.dev_spec._82575.eee_disable = true;
5484                                 adapter->flags &= ~IGB_FLAG_EEE;
5485                         }
5486
5487                         /* check if SmartSpeed worked */
5488                         igb_check_downshift(hw);
5489                         if (phy->speed_downgraded)
5490                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5491
5492                         /* check for thermal sensor event */
5493                         if (igb_thermal_sensor_event(hw,
5494                             E1000_THSTAT_LINK_THROTTLE))
5495                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5496
5497                         /* adjust timeout factor according to speed/duplex */
5498                         adapter->tx_timeout_factor = 1;
5499                         switch (adapter->link_speed) {
5500                         case SPEED_10:
5501                                 adapter->tx_timeout_factor = 14;
5502                                 break;
5503                         case SPEED_100:
5504                                 /* maybe add some timeout factor ? */
5505                                 break;
5506                         }
5507
5508                         if (adapter->link_speed != SPEED_1000 ||
5509                             !hw->phy.ops.read_reg)
5510                                 goto no_wait;
5511
5512                         /* wait for Remote receiver status OK */
5513 retry_read_status:
5514                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5515                                               &phy_data)) {
5516                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5517                                     retry_count) {
5518                                         msleep(100);
5519                                         retry_count--;
5520                                         goto retry_read_status;
5521                                 } else if (!retry_count) {
5522                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5523                                 }
5524                         } else {
5525                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5526                         }
5527 no_wait:
5528                         netif_carrier_on(netdev);
5529
5530                         igb_ping_all_vfs(adapter);
5531                         igb_check_vf_rate_limit(adapter);
5532
5533                         /* link state has changed, schedule phy info update */
5534                         if (!test_bit(__IGB_DOWN, &adapter->state))
5535                                 mod_timer(&adapter->phy_info_timer,
5536                                           round_jiffies(jiffies + 2 * HZ));
5537                 }
5538         } else {
5539                 if (netif_carrier_ok(netdev)) {
5540                         adapter->link_speed = 0;
5541                         adapter->link_duplex = 0;
5542
5543                         /* check for thermal sensor event */
5544                         if (igb_thermal_sensor_event(hw,
5545                             E1000_THSTAT_PWR_DOWN)) {
5546                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5547                         }
5548
5549                         /* Links status message must follow this format */
5550                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5551                                netdev->name);
5552                         netif_carrier_off(netdev);
5553
5554                         igb_ping_all_vfs(adapter);
5555
5556                         /* link state has changed, schedule phy info update */
5557                         if (!test_bit(__IGB_DOWN, &adapter->state))
5558                                 mod_timer(&adapter->phy_info_timer,
5559                                           round_jiffies(jiffies + 2 * HZ));
5560
5561                         /* link is down, time to check for alternate media */
5562                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5563                                 igb_check_swap_media(adapter);
5564                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5565                                         schedule_work(&adapter->reset_task);
5566                                         /* return immediately */
5567                                         return;
5568                                 }
5569                         }
5570                         pm_schedule_suspend(netdev->dev.parent,
5571                                             MSEC_PER_SEC * 5);
5572
5573                 /* also check for alternate media here */
5574                 } else if (!netif_carrier_ok(netdev) &&
5575                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5576                         igb_check_swap_media(adapter);
5577                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5578                                 schedule_work(&adapter->reset_task);
5579                                 /* return immediately */
5580                                 return;
5581                         }
5582                 }
5583         }
5584
5585         spin_lock(&adapter->stats64_lock);
5586         igb_update_stats(adapter);
5587         spin_unlock(&adapter->stats64_lock);
5588
5589         for (i = 0; i < adapter->num_tx_queues; i++) {
5590                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5591                 if (!netif_carrier_ok(netdev)) {
5592                         /* We've lost link, so the controller stops DMA,
5593                          * but we've got queued Tx work that's never going
5594                          * to get done, so reset controller to flush Tx.
5595                          * (Do the reset outside of interrupt context).
5596                          */
5597                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5598                                 adapter->tx_timeout_count++;
5599                                 schedule_work(&adapter->reset_task);
5600                                 /* return immediately since reset is imminent */
5601                                 return;
5602                         }
5603                 }
5604
5605                 /* Force detection of hung controller every watchdog period */
5606                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5607         }
5608
5609         /* Cause software interrupt to ensure Rx ring is cleaned */
5610         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5611                 u32 eics = 0;
5612
5613                 for (i = 0; i < adapter->num_q_vectors; i++)
5614                         eics |= adapter->q_vector[i]->eims_value;
5615                 wr32(E1000_EICS, eics);
5616         } else {
5617                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5618         }
5619
5620         igb_spoof_check(adapter);
5621         igb_ptp_rx_hang(adapter);
5622         igb_ptp_tx_hang(adapter);
5623
5624         /* Check LVMMC register on i350/i354 only */
5625         if ((adapter->hw.mac.type == e1000_i350) ||
5626             (adapter->hw.mac.type == e1000_i354))
5627                 igb_check_lvmmc(adapter);
5628
5629         /* Reset the timer */
5630         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5631                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5632                         mod_timer(&adapter->watchdog_timer,
5633                                   round_jiffies(jiffies +  HZ));
5634                 else
5635                         mod_timer(&adapter->watchdog_timer,
5636                                   round_jiffies(jiffies + 2 * HZ));
5637         }
5638 }
5639
5640 enum latency_range {
5641         lowest_latency = 0,
5642         low_latency = 1,
5643         bulk_latency = 2,
5644         latency_invalid = 255
5645 };
5646
5647 /**
5648  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5649  *  @q_vector: pointer to q_vector
5650  *
5651  *  Stores a new ITR value based on strictly on packet size.  This
5652  *  algorithm is less sophisticated than that used in igb_update_itr,
5653  *  due to the difficulty of synchronizing statistics across multiple
5654  *  receive rings.  The divisors and thresholds used by this function
5655  *  were determined based on theoretical maximum wire speed and testing
5656  *  data, in order to minimize response time while increasing bulk
5657  *  throughput.
5658  *  This functionality is controlled by ethtool's coalescing settings.
5659  *  NOTE:  This function is called only when operating in a multiqueue
5660  *         receive environment.
5661  **/
5662 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5663 {
5664         int new_val = q_vector->itr_val;
5665         int avg_wire_size = 0;
5666         struct igb_adapter *adapter = q_vector->adapter;
5667         unsigned int packets;
5668
5669         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5670          * ints/sec - ITR timer value of 120 ticks.
5671          */
5672         if (adapter->link_speed != SPEED_1000) {
5673                 new_val = IGB_4K_ITR;
5674                 goto set_itr_val;
5675         }
5676
5677         packets = q_vector->rx.total_packets;
5678         if (packets)
5679                 avg_wire_size = q_vector->rx.total_bytes / packets;
5680
5681         packets = q_vector->tx.total_packets;
5682         if (packets)
5683                 avg_wire_size = max_t(u32, avg_wire_size,
5684                                       q_vector->tx.total_bytes / packets);
5685
5686         /* if avg_wire_size isn't set no work was done */
5687         if (!avg_wire_size)
5688                 goto clear_counts;
5689
5690         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5691         avg_wire_size += 24;
5692
5693         /* Don't starve jumbo frames */
5694         avg_wire_size = min(avg_wire_size, 3000);
5695
5696         /* Give a little boost to mid-size frames */
5697         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5698                 new_val = avg_wire_size / 3;
5699         else
5700                 new_val = avg_wire_size / 2;
5701
5702         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5703         if (new_val < IGB_20K_ITR &&
5704             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5705              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5706                 new_val = IGB_20K_ITR;
5707
5708 set_itr_val:
5709         if (new_val != q_vector->itr_val) {
5710                 q_vector->itr_val = new_val;
5711                 q_vector->set_itr = 1;
5712         }
5713 clear_counts:
5714         q_vector->rx.total_bytes = 0;
5715         q_vector->rx.total_packets = 0;
5716         q_vector->tx.total_bytes = 0;
5717         q_vector->tx.total_packets = 0;
5718 }
5719
5720 /**
5721  *  igb_update_itr - update the dynamic ITR value based on statistics
5722  *  @q_vector: pointer to q_vector
5723  *  @ring_container: ring info to update the itr for
5724  *
5725  *  Stores a new ITR value based on packets and byte
5726  *  counts during the last interrupt.  The advantage of per interrupt
5727  *  computation is faster updates and more accurate ITR for the current
5728  *  traffic pattern.  Constants in this function were computed
5729  *  based on theoretical maximum wire speed and thresholds were set based
5730  *  on testing data as well as attempting to minimize response time
5731  *  while increasing bulk throughput.
5732  *  This functionality is controlled by ethtool's coalescing settings.
5733  *  NOTE:  These calculations are only valid when operating in a single-
5734  *         queue environment.
5735  **/
5736 static void igb_update_itr(struct igb_q_vector *q_vector,
5737                            struct igb_ring_container *ring_container)
5738 {
5739         unsigned int packets = ring_container->total_packets;
5740         unsigned int bytes = ring_container->total_bytes;
5741         u8 itrval = ring_container->itr;
5742
5743         /* no packets, exit with status unchanged */
5744         if (packets == 0)
5745                 return;
5746
5747         switch (itrval) {
5748         case lowest_latency:
5749                 /* handle TSO and jumbo frames */
5750                 if (bytes/packets > 8000)
5751                         itrval = bulk_latency;
5752                 else if ((packets < 5) && (bytes > 512))
5753                         itrval = low_latency;
5754                 break;
5755         case low_latency:  /* 50 usec aka 20000 ints/s */
5756                 if (bytes > 10000) {
5757                         /* this if handles the TSO accounting */
5758                         if (bytes/packets > 8000)
5759                                 itrval = bulk_latency;
5760                         else if ((packets < 10) || ((bytes/packets) > 1200))
5761                                 itrval = bulk_latency;
5762                         else if ((packets > 35))
5763                                 itrval = lowest_latency;
5764                 } else if (bytes/packets > 2000) {
5765                         itrval = bulk_latency;
5766                 } else if (packets <= 2 && bytes < 512) {
5767                         itrval = lowest_latency;
5768                 }
5769                 break;
5770         case bulk_latency: /* 250 usec aka 4000 ints/s */
5771                 if (bytes > 25000) {
5772                         if (packets > 35)
5773                                 itrval = low_latency;
5774                 } else if (bytes < 1500) {
5775                         itrval = low_latency;
5776                 }
5777                 break;
5778         }
5779
5780         /* clear work counters since we have the values we need */
5781         ring_container->total_bytes = 0;
5782         ring_container->total_packets = 0;
5783
5784         /* write updated itr to ring container */
5785         ring_container->itr = itrval;
5786 }
5787
5788 static void igb_set_itr(struct igb_q_vector *q_vector)
5789 {
5790         struct igb_adapter *adapter = q_vector->adapter;
5791         u32 new_itr = q_vector->itr_val;
5792         u8 current_itr = 0;
5793
5794         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5795         if (adapter->link_speed != SPEED_1000) {
5796                 current_itr = 0;
5797                 new_itr = IGB_4K_ITR;
5798                 goto set_itr_now;
5799         }
5800
5801         igb_update_itr(q_vector, &q_vector->tx);
5802         igb_update_itr(q_vector, &q_vector->rx);
5803
5804         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5805
5806         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5807         if (current_itr == lowest_latency &&
5808             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5809              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5810                 current_itr = low_latency;
5811
5812         switch (current_itr) {
5813         /* counts and packets in update_itr are dependent on these numbers */
5814         case lowest_latency:
5815                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5816                 break;
5817         case low_latency:
5818                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5819                 break;
5820         case bulk_latency:
5821                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5822                 break;
5823         default:
5824                 break;
5825         }
5826
5827 set_itr_now:
5828         if (new_itr != q_vector->itr_val) {
5829                 /* this attempts to bias the interrupt rate towards Bulk
5830                  * by adding intermediate steps when interrupt rate is
5831                  * increasing
5832                  */
5833                 new_itr = new_itr > q_vector->itr_val ?
5834                           max((new_itr * q_vector->itr_val) /
5835                           (new_itr + (q_vector->itr_val >> 2)),
5836                           new_itr) : new_itr;
5837                 /* Don't write the value here; it resets the adapter's
5838                  * internal timer, and causes us to delay far longer than
5839                  * we should between interrupts.  Instead, we write the ITR
5840                  * value at the beginning of the next interrupt so the timing
5841                  * ends up being correct.
5842                  */
5843                 q_vector->itr_val = new_itr;
5844                 q_vector->set_itr = 1;
5845         }
5846 }
5847
5848 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5849                             struct igb_tx_buffer *first,
5850                             u32 vlan_macip_lens, u32 type_tucmd,
5851                             u32 mss_l4len_idx)
5852 {
5853         struct e1000_adv_tx_context_desc *context_desc;
5854         u16 i = tx_ring->next_to_use;
5855         struct timespec64 ts;
5856
5857         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5858
5859         i++;
5860         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5861
5862         /* set bits to identify this as an advanced context descriptor */
5863         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5864
5865         /* For 82575, context index must be unique per ring. */
5866         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5867                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5868
5869         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5870         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5871         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5872
5873         /* We assume there is always a valid tx time available. Invalid times
5874          * should have been handled by the upper layers.
5875          */
5876         if (tx_ring->launchtime_enable) {
5877                 ts = ktime_to_timespec64(first->skb->tstamp);
5878                 skb_txtime_consumed(first->skb);
5879                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5880         } else {
5881                 context_desc->seqnum_seed = 0;
5882         }
5883 }
5884
5885 static int igb_tso(struct igb_ring *tx_ring,
5886                    struct igb_tx_buffer *first,
5887                    u8 *hdr_len)
5888 {
5889         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5890         struct sk_buff *skb = first->skb;
5891         union {
5892                 struct iphdr *v4;
5893                 struct ipv6hdr *v6;
5894                 unsigned char *hdr;
5895         } ip;
5896         union {
5897                 struct tcphdr *tcp;
5898                 struct udphdr *udp;
5899                 unsigned char *hdr;
5900         } l4;
5901         u32 paylen, l4_offset;
5902         int err;
5903
5904         if (skb->ip_summed != CHECKSUM_PARTIAL)
5905                 return 0;
5906
5907         if (!skb_is_gso(skb))
5908                 return 0;
5909
5910         err = skb_cow_head(skb, 0);
5911         if (err < 0)
5912                 return err;
5913
5914         ip.hdr = skb_network_header(skb);
5915         l4.hdr = skb_checksum_start(skb);
5916
5917         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5918         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5919                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5920
5921         /* initialize outer IP header fields */
5922         if (ip.v4->version == 4) {
5923                 unsigned char *csum_start = skb_checksum_start(skb);
5924                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5925
5926                 /* IP header will have to cancel out any data that
5927                  * is not a part of the outer IP header
5928                  */
5929                 ip.v4->check = csum_fold(csum_partial(trans_start,
5930                                                       csum_start - trans_start,
5931                                                       0));
5932                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5933
5934                 ip.v4->tot_len = 0;
5935                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5936                                    IGB_TX_FLAGS_CSUM |
5937                                    IGB_TX_FLAGS_IPV4;
5938         } else {
5939                 ip.v6->payload_len = 0;
5940                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5941                                    IGB_TX_FLAGS_CSUM;
5942         }
5943
5944         /* determine offset of inner transport header */
5945         l4_offset = l4.hdr - skb->data;
5946
5947         /* remove payload length from inner checksum */
5948         paylen = skb->len - l4_offset;
5949         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
5950                 /* compute length of segmentation header */
5951                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5952                 csum_replace_by_diff(&l4.tcp->check,
5953                         (__force __wsum)htonl(paylen));
5954         } else {
5955                 /* compute length of segmentation header */
5956                 *hdr_len = sizeof(*l4.udp) + l4_offset;
5957                 csum_replace_by_diff(&l4.udp->check,
5958                                      (__force __wsum)htonl(paylen));
5959         }
5960
5961         /* update gso size and bytecount with header size */
5962         first->gso_segs = skb_shinfo(skb)->gso_segs;
5963         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5964
5965         /* MSS L4LEN IDX */
5966         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5967         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5968
5969         /* VLAN MACLEN IPLEN */
5970         vlan_macip_lens = l4.hdr - ip.hdr;
5971         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5972         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5973
5974         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5975                         type_tucmd, mss_l4len_idx);
5976
5977         return 1;
5978 }
5979
5980 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5981 {
5982         struct sk_buff *skb = first->skb;
5983         u32 vlan_macip_lens = 0;
5984         u32 type_tucmd = 0;
5985
5986         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5987 csum_failed:
5988                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5989                     !tx_ring->launchtime_enable)
5990                         return;
5991                 goto no_csum;
5992         }
5993
5994         switch (skb->csum_offset) {
5995         case offsetof(struct tcphdr, check):
5996                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5997                 fallthrough;
5998         case offsetof(struct udphdr, check):
5999                 break;
6000         case offsetof(struct sctphdr, checksum):
6001                 /* validate that this is actually an SCTP request */
6002                 if (skb_csum_is_sctp(skb)) {
6003                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6004                         break;
6005                 }
6006                 fallthrough;
6007         default:
6008                 skb_checksum_help(skb);
6009                 goto csum_failed;
6010         }
6011
6012         /* update TX checksum flag */
6013         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6014         vlan_macip_lens = skb_checksum_start_offset(skb) -
6015                           skb_network_offset(skb);
6016 no_csum:
6017         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6018         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6019
6020         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6021 }
6022
6023 #define IGB_SET_FLAG(_input, _flag, _result) \
6024         ((_flag <= _result) ? \
6025          ((u32)(_input & _flag) * (_result / _flag)) : \
6026          ((u32)(_input & _flag) / (_flag / _result)))
6027
6028 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6029 {
6030         /* set type for advanced descriptor with frame checksum insertion */
6031         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6032                        E1000_ADVTXD_DCMD_DEXT |
6033                        E1000_ADVTXD_DCMD_IFCS;
6034
6035         /* set HW vlan bit if vlan is present */
6036         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6037                                  (E1000_ADVTXD_DCMD_VLE));
6038
6039         /* set segmentation bits for TSO */
6040         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6041                                  (E1000_ADVTXD_DCMD_TSE));
6042
6043         /* set timestamp bit if present */
6044         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6045                                  (E1000_ADVTXD_MAC_TSTAMP));
6046
6047         /* insert frame checksum */
6048         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6049
6050         return cmd_type;
6051 }
6052
6053 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6054                                  union e1000_adv_tx_desc *tx_desc,
6055                                  u32 tx_flags, unsigned int paylen)
6056 {
6057         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6058
6059         /* 82575 requires a unique index per ring */
6060         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6061                 olinfo_status |= tx_ring->reg_idx << 4;
6062
6063         /* insert L4 checksum */
6064         olinfo_status |= IGB_SET_FLAG(tx_flags,
6065                                       IGB_TX_FLAGS_CSUM,
6066                                       (E1000_TXD_POPTS_TXSM << 8));
6067
6068         /* insert IPv4 checksum */
6069         olinfo_status |= IGB_SET_FLAG(tx_flags,
6070                                       IGB_TX_FLAGS_IPV4,
6071                                       (E1000_TXD_POPTS_IXSM << 8));
6072
6073         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6074 }
6075
6076 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6077 {
6078         struct net_device *netdev = tx_ring->netdev;
6079
6080         netif_stop_subqueue(netdev, tx_ring->queue_index);
6081
6082         /* Herbert's original patch had:
6083          *  smp_mb__after_netif_stop_queue();
6084          * but since that doesn't exist yet, just open code it.
6085          */
6086         smp_mb();
6087
6088         /* We need to check again in a case another CPU has just
6089          * made room available.
6090          */
6091         if (igb_desc_unused(tx_ring) < size)
6092                 return -EBUSY;
6093
6094         /* A reprieve! */
6095         netif_wake_subqueue(netdev, tx_ring->queue_index);
6096
6097         u64_stats_update_begin(&tx_ring->tx_syncp2);
6098         tx_ring->tx_stats.restart_queue2++;
6099         u64_stats_update_end(&tx_ring->tx_syncp2);
6100
6101         return 0;
6102 }
6103
6104 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6105 {
6106         if (igb_desc_unused(tx_ring) >= size)
6107                 return 0;
6108         return __igb_maybe_stop_tx(tx_ring, size);
6109 }
6110
6111 static int igb_tx_map(struct igb_ring *tx_ring,
6112                       struct igb_tx_buffer *first,
6113                       const u8 hdr_len)
6114 {
6115         struct sk_buff *skb = first->skb;
6116         struct igb_tx_buffer *tx_buffer;
6117         union e1000_adv_tx_desc *tx_desc;
6118         skb_frag_t *frag;
6119         dma_addr_t dma;
6120         unsigned int data_len, size;
6121         u32 tx_flags = first->tx_flags;
6122         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6123         u16 i = tx_ring->next_to_use;
6124
6125         tx_desc = IGB_TX_DESC(tx_ring, i);
6126
6127         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6128
6129         size = skb_headlen(skb);
6130         data_len = skb->data_len;
6131
6132         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6133
6134         tx_buffer = first;
6135
6136         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6137                 if (dma_mapping_error(tx_ring->dev, dma))
6138                         goto dma_error;
6139
6140                 /* record length, and DMA address */
6141                 dma_unmap_len_set(tx_buffer, len, size);
6142                 dma_unmap_addr_set(tx_buffer, dma, dma);
6143
6144                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6145
6146                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6147                         tx_desc->read.cmd_type_len =
6148                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6149
6150                         i++;
6151                         tx_desc++;
6152                         if (i == tx_ring->count) {
6153                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6154                                 i = 0;
6155                         }
6156                         tx_desc->read.olinfo_status = 0;
6157
6158                         dma += IGB_MAX_DATA_PER_TXD;
6159                         size -= IGB_MAX_DATA_PER_TXD;
6160
6161                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6162                 }
6163
6164                 if (likely(!data_len))
6165                         break;
6166
6167                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6168
6169                 i++;
6170                 tx_desc++;
6171                 if (i == tx_ring->count) {
6172                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6173                         i = 0;
6174                 }
6175                 tx_desc->read.olinfo_status = 0;
6176
6177                 size = skb_frag_size(frag);
6178                 data_len -= size;
6179
6180                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6181                                        size, DMA_TO_DEVICE);
6182
6183                 tx_buffer = &tx_ring->tx_buffer_info[i];
6184         }
6185
6186         /* write last descriptor with RS and EOP bits */
6187         cmd_type |= size | IGB_TXD_DCMD;
6188         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6189
6190         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6191
6192         /* set the timestamp */
6193         first->time_stamp = jiffies;
6194
6195         skb_tx_timestamp(skb);
6196
6197         /* Force memory writes to complete before letting h/w know there
6198          * are new descriptors to fetch.  (Only applicable for weak-ordered
6199          * memory model archs, such as IA-64).
6200          *
6201          * We also need this memory barrier to make certain all of the
6202          * status bits have been updated before next_to_watch is written.
6203          */
6204         dma_wmb();
6205
6206         /* set next_to_watch value indicating a packet is present */
6207         first->next_to_watch = tx_desc;
6208
6209         i++;
6210         if (i == tx_ring->count)
6211                 i = 0;
6212
6213         tx_ring->next_to_use = i;
6214
6215         /* Make sure there is space in the ring for the next send. */
6216         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6217
6218         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6219                 writel(i, tx_ring->tail);
6220         }
6221         return 0;
6222
6223 dma_error:
6224         dev_err(tx_ring->dev, "TX DMA map failed\n");
6225         tx_buffer = &tx_ring->tx_buffer_info[i];
6226
6227         /* clear dma mappings for failed tx_buffer_info map */
6228         while (tx_buffer != first) {
6229                 if (dma_unmap_len(tx_buffer, len))
6230                         dma_unmap_page(tx_ring->dev,
6231                                        dma_unmap_addr(tx_buffer, dma),
6232                                        dma_unmap_len(tx_buffer, len),
6233                                        DMA_TO_DEVICE);
6234                 dma_unmap_len_set(tx_buffer, len, 0);
6235
6236                 if (i-- == 0)
6237                         i += tx_ring->count;
6238                 tx_buffer = &tx_ring->tx_buffer_info[i];
6239         }
6240
6241         if (dma_unmap_len(tx_buffer, len))
6242                 dma_unmap_single(tx_ring->dev,
6243                                  dma_unmap_addr(tx_buffer, dma),
6244                                  dma_unmap_len(tx_buffer, len),
6245                                  DMA_TO_DEVICE);
6246         dma_unmap_len_set(tx_buffer, len, 0);
6247
6248         dev_kfree_skb_any(tx_buffer->skb);
6249         tx_buffer->skb = NULL;
6250
6251         tx_ring->next_to_use = i;
6252
6253         return -1;
6254 }
6255
6256 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6257                       struct igb_ring *tx_ring,
6258                       struct xdp_frame *xdpf)
6259 {
6260         union e1000_adv_tx_desc *tx_desc;
6261         u32 len, cmd_type, olinfo_status;
6262         struct igb_tx_buffer *tx_buffer;
6263         dma_addr_t dma;
6264         u16 i;
6265
6266         len = xdpf->len;
6267
6268         if (unlikely(!igb_desc_unused(tx_ring)))
6269                 return IGB_XDP_CONSUMED;
6270
6271         dma = dma_map_single(tx_ring->dev, xdpf->data, len, DMA_TO_DEVICE);
6272         if (dma_mapping_error(tx_ring->dev, dma))
6273                 return IGB_XDP_CONSUMED;
6274
6275         /* record the location of the first descriptor for this packet */
6276         tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6277         tx_buffer->bytecount = len;
6278         tx_buffer->gso_segs = 1;
6279         tx_buffer->protocol = 0;
6280
6281         i = tx_ring->next_to_use;
6282         tx_desc = IGB_TX_DESC(tx_ring, i);
6283
6284         dma_unmap_len_set(tx_buffer, len, len);
6285         dma_unmap_addr_set(tx_buffer, dma, dma);
6286         tx_buffer->type = IGB_TYPE_XDP;
6287         tx_buffer->xdpf = xdpf;
6288
6289         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6290
6291         /* put descriptor type bits */
6292         cmd_type = E1000_ADVTXD_DTYP_DATA |
6293                    E1000_ADVTXD_DCMD_DEXT |
6294                    E1000_ADVTXD_DCMD_IFCS;
6295         cmd_type |= len | IGB_TXD_DCMD;
6296         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6297
6298         olinfo_status = len << E1000_ADVTXD_PAYLEN_SHIFT;
6299         /* 82575 requires a unique index per ring */
6300         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6301                 olinfo_status |= tx_ring->reg_idx << 4;
6302
6303         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6304
6305         netdev_tx_sent_queue(txring_txq(tx_ring), tx_buffer->bytecount);
6306
6307         /* set the timestamp */
6308         tx_buffer->time_stamp = jiffies;
6309
6310         /* Avoid any potential race with xdp_xmit and cleanup */
6311         smp_wmb();
6312
6313         /* set next_to_watch value indicating a packet is present */
6314         i++;
6315         if (i == tx_ring->count)
6316                 i = 0;
6317
6318         tx_buffer->next_to_watch = tx_desc;
6319         tx_ring->next_to_use = i;
6320
6321         /* Make sure there is space in the ring for the next send. */
6322         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6323
6324         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6325                 writel(i, tx_ring->tail);
6326
6327         return IGB_XDP_TX;
6328 }
6329
6330 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6331                                 struct igb_ring *tx_ring)
6332 {
6333         struct igb_tx_buffer *first;
6334         int tso;
6335         u32 tx_flags = 0;
6336         unsigned short f;
6337         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6338         __be16 protocol = vlan_get_protocol(skb);
6339         u8 hdr_len = 0;
6340
6341         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6342          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6343          *       + 2 desc gap to keep tail from touching head,
6344          *       + 1 desc for context descriptor,
6345          * otherwise try next time
6346          */
6347         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6348                 count += TXD_USE_COUNT(skb_frag_size(
6349                                                 &skb_shinfo(skb)->frags[f]));
6350
6351         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6352                 /* this is a hard error */
6353                 return NETDEV_TX_BUSY;
6354         }
6355
6356         /* record the location of the first descriptor for this packet */
6357         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6358         first->type = IGB_TYPE_SKB;
6359         first->skb = skb;
6360         first->bytecount = skb->len;
6361         first->gso_segs = 1;
6362
6363         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6364                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6365
6366                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6367                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6368                                            &adapter->state)) {
6369                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6370                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6371
6372                         adapter->ptp_tx_skb = skb_get(skb);
6373                         adapter->ptp_tx_start = jiffies;
6374                         if (adapter->hw.mac.type == e1000_82576)
6375                                 schedule_work(&adapter->ptp_tx_work);
6376                 } else {
6377                         adapter->tx_hwtstamp_skipped++;
6378                 }
6379         }
6380
6381         if (skb_vlan_tag_present(skb)) {
6382                 tx_flags |= IGB_TX_FLAGS_VLAN;
6383                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6384         }
6385
6386         /* record initial flags and protocol */
6387         first->tx_flags = tx_flags;
6388         first->protocol = protocol;
6389
6390         tso = igb_tso(tx_ring, first, &hdr_len);
6391         if (tso < 0)
6392                 goto out_drop;
6393         else if (!tso)
6394                 igb_tx_csum(tx_ring, first);
6395
6396         if (igb_tx_map(tx_ring, first, hdr_len))
6397                 goto cleanup_tx_tstamp;
6398
6399         return NETDEV_TX_OK;
6400
6401 out_drop:
6402         dev_kfree_skb_any(first->skb);
6403         first->skb = NULL;
6404 cleanup_tx_tstamp:
6405         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6406                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6407
6408                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6409                 adapter->ptp_tx_skb = NULL;
6410                 if (adapter->hw.mac.type == e1000_82576)
6411                         cancel_work_sync(&adapter->ptp_tx_work);
6412                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6413         }
6414
6415         return NETDEV_TX_OK;
6416 }
6417
6418 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6419                                                     struct sk_buff *skb)
6420 {
6421         unsigned int r_idx = skb->queue_mapping;
6422
6423         if (r_idx >= adapter->num_tx_queues)
6424                 r_idx = r_idx % adapter->num_tx_queues;
6425
6426         return adapter->tx_ring[r_idx];
6427 }
6428
6429 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6430                                   struct net_device *netdev)
6431 {
6432         struct igb_adapter *adapter = netdev_priv(netdev);
6433
6434         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6435          * in order to meet this minimum size requirement.
6436          */
6437         if (skb_put_padto(skb, 17))
6438                 return NETDEV_TX_OK;
6439
6440         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6441 }
6442
6443 /**
6444  *  igb_tx_timeout - Respond to a Tx Hang
6445  *  @netdev: network interface device structure
6446  *  @txqueue: number of the Tx queue that hung (unused)
6447  **/
6448 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6449 {
6450         struct igb_adapter *adapter = netdev_priv(netdev);
6451         struct e1000_hw *hw = &adapter->hw;
6452
6453         /* Do the reset outside of interrupt context */
6454         adapter->tx_timeout_count++;
6455
6456         if (hw->mac.type >= e1000_82580)
6457                 hw->dev_spec._82575.global_device_reset = true;
6458
6459         schedule_work(&adapter->reset_task);
6460         wr32(E1000_EICS,
6461              (adapter->eims_enable_mask & ~adapter->eims_other));
6462 }
6463
6464 static void igb_reset_task(struct work_struct *work)
6465 {
6466         struct igb_adapter *adapter;
6467         adapter = container_of(work, struct igb_adapter, reset_task);
6468
6469         rtnl_lock();
6470         /* If we're already down or resetting, just bail */
6471         if (test_bit(__IGB_DOWN, &adapter->state) ||
6472             test_bit(__IGB_RESETTING, &adapter->state)) {
6473                 rtnl_unlock();
6474                 return;
6475         }
6476
6477         igb_dump(adapter);
6478         netdev_err(adapter->netdev, "Reset adapter\n");
6479         igb_reinit_locked(adapter);
6480         rtnl_unlock();
6481 }
6482
6483 /**
6484  *  igb_get_stats64 - Get System Network Statistics
6485  *  @netdev: network interface device structure
6486  *  @stats: rtnl_link_stats64 pointer
6487  **/
6488 static void igb_get_stats64(struct net_device *netdev,
6489                             struct rtnl_link_stats64 *stats)
6490 {
6491         struct igb_adapter *adapter = netdev_priv(netdev);
6492
6493         spin_lock(&adapter->stats64_lock);
6494         igb_update_stats(adapter);
6495         memcpy(stats, &adapter->stats64, sizeof(*stats));
6496         spin_unlock(&adapter->stats64_lock);
6497 }
6498
6499 /**
6500  *  igb_change_mtu - Change the Maximum Transfer Unit
6501  *  @netdev: network interface device structure
6502  *  @new_mtu: new value for maximum frame size
6503  *
6504  *  Returns 0 on success, negative on failure
6505  **/
6506 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6507 {
6508         struct igb_adapter *adapter = netdev_priv(netdev);
6509         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6510
6511         if (adapter->xdp_prog) {
6512                 int i;
6513
6514                 for (i = 0; i < adapter->num_rx_queues; i++) {
6515                         struct igb_ring *ring = adapter->rx_ring[i];
6516
6517                         if (max_frame > igb_rx_bufsz(ring)) {
6518                                 netdev_warn(adapter->netdev,
6519                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6520                                             max_frame);
6521                                 return -EINVAL;
6522                         }
6523                 }
6524         }
6525
6526         /* adjust max frame to be at least the size of a standard frame */
6527         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6528                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6529
6530         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6531                 usleep_range(1000, 2000);
6532
6533         /* igb_down has a dependency on max_frame_size */
6534         adapter->max_frame_size = max_frame;
6535
6536         if (netif_running(netdev))
6537                 igb_down(adapter);
6538
6539         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6540                    netdev->mtu, new_mtu);
6541         netdev->mtu = new_mtu;
6542
6543         if (netif_running(netdev))
6544                 igb_up(adapter);
6545         else
6546                 igb_reset(adapter);
6547
6548         clear_bit(__IGB_RESETTING, &adapter->state);
6549
6550         return 0;
6551 }
6552
6553 /**
6554  *  igb_update_stats - Update the board statistics counters
6555  *  @adapter: board private structure
6556  **/
6557 void igb_update_stats(struct igb_adapter *adapter)
6558 {
6559         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6560         struct e1000_hw *hw = &adapter->hw;
6561         struct pci_dev *pdev = adapter->pdev;
6562         u32 reg, mpc;
6563         int i;
6564         u64 bytes, packets;
6565         unsigned int start;
6566         u64 _bytes, _packets;
6567
6568         /* Prevent stats update while adapter is being reset, or if the pci
6569          * connection is down.
6570          */
6571         if (adapter->link_speed == 0)
6572                 return;
6573         if (pci_channel_offline(pdev))
6574                 return;
6575
6576         bytes = 0;
6577         packets = 0;
6578
6579         rcu_read_lock();
6580         for (i = 0; i < adapter->num_rx_queues; i++) {
6581                 struct igb_ring *ring = adapter->rx_ring[i];
6582                 u32 rqdpc = rd32(E1000_RQDPC(i));
6583                 if (hw->mac.type >= e1000_i210)
6584                         wr32(E1000_RQDPC(i), 0);
6585
6586                 if (rqdpc) {
6587                         ring->rx_stats.drops += rqdpc;
6588                         net_stats->rx_fifo_errors += rqdpc;
6589                 }
6590
6591                 do {
6592                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6593                         _bytes = ring->rx_stats.bytes;
6594                         _packets = ring->rx_stats.packets;
6595                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6596                 bytes += _bytes;
6597                 packets += _packets;
6598         }
6599
6600         net_stats->rx_bytes = bytes;
6601         net_stats->rx_packets = packets;
6602
6603         bytes = 0;
6604         packets = 0;
6605         for (i = 0; i < adapter->num_tx_queues; i++) {
6606                 struct igb_ring *ring = adapter->tx_ring[i];
6607                 do {
6608                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6609                         _bytes = ring->tx_stats.bytes;
6610                         _packets = ring->tx_stats.packets;
6611                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6612                 bytes += _bytes;
6613                 packets += _packets;
6614         }
6615         net_stats->tx_bytes = bytes;
6616         net_stats->tx_packets = packets;
6617         rcu_read_unlock();
6618
6619         /* read stats registers */
6620         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6621         adapter->stats.gprc += rd32(E1000_GPRC);
6622         adapter->stats.gorc += rd32(E1000_GORCL);
6623         rd32(E1000_GORCH); /* clear GORCL */
6624         adapter->stats.bprc += rd32(E1000_BPRC);
6625         adapter->stats.mprc += rd32(E1000_MPRC);
6626         adapter->stats.roc += rd32(E1000_ROC);
6627
6628         adapter->stats.prc64 += rd32(E1000_PRC64);
6629         adapter->stats.prc127 += rd32(E1000_PRC127);
6630         adapter->stats.prc255 += rd32(E1000_PRC255);
6631         adapter->stats.prc511 += rd32(E1000_PRC511);
6632         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6633         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6634         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6635         adapter->stats.sec += rd32(E1000_SEC);
6636
6637         mpc = rd32(E1000_MPC);
6638         adapter->stats.mpc += mpc;
6639         net_stats->rx_fifo_errors += mpc;
6640         adapter->stats.scc += rd32(E1000_SCC);
6641         adapter->stats.ecol += rd32(E1000_ECOL);
6642         adapter->stats.mcc += rd32(E1000_MCC);
6643         adapter->stats.latecol += rd32(E1000_LATECOL);
6644         adapter->stats.dc += rd32(E1000_DC);
6645         adapter->stats.rlec += rd32(E1000_RLEC);
6646         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6647         adapter->stats.xontxc += rd32(E1000_XONTXC);
6648         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6649         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6650         adapter->stats.fcruc += rd32(E1000_FCRUC);
6651         adapter->stats.gptc += rd32(E1000_GPTC);
6652         adapter->stats.gotc += rd32(E1000_GOTCL);
6653         rd32(E1000_GOTCH); /* clear GOTCL */
6654         adapter->stats.rnbc += rd32(E1000_RNBC);
6655         adapter->stats.ruc += rd32(E1000_RUC);
6656         adapter->stats.rfc += rd32(E1000_RFC);
6657         adapter->stats.rjc += rd32(E1000_RJC);
6658         adapter->stats.tor += rd32(E1000_TORH);
6659         adapter->stats.tot += rd32(E1000_TOTH);
6660         adapter->stats.tpr += rd32(E1000_TPR);
6661
6662         adapter->stats.ptc64 += rd32(E1000_PTC64);
6663         adapter->stats.ptc127 += rd32(E1000_PTC127);
6664         adapter->stats.ptc255 += rd32(E1000_PTC255);
6665         adapter->stats.ptc511 += rd32(E1000_PTC511);
6666         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6667         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6668
6669         adapter->stats.mptc += rd32(E1000_MPTC);
6670         adapter->stats.bptc += rd32(E1000_BPTC);
6671
6672         adapter->stats.tpt += rd32(E1000_TPT);
6673         adapter->stats.colc += rd32(E1000_COLC);
6674
6675         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6676         /* read internal phy specific stats */
6677         reg = rd32(E1000_CTRL_EXT);
6678         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6679                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6680
6681                 /* this stat has invalid values on i210/i211 */
6682                 if ((hw->mac.type != e1000_i210) &&
6683                     (hw->mac.type != e1000_i211))
6684                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6685         }
6686
6687         adapter->stats.tsctc += rd32(E1000_TSCTC);
6688         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6689
6690         adapter->stats.iac += rd32(E1000_IAC);
6691         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6692         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6693         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6694         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6695         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6696         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6697         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6698         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6699
6700         /* Fill out the OS statistics structure */
6701         net_stats->multicast = adapter->stats.mprc;
6702         net_stats->collisions = adapter->stats.colc;
6703
6704         /* Rx Errors */
6705
6706         /* RLEC on some newer hardware can be incorrect so build
6707          * our own version based on RUC and ROC
6708          */
6709         net_stats->rx_errors = adapter->stats.rxerrc +
6710                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6711                 adapter->stats.ruc + adapter->stats.roc +
6712                 adapter->stats.cexterr;
6713         net_stats->rx_length_errors = adapter->stats.ruc +
6714                                       adapter->stats.roc;
6715         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6716         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6717         net_stats->rx_missed_errors = adapter->stats.mpc;
6718
6719         /* Tx Errors */
6720         net_stats->tx_errors = adapter->stats.ecol +
6721                                adapter->stats.latecol;
6722         net_stats->tx_aborted_errors = adapter->stats.ecol;
6723         net_stats->tx_window_errors = adapter->stats.latecol;
6724         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6725
6726         /* Tx Dropped needs to be maintained elsewhere */
6727
6728         /* Management Stats */
6729         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6730         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6731         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6732
6733         /* OS2BMC Stats */
6734         reg = rd32(E1000_MANC);
6735         if (reg & E1000_MANC_EN_BMC2OS) {
6736                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6737                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6738                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6739                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6740         }
6741 }
6742
6743 static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
6744 {
6745         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_PEROUT, tsintr_tt);
6746         struct e1000_hw *hw = &adapter->hw;
6747         struct timespec64 ts;
6748         u32 tsauxc;
6749
6750         if (pin < 0 || pin >= IGB_N_PEROUT)
6751                 return;
6752
6753         spin_lock(&adapter->tmreg_lock);
6754
6755         if (hw->mac.type == e1000_82580 ||
6756             hw->mac.type == e1000_i354 ||
6757             hw->mac.type == e1000_i350) {
6758                 s64 ns = timespec64_to_ns(&adapter->perout[pin].period);
6759                 u32 systiml, systimh, level_mask, level, rem;
6760                 u64 systim, now;
6761
6762                 /* read systim registers in sequence */
6763                 rd32(E1000_SYSTIMR);
6764                 systiml = rd32(E1000_SYSTIML);
6765                 systimh = rd32(E1000_SYSTIMH);
6766                 systim = (((u64)(systimh & 0xFF)) << 32) | ((u64)systiml);
6767                 now = timecounter_cyc2time(&adapter->tc, systim);
6768
6769                 if (pin < 2) {
6770                         level_mask = (tsintr_tt == 1) ? 0x80000 : 0x40000;
6771                         level = (rd32(E1000_CTRL) & level_mask) ? 1 : 0;
6772                 } else {
6773                         level_mask = (tsintr_tt == 1) ? 0x80 : 0x40;
6774                         level = (rd32(E1000_CTRL_EXT) & level_mask) ? 1 : 0;
6775                 }
6776
6777                 div_u64_rem(now, ns, &rem);
6778                 systim = systim + (ns - rem);
6779
6780                 /* synchronize pin level with rising/falling edges */
6781                 div_u64_rem(now, ns << 1, &rem);
6782                 if (rem < ns) {
6783                         /* first half of period */
6784                         if (level == 0) {
6785                                 /* output is already low, skip this period */
6786                                 systim += ns;
6787                                 pr_notice("igb: periodic output on %s missed falling edge\n",
6788                                           adapter->sdp_config[pin].name);
6789                         }
6790                 } else {
6791                         /* second half of period */
6792                         if (level == 1) {
6793                                 /* output is already high, skip this period */
6794                                 systim += ns;
6795                                 pr_notice("igb: periodic output on %s missed rising edge\n",
6796                                           adapter->sdp_config[pin].name);
6797                         }
6798                 }
6799
6800                 /* for this chip family tv_sec is the upper part of the binary value,
6801                  * so not seconds
6802                  */
6803                 ts.tv_nsec = (u32)systim;
6804                 ts.tv_sec  = ((u32)(systim >> 32)) & 0xFF;
6805         } else {
6806                 ts = timespec64_add(adapter->perout[pin].start,
6807                                     adapter->perout[pin].period);
6808         }
6809
6810         /* u32 conversion of tv_sec is safe until y2106 */
6811         wr32((tsintr_tt == 1) ? E1000_TRGTTIML1 : E1000_TRGTTIML0, ts.tv_nsec);
6812         wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);
6813         tsauxc = rd32(E1000_TSAUXC);
6814         tsauxc |= TSAUXC_EN_TT0;
6815         wr32(E1000_TSAUXC, tsauxc);
6816         adapter->perout[pin].start = ts;
6817
6818         spin_unlock(&adapter->tmreg_lock);
6819 }
6820
6821 static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
6822 {
6823         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
6824         int auxstmpl = (tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0;
6825         int auxstmph = (tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0;
6826         struct e1000_hw *hw = &adapter->hw;
6827         struct ptp_clock_event event;
6828         struct timespec64 ts;
6829
6830         if (pin < 0 || pin >= IGB_N_EXTTS)
6831                 return;
6832
6833         if (hw->mac.type == e1000_82580 ||
6834             hw->mac.type == e1000_i354 ||
6835             hw->mac.type == e1000_i350) {
6836                 s64 ns = rd32(auxstmpl);
6837
6838                 ns += ((s64)(rd32(auxstmph) & 0xFF)) << 32;
6839                 ts = ns_to_timespec64(ns);
6840         } else {
6841                 ts.tv_nsec = rd32(auxstmpl);
6842                 ts.tv_sec  = rd32(auxstmph);
6843         }
6844
6845         event.type = PTP_CLOCK_EXTTS;
6846         event.index = tsintr_tt;
6847         event.timestamp = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
6848         ptp_clock_event(adapter->ptp_clock, &event);
6849 }
6850
6851 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6852 {
6853         struct e1000_hw *hw = &adapter->hw;
6854         u32 ack = 0, tsicr = rd32(E1000_TSICR);
6855         struct ptp_clock_event event;
6856
6857         if (tsicr & TSINTR_SYS_WRAP) {
6858                 event.type = PTP_CLOCK_PPS;
6859                 if (adapter->ptp_caps.pps)
6860                         ptp_clock_event(adapter->ptp_clock, &event);
6861                 ack |= TSINTR_SYS_WRAP;
6862         }
6863
6864         if (tsicr & E1000_TSICR_TXTS) {
6865                 /* retrieve hardware timestamp */
6866                 schedule_work(&adapter->ptp_tx_work);
6867                 ack |= E1000_TSICR_TXTS;
6868         }
6869
6870         if (tsicr & TSINTR_TT0) {
6871                 igb_perout(adapter, 0);
6872                 ack |= TSINTR_TT0;
6873         }
6874
6875         if (tsicr & TSINTR_TT1) {
6876                 igb_perout(adapter, 1);
6877                 ack |= TSINTR_TT1;
6878         }
6879
6880         if (tsicr & TSINTR_AUTT0) {
6881                 igb_extts(adapter, 0);
6882                 ack |= TSINTR_AUTT0;
6883         }
6884
6885         if (tsicr & TSINTR_AUTT1) {
6886                 igb_extts(adapter, 1);
6887                 ack |= TSINTR_AUTT1;
6888         }
6889
6890         /* acknowledge the interrupts */
6891         wr32(E1000_TSICR, ack);
6892 }
6893
6894 static irqreturn_t igb_msix_other(int irq, void *data)
6895 {
6896         struct igb_adapter *adapter = data;
6897         struct e1000_hw *hw = &adapter->hw;
6898         u32 icr = rd32(E1000_ICR);
6899         /* reading ICR causes bit 31 of EICR to be cleared */
6900
6901         if (icr & E1000_ICR_DRSTA)
6902                 schedule_work(&adapter->reset_task);
6903
6904         if (icr & E1000_ICR_DOUTSYNC) {
6905                 /* HW is reporting DMA is out of sync */
6906                 adapter->stats.doosync++;
6907                 /* The DMA Out of Sync is also indication of a spoof event
6908                  * in IOV mode. Check the Wrong VM Behavior register to
6909                  * see if it is really a spoof event.
6910                  */
6911                 igb_check_wvbr(adapter);
6912         }
6913
6914         /* Check for a mailbox event */
6915         if (icr & E1000_ICR_VMMB)
6916                 igb_msg_task(adapter);
6917
6918         if (icr & E1000_ICR_LSC) {
6919                 hw->mac.get_link_status = 1;
6920                 /* guard against interrupt when we're going down */
6921                 if (!test_bit(__IGB_DOWN, &adapter->state))
6922                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6923         }
6924
6925         if (icr & E1000_ICR_TS)
6926                 igb_tsync_interrupt(adapter);
6927
6928         wr32(E1000_EIMS, adapter->eims_other);
6929
6930         return IRQ_HANDLED;
6931 }
6932
6933 static void igb_write_itr(struct igb_q_vector *q_vector)
6934 {
6935         struct igb_adapter *adapter = q_vector->adapter;
6936         u32 itr_val = q_vector->itr_val & 0x7FFC;
6937
6938         if (!q_vector->set_itr)
6939                 return;
6940
6941         if (!itr_val)
6942                 itr_val = 0x4;
6943
6944         if (adapter->hw.mac.type == e1000_82575)
6945                 itr_val |= itr_val << 16;
6946         else
6947                 itr_val |= E1000_EITR_CNT_IGNR;
6948
6949         writel(itr_val, q_vector->itr_register);
6950         q_vector->set_itr = 0;
6951 }
6952
6953 static irqreturn_t igb_msix_ring(int irq, void *data)
6954 {
6955         struct igb_q_vector *q_vector = data;
6956
6957         /* Write the ITR value calculated from the previous interrupt. */
6958         igb_write_itr(q_vector);
6959
6960         napi_schedule(&q_vector->napi);
6961
6962         return IRQ_HANDLED;
6963 }
6964
6965 #ifdef CONFIG_IGB_DCA
6966 static void igb_update_tx_dca(struct igb_adapter *adapter,
6967                               struct igb_ring *tx_ring,
6968                               int cpu)
6969 {
6970         struct e1000_hw *hw = &adapter->hw;
6971         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6972
6973         if (hw->mac.type != e1000_82575)
6974                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6975
6976         /* We can enable relaxed ordering for reads, but not writes when
6977          * DCA is enabled.  This is due to a known issue in some chipsets
6978          * which will cause the DCA tag to be cleared.
6979          */
6980         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6981                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6982                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6983
6984         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6985 }
6986
6987 static void igb_update_rx_dca(struct igb_adapter *adapter,
6988                               struct igb_ring *rx_ring,
6989                               int cpu)
6990 {
6991         struct e1000_hw *hw = &adapter->hw;
6992         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6993
6994         if (hw->mac.type != e1000_82575)
6995                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6996
6997         /* We can enable relaxed ordering for reads, but not writes when
6998          * DCA is enabled.  This is due to a known issue in some chipsets
6999          * which will cause the DCA tag to be cleared.
7000          */
7001         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
7002                   E1000_DCA_RXCTRL_DESC_DCA_EN;
7003
7004         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
7005 }
7006
7007 static void igb_update_dca(struct igb_q_vector *q_vector)
7008 {
7009         struct igb_adapter *adapter = q_vector->adapter;
7010         int cpu = get_cpu();
7011
7012         if (q_vector->cpu == cpu)
7013                 goto out_no_update;
7014
7015         if (q_vector->tx.ring)
7016                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
7017
7018         if (q_vector->rx.ring)
7019                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
7020
7021         q_vector->cpu = cpu;
7022 out_no_update:
7023         put_cpu();
7024 }
7025
7026 static void igb_setup_dca(struct igb_adapter *adapter)
7027 {
7028         struct e1000_hw *hw = &adapter->hw;
7029         int i;
7030
7031         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
7032                 return;
7033
7034         /* Always use CB2 mode, difference is masked in the CB driver. */
7035         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
7036
7037         for (i = 0; i < adapter->num_q_vectors; i++) {
7038                 adapter->q_vector[i]->cpu = -1;
7039                 igb_update_dca(adapter->q_vector[i]);
7040         }
7041 }
7042
7043 static int __igb_notify_dca(struct device *dev, void *data)
7044 {
7045         struct net_device *netdev = dev_get_drvdata(dev);
7046         struct igb_adapter *adapter = netdev_priv(netdev);
7047         struct pci_dev *pdev = adapter->pdev;
7048         struct e1000_hw *hw = &adapter->hw;
7049         unsigned long event = *(unsigned long *)data;
7050
7051         switch (event) {
7052         case DCA_PROVIDER_ADD:
7053                 /* if already enabled, don't do it again */
7054                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
7055                         break;
7056                 if (dca_add_requester(dev) == 0) {
7057                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
7058                         dev_info(&pdev->dev, "DCA enabled\n");
7059                         igb_setup_dca(adapter);
7060                         break;
7061                 }
7062                 fallthrough; /* since DCA is disabled. */
7063         case DCA_PROVIDER_REMOVE:
7064                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
7065                         /* without this a class_device is left
7066                          * hanging around in the sysfs model
7067                          */
7068                         dca_remove_requester(dev);
7069                         dev_info(&pdev->dev, "DCA disabled\n");
7070                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
7071                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
7072                 }
7073                 break;
7074         }
7075
7076         return 0;
7077 }
7078
7079 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7080                           void *p)
7081 {
7082         int ret_val;
7083
7084         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7085                                          __igb_notify_dca);
7086
7087         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7088 }
7089 #endif /* CONFIG_IGB_DCA */
7090
7091 #ifdef CONFIG_PCI_IOV
7092 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7093 {
7094         unsigned char mac_addr[ETH_ALEN];
7095
7096         eth_zero_addr(mac_addr);
7097         igb_set_vf_mac(adapter, vf, mac_addr);
7098
7099         /* By default spoof check is enabled for all VFs */
7100         adapter->vf_data[vf].spoofchk_enabled = true;
7101
7102         /* By default VFs are not trusted */
7103         adapter->vf_data[vf].trusted = false;
7104
7105         return 0;
7106 }
7107
7108 #endif
7109 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7110 {
7111         struct e1000_hw *hw = &adapter->hw;
7112         u32 ping;
7113         int i;
7114
7115         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7116                 ping = E1000_PF_CONTROL_MSG;
7117                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7118                         ping |= E1000_VT_MSGTYPE_CTS;
7119                 igb_write_mbx(hw, &ping, 1, i);
7120         }
7121 }
7122
7123 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7124 {
7125         struct e1000_hw *hw = &adapter->hw;
7126         u32 vmolr = rd32(E1000_VMOLR(vf));
7127         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7128
7129         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7130                             IGB_VF_FLAG_MULTI_PROMISC);
7131         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7132
7133         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7134                 vmolr |= E1000_VMOLR_MPME;
7135                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7136                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7137         } else {
7138                 /* if we have hashes and we are clearing a multicast promisc
7139                  * flag we need to write the hashes to the MTA as this step
7140                  * was previously skipped
7141                  */
7142                 if (vf_data->num_vf_mc_hashes > 30) {
7143                         vmolr |= E1000_VMOLR_MPME;
7144                 } else if (vf_data->num_vf_mc_hashes) {
7145                         int j;
7146
7147                         vmolr |= E1000_VMOLR_ROMPE;
7148                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7149                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7150                 }
7151         }
7152
7153         wr32(E1000_VMOLR(vf), vmolr);
7154
7155         /* there are flags left unprocessed, likely not supported */
7156         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7157                 return -EINVAL;
7158
7159         return 0;
7160 }
7161
7162 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7163                                   u32 *msgbuf, u32 vf)
7164 {
7165         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7166         u16 *hash_list = (u16 *)&msgbuf[1];
7167         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7168         int i;
7169
7170         /* salt away the number of multicast addresses assigned
7171          * to this VF for later use to restore when the PF multi cast
7172          * list changes
7173          */
7174         vf_data->num_vf_mc_hashes = n;
7175
7176         /* only up to 30 hash values supported */
7177         if (n > 30)
7178                 n = 30;
7179
7180         /* store the hashes for later use */
7181         for (i = 0; i < n; i++)
7182                 vf_data->vf_mc_hashes[i] = hash_list[i];
7183
7184         /* Flush and reset the mta with the new values */
7185         igb_set_rx_mode(adapter->netdev);
7186
7187         return 0;
7188 }
7189
7190 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7191 {
7192         struct e1000_hw *hw = &adapter->hw;
7193         struct vf_data_storage *vf_data;
7194         int i, j;
7195
7196         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7197                 u32 vmolr = rd32(E1000_VMOLR(i));
7198
7199                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7200
7201                 vf_data = &adapter->vf_data[i];
7202
7203                 if ((vf_data->num_vf_mc_hashes > 30) ||
7204                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7205                         vmolr |= E1000_VMOLR_MPME;
7206                 } else if (vf_data->num_vf_mc_hashes) {
7207                         vmolr |= E1000_VMOLR_ROMPE;
7208                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7209                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7210                 }
7211                 wr32(E1000_VMOLR(i), vmolr);
7212         }
7213 }
7214
7215 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7216 {
7217         struct e1000_hw *hw = &adapter->hw;
7218         u32 pool_mask, vlvf_mask, i;
7219
7220         /* create mask for VF and other pools */
7221         pool_mask = E1000_VLVF_POOLSEL_MASK;
7222         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7223
7224         /* drop PF from pool bits */
7225         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7226                              adapter->vfs_allocated_count);
7227
7228         /* Find the vlan filter for this id */
7229         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7230                 u32 vlvf = rd32(E1000_VLVF(i));
7231                 u32 vfta_mask, vid, vfta;
7232
7233                 /* remove the vf from the pool */
7234                 if (!(vlvf & vlvf_mask))
7235                         continue;
7236
7237                 /* clear out bit from VLVF */
7238                 vlvf ^= vlvf_mask;
7239
7240                 /* if other pools are present, just remove ourselves */
7241                 if (vlvf & pool_mask)
7242                         goto update_vlvfb;
7243
7244                 /* if PF is present, leave VFTA */
7245                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7246                         goto update_vlvf;
7247
7248                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7249                 vfta_mask = BIT(vid % 32);
7250
7251                 /* clear bit from VFTA */
7252                 vfta = adapter->shadow_vfta[vid / 32];
7253                 if (vfta & vfta_mask)
7254                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7255 update_vlvf:
7256                 /* clear pool selection enable */
7257                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7258                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7259                 else
7260                         vlvf = 0;
7261 update_vlvfb:
7262                 /* clear pool bits */
7263                 wr32(E1000_VLVF(i), vlvf);
7264         }
7265 }
7266
7267 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7268 {
7269         u32 vlvf;
7270         int idx;
7271
7272         /* short cut the special case */
7273         if (vlan == 0)
7274                 return 0;
7275
7276         /* Search for the VLAN id in the VLVF entries */
7277         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7278                 vlvf = rd32(E1000_VLVF(idx));
7279                 if ((vlvf & VLAN_VID_MASK) == vlan)
7280                         break;
7281         }
7282
7283         return idx;
7284 }
7285
7286 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7287 {
7288         struct e1000_hw *hw = &adapter->hw;
7289         u32 bits, pf_id;
7290         int idx;
7291
7292         idx = igb_find_vlvf_entry(hw, vid);
7293         if (!idx)
7294                 return;
7295
7296         /* See if any other pools are set for this VLAN filter
7297          * entry other than the PF.
7298          */
7299         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7300         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7301         bits &= rd32(E1000_VLVF(idx));
7302
7303         /* Disable the filter so this falls into the default pool. */
7304         if (!bits) {
7305                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7306                         wr32(E1000_VLVF(idx), BIT(pf_id));
7307                 else
7308                         wr32(E1000_VLVF(idx), 0);
7309         }
7310 }
7311
7312 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7313                            bool add, u32 vf)
7314 {
7315         int pf_id = adapter->vfs_allocated_count;
7316         struct e1000_hw *hw = &adapter->hw;
7317         int err;
7318
7319         /* If VLAN overlaps with one the PF is currently monitoring make
7320          * sure that we are able to allocate a VLVF entry.  This may be
7321          * redundant but it guarantees PF will maintain visibility to
7322          * the VLAN.
7323          */
7324         if (add && test_bit(vid, adapter->active_vlans)) {
7325                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7326                 if (err)
7327                         return err;
7328         }
7329
7330         err = igb_vfta_set(hw, vid, vf, add, false);
7331
7332         if (add && !err)
7333                 return err;
7334
7335         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7336          * we may need to drop the PF pool bit in order to allow us to free
7337          * up the VLVF resources.
7338          */
7339         if (test_bit(vid, adapter->active_vlans) ||
7340             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7341                 igb_update_pf_vlvf(adapter, vid);
7342
7343         return err;
7344 }
7345
7346 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7347 {
7348         struct e1000_hw *hw = &adapter->hw;
7349
7350         if (vid)
7351                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7352         else
7353                 wr32(E1000_VMVIR(vf), 0);
7354 }
7355
7356 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7357                                 u16 vlan, u8 qos)
7358 {
7359         int err;
7360
7361         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7362         if (err)
7363                 return err;
7364
7365         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7366         igb_set_vmolr(adapter, vf, !vlan);
7367
7368         /* revoke access to previous VLAN */
7369         if (vlan != adapter->vf_data[vf].pf_vlan)
7370                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7371                                 false, vf);
7372
7373         adapter->vf_data[vf].pf_vlan = vlan;
7374         adapter->vf_data[vf].pf_qos = qos;
7375         igb_set_vf_vlan_strip(adapter, vf, true);
7376         dev_info(&adapter->pdev->dev,
7377                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7378         if (test_bit(__IGB_DOWN, &adapter->state)) {
7379                 dev_warn(&adapter->pdev->dev,
7380                          "The VF VLAN has been set, but the PF device is not up.\n");
7381                 dev_warn(&adapter->pdev->dev,
7382                          "Bring the PF device up before attempting to use the VF device.\n");
7383         }
7384
7385         return err;
7386 }
7387
7388 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7389 {
7390         /* Restore tagless access via VLAN 0 */
7391         igb_set_vf_vlan(adapter, 0, true, vf);
7392
7393         igb_set_vmvir(adapter, 0, vf);
7394         igb_set_vmolr(adapter, vf, true);
7395
7396         /* Remove any PF assigned VLAN */
7397         if (adapter->vf_data[vf].pf_vlan)
7398                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7399                                 false, vf);
7400
7401         adapter->vf_data[vf].pf_vlan = 0;
7402         adapter->vf_data[vf].pf_qos = 0;
7403         igb_set_vf_vlan_strip(adapter, vf, false);
7404
7405         return 0;
7406 }
7407
7408 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7409                                u16 vlan, u8 qos, __be16 vlan_proto)
7410 {
7411         struct igb_adapter *adapter = netdev_priv(netdev);
7412
7413         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7414                 return -EINVAL;
7415
7416         if (vlan_proto != htons(ETH_P_8021Q))
7417                 return -EPROTONOSUPPORT;
7418
7419         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7420                                igb_disable_port_vlan(adapter, vf);
7421 }
7422
7423 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7424 {
7425         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7426         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7427         int ret;
7428
7429         if (adapter->vf_data[vf].pf_vlan)
7430                 return -1;
7431
7432         /* VLAN 0 is a special case, don't allow it to be removed */
7433         if (!vid && !add)
7434                 return 0;
7435
7436         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7437         if (!ret)
7438                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7439         return ret;
7440 }
7441
7442 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7443 {
7444         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7445
7446         /* clear flags - except flag that indicates PF has set the MAC */
7447         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7448         vf_data->last_nack = jiffies;
7449
7450         /* reset vlans for device */
7451         igb_clear_vf_vfta(adapter, vf);
7452         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7453         igb_set_vmvir(adapter, vf_data->pf_vlan |
7454                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7455         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7456         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7457
7458         /* reset multicast table array for vf */
7459         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7460
7461         /* Flush and reset the mta with the new values */
7462         igb_set_rx_mode(adapter->netdev);
7463 }
7464
7465 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7466 {
7467         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7468
7469         /* clear mac address as we were hotplug removed/added */
7470         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7471                 eth_zero_addr(vf_mac);
7472
7473         /* process remaining reset events */
7474         igb_vf_reset(adapter, vf);
7475 }
7476
7477 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7478 {
7479         struct e1000_hw *hw = &adapter->hw;
7480         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7481         u32 reg, msgbuf[3];
7482         u8 *addr = (u8 *)(&msgbuf[1]);
7483
7484         /* process all the same items cleared in a function level reset */
7485         igb_vf_reset(adapter, vf);
7486
7487         /* set vf mac address */
7488         igb_set_vf_mac(adapter, vf, vf_mac);
7489
7490         /* enable transmit and receive for vf */
7491         reg = rd32(E1000_VFTE);
7492         wr32(E1000_VFTE, reg | BIT(vf));
7493         reg = rd32(E1000_VFRE);
7494         wr32(E1000_VFRE, reg | BIT(vf));
7495
7496         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7497
7498         /* reply to reset with ack and vf mac address */
7499         if (!is_zero_ether_addr(vf_mac)) {
7500                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7501                 memcpy(addr, vf_mac, ETH_ALEN);
7502         } else {
7503                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7504         }
7505         igb_write_mbx(hw, msgbuf, 3, vf);
7506 }
7507
7508 static void igb_flush_mac_table(struct igb_adapter *adapter)
7509 {
7510         struct e1000_hw *hw = &adapter->hw;
7511         int i;
7512
7513         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7514                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7515                 eth_zero_addr(adapter->mac_table[i].addr);
7516                 adapter->mac_table[i].queue = 0;
7517                 igb_rar_set_index(adapter, i);
7518         }
7519 }
7520
7521 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7522 {
7523         struct e1000_hw *hw = &adapter->hw;
7524         /* do not count rar entries reserved for VFs MAC addresses */
7525         int rar_entries = hw->mac.rar_entry_count -
7526                           adapter->vfs_allocated_count;
7527         int i, count = 0;
7528
7529         for (i = 0; i < rar_entries; i++) {
7530                 /* do not count default entries */
7531                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7532                         continue;
7533
7534                 /* do not count "in use" entries for different queues */
7535                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7536                     (adapter->mac_table[i].queue != queue))
7537                         continue;
7538
7539                 count++;
7540         }
7541
7542         return count;
7543 }
7544
7545 /* Set default MAC address for the PF in the first RAR entry */
7546 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7547 {
7548         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7549
7550         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7551         mac_table->queue = adapter->vfs_allocated_count;
7552         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7553
7554         igb_rar_set_index(adapter, 0);
7555 }
7556
7557 /* If the filter to be added and an already existing filter express
7558  * the same address and address type, it should be possible to only
7559  * override the other configurations, for example the queue to steer
7560  * traffic.
7561  */
7562 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7563                                       const u8 *addr, const u8 flags)
7564 {
7565         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7566                 return true;
7567
7568         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7569             (flags & IGB_MAC_STATE_SRC_ADDR))
7570                 return false;
7571
7572         if (!ether_addr_equal(addr, entry->addr))
7573                 return false;
7574
7575         return true;
7576 }
7577
7578 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7579  * 'flags' is used to indicate what kind of match is made, match is by
7580  * default for the destination address, if matching by source address
7581  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7582  */
7583 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7584                                     const u8 *addr, const u8 queue,
7585                                     const u8 flags)
7586 {
7587         struct e1000_hw *hw = &adapter->hw;
7588         int rar_entries = hw->mac.rar_entry_count -
7589                           adapter->vfs_allocated_count;
7590         int i;
7591
7592         if (is_zero_ether_addr(addr))
7593                 return -EINVAL;
7594
7595         /* Search for the first empty entry in the MAC table.
7596          * Do not touch entries at the end of the table reserved for the VF MAC
7597          * addresses.
7598          */
7599         for (i = 0; i < rar_entries; i++) {
7600                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7601                                                addr, flags))
7602                         continue;
7603
7604                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7605                 adapter->mac_table[i].queue = queue;
7606                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7607
7608                 igb_rar_set_index(adapter, i);
7609                 return i;
7610         }
7611
7612         return -ENOSPC;
7613 }
7614
7615 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7616                               const u8 queue)
7617 {
7618         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7619 }
7620
7621 /* Remove a MAC filter for 'addr' directing matching traffic to
7622  * 'queue', 'flags' is used to indicate what kind of match need to be
7623  * removed, match is by default for the destination address, if
7624  * matching by source address is to be removed the flag
7625  * IGB_MAC_STATE_SRC_ADDR can be used.
7626  */
7627 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7628                                     const u8 *addr, const u8 queue,
7629                                     const u8 flags)
7630 {
7631         struct e1000_hw *hw = &adapter->hw;
7632         int rar_entries = hw->mac.rar_entry_count -
7633                           adapter->vfs_allocated_count;
7634         int i;
7635
7636         if (is_zero_ether_addr(addr))
7637                 return -EINVAL;
7638
7639         /* Search for matching entry in the MAC table based on given address
7640          * and queue. Do not touch entries at the end of the table reserved
7641          * for the VF MAC addresses.
7642          */
7643         for (i = 0; i < rar_entries; i++) {
7644                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7645                         continue;
7646                 if ((adapter->mac_table[i].state & flags) != flags)
7647                         continue;
7648                 if (adapter->mac_table[i].queue != queue)
7649                         continue;
7650                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7651                         continue;
7652
7653                 /* When a filter for the default address is "deleted",
7654                  * we return it to its initial configuration
7655                  */
7656                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7657                         adapter->mac_table[i].state =
7658                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7659                         adapter->mac_table[i].queue =
7660                                 adapter->vfs_allocated_count;
7661                 } else {
7662                         adapter->mac_table[i].state = 0;
7663                         adapter->mac_table[i].queue = 0;
7664                         eth_zero_addr(adapter->mac_table[i].addr);
7665                 }
7666
7667                 igb_rar_set_index(adapter, i);
7668                 return 0;
7669         }
7670
7671         return -ENOENT;
7672 }
7673
7674 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7675                               const u8 queue)
7676 {
7677         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7678 }
7679
7680 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7681                                 const u8 *addr, u8 queue, u8 flags)
7682 {
7683         struct e1000_hw *hw = &adapter->hw;
7684
7685         /* In theory, this should be supported on 82575 as well, but
7686          * that part wasn't easily accessible during development.
7687          */
7688         if (hw->mac.type != e1000_i210)
7689                 return -EOPNOTSUPP;
7690
7691         return igb_add_mac_filter_flags(adapter, addr, queue,
7692                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7693 }
7694
7695 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7696                                 const u8 *addr, u8 queue, u8 flags)
7697 {
7698         return igb_del_mac_filter_flags(adapter, addr, queue,
7699                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7700 }
7701
7702 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7703 {
7704         struct igb_adapter *adapter = netdev_priv(netdev);
7705         int ret;
7706
7707         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7708
7709         return min_t(int, ret, 0);
7710 }
7711
7712 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7713 {
7714         struct igb_adapter *adapter = netdev_priv(netdev);
7715
7716         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7717
7718         return 0;
7719 }
7720
7721 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7722                                  const u32 info, const u8 *addr)
7723 {
7724         struct pci_dev *pdev = adapter->pdev;
7725         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7726         struct list_head *pos;
7727         struct vf_mac_filter *entry = NULL;
7728         int ret = 0;
7729
7730         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7731             !vf_data->trusted) {
7732                 dev_warn(&pdev->dev,
7733                          "VF %d requested MAC filter but is administratively denied\n",
7734                           vf);
7735                 return -EINVAL;
7736         }
7737         if (!is_valid_ether_addr(addr)) {
7738                 dev_warn(&pdev->dev,
7739                          "VF %d attempted to set invalid MAC filter\n",
7740                           vf);
7741                 return -EINVAL;
7742         }
7743
7744         switch (info) {
7745         case E1000_VF_MAC_FILTER_CLR:
7746                 /* remove all unicast MAC filters related to the current VF */
7747                 list_for_each(pos, &adapter->vf_macs.l) {
7748                         entry = list_entry(pos, struct vf_mac_filter, l);
7749                         if (entry->vf == vf) {
7750                                 entry->vf = -1;
7751                                 entry->free = true;
7752                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7753                         }
7754                 }
7755                 break;
7756         case E1000_VF_MAC_FILTER_ADD:
7757                 /* try to find empty slot in the list */
7758                 list_for_each(pos, &adapter->vf_macs.l) {
7759                         entry = list_entry(pos, struct vf_mac_filter, l);
7760                         if (entry->free)
7761                                 break;
7762                 }
7763
7764                 if (entry && entry->free) {
7765                         entry->free = false;
7766                         entry->vf = vf;
7767                         ether_addr_copy(entry->vf_mac, addr);
7768
7769                         ret = igb_add_mac_filter(adapter, addr, vf);
7770                         ret = min_t(int, ret, 0);
7771                 } else {
7772                         ret = -ENOSPC;
7773                 }
7774
7775                 if (ret == -ENOSPC)
7776                         dev_warn(&pdev->dev,
7777                                  "VF %d has requested MAC filter but there is no space for it\n",
7778                                  vf);
7779                 break;
7780         default:
7781                 ret = -EINVAL;
7782                 break;
7783         }
7784
7785         return ret;
7786 }
7787
7788 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7789 {
7790         struct pci_dev *pdev = adapter->pdev;
7791         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7792         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7793
7794         /* The VF MAC Address is stored in a packed array of bytes
7795          * starting at the second 32 bit word of the msg array
7796          */
7797         unsigned char *addr = (unsigned char *)&msg[1];
7798         int ret = 0;
7799
7800         if (!info) {
7801                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7802                     !vf_data->trusted) {
7803                         dev_warn(&pdev->dev,
7804                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7805                                  vf);
7806                         return -EINVAL;
7807                 }
7808
7809                 if (!is_valid_ether_addr(addr)) {
7810                         dev_warn(&pdev->dev,
7811                                  "VF %d attempted to set invalid MAC\n",
7812                                  vf);
7813                         return -EINVAL;
7814                 }
7815
7816                 ret = igb_set_vf_mac(adapter, vf, addr);
7817         } else {
7818                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7819         }
7820
7821         return ret;
7822 }
7823
7824 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7825 {
7826         struct e1000_hw *hw = &adapter->hw;
7827         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7828         u32 msg = E1000_VT_MSGTYPE_NACK;
7829
7830         /* if device isn't clear to send it shouldn't be reading either */
7831         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7832             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7833                 igb_write_mbx(hw, &msg, 1, vf);
7834                 vf_data->last_nack = jiffies;
7835         }
7836 }
7837
7838 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7839 {
7840         struct pci_dev *pdev = adapter->pdev;
7841         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7842         struct e1000_hw *hw = &adapter->hw;
7843         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7844         s32 retval;
7845
7846         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7847
7848         if (retval) {
7849                 /* if receive failed revoke VF CTS stats and restart init */
7850                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7851                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7852                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7853                         goto unlock;
7854                 goto out;
7855         }
7856
7857         /* this is a message we already processed, do nothing */
7858         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7859                 goto unlock;
7860
7861         /* until the vf completes a reset it should not be
7862          * allowed to start any configuration.
7863          */
7864         if (msgbuf[0] == E1000_VF_RESET) {
7865                 /* unlocks mailbox */
7866                 igb_vf_reset_msg(adapter, vf);
7867                 return;
7868         }
7869
7870         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7871                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7872                         goto unlock;
7873                 retval = -1;
7874                 goto out;
7875         }
7876
7877         switch ((msgbuf[0] & 0xFFFF)) {
7878         case E1000_VF_SET_MAC_ADDR:
7879                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7880                 break;
7881         case E1000_VF_SET_PROMISC:
7882                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7883                 break;
7884         case E1000_VF_SET_MULTICAST:
7885                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7886                 break;
7887         case E1000_VF_SET_LPE:
7888                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7889                 break;
7890         case E1000_VF_SET_VLAN:
7891                 retval = -1;
7892                 if (vf_data->pf_vlan)
7893                         dev_warn(&pdev->dev,
7894                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7895                                  vf);
7896                 else
7897                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7898                 break;
7899         default:
7900                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7901                 retval = -1;
7902                 break;
7903         }
7904
7905         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7906 out:
7907         /* notify the VF of the results of what it sent us */
7908         if (retval)
7909                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7910         else
7911                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7912
7913         /* unlocks mailbox */
7914         igb_write_mbx(hw, msgbuf, 1, vf);
7915         return;
7916
7917 unlock:
7918         igb_unlock_mbx(hw, vf);
7919 }
7920
7921 static void igb_msg_task(struct igb_adapter *adapter)
7922 {
7923         struct e1000_hw *hw = &adapter->hw;
7924         u32 vf;
7925
7926         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7927                 /* process any reset requests */
7928                 if (!igb_check_for_rst(hw, vf))
7929                         igb_vf_reset_event(adapter, vf);
7930
7931                 /* process any messages pending */
7932                 if (!igb_check_for_msg(hw, vf))
7933                         igb_rcv_msg_from_vf(adapter, vf);
7934
7935                 /* process any acks */
7936                 if (!igb_check_for_ack(hw, vf))
7937                         igb_rcv_ack_from_vf(adapter, vf);
7938         }
7939 }
7940
7941 /**
7942  *  igb_set_uta - Set unicast filter table address
7943  *  @adapter: board private structure
7944  *  @set: boolean indicating if we are setting or clearing bits
7945  *
7946  *  The unicast table address is a register array of 32-bit registers.
7947  *  The table is meant to be used in a way similar to how the MTA is used
7948  *  however due to certain limitations in the hardware it is necessary to
7949  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7950  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7951  **/
7952 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7953 {
7954         struct e1000_hw *hw = &adapter->hw;
7955         u32 uta = set ? ~0 : 0;
7956         int i;
7957
7958         /* we only need to do this if VMDq is enabled */
7959         if (!adapter->vfs_allocated_count)
7960                 return;
7961
7962         for (i = hw->mac.uta_reg_count; i--;)
7963                 array_wr32(E1000_UTA, i, uta);
7964 }
7965
7966 /**
7967  *  igb_intr_msi - Interrupt Handler
7968  *  @irq: interrupt number
7969  *  @data: pointer to a network interface device structure
7970  **/
7971 static irqreturn_t igb_intr_msi(int irq, void *data)
7972 {
7973         struct igb_adapter *adapter = data;
7974         struct igb_q_vector *q_vector = adapter->q_vector[0];
7975         struct e1000_hw *hw = &adapter->hw;
7976         /* read ICR disables interrupts using IAM */
7977         u32 icr = rd32(E1000_ICR);
7978
7979         igb_write_itr(q_vector);
7980
7981         if (icr & E1000_ICR_DRSTA)
7982                 schedule_work(&adapter->reset_task);
7983
7984         if (icr & E1000_ICR_DOUTSYNC) {
7985                 /* HW is reporting DMA is out of sync */
7986                 adapter->stats.doosync++;
7987         }
7988
7989         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7990                 hw->mac.get_link_status = 1;
7991                 if (!test_bit(__IGB_DOWN, &adapter->state))
7992                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7993         }
7994
7995         if (icr & E1000_ICR_TS)
7996                 igb_tsync_interrupt(adapter);
7997
7998         napi_schedule(&q_vector->napi);
7999
8000         return IRQ_HANDLED;
8001 }
8002
8003 /**
8004  *  igb_intr - Legacy Interrupt Handler
8005  *  @irq: interrupt number
8006  *  @data: pointer to a network interface device structure
8007  **/
8008 static irqreturn_t igb_intr(int irq, void *data)
8009 {
8010         struct igb_adapter *adapter = data;
8011         struct igb_q_vector *q_vector = adapter->q_vector[0];
8012         struct e1000_hw *hw = &adapter->hw;
8013         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
8014          * need for the IMC write
8015          */
8016         u32 icr = rd32(E1000_ICR);
8017
8018         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
8019          * not set, then the adapter didn't send an interrupt
8020          */
8021         if (!(icr & E1000_ICR_INT_ASSERTED))
8022                 return IRQ_NONE;
8023
8024         igb_write_itr(q_vector);
8025
8026         if (icr & E1000_ICR_DRSTA)
8027                 schedule_work(&adapter->reset_task);
8028
8029         if (icr & E1000_ICR_DOUTSYNC) {
8030                 /* HW is reporting DMA is out of sync */
8031                 adapter->stats.doosync++;
8032         }
8033
8034         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8035                 hw->mac.get_link_status = 1;
8036                 /* guard against interrupt when we're going down */
8037                 if (!test_bit(__IGB_DOWN, &adapter->state))
8038                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8039         }
8040
8041         if (icr & E1000_ICR_TS)
8042                 igb_tsync_interrupt(adapter);
8043
8044         napi_schedule(&q_vector->napi);
8045
8046         return IRQ_HANDLED;
8047 }
8048
8049 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
8050 {
8051         struct igb_adapter *adapter = q_vector->adapter;
8052         struct e1000_hw *hw = &adapter->hw;
8053
8054         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
8055             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
8056                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
8057                         igb_set_itr(q_vector);
8058                 else
8059                         igb_update_ring_itr(q_vector);
8060         }
8061
8062         if (!test_bit(__IGB_DOWN, &adapter->state)) {
8063                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8064                         wr32(E1000_EIMS, q_vector->eims_value);
8065                 else
8066                         igb_irq_enable(adapter);
8067         }
8068 }
8069
8070 /**
8071  *  igb_poll - NAPI Rx polling callback
8072  *  @napi: napi polling structure
8073  *  @budget: count of how many packets we should handle
8074  **/
8075 static int igb_poll(struct napi_struct *napi, int budget)
8076 {
8077         struct igb_q_vector *q_vector = container_of(napi,
8078                                                      struct igb_q_vector,
8079                                                      napi);
8080         bool clean_complete = true;
8081         int work_done = 0;
8082
8083 #ifdef CONFIG_IGB_DCA
8084         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8085                 igb_update_dca(q_vector);
8086 #endif
8087         if (q_vector->tx.ring)
8088                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8089
8090         if (q_vector->rx.ring) {
8091                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8092
8093                 work_done += cleaned;
8094                 if (cleaned >= budget)
8095                         clean_complete = false;
8096         }
8097
8098         /* If all work not completed, return budget and keep polling */
8099         if (!clean_complete)
8100                 return budget;
8101
8102         /* Exit the polling mode, but don't re-enable interrupts if stack might
8103          * poll us due to busy-polling
8104          */
8105         if (likely(napi_complete_done(napi, work_done)))
8106                 igb_ring_irq_enable(q_vector);
8107
8108         return work_done;
8109 }
8110
8111 /**
8112  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8113  *  @q_vector: pointer to q_vector containing needed info
8114  *  @napi_budget: Used to determine if we are in netpoll
8115  *
8116  *  returns true if ring is completely cleaned
8117  **/
8118 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8119 {
8120         struct igb_adapter *adapter = q_vector->adapter;
8121         struct igb_ring *tx_ring = q_vector->tx.ring;
8122         struct igb_tx_buffer *tx_buffer;
8123         union e1000_adv_tx_desc *tx_desc;
8124         unsigned int total_bytes = 0, total_packets = 0;
8125         unsigned int budget = q_vector->tx.work_limit;
8126         unsigned int i = tx_ring->next_to_clean;
8127
8128         if (test_bit(__IGB_DOWN, &adapter->state))
8129                 return true;
8130
8131         tx_buffer = &tx_ring->tx_buffer_info[i];
8132         tx_desc = IGB_TX_DESC(tx_ring, i);
8133         i -= tx_ring->count;
8134
8135         do {
8136                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8137
8138                 /* if next_to_watch is not set then there is no work pending */
8139                 if (!eop_desc)
8140                         break;
8141
8142                 /* prevent any other reads prior to eop_desc */
8143                 smp_rmb();
8144
8145                 /* if DD is not set pending work has not been completed */
8146                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8147                         break;
8148
8149                 /* clear next_to_watch to prevent false hangs */
8150                 tx_buffer->next_to_watch = NULL;
8151
8152                 /* update the statistics for this packet */
8153                 total_bytes += tx_buffer->bytecount;
8154                 total_packets += tx_buffer->gso_segs;
8155
8156                 /* free the skb */
8157                 if (tx_buffer->type == IGB_TYPE_SKB)
8158                         napi_consume_skb(tx_buffer->skb, napi_budget);
8159                 else
8160                         xdp_return_frame(tx_buffer->xdpf);
8161
8162                 /* unmap skb header data */
8163                 dma_unmap_single(tx_ring->dev,
8164                                  dma_unmap_addr(tx_buffer, dma),
8165                                  dma_unmap_len(tx_buffer, len),
8166                                  DMA_TO_DEVICE);
8167
8168                 /* clear tx_buffer data */
8169                 dma_unmap_len_set(tx_buffer, len, 0);
8170
8171                 /* clear last DMA location and unmap remaining buffers */
8172                 while (tx_desc != eop_desc) {
8173                         tx_buffer++;
8174                         tx_desc++;
8175                         i++;
8176                         if (unlikely(!i)) {
8177                                 i -= tx_ring->count;
8178                                 tx_buffer = tx_ring->tx_buffer_info;
8179                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8180                         }
8181
8182                         /* unmap any remaining paged data */
8183                         if (dma_unmap_len(tx_buffer, len)) {
8184                                 dma_unmap_page(tx_ring->dev,
8185                                                dma_unmap_addr(tx_buffer, dma),
8186                                                dma_unmap_len(tx_buffer, len),
8187                                                DMA_TO_DEVICE);
8188                                 dma_unmap_len_set(tx_buffer, len, 0);
8189                         }
8190                 }
8191
8192                 /* move us one more past the eop_desc for start of next pkt */
8193                 tx_buffer++;
8194                 tx_desc++;
8195                 i++;
8196                 if (unlikely(!i)) {
8197                         i -= tx_ring->count;
8198                         tx_buffer = tx_ring->tx_buffer_info;
8199                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8200                 }
8201
8202                 /* issue prefetch for next Tx descriptor */
8203                 prefetch(tx_desc);
8204
8205                 /* update budget accounting */
8206                 budget--;
8207         } while (likely(budget));
8208
8209         netdev_tx_completed_queue(txring_txq(tx_ring),
8210                                   total_packets, total_bytes);
8211         i += tx_ring->count;
8212         tx_ring->next_to_clean = i;
8213         u64_stats_update_begin(&tx_ring->tx_syncp);
8214         tx_ring->tx_stats.bytes += total_bytes;
8215         tx_ring->tx_stats.packets += total_packets;
8216         u64_stats_update_end(&tx_ring->tx_syncp);
8217         q_vector->tx.total_bytes += total_bytes;
8218         q_vector->tx.total_packets += total_packets;
8219
8220         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8221                 struct e1000_hw *hw = &adapter->hw;
8222
8223                 /* Detect a transmit hang in hardware, this serializes the
8224                  * check with the clearing of time_stamp and movement of i
8225                  */
8226                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8227                 if (tx_buffer->next_to_watch &&
8228                     time_after(jiffies, tx_buffer->time_stamp +
8229                                (adapter->tx_timeout_factor * HZ)) &&
8230                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8231
8232                         /* detected Tx unit hang */
8233                         dev_err(tx_ring->dev,
8234                                 "Detected Tx Unit Hang\n"
8235                                 "  Tx Queue             <%d>\n"
8236                                 "  TDH                  <%x>\n"
8237                                 "  TDT                  <%x>\n"
8238                                 "  next_to_use          <%x>\n"
8239                                 "  next_to_clean        <%x>\n"
8240                                 "buffer_info[next_to_clean]\n"
8241                                 "  time_stamp           <%lx>\n"
8242                                 "  next_to_watch        <%p>\n"
8243                                 "  jiffies              <%lx>\n"
8244                                 "  desc.status          <%x>\n",
8245                                 tx_ring->queue_index,
8246                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8247                                 readl(tx_ring->tail),
8248                                 tx_ring->next_to_use,
8249                                 tx_ring->next_to_clean,
8250                                 tx_buffer->time_stamp,
8251                                 tx_buffer->next_to_watch,
8252                                 jiffies,
8253                                 tx_buffer->next_to_watch->wb.status);
8254                         netif_stop_subqueue(tx_ring->netdev,
8255                                             tx_ring->queue_index);
8256
8257                         /* we are about to reset, no point in enabling stuff */
8258                         return true;
8259                 }
8260         }
8261
8262 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8263         if (unlikely(total_packets &&
8264             netif_carrier_ok(tx_ring->netdev) &&
8265             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8266                 /* Make sure that anybody stopping the queue after this
8267                  * sees the new next_to_clean.
8268                  */
8269                 smp_mb();
8270                 if (__netif_subqueue_stopped(tx_ring->netdev,
8271                                              tx_ring->queue_index) &&
8272                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8273                         netif_wake_subqueue(tx_ring->netdev,
8274                                             tx_ring->queue_index);
8275
8276                         u64_stats_update_begin(&tx_ring->tx_syncp);
8277                         tx_ring->tx_stats.restart_queue++;
8278                         u64_stats_update_end(&tx_ring->tx_syncp);
8279                 }
8280         }
8281
8282         return !!budget;
8283 }
8284
8285 /**
8286  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8287  *  @rx_ring: rx descriptor ring to store buffers on
8288  *  @old_buff: donor buffer to have page reused
8289  *
8290  *  Synchronizes page for reuse by the adapter
8291  **/
8292 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8293                               struct igb_rx_buffer *old_buff)
8294 {
8295         struct igb_rx_buffer *new_buff;
8296         u16 nta = rx_ring->next_to_alloc;
8297
8298         new_buff = &rx_ring->rx_buffer_info[nta];
8299
8300         /* update, and store next to alloc */
8301         nta++;
8302         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8303
8304         /* Transfer page from old buffer to new buffer.
8305          * Move each member individually to avoid possible store
8306          * forwarding stalls.
8307          */
8308         new_buff->dma           = old_buff->dma;
8309         new_buff->page          = old_buff->page;
8310         new_buff->page_offset   = old_buff->page_offset;
8311         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8312 }
8313
8314 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8315                                   int rx_buf_pgcnt)
8316 {
8317         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8318         struct page *page = rx_buffer->page;
8319
8320         /* avoid re-using remote and pfmemalloc pages */
8321         if (!dev_page_is_reusable(page))
8322                 return false;
8323
8324 #if (PAGE_SIZE < 8192)
8325         /* if we are only owner of page we can reuse it */
8326         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8327                 return false;
8328 #else
8329 #define IGB_LAST_OFFSET \
8330         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8331
8332         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8333                 return false;
8334 #endif
8335
8336         /* If we have drained the page fragment pool we need to update
8337          * the pagecnt_bias and page count so that we fully restock the
8338          * number of references the driver holds.
8339          */
8340         if (unlikely(pagecnt_bias == 1)) {
8341                 page_ref_add(page, USHRT_MAX - 1);
8342                 rx_buffer->pagecnt_bias = USHRT_MAX;
8343         }
8344
8345         return true;
8346 }
8347
8348 /**
8349  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8350  *  @rx_ring: rx descriptor ring to transact packets on
8351  *  @rx_buffer: buffer containing page to add
8352  *  @skb: sk_buff to place the data into
8353  *  @size: size of buffer to be added
8354  *
8355  *  This function will add the data contained in rx_buffer->page to the skb.
8356  **/
8357 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8358                             struct igb_rx_buffer *rx_buffer,
8359                             struct sk_buff *skb,
8360                             unsigned int size)
8361 {
8362 #if (PAGE_SIZE < 8192)
8363         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8364 #else
8365         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8366                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8367                                 SKB_DATA_ALIGN(size);
8368 #endif
8369         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8370                         rx_buffer->page_offset, size, truesize);
8371 #if (PAGE_SIZE < 8192)
8372         rx_buffer->page_offset ^= truesize;
8373 #else
8374         rx_buffer->page_offset += truesize;
8375 #endif
8376 }
8377
8378 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8379                                          struct igb_rx_buffer *rx_buffer,
8380                                          struct xdp_buff *xdp,
8381                                          ktime_t timestamp)
8382 {
8383 #if (PAGE_SIZE < 8192)
8384         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8385 #else
8386         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8387                                                xdp->data_hard_start);
8388 #endif
8389         unsigned int size = xdp->data_end - xdp->data;
8390         unsigned int headlen;
8391         struct sk_buff *skb;
8392
8393         /* prefetch first cache line of first page */
8394         net_prefetch(xdp->data);
8395
8396         /* allocate a skb to store the frags */
8397         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8398         if (unlikely(!skb))
8399                 return NULL;
8400
8401         if (timestamp)
8402                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8403
8404         /* Determine available headroom for copy */
8405         headlen = size;
8406         if (headlen > IGB_RX_HDR_LEN)
8407                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8408
8409         /* align pull length to size of long to optimize memcpy performance */
8410         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8411
8412         /* update all of the pointers */
8413         size -= headlen;
8414         if (size) {
8415                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8416                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8417                                 size, truesize);
8418 #if (PAGE_SIZE < 8192)
8419                 rx_buffer->page_offset ^= truesize;
8420 #else
8421                 rx_buffer->page_offset += truesize;
8422 #endif
8423         } else {
8424                 rx_buffer->pagecnt_bias++;
8425         }
8426
8427         return skb;
8428 }
8429
8430 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8431                                      struct igb_rx_buffer *rx_buffer,
8432                                      struct xdp_buff *xdp,
8433                                      ktime_t timestamp)
8434 {
8435 #if (PAGE_SIZE < 8192)
8436         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8437 #else
8438         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8439                                 SKB_DATA_ALIGN(xdp->data_end -
8440                                                xdp->data_hard_start);
8441 #endif
8442         unsigned int metasize = xdp->data - xdp->data_meta;
8443         struct sk_buff *skb;
8444
8445         /* prefetch first cache line of first page */
8446         net_prefetch(xdp->data_meta);
8447
8448         /* build an skb around the page buffer */
8449         skb = napi_build_skb(xdp->data_hard_start, truesize);
8450         if (unlikely(!skb))
8451                 return NULL;
8452
8453         /* update pointers within the skb to store the data */
8454         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8455         __skb_put(skb, xdp->data_end - xdp->data);
8456
8457         if (metasize)
8458                 skb_metadata_set(skb, metasize);
8459
8460         if (timestamp)
8461                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8462
8463         /* update buffer offset */
8464 #if (PAGE_SIZE < 8192)
8465         rx_buffer->page_offset ^= truesize;
8466 #else
8467         rx_buffer->page_offset += truesize;
8468 #endif
8469
8470         return skb;
8471 }
8472
8473 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8474                                    struct igb_ring *rx_ring,
8475                                    struct xdp_buff *xdp)
8476 {
8477         int err, result = IGB_XDP_PASS;
8478         struct bpf_prog *xdp_prog;
8479         u32 act;
8480
8481         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8482
8483         if (!xdp_prog)
8484                 goto xdp_out;
8485
8486         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8487
8488         act = bpf_prog_run_xdp(xdp_prog, xdp);
8489         switch (act) {
8490         case XDP_PASS:
8491                 break;
8492         case XDP_TX:
8493                 result = igb_xdp_xmit_back(adapter, xdp);
8494                 if (result == IGB_XDP_CONSUMED)
8495                         goto out_failure;
8496                 break;
8497         case XDP_REDIRECT:
8498                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8499                 if (err)
8500                         goto out_failure;
8501                 result = IGB_XDP_REDIR;
8502                 break;
8503         default:
8504                 bpf_warn_invalid_xdp_action(adapter->netdev, xdp_prog, act);
8505                 fallthrough;
8506         case XDP_ABORTED:
8507 out_failure:
8508                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8509                 fallthrough;
8510         case XDP_DROP:
8511                 result = IGB_XDP_CONSUMED;
8512                 break;
8513         }
8514 xdp_out:
8515         return ERR_PTR(-result);
8516 }
8517
8518 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8519                                           unsigned int size)
8520 {
8521         unsigned int truesize;
8522
8523 #if (PAGE_SIZE < 8192)
8524         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8525 #else
8526         truesize = ring_uses_build_skb(rx_ring) ?
8527                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8528                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8529                 SKB_DATA_ALIGN(size);
8530 #endif
8531         return truesize;
8532 }
8533
8534 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8535                                struct igb_rx_buffer *rx_buffer,
8536                                unsigned int size)
8537 {
8538         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8539 #if (PAGE_SIZE < 8192)
8540         rx_buffer->page_offset ^= truesize;
8541 #else
8542         rx_buffer->page_offset += truesize;
8543 #endif
8544 }
8545
8546 static inline void igb_rx_checksum(struct igb_ring *ring,
8547                                    union e1000_adv_rx_desc *rx_desc,
8548                                    struct sk_buff *skb)
8549 {
8550         skb_checksum_none_assert(skb);
8551
8552         /* Ignore Checksum bit is set */
8553         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8554                 return;
8555
8556         /* Rx checksum disabled via ethtool */
8557         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8558                 return;
8559
8560         /* TCP/UDP checksum error bit is set */
8561         if (igb_test_staterr(rx_desc,
8562                              E1000_RXDEXT_STATERR_TCPE |
8563                              E1000_RXDEXT_STATERR_IPE)) {
8564                 /* work around errata with sctp packets where the TCPE aka
8565                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8566                  * packets, (aka let the stack check the crc32c)
8567                  */
8568                 if (!((skb->len == 60) &&
8569                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8570                         u64_stats_update_begin(&ring->rx_syncp);
8571                         ring->rx_stats.csum_err++;
8572                         u64_stats_update_end(&ring->rx_syncp);
8573                 }
8574                 /* let the stack verify checksum errors */
8575                 return;
8576         }
8577         /* It must be a TCP or UDP packet with a valid checksum */
8578         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8579                                       E1000_RXD_STAT_UDPCS))
8580                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8581
8582         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8583                 le32_to_cpu(rx_desc->wb.upper.status_error));
8584 }
8585
8586 static inline void igb_rx_hash(struct igb_ring *ring,
8587                                union e1000_adv_rx_desc *rx_desc,
8588                                struct sk_buff *skb)
8589 {
8590         if (ring->netdev->features & NETIF_F_RXHASH)
8591                 skb_set_hash(skb,
8592                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8593                              PKT_HASH_TYPE_L3);
8594 }
8595
8596 /**
8597  *  igb_is_non_eop - process handling of non-EOP buffers
8598  *  @rx_ring: Rx ring being processed
8599  *  @rx_desc: Rx descriptor for current buffer
8600  *
8601  *  This function updates next to clean.  If the buffer is an EOP buffer
8602  *  this function exits returning false, otherwise it will place the
8603  *  sk_buff in the next buffer to be chained and return true indicating
8604  *  that this is in fact a non-EOP buffer.
8605  **/
8606 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8607                            union e1000_adv_rx_desc *rx_desc)
8608 {
8609         u32 ntc = rx_ring->next_to_clean + 1;
8610
8611         /* fetch, update, and store next to clean */
8612         ntc = (ntc < rx_ring->count) ? ntc : 0;
8613         rx_ring->next_to_clean = ntc;
8614
8615         prefetch(IGB_RX_DESC(rx_ring, ntc));
8616
8617         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8618                 return false;
8619
8620         return true;
8621 }
8622
8623 /**
8624  *  igb_cleanup_headers - Correct corrupted or empty headers
8625  *  @rx_ring: rx descriptor ring packet is being transacted on
8626  *  @rx_desc: pointer to the EOP Rx descriptor
8627  *  @skb: pointer to current skb being fixed
8628  *
8629  *  Address the case where we are pulling data in on pages only
8630  *  and as such no data is present in the skb header.
8631  *
8632  *  In addition if skb is not at least 60 bytes we need to pad it so that
8633  *  it is large enough to qualify as a valid Ethernet frame.
8634  *
8635  *  Returns true if an error was encountered and skb was freed.
8636  **/
8637 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8638                                 union e1000_adv_rx_desc *rx_desc,
8639                                 struct sk_buff *skb)
8640 {
8641         /* XDP packets use error pointer so abort at this point */
8642         if (IS_ERR(skb))
8643                 return true;
8644
8645         if (unlikely((igb_test_staterr(rx_desc,
8646                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8647                 struct net_device *netdev = rx_ring->netdev;
8648                 if (!(netdev->features & NETIF_F_RXALL)) {
8649                         dev_kfree_skb_any(skb);
8650                         return true;
8651                 }
8652         }
8653
8654         /* if eth_skb_pad returns an error the skb was freed */
8655         if (eth_skb_pad(skb))
8656                 return true;
8657
8658         return false;
8659 }
8660
8661 /**
8662  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8663  *  @rx_ring: rx descriptor ring packet is being transacted on
8664  *  @rx_desc: pointer to the EOP Rx descriptor
8665  *  @skb: pointer to current skb being populated
8666  *
8667  *  This function checks the ring, descriptor, and packet information in
8668  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8669  *  other fields within the skb.
8670  **/
8671 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8672                                    union e1000_adv_rx_desc *rx_desc,
8673                                    struct sk_buff *skb)
8674 {
8675         struct net_device *dev = rx_ring->netdev;
8676
8677         igb_rx_hash(rx_ring, rx_desc, skb);
8678
8679         igb_rx_checksum(rx_ring, rx_desc, skb);
8680
8681         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8682             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8683                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8684
8685         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8686             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8687                 u16 vid;
8688
8689                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8690                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8691                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8692                 else
8693                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8694
8695                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8696         }
8697
8698         skb_record_rx_queue(skb, rx_ring->queue_index);
8699
8700         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8701 }
8702
8703 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8704 {
8705         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8706 }
8707
8708 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8709                                                const unsigned int size, int *rx_buf_pgcnt)
8710 {
8711         struct igb_rx_buffer *rx_buffer;
8712
8713         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8714         *rx_buf_pgcnt =
8715 #if (PAGE_SIZE < 8192)
8716                 page_count(rx_buffer->page);
8717 #else
8718                 0;
8719 #endif
8720         prefetchw(rx_buffer->page);
8721
8722         /* we are reusing so sync this buffer for CPU use */
8723         dma_sync_single_range_for_cpu(rx_ring->dev,
8724                                       rx_buffer->dma,
8725                                       rx_buffer->page_offset,
8726                                       size,
8727                                       DMA_FROM_DEVICE);
8728
8729         rx_buffer->pagecnt_bias--;
8730
8731         return rx_buffer;
8732 }
8733
8734 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8735                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8736 {
8737         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8738                 /* hand second half of page back to the ring */
8739                 igb_reuse_rx_page(rx_ring, rx_buffer);
8740         } else {
8741                 /* We are not reusing the buffer so unmap it and free
8742                  * any references we are holding to it
8743                  */
8744                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8745                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8746                                      IGB_RX_DMA_ATTR);
8747                 __page_frag_cache_drain(rx_buffer->page,
8748                                         rx_buffer->pagecnt_bias);
8749         }
8750
8751         /* clear contents of rx_buffer */
8752         rx_buffer->page = NULL;
8753 }
8754
8755 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8756 {
8757         struct igb_adapter *adapter = q_vector->adapter;
8758         struct igb_ring *rx_ring = q_vector->rx.ring;
8759         struct sk_buff *skb = rx_ring->skb;
8760         unsigned int total_bytes = 0, total_packets = 0;
8761         u16 cleaned_count = igb_desc_unused(rx_ring);
8762         unsigned int xdp_xmit = 0;
8763         struct xdp_buff xdp;
8764         u32 frame_sz = 0;
8765         int rx_buf_pgcnt;
8766
8767         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8768 #if (PAGE_SIZE < 8192)
8769         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8770 #endif
8771         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8772
8773         while (likely(total_packets < budget)) {
8774                 union e1000_adv_rx_desc *rx_desc;
8775                 struct igb_rx_buffer *rx_buffer;
8776                 ktime_t timestamp = 0;
8777                 int pkt_offset = 0;
8778                 unsigned int size;
8779                 void *pktbuf;
8780
8781                 /* return some buffers to hardware, one at a time is too slow */
8782                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8783                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8784                         cleaned_count = 0;
8785                 }
8786
8787                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8788                 size = le16_to_cpu(rx_desc->wb.upper.length);
8789                 if (!size)
8790                         break;
8791
8792                 /* This memory barrier is needed to keep us from reading
8793                  * any other fields out of the rx_desc until we know the
8794                  * descriptor has been written back
8795                  */
8796                 dma_rmb();
8797
8798                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8799                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8800
8801                 /* pull rx packet timestamp if available and valid */
8802                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8803                         int ts_hdr_len;
8804
8805                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8806                                                          pktbuf, &timestamp);
8807
8808                         pkt_offset += ts_hdr_len;
8809                         size -= ts_hdr_len;
8810                 }
8811
8812                 /* retrieve a buffer from the ring */
8813                 if (!skb) {
8814                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8815                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8816
8817                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8818 #if (PAGE_SIZE > 4096)
8819                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8820                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8821 #endif
8822                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8823                 }
8824
8825                 if (IS_ERR(skb)) {
8826                         unsigned int xdp_res = -PTR_ERR(skb);
8827
8828                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8829                                 xdp_xmit |= xdp_res;
8830                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8831                         } else {
8832                                 rx_buffer->pagecnt_bias++;
8833                         }
8834                         total_packets++;
8835                         total_bytes += size;
8836                 } else if (skb)
8837                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8838                 else if (ring_uses_build_skb(rx_ring))
8839                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8840                                             timestamp);
8841                 else
8842                         skb = igb_construct_skb(rx_ring, rx_buffer,
8843                                                 &xdp, timestamp);
8844
8845                 /* exit if we failed to retrieve a buffer */
8846                 if (!skb) {
8847                         rx_ring->rx_stats.alloc_failed++;
8848                         rx_buffer->pagecnt_bias++;
8849                         break;
8850                 }
8851
8852                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8853                 cleaned_count++;
8854
8855                 /* fetch next buffer in frame if non-eop */
8856                 if (igb_is_non_eop(rx_ring, rx_desc))
8857                         continue;
8858
8859                 /* verify the packet layout is correct */
8860                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8861                         skb = NULL;
8862                         continue;
8863                 }
8864
8865                 /* probably a little skewed due to removing CRC */
8866                 total_bytes += skb->len;
8867
8868                 /* populate checksum, timestamp, VLAN, and protocol */
8869                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8870
8871                 napi_gro_receive(&q_vector->napi, skb);
8872
8873                 /* reset skb pointer */
8874                 skb = NULL;
8875
8876                 /* update budget accounting */
8877                 total_packets++;
8878         }
8879
8880         /* place incomplete frames back on ring for completion */
8881         rx_ring->skb = skb;
8882
8883         if (xdp_xmit & IGB_XDP_REDIR)
8884                 xdp_do_flush();
8885
8886         if (xdp_xmit & IGB_XDP_TX) {
8887                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8888
8889                 igb_xdp_ring_update_tail(tx_ring);
8890         }
8891
8892         u64_stats_update_begin(&rx_ring->rx_syncp);
8893         rx_ring->rx_stats.packets += total_packets;
8894         rx_ring->rx_stats.bytes += total_bytes;
8895         u64_stats_update_end(&rx_ring->rx_syncp);
8896         q_vector->rx.total_packets += total_packets;
8897         q_vector->rx.total_bytes += total_bytes;
8898
8899         if (cleaned_count)
8900                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8901
8902         return total_packets;
8903 }
8904
8905 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8906                                   struct igb_rx_buffer *bi)
8907 {
8908         struct page *page = bi->page;
8909         dma_addr_t dma;
8910
8911         /* since we are recycling buffers we should seldom need to alloc */
8912         if (likely(page))
8913                 return true;
8914
8915         /* alloc new page for storage */
8916         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8917         if (unlikely(!page)) {
8918                 rx_ring->rx_stats.alloc_failed++;
8919                 return false;
8920         }
8921
8922         /* map page for use */
8923         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8924                                  igb_rx_pg_size(rx_ring),
8925                                  DMA_FROM_DEVICE,
8926                                  IGB_RX_DMA_ATTR);
8927
8928         /* if mapping failed free memory back to system since
8929          * there isn't much point in holding memory we can't use
8930          */
8931         if (dma_mapping_error(rx_ring->dev, dma)) {
8932                 __free_pages(page, igb_rx_pg_order(rx_ring));
8933
8934                 rx_ring->rx_stats.alloc_failed++;
8935                 return false;
8936         }
8937
8938         bi->dma = dma;
8939         bi->page = page;
8940         bi->page_offset = igb_rx_offset(rx_ring);
8941         page_ref_add(page, USHRT_MAX - 1);
8942         bi->pagecnt_bias = USHRT_MAX;
8943
8944         return true;
8945 }
8946
8947 /**
8948  *  igb_alloc_rx_buffers - Replace used receive buffers
8949  *  @rx_ring: rx descriptor ring to allocate new receive buffers
8950  *  @cleaned_count: count of buffers to allocate
8951  **/
8952 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8953 {
8954         union e1000_adv_rx_desc *rx_desc;
8955         struct igb_rx_buffer *bi;
8956         u16 i = rx_ring->next_to_use;
8957         u16 bufsz;
8958
8959         /* nothing to do */
8960         if (!cleaned_count)
8961                 return;
8962
8963         rx_desc = IGB_RX_DESC(rx_ring, i);
8964         bi = &rx_ring->rx_buffer_info[i];
8965         i -= rx_ring->count;
8966
8967         bufsz = igb_rx_bufsz(rx_ring);
8968
8969         do {
8970                 if (!igb_alloc_mapped_page(rx_ring, bi))
8971                         break;
8972
8973                 /* sync the buffer for use by the device */
8974                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8975                                                  bi->page_offset, bufsz,
8976                                                  DMA_FROM_DEVICE);
8977
8978                 /* Refresh the desc even if buffer_addrs didn't change
8979                  * because each write-back erases this info.
8980                  */
8981                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8982
8983                 rx_desc++;
8984                 bi++;
8985                 i++;
8986                 if (unlikely(!i)) {
8987                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8988                         bi = rx_ring->rx_buffer_info;
8989                         i -= rx_ring->count;
8990                 }
8991
8992                 /* clear the length for the next_to_use descriptor */
8993                 rx_desc->wb.upper.length = 0;
8994
8995                 cleaned_count--;
8996         } while (cleaned_count);
8997
8998         i += rx_ring->count;
8999
9000         if (rx_ring->next_to_use != i) {
9001                 /* record the next descriptor to use */
9002                 rx_ring->next_to_use = i;
9003
9004                 /* update next to alloc since we have filled the ring */
9005                 rx_ring->next_to_alloc = i;
9006
9007                 /* Force memory writes to complete before letting h/w
9008                  * know there are new descriptors to fetch.  (Only
9009                  * applicable for weak-ordered memory model archs,
9010                  * such as IA-64).
9011                  */
9012                 dma_wmb();
9013                 writel(i, rx_ring->tail);
9014         }
9015 }
9016
9017 /**
9018  * igb_mii_ioctl -
9019  * @netdev: pointer to netdev struct
9020  * @ifr: interface structure
9021  * @cmd: ioctl command to execute
9022  **/
9023 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9024 {
9025         struct igb_adapter *adapter = netdev_priv(netdev);
9026         struct mii_ioctl_data *data = if_mii(ifr);
9027
9028         if (adapter->hw.phy.media_type != e1000_media_type_copper)
9029                 return -EOPNOTSUPP;
9030
9031         switch (cmd) {
9032         case SIOCGMIIPHY:
9033                 data->phy_id = adapter->hw.phy.addr;
9034                 break;
9035         case SIOCGMIIREG:
9036                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
9037                                      &data->val_out))
9038                         return -EIO;
9039                 break;
9040         case SIOCSMIIREG:
9041         default:
9042                 return -EOPNOTSUPP;
9043         }
9044         return 0;
9045 }
9046
9047 /**
9048  * igb_ioctl -
9049  * @netdev: pointer to netdev struct
9050  * @ifr: interface structure
9051  * @cmd: ioctl command to execute
9052  **/
9053 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9054 {
9055         switch (cmd) {
9056         case SIOCGMIIPHY:
9057         case SIOCGMIIREG:
9058         case SIOCSMIIREG:
9059                 return igb_mii_ioctl(netdev, ifr, cmd);
9060         case SIOCGHWTSTAMP:
9061                 return igb_ptp_get_ts_config(netdev, ifr);
9062         case SIOCSHWTSTAMP:
9063                 return igb_ptp_set_ts_config(netdev, ifr);
9064         default:
9065                 return -EOPNOTSUPP;
9066         }
9067 }
9068
9069 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9070 {
9071         struct igb_adapter *adapter = hw->back;
9072
9073         pci_read_config_word(adapter->pdev, reg, value);
9074 }
9075
9076 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9077 {
9078         struct igb_adapter *adapter = hw->back;
9079
9080         pci_write_config_word(adapter->pdev, reg, *value);
9081 }
9082
9083 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9084 {
9085         struct igb_adapter *adapter = hw->back;
9086
9087         if (pcie_capability_read_word(adapter->pdev, reg, value))
9088                 return -E1000_ERR_CONFIG;
9089
9090         return 0;
9091 }
9092
9093 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9094 {
9095         struct igb_adapter *adapter = hw->back;
9096
9097         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9098                 return -E1000_ERR_CONFIG;
9099
9100         return 0;
9101 }
9102
9103 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9104 {
9105         struct igb_adapter *adapter = netdev_priv(netdev);
9106         struct e1000_hw *hw = &adapter->hw;
9107         u32 ctrl, rctl;
9108         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9109
9110         if (enable) {
9111                 /* enable VLAN tag insert/strip */
9112                 ctrl = rd32(E1000_CTRL);
9113                 ctrl |= E1000_CTRL_VME;
9114                 wr32(E1000_CTRL, ctrl);
9115
9116                 /* Disable CFI check */
9117                 rctl = rd32(E1000_RCTL);
9118                 rctl &= ~E1000_RCTL_CFIEN;
9119                 wr32(E1000_RCTL, rctl);
9120         } else {
9121                 /* disable VLAN tag insert/strip */
9122                 ctrl = rd32(E1000_CTRL);
9123                 ctrl &= ~E1000_CTRL_VME;
9124                 wr32(E1000_CTRL, ctrl);
9125         }
9126
9127         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9128 }
9129
9130 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9131                                __be16 proto, u16 vid)
9132 {
9133         struct igb_adapter *adapter = netdev_priv(netdev);
9134         struct e1000_hw *hw = &adapter->hw;
9135         int pf_id = adapter->vfs_allocated_count;
9136
9137         /* add the filter since PF can receive vlans w/o entry in vlvf */
9138         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9139                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9140
9141         set_bit(vid, adapter->active_vlans);
9142
9143         return 0;
9144 }
9145
9146 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9147                                 __be16 proto, u16 vid)
9148 {
9149         struct igb_adapter *adapter = netdev_priv(netdev);
9150         int pf_id = adapter->vfs_allocated_count;
9151         struct e1000_hw *hw = &adapter->hw;
9152
9153         /* remove VID from filter table */
9154         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9155                 igb_vfta_set(hw, vid, pf_id, false, true);
9156
9157         clear_bit(vid, adapter->active_vlans);
9158
9159         return 0;
9160 }
9161
9162 static void igb_restore_vlan(struct igb_adapter *adapter)
9163 {
9164         u16 vid = 1;
9165
9166         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9167         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9168
9169         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9170                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9171 }
9172
9173 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9174 {
9175         struct pci_dev *pdev = adapter->pdev;
9176         struct e1000_mac_info *mac = &adapter->hw.mac;
9177
9178         mac->autoneg = 0;
9179
9180         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9181          * for the switch() below to work
9182          */
9183         if ((spd & 1) || (dplx & ~1))
9184                 goto err_inval;
9185
9186         /* Fiber NIC's only allow 1000 gbps Full duplex
9187          * and 100Mbps Full duplex for 100baseFx sfp
9188          */
9189         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9190                 switch (spd + dplx) {
9191                 case SPEED_10 + DUPLEX_HALF:
9192                 case SPEED_10 + DUPLEX_FULL:
9193                 case SPEED_100 + DUPLEX_HALF:
9194                         goto err_inval;
9195                 default:
9196                         break;
9197                 }
9198         }
9199
9200         switch (spd + dplx) {
9201         case SPEED_10 + DUPLEX_HALF:
9202                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9203                 break;
9204         case SPEED_10 + DUPLEX_FULL:
9205                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9206                 break;
9207         case SPEED_100 + DUPLEX_HALF:
9208                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9209                 break;
9210         case SPEED_100 + DUPLEX_FULL:
9211                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9212                 break;
9213         case SPEED_1000 + DUPLEX_FULL:
9214                 mac->autoneg = 1;
9215                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9216                 break;
9217         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9218         default:
9219                 goto err_inval;
9220         }
9221
9222         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9223         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9224
9225         return 0;
9226
9227 err_inval:
9228         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9229         return -EINVAL;
9230 }
9231
9232 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9233                           bool runtime)
9234 {
9235         struct net_device *netdev = pci_get_drvdata(pdev);
9236         struct igb_adapter *adapter = netdev_priv(netdev);
9237         struct e1000_hw *hw = &adapter->hw;
9238         u32 ctrl, rctl, status;
9239         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9240         bool wake;
9241
9242         rtnl_lock();
9243         netif_device_detach(netdev);
9244
9245         if (netif_running(netdev))
9246                 __igb_close(netdev, true);
9247
9248         igb_ptp_suspend(adapter);
9249
9250         igb_clear_interrupt_scheme(adapter);
9251         rtnl_unlock();
9252
9253         status = rd32(E1000_STATUS);
9254         if (status & E1000_STATUS_LU)
9255                 wufc &= ~E1000_WUFC_LNKC;
9256
9257         if (wufc) {
9258                 igb_setup_rctl(adapter);
9259                 igb_set_rx_mode(netdev);
9260
9261                 /* turn on all-multi mode if wake on multicast is enabled */
9262                 if (wufc & E1000_WUFC_MC) {
9263                         rctl = rd32(E1000_RCTL);
9264                         rctl |= E1000_RCTL_MPE;
9265                         wr32(E1000_RCTL, rctl);
9266                 }
9267
9268                 ctrl = rd32(E1000_CTRL);
9269                 ctrl |= E1000_CTRL_ADVD3WUC;
9270                 wr32(E1000_CTRL, ctrl);
9271
9272                 /* Allow time for pending master requests to run */
9273                 igb_disable_pcie_master(hw);
9274
9275                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9276                 wr32(E1000_WUFC, wufc);
9277         } else {
9278                 wr32(E1000_WUC, 0);
9279                 wr32(E1000_WUFC, 0);
9280         }
9281
9282         wake = wufc || adapter->en_mng_pt;
9283         if (!wake)
9284                 igb_power_down_link(adapter);
9285         else
9286                 igb_power_up_link(adapter);
9287
9288         if (enable_wake)
9289                 *enable_wake = wake;
9290
9291         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9292          * would have already happened in close and is redundant.
9293          */
9294         igb_release_hw_control(adapter);
9295
9296         pci_disable_device(pdev);
9297
9298         return 0;
9299 }
9300
9301 static void igb_deliver_wake_packet(struct net_device *netdev)
9302 {
9303         struct igb_adapter *adapter = netdev_priv(netdev);
9304         struct e1000_hw *hw = &adapter->hw;
9305         struct sk_buff *skb;
9306         u32 wupl;
9307
9308         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9309
9310         /* WUPM stores only the first 128 bytes of the wake packet.
9311          * Read the packet only if we have the whole thing.
9312          */
9313         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9314                 return;
9315
9316         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9317         if (!skb)
9318                 return;
9319
9320         skb_put(skb, wupl);
9321
9322         /* Ensure reads are 32-bit aligned */
9323         wupl = roundup(wupl, 4);
9324
9325         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9326
9327         skb->protocol = eth_type_trans(skb, netdev);
9328         netif_rx(skb);
9329 }
9330
9331 static int __maybe_unused igb_suspend(struct device *dev)
9332 {
9333         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9334 }
9335
9336 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9337 {
9338         struct pci_dev *pdev = to_pci_dev(dev);
9339         struct net_device *netdev = pci_get_drvdata(pdev);
9340         struct igb_adapter *adapter = netdev_priv(netdev);
9341         struct e1000_hw *hw = &adapter->hw;
9342         u32 err, val;
9343
9344         pci_set_power_state(pdev, PCI_D0);
9345         pci_restore_state(pdev);
9346         pci_save_state(pdev);
9347
9348         if (!pci_device_is_present(pdev))
9349                 return -ENODEV;
9350         err = pci_enable_device_mem(pdev);
9351         if (err) {
9352                 dev_err(&pdev->dev,
9353                         "igb: Cannot enable PCI device from suspend\n");
9354                 return err;
9355         }
9356         pci_set_master(pdev);
9357
9358         pci_enable_wake(pdev, PCI_D3hot, 0);
9359         pci_enable_wake(pdev, PCI_D3cold, 0);
9360
9361         if (igb_init_interrupt_scheme(adapter, true)) {
9362                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9363                 return -ENOMEM;
9364         }
9365
9366         igb_reset(adapter);
9367
9368         /* let the f/w know that the h/w is now under the control of the
9369          * driver.
9370          */
9371         igb_get_hw_control(adapter);
9372
9373         val = rd32(E1000_WUS);
9374         if (val & WAKE_PKT_WUS)
9375                 igb_deliver_wake_packet(netdev);
9376
9377         wr32(E1000_WUS, ~0);
9378
9379         if (!rpm)
9380                 rtnl_lock();
9381         if (!err && netif_running(netdev))
9382                 err = __igb_open(netdev, true);
9383
9384         if (!err)
9385                 netif_device_attach(netdev);
9386         if (!rpm)
9387                 rtnl_unlock();
9388
9389         return err;
9390 }
9391
9392 static int __maybe_unused igb_resume(struct device *dev)
9393 {
9394         return __igb_resume(dev, false);
9395 }
9396
9397 static int __maybe_unused igb_runtime_idle(struct device *dev)
9398 {
9399         struct net_device *netdev = dev_get_drvdata(dev);
9400         struct igb_adapter *adapter = netdev_priv(netdev);
9401
9402         if (!igb_has_link(adapter))
9403                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9404
9405         return -EBUSY;
9406 }
9407
9408 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9409 {
9410         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9411 }
9412
9413 static int __maybe_unused igb_runtime_resume(struct device *dev)
9414 {
9415         return __igb_resume(dev, true);
9416 }
9417
9418 static void igb_shutdown(struct pci_dev *pdev)
9419 {
9420         bool wake;
9421
9422         __igb_shutdown(pdev, &wake, 0);
9423
9424         if (system_state == SYSTEM_POWER_OFF) {
9425                 pci_wake_from_d3(pdev, wake);
9426                 pci_set_power_state(pdev, PCI_D3hot);
9427         }
9428 }
9429
9430 #ifdef CONFIG_PCI_IOV
9431 static int igb_sriov_reinit(struct pci_dev *dev)
9432 {
9433         struct net_device *netdev = pci_get_drvdata(dev);
9434         struct igb_adapter *adapter = netdev_priv(netdev);
9435         struct pci_dev *pdev = adapter->pdev;
9436
9437         rtnl_lock();
9438
9439         if (netif_running(netdev))
9440                 igb_close(netdev);
9441         else
9442                 igb_reset(adapter);
9443
9444         igb_clear_interrupt_scheme(adapter);
9445
9446         igb_init_queue_configuration(adapter);
9447
9448         if (igb_init_interrupt_scheme(adapter, true)) {
9449                 rtnl_unlock();
9450                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9451                 return -ENOMEM;
9452         }
9453
9454         if (netif_running(netdev))
9455                 igb_open(netdev);
9456
9457         rtnl_unlock();
9458
9459         return 0;
9460 }
9461
9462 static int igb_pci_disable_sriov(struct pci_dev *dev)
9463 {
9464         int err = igb_disable_sriov(dev);
9465
9466         if (!err)
9467                 err = igb_sriov_reinit(dev);
9468
9469         return err;
9470 }
9471
9472 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9473 {
9474         int err = igb_enable_sriov(dev, num_vfs);
9475
9476         if (err)
9477                 goto out;
9478
9479         err = igb_sriov_reinit(dev);
9480         if (!err)
9481                 return num_vfs;
9482
9483 out:
9484         return err;
9485 }
9486
9487 #endif
9488 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9489 {
9490 #ifdef CONFIG_PCI_IOV
9491         if (num_vfs == 0)
9492                 return igb_pci_disable_sriov(dev);
9493         else
9494                 return igb_pci_enable_sriov(dev, num_vfs);
9495 #endif
9496         return 0;
9497 }
9498
9499 /**
9500  *  igb_io_error_detected - called when PCI error is detected
9501  *  @pdev: Pointer to PCI device
9502  *  @state: The current pci connection state
9503  *
9504  *  This function is called after a PCI bus error affecting
9505  *  this device has been detected.
9506  **/
9507 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9508                                               pci_channel_state_t state)
9509 {
9510         struct net_device *netdev = pci_get_drvdata(pdev);
9511         struct igb_adapter *adapter = netdev_priv(netdev);
9512
9513         netif_device_detach(netdev);
9514
9515         if (state == pci_channel_io_perm_failure)
9516                 return PCI_ERS_RESULT_DISCONNECT;
9517
9518         if (netif_running(netdev))
9519                 igb_down(adapter);
9520         pci_disable_device(pdev);
9521
9522         /* Request a slot slot reset. */
9523         return PCI_ERS_RESULT_NEED_RESET;
9524 }
9525
9526 /**
9527  *  igb_io_slot_reset - called after the pci bus has been reset.
9528  *  @pdev: Pointer to PCI device
9529  *
9530  *  Restart the card from scratch, as if from a cold-boot. Implementation
9531  *  resembles the first-half of the __igb_resume routine.
9532  **/
9533 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9534 {
9535         struct net_device *netdev = pci_get_drvdata(pdev);
9536         struct igb_adapter *adapter = netdev_priv(netdev);
9537         struct e1000_hw *hw = &adapter->hw;
9538         pci_ers_result_t result;
9539
9540         if (pci_enable_device_mem(pdev)) {
9541                 dev_err(&pdev->dev,
9542                         "Cannot re-enable PCI device after reset.\n");
9543                 result = PCI_ERS_RESULT_DISCONNECT;
9544         } else {
9545                 pci_set_master(pdev);
9546                 pci_restore_state(pdev);
9547                 pci_save_state(pdev);
9548
9549                 pci_enable_wake(pdev, PCI_D3hot, 0);
9550                 pci_enable_wake(pdev, PCI_D3cold, 0);
9551
9552                 /* In case of PCI error, adapter lose its HW address
9553                  * so we should re-assign it here.
9554                  */
9555                 hw->hw_addr = adapter->io_addr;
9556
9557                 igb_reset(adapter);
9558                 wr32(E1000_WUS, ~0);
9559                 result = PCI_ERS_RESULT_RECOVERED;
9560         }
9561
9562         return result;
9563 }
9564
9565 /**
9566  *  igb_io_resume - called when traffic can start flowing again.
9567  *  @pdev: Pointer to PCI device
9568  *
9569  *  This callback is called when the error recovery driver tells us that
9570  *  its OK to resume normal operation. Implementation resembles the
9571  *  second-half of the __igb_resume routine.
9572  */
9573 static void igb_io_resume(struct pci_dev *pdev)
9574 {
9575         struct net_device *netdev = pci_get_drvdata(pdev);
9576         struct igb_adapter *adapter = netdev_priv(netdev);
9577
9578         if (netif_running(netdev)) {
9579                 if (igb_up(adapter)) {
9580                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9581                         return;
9582                 }
9583         }
9584
9585         netif_device_attach(netdev);
9586
9587         /* let the f/w know that the h/w is now under the control of the
9588          * driver.
9589          */
9590         igb_get_hw_control(adapter);
9591 }
9592
9593 /**
9594  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9595  *  @adapter: Pointer to adapter structure
9596  *  @index: Index of the RAR entry which need to be synced with MAC table
9597  **/
9598 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9599 {
9600         struct e1000_hw *hw = &adapter->hw;
9601         u32 rar_low, rar_high;
9602         u8 *addr = adapter->mac_table[index].addr;
9603
9604         /* HW expects these to be in network order when they are plugged
9605          * into the registers which are little endian.  In order to guarantee
9606          * that ordering we need to do an leXX_to_cpup here in order to be
9607          * ready for the byteswap that occurs with writel
9608          */
9609         rar_low = le32_to_cpup((__le32 *)(addr));
9610         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9611
9612         /* Indicate to hardware the Address is Valid. */
9613         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9614                 if (is_valid_ether_addr(addr))
9615                         rar_high |= E1000_RAH_AV;
9616
9617                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9618                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9619
9620                 switch (hw->mac.type) {
9621                 case e1000_82575:
9622                 case e1000_i210:
9623                         if (adapter->mac_table[index].state &
9624                             IGB_MAC_STATE_QUEUE_STEERING)
9625                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9626
9627                         rar_high |= E1000_RAH_POOL_1 *
9628                                     adapter->mac_table[index].queue;
9629                         break;
9630                 default:
9631                         rar_high |= E1000_RAH_POOL_1 <<
9632                                     adapter->mac_table[index].queue;
9633                         break;
9634                 }
9635         }
9636
9637         wr32(E1000_RAL(index), rar_low);
9638         wrfl();
9639         wr32(E1000_RAH(index), rar_high);
9640         wrfl();
9641 }
9642
9643 static int igb_set_vf_mac(struct igb_adapter *adapter,
9644                           int vf, unsigned char *mac_addr)
9645 {
9646         struct e1000_hw *hw = &adapter->hw;
9647         /* VF MAC addresses start at end of receive addresses and moves
9648          * towards the first, as a result a collision should not be possible
9649          */
9650         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9651         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9652
9653         ether_addr_copy(vf_mac_addr, mac_addr);
9654         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9655         adapter->mac_table[rar_entry].queue = vf;
9656         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9657         igb_rar_set_index(adapter, rar_entry);
9658
9659         return 0;
9660 }
9661
9662 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9663 {
9664         struct igb_adapter *adapter = netdev_priv(netdev);
9665
9666         if (vf >= adapter->vfs_allocated_count)
9667                 return -EINVAL;
9668
9669         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9670          * flag and allows to overwrite the MAC via VF netdev.  This
9671          * is necessary to allow libvirt a way to restore the original
9672          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9673          * down a VM.
9674          */
9675         if (is_zero_ether_addr(mac)) {
9676                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9677                 dev_info(&adapter->pdev->dev,
9678                          "remove administratively set MAC on VF %d\n",
9679                          vf);
9680         } else if (is_valid_ether_addr(mac)) {
9681                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9682                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9683                          mac, vf);
9684                 dev_info(&adapter->pdev->dev,
9685                          "Reload the VF driver to make this change effective.");
9686                 /* Generate additional warning if PF is down */
9687                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9688                         dev_warn(&adapter->pdev->dev,
9689                                  "The VF MAC address has been set, but the PF device is not up.\n");
9690                         dev_warn(&adapter->pdev->dev,
9691                                  "Bring the PF device up before attempting to use the VF device.\n");
9692                 }
9693         } else {
9694                 return -EINVAL;
9695         }
9696         return igb_set_vf_mac(adapter, vf, mac);
9697 }
9698
9699 static int igb_link_mbps(int internal_link_speed)
9700 {
9701         switch (internal_link_speed) {
9702         case SPEED_100:
9703                 return 100;
9704         case SPEED_1000:
9705                 return 1000;
9706         default:
9707                 return 0;
9708         }
9709 }
9710
9711 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9712                                   int link_speed)
9713 {
9714         int rf_dec, rf_int;
9715         u32 bcnrc_val;
9716
9717         if (tx_rate != 0) {
9718                 /* Calculate the rate factor values to set */
9719                 rf_int = link_speed / tx_rate;
9720                 rf_dec = (link_speed - (rf_int * tx_rate));
9721                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9722                          tx_rate;
9723
9724                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9725                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9726                               E1000_RTTBCNRC_RF_INT_MASK);
9727                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9728         } else {
9729                 bcnrc_val = 0;
9730         }
9731
9732         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9733         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9734          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9735          */
9736         wr32(E1000_RTTBCNRM, 0x14);
9737         wr32(E1000_RTTBCNRC, bcnrc_val);
9738 }
9739
9740 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9741 {
9742         int actual_link_speed, i;
9743         bool reset_rate = false;
9744
9745         /* VF TX rate limit was not set or not supported */
9746         if ((adapter->vf_rate_link_speed == 0) ||
9747             (adapter->hw.mac.type != e1000_82576))
9748                 return;
9749
9750         actual_link_speed = igb_link_mbps(adapter->link_speed);
9751         if (actual_link_speed != adapter->vf_rate_link_speed) {
9752                 reset_rate = true;
9753                 adapter->vf_rate_link_speed = 0;
9754                 dev_info(&adapter->pdev->dev,
9755                          "Link speed has been changed. VF Transmit rate is disabled\n");
9756         }
9757
9758         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9759                 if (reset_rate)
9760                         adapter->vf_data[i].tx_rate = 0;
9761
9762                 igb_set_vf_rate_limit(&adapter->hw, i,
9763                                       adapter->vf_data[i].tx_rate,
9764                                       actual_link_speed);
9765         }
9766 }
9767
9768 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9769                              int min_tx_rate, int max_tx_rate)
9770 {
9771         struct igb_adapter *adapter = netdev_priv(netdev);
9772         struct e1000_hw *hw = &adapter->hw;
9773         int actual_link_speed;
9774
9775         if (hw->mac.type != e1000_82576)
9776                 return -EOPNOTSUPP;
9777
9778         if (min_tx_rate)
9779                 return -EINVAL;
9780
9781         actual_link_speed = igb_link_mbps(adapter->link_speed);
9782         if ((vf >= adapter->vfs_allocated_count) ||
9783             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9784             (max_tx_rate < 0) ||
9785             (max_tx_rate > actual_link_speed))
9786                 return -EINVAL;
9787
9788         adapter->vf_rate_link_speed = actual_link_speed;
9789         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9790         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9791
9792         return 0;
9793 }
9794
9795 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9796                                    bool setting)
9797 {
9798         struct igb_adapter *adapter = netdev_priv(netdev);
9799         struct e1000_hw *hw = &adapter->hw;
9800         u32 reg_val, reg_offset;
9801
9802         if (!adapter->vfs_allocated_count)
9803                 return -EOPNOTSUPP;
9804
9805         if (vf >= adapter->vfs_allocated_count)
9806                 return -EINVAL;
9807
9808         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9809         reg_val = rd32(reg_offset);
9810         if (setting)
9811                 reg_val |= (BIT(vf) |
9812                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9813         else
9814                 reg_val &= ~(BIT(vf) |
9815                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9816         wr32(reg_offset, reg_val);
9817
9818         adapter->vf_data[vf].spoofchk_enabled = setting;
9819         return 0;
9820 }
9821
9822 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9823 {
9824         struct igb_adapter *adapter = netdev_priv(netdev);
9825
9826         if (vf >= adapter->vfs_allocated_count)
9827                 return -EINVAL;
9828         if (adapter->vf_data[vf].trusted == setting)
9829                 return 0;
9830
9831         adapter->vf_data[vf].trusted = setting;
9832
9833         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9834                  vf, setting ? "" : "not ");
9835         return 0;
9836 }
9837
9838 static int igb_ndo_get_vf_config(struct net_device *netdev,
9839                                  int vf, struct ifla_vf_info *ivi)
9840 {
9841         struct igb_adapter *adapter = netdev_priv(netdev);
9842         if (vf >= adapter->vfs_allocated_count)
9843                 return -EINVAL;
9844         ivi->vf = vf;
9845         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9846         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9847         ivi->min_tx_rate = 0;
9848         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9849         ivi->qos = adapter->vf_data[vf].pf_qos;
9850         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9851         ivi->trusted = adapter->vf_data[vf].trusted;
9852         return 0;
9853 }
9854
9855 static void igb_vmm_control(struct igb_adapter *adapter)
9856 {
9857         struct e1000_hw *hw = &adapter->hw;
9858         u32 reg;
9859
9860         switch (hw->mac.type) {
9861         case e1000_82575:
9862         case e1000_i210:
9863         case e1000_i211:
9864         case e1000_i354:
9865         default:
9866                 /* replication is not supported for 82575 */
9867                 return;
9868         case e1000_82576:
9869                 /* notify HW that the MAC is adding vlan tags */
9870                 reg = rd32(E1000_DTXCTL);
9871                 reg |= E1000_DTXCTL_VLAN_ADDED;
9872                 wr32(E1000_DTXCTL, reg);
9873                 fallthrough;
9874         case e1000_82580:
9875                 /* enable replication vlan tag stripping */
9876                 reg = rd32(E1000_RPLOLR);
9877                 reg |= E1000_RPLOLR_STRVLAN;
9878                 wr32(E1000_RPLOLR, reg);
9879                 fallthrough;
9880         case e1000_i350:
9881                 /* none of the above registers are supported by i350 */
9882                 break;
9883         }
9884
9885         if (adapter->vfs_allocated_count) {
9886                 igb_vmdq_set_loopback_pf(hw, true);
9887                 igb_vmdq_set_replication_pf(hw, true);
9888                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9889                                               adapter->vfs_allocated_count);
9890         } else {
9891                 igb_vmdq_set_loopback_pf(hw, false);
9892                 igb_vmdq_set_replication_pf(hw, false);
9893         }
9894 }
9895
9896 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9897 {
9898         struct e1000_hw *hw = &adapter->hw;
9899         u32 dmac_thr;
9900         u16 hwm;
9901
9902         if (hw->mac.type > e1000_82580) {
9903                 if (adapter->flags & IGB_FLAG_DMAC) {
9904                         u32 reg;
9905
9906                         /* force threshold to 0. */
9907                         wr32(E1000_DMCTXTH, 0);
9908
9909                         /* DMA Coalescing high water mark needs to be greater
9910                          * than the Rx threshold. Set hwm to PBA - max frame
9911                          * size in 16B units, capping it at PBA - 6KB.
9912                          */
9913                         hwm = 64 * (pba - 6);
9914                         reg = rd32(E1000_FCRTC);
9915                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9916                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9917                                 & E1000_FCRTC_RTH_COAL_MASK);
9918                         wr32(E1000_FCRTC, reg);
9919
9920                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9921                          * frame size, capping it at PBA - 10KB.
9922                          */
9923                         dmac_thr = pba - 10;
9924                         reg = rd32(E1000_DMACR);
9925                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9926                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9927                                 & E1000_DMACR_DMACTHR_MASK);
9928
9929                         /* transition to L0x or L1 if available..*/
9930                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9931
9932                         /* watchdog timer= +-1000 usec in 32usec intervals */
9933                         reg |= (1000 >> 5);
9934
9935                         /* Disable BMC-to-OS Watchdog Enable */
9936                         if (hw->mac.type != e1000_i354)
9937                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9938
9939                         wr32(E1000_DMACR, reg);
9940
9941                         /* no lower threshold to disable
9942                          * coalescing(smart fifb)-UTRESH=0
9943                          */
9944                         wr32(E1000_DMCRTRH, 0);
9945
9946                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9947
9948                         wr32(E1000_DMCTLX, reg);
9949
9950                         /* free space in tx packet buffer to wake from
9951                          * DMA coal
9952                          */
9953                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9954                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9955
9956                         /* make low power state decision controlled
9957                          * by DMA coal
9958                          */
9959                         reg = rd32(E1000_PCIEMISC);
9960                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9961                         wr32(E1000_PCIEMISC, reg);
9962                 } /* endif adapter->dmac is not disabled */
9963         } else if (hw->mac.type == e1000_82580) {
9964                 u32 reg = rd32(E1000_PCIEMISC);
9965
9966                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9967                 wr32(E1000_DMACR, 0);
9968         }
9969 }
9970
9971 /**
9972  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9973  *  @hw: pointer to hardware structure
9974  *  @byte_offset: byte offset to read
9975  *  @dev_addr: device address
9976  *  @data: value read
9977  *
9978  *  Performs byte read operation over I2C interface at
9979  *  a specified device address.
9980  **/
9981 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9982                       u8 dev_addr, u8 *data)
9983 {
9984         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9985         struct i2c_client *this_client = adapter->i2c_client;
9986         s32 status;
9987         u16 swfw_mask = 0;
9988
9989         if (!this_client)
9990                 return E1000_ERR_I2C;
9991
9992         swfw_mask = E1000_SWFW_PHY0_SM;
9993
9994         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9995                 return E1000_ERR_SWFW_SYNC;
9996
9997         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9998         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9999
10000         if (status < 0)
10001                 return E1000_ERR_I2C;
10002         else {
10003                 *data = status;
10004                 return 0;
10005         }
10006 }
10007
10008 /**
10009  *  igb_write_i2c_byte - Writes 8 bit word over I2C
10010  *  @hw: pointer to hardware structure
10011  *  @byte_offset: byte offset to write
10012  *  @dev_addr: device address
10013  *  @data: value to write
10014  *
10015  *  Performs byte write operation over I2C interface at
10016  *  a specified device address.
10017  **/
10018 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10019                        u8 dev_addr, u8 data)
10020 {
10021         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10022         struct i2c_client *this_client = adapter->i2c_client;
10023         s32 status;
10024         u16 swfw_mask = E1000_SWFW_PHY0_SM;
10025
10026         if (!this_client)
10027                 return E1000_ERR_I2C;
10028
10029         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10030                 return E1000_ERR_SWFW_SYNC;
10031         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
10032         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10033
10034         if (status)
10035                 return E1000_ERR_I2C;
10036         else
10037                 return 0;
10038
10039 }
10040
10041 int igb_reinit_queues(struct igb_adapter *adapter)
10042 {
10043         struct net_device *netdev = adapter->netdev;
10044         struct pci_dev *pdev = adapter->pdev;
10045         int err = 0;
10046
10047         if (netif_running(netdev))
10048                 igb_close(netdev);
10049
10050         igb_reset_interrupt_capability(adapter);
10051
10052         if (igb_init_interrupt_scheme(adapter, true)) {
10053                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
10054                 return -ENOMEM;
10055         }
10056
10057         if (netif_running(netdev))
10058                 err = igb_open(netdev);
10059
10060         return err;
10061 }
10062
10063 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
10064 {
10065         struct igb_nfc_filter *rule;
10066
10067         spin_lock(&adapter->nfc_lock);
10068
10069         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10070                 igb_erase_filter(adapter, rule);
10071
10072         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
10073                 igb_erase_filter(adapter, rule);
10074
10075         spin_unlock(&adapter->nfc_lock);
10076 }
10077
10078 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10079 {
10080         struct igb_nfc_filter *rule;
10081
10082         spin_lock(&adapter->nfc_lock);
10083
10084         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10085                 igb_add_filter(adapter, rule);
10086
10087         spin_unlock(&adapter->nfc_lock);
10088 }
10089 /* igb_main.c */