drivers/net/ethernet/intel/e1000e/netdev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/delay.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/tcp.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/ethtool.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/cpu.h>
  23 #include <linux/smp.h>
  24 #include <linux/pm_qos.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/aer.h>
  27 #include <linux/prefetch.h>
  28
  29 #include "e1000.h"
  30
  31 #define DRV_EXTRAVERSION "-k"
  32
  33 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  34 char e1000e_driver_name[] = "e1000e";
  35 const char e1000e_driver_version[] = DRV_VERSION;
  36
  37 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  38 static int debug = -1;
  39 module_param(debug, int, 0);
  40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  41
  42 static const struct e1000_info *e1000_info_tbl[] = {
  43         [board_82571]           = &e1000_82571_info,
  44         [board_82572]           = &e1000_82572_info,
  45         [board_82573]           = &e1000_82573_info,
  46         [board_82574]           = &e1000_82574_info,
  47         [board_82583]           = &e1000_82583_info,
  48         [board_80003es2lan]     = &e1000_es2_info,
  49         [board_ich8lan]         = &e1000_ich8_info,
  50         [board_ich9lan]         = &e1000_ich9_info,
  51         [board_ich10lan]        = &e1000_ich10_info,
  52         [board_pchlan]          = &e1000_pch_info,
  53         [board_pch2lan]         = &e1000_pch2_info,
  54         [board_pch_lpt]         = &e1000_pch_lpt_info,
  55         [board_pch_spt]         = &e1000_pch_spt_info,
  56         [board_pch_cnp]         = &e1000_pch_cnp_info,
  57 };
  58
  59 struct e1000_reg_info {
  60         u32 ofs;
  61         char *name;
  62 };
  63
  64 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  65         /* General Registers */
  66         {E1000_CTRL, "CTRL"},
  67         {E1000_STATUS, "STATUS"},
  68         {E1000_CTRL_EXT, "CTRL_EXT"},
  69
  70         /* Interrupt Registers */
  71         {E1000_ICR, "ICR"},
  72
  73         /* Rx Registers */
  74         {E1000_RCTL, "RCTL"},
  75         {E1000_RDLEN(0), "RDLEN"},
  76         {E1000_RDH(0), "RDH"},
  77         {E1000_RDT(0), "RDT"},
  78         {E1000_RDTR, "RDTR"},
  79         {E1000_RXDCTL(0), "RXDCTL"},
  80         {E1000_ERT, "ERT"},
  81         {E1000_RDBAL(0), "RDBAL"},
  82         {E1000_RDBAH(0), "RDBAH"},
  83         {E1000_RDFH, "RDFH"},
  84         {E1000_RDFT, "RDFT"},
  85         {E1000_RDFHS, "RDFHS"},
  86         {E1000_RDFTS, "RDFTS"},
  87         {E1000_RDFPC, "RDFPC"},
  88
  89         /* Tx Registers */
  90         {E1000_TCTL, "TCTL"},
  91         {E1000_TDBAL(0), "TDBAL"},
  92         {E1000_TDBAH(0), "TDBAH"},
  93         {E1000_TDLEN(0), "TDLEN"},
  94         {E1000_TDH(0), "TDH"},
  95         {E1000_TDT(0), "TDT"},
  96         {E1000_TIDV, "TIDV"},
  97         {E1000_TXDCTL(0), "TXDCTL"},
  98         {E1000_TADV, "TADV"},
  99         {E1000_TARC(0), "TARC"},
 100         {E1000_TDFH, "TDFH"},
 101         {E1000_TDFT, "TDFT"},
 102         {E1000_TDFHS, "TDFHS"},
 103         {E1000_TDFTS, "TDFTS"},
 104         {E1000_TDFPC, "TDFPC"},
 105
 106         /* List Terminator */
 107         {0, NULL}
 108 };
 109
 110 /**
 111  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 112  * @hw: pointer to the HW structure
 113  *
 114  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 115  * be accessing the registers at the same time.  Normally, this is handled in
 116  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 117  * accesses later than it should which could result in the register to have
 118  * an incorrect value.  Workaround this by checking the FWSM register which
 119  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 120  * and try again a number of times.
 121  **/
 122 s32 __ew32_prepare(struct e1000_hw *hw)
 123 {
 124         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 125
 126         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 127                 udelay(50);
 128
 129         return i;
 130 }
 131
 132 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 133 {
 134         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 135                 __ew32_prepare(hw);
 136
 137         writel(val, hw->hw_addr + reg);
 138 }
 139
 140 /**
 141  * e1000_regdump - register printout routine
 142  * @hw: pointer to the HW structure
 143  * @reginfo: pointer to the register info table
 144  **/
 145 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 146 {
 147         int n = 0;
 148         char rname[16];
 149         u32 regs[8];
 150
 151         switch (reginfo->ofs) {
 152         case E1000_RXDCTL(0):
 153                 for (n = 0; n < 2; n++)
 154                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 155                 break;
 156         case E1000_TXDCTL(0):
 157                 for (n = 0; n < 2; n++)
 158                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 159                 break;
 160         case E1000_TARC(0):
 161                 for (n = 0; n < 2; n++)
 162                         regs[n] = __er32(hw, E1000_TARC(n));
 163                 break;
 164         default:
 165                 pr_info("%-15s %08x\n",
 166                         reginfo->name, __er32(hw, reginfo->ofs));
 167                 return;
 168         }
 169
 170         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 171         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 172 }
 173
 174 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 175                                  struct e1000_buffer *bi)
 176 {
 177         int i;
 178         struct e1000_ps_page *ps_page;
 179
 180         for (i = 0; i < adapter->rx_ps_pages; i++) {
 181                 ps_page = &bi->ps_pages[i];
 182
 183                 if (ps_page->page) {
 184                         pr_info("packet dump for ps_page %d:\n", i);
 185                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 186                                        16, 1, page_address(ps_page->page),
 187                                        PAGE_SIZE, true);
 188                 }
 189         }
 190 }
 191
 192 /**
 193  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 194  * @adapter: board private structure
 195  **/
 196 static void e1000e_dump(struct e1000_adapter *adapter)
 197 {
 198         struct net_device *netdev = adapter->netdev;
 199         struct e1000_hw *hw = &adapter->hw;
 200         struct e1000_reg_info *reginfo;
 201         struct e1000_ring *tx_ring = adapter->tx_ring;
 202         struct e1000_tx_desc *tx_desc;
 203         struct my_u0 {
 204                 __le64 a;
 205                 __le64 b;
 206         } *u0;
 207         struct e1000_buffer *buffer_info;
 208         struct e1000_ring *rx_ring = adapter->rx_ring;
 209         union e1000_rx_desc_packet_split *rx_desc_ps;
 210         union e1000_rx_desc_extended *rx_desc;
 211         struct my_u1 {
 212                 __le64 a;
 213                 __le64 b;
 214                 __le64 c;
 215                 __le64 d;
 216         } *u1;
 217         u32 staterr;
 218         int i = 0;
 219
 220         if (!netif_msg_hw(adapter))
 221                 return;
 222
 223         /* Print netdevice Info */
 224         if (netdev) {
 225                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 226                 pr_info("Device Name     state            trans_start\n");
 227                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 228                         netdev->state, dev_trans_start(netdev));
 229         }
 230
 231         /* Print Registers */
 232         dev_info(&adapter->pdev->dev, "Register Dump\n");
 233         pr_info(" Register Name   Value\n");
 234         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 235              reginfo->name; reginfo++) {
 236                 e1000_regdump(hw, reginfo);
 237         }
 238
 239         /* Print Tx Ring Summary */
 240         if (!netdev || !netif_running(netdev))
 241                 return;
 242
 243         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 244         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 245         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 246         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 247                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 248                 (unsigned long long)buffer_info->dma,
 249                 buffer_info->length,
 250                 buffer_info->next_to_watch,
 251                 (unsigned long long)buffer_info->time_stamp);
 252
 253         /* Print Tx Ring */
 254         if (!netif_msg_tx_done(adapter))
 255                 goto rx_ring_summary;
 256
 257         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 258
 259         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 260          *
 261          * Legacy Transmit Descriptor
 262          *   +--------------------------------------------------------------+
 263          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 264          *   +--------------------------------------------------------------+
 265          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 266          *   +--------------------------------------------------------------+
 267          *   63       48 47        36 35    32 31     24 23    16 15        0
 268          *
 269          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 270          *   63      48 47    40 39       32 31             16 15    8 7      0
 271          *   +----------------------------------------------------------------+
 272          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 273          *   +----------------------------------------------------------------+
 274          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 275          *   +----------------------------------------------------------------+
 276          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 277          *
 278          * Extended Data Descriptor (DTYP=0x1)
 279          *   +----------------------------------------------------------------+
 280          * 0 |                     Buffer Address [63:0]                      |
 281          *   +----------------------------------------------------------------+
 282          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 283          *   +----------------------------------------------------------------+
 284          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 285          */
 286         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 287         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 288         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 289         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 290                 const char *next_desc;
 291                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 292                 buffer_info = &tx_ring->buffer_info[i];
 293                 u0 = (struct my_u0 *)tx_desc;
 294                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 295                         next_desc = " NTC/U";
 296                 else if (i == tx_ring->next_to_use)
 297                         next_desc = " NTU";
 298                 else if (i == tx_ring->next_to_clean)
 299                         next_desc = " NTC";
 300                 else
 301                         next_desc = "";
 302                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 303                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 304                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 305                         i,
 306                         (unsigned long long)le64_to_cpu(u0->a),
 307                         (unsigned long long)le64_to_cpu(u0->b),
 308                         (unsigned long long)buffer_info->dma,
 309                         buffer_info->length, buffer_info->next_to_watch,
 310                         (unsigned long long)buffer_info->time_stamp,
 311                         buffer_info->skb, next_desc);
 312
 313                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 314                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 315                                        16, 1, buffer_info->skb->data,
 316                                        buffer_info->skb->len, true);
 317         }
 318
 319         /* Print Rx Ring Summary */
 320 rx_ring_summary:
 321         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 322         pr_info("Queue [NTU] [NTC]\n");
 323         pr_info(" %5d %5X %5X\n",
 324                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 325
 326         /* Print Rx Ring */
 327         if (!netif_msg_rx_status(adapter))
 328                 return;
 329
 330         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 331         switch (adapter->rx_ps_pages) {
 332         case 1:
 333         case 2:
 334         case 3:
 335                 /* [Extended] Packet Split Receive Descriptor Format
 336                  *
 337                  *    +-----------------------------------------------------+
 338                  *  0 |                Buffer Address 0 [63:0]              |
 339                  *    +-----------------------------------------------------+
 340                  *  8 |                Buffer Address 1 [63:0]              |
 341                  *    +-----------------------------------------------------+
 342                  * 16 |                Buffer Address 2 [63:0]              |
 343                  *    +-----------------------------------------------------+
 344                  * 24 |                Buffer Address 3 [63:0]              |
 345                  *    +-----------------------------------------------------+
 346                  */
 347                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 348                 /* [Extended] Receive Descriptor (Write-Back) Format
 349                  *
 350                  *   63       48 47    32 31     13 12    8 7    4 3        0
 351                  *   +------------------------------------------------------+
 352                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 353                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 354                  *   +------------------------------------------------------+
 355                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 356                  *   +------------------------------------------------------+
 357                  *   63       48 47    32 31            20 19               0
 358                  */
 359                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 360                 for (i = 0; i < rx_ring->count; i++) {
 361                         const char *next_desc;
 362                         buffer_info = &rx_ring->buffer_info[i];
 363                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 364                         u1 = (struct my_u1 *)rx_desc_ps;
 365                         staterr =
 366                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 367
 368                         if (i == rx_ring->next_to_use)
 369                                 next_desc = " NTU";
 370                         else if (i == rx_ring->next_to_clean)
 371                                 next_desc = " NTC";
 372                         else
 373                                 next_desc = "";
 374
 375                         if (staterr & E1000_RXD_STAT_DD) {
 376                                 /* Descriptor Done */
 377                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 378                                         "RWB", i,
 379                                         (unsigned long long)le64_to_cpu(u1->a),
 380                                         (unsigned long long)le64_to_cpu(u1->b),
 381                                         (unsigned long long)le64_to_cpu(u1->c),
 382                                         (unsigned long long)le64_to_cpu(u1->d),
 383                                         buffer_info->skb, next_desc);
 384                         } else {
 385                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 386                                         "R  ", i,
 387                                         (unsigned long long)le64_to_cpu(u1->a),
 388                                         (unsigned long long)le64_to_cpu(u1->b),
 389                                         (unsigned long long)le64_to_cpu(u1->c),
 390                                         (unsigned long long)le64_to_cpu(u1->d),
 391                                         (unsigned long long)buffer_info->dma,
 392                                         buffer_info->skb, next_desc);
 393
 394                                 if (netif_msg_pktdata(adapter))
 395                                         e1000e_dump_ps_pages(adapter,
 396                                                              buffer_info);
 397                         }
 398                 }
 399                 break;
 400         default:
 401         case 0:
 402                 /* Extended Receive Descriptor (Read) Format
 403                  *
 404                  *   +-----------------------------------------------------+
 405                  * 0 |                Buffer Address [63:0]                |
 406                  *   +-----------------------------------------------------+
 407                  * 8 |                      Reserved                       |
 408                  *   +-----------------------------------------------------+
 409                  */
 410                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 411                 /* Extended Receive Descriptor (Write-Back) Format
 412                  *
 413                  *   63       48 47    32 31    24 23            4 3        0
 414                  *   +------------------------------------------------------+
 415                  *   |     RSS Hash      |        |               |         |
 416                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 417                  *   | Packet   | IP     |        |               |  Type   |
 418                  *   | Checksum | Ident  |        |               |         |
 419                  *   +------------------------------------------------------+
 420                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 421                  *   +------------------------------------------------------+
 422                  *   63       48 47    32 31            20 19               0
 423                  */
 424                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 425
 426                 for (i = 0; i < rx_ring->count; i++) {
 427                         const char *next_desc;
 428
 429                         buffer_info = &rx_ring->buffer_info[i];
 430                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 431                         u1 = (struct my_u1 *)rx_desc;
 432                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 433
 434                         if (i == rx_ring->next_to_use)
 435                                 next_desc = " NTU";
 436                         else if (i == rx_ring->next_to_clean)
 437                                 next_desc = " NTC";
 438                         else
 439                                 next_desc = "";
 440
 441                         if (staterr & E1000_RXD_STAT_DD) {
 442                                 /* Descriptor Done */
 443                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 444                                         "RWB", i,
 445                                         (unsigned long long)le64_to_cpu(u1->a),
 446                                         (unsigned long long)le64_to_cpu(u1->b),
 447                                         buffer_info->skb, next_desc);
 448                         } else {
 449                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 450                                         "R  ", i,
 451                                         (unsigned long long)le64_to_cpu(u1->a),
 452                                         (unsigned long long)le64_to_cpu(u1->b),
 453                                         (unsigned long long)buffer_info->dma,
 454                                         buffer_info->skb, next_desc);
 455
 456                                 if (netif_msg_pktdata(adapter) &&
 457                                     buffer_info->skb)
 458                                         print_hex_dump(KERN_INFO, "",
 459                                                        DUMP_PREFIX_ADDRESS, 16,
 460                                                        1,
 461                                                        buffer_info->skb->data,
 462                                                        adapter->rx_buffer_len,
 463                                                        true);
 464                         }
 465                 }
 466         }
 467 }
 468
 469 /**
 470  * e1000_desc_unused - calculate if we have unused descriptors
 471  **/
 472 static int e1000_desc_unused(struct e1000_ring *ring)
 473 {
 474         if (ring->next_to_clean > ring->next_to_use)
 475                 return ring->next_to_clean - ring->next_to_use - 1;
 476
 477         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 478 }
 479
 480 /**
 481  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 482  * @adapter: board private structure
 483  * @hwtstamps: time stamp structure to update
 484  * @systim: unsigned 64bit system time value.
 485  *
 486  * Convert the system time value stored in the RX/TXSTMP registers into a
 487  * hwtstamp which can be used by the upper level time stamping functions.
 488  *
 489  * The 'systim_lock' spinlock is used to protect the consistency of the
 490  * system time value. This is needed because reading the 64 bit time
 491  * value involves reading two 32 bit registers. The first read latches the
 492  * value.
 493  **/
 494 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 495                                       struct skb_shared_hwtstamps *hwtstamps,
 496                                       u64 systim)
 497 {
 498         u64 ns;
 499         unsigned long flags;
 500
 501         spin_lock_irqsave(&adapter->systim_lock, flags);
 502         ns = timecounter_cyc2time(&adapter->tc, systim);
 503         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 504
 505         memset(hwtstamps, 0, sizeof(*hwtstamps));
 506         hwtstamps->hwtstamp = ns_to_ktime(ns);
 507 }
 508
 509 /**
 510  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 511  * @adapter: board private structure
 512  * @status: descriptor extended error and status field
 513  * @skb: particular skb to include time stamp
 514  *
 515  * If the time stamp is valid, convert it into the timecounter ns value
 516  * and store that result into the shhwtstamps structure which is passed
 517  * up the network stack.
 518  **/
 519 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 520                                struct sk_buff *skb)
 521 {
 522         struct e1000_hw *hw = &adapter->hw;
 523         u64 rxstmp;
 524
 525         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 526             !(status & E1000_RXDEXT_STATERR_TST) ||
 527             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 528                 return;
 529
 530         /* The Rx time stamp registers contain the time stamp.  No other
 531          * received packet will be time stamped until the Rx time stamp
 532          * registers are read.  Because only one packet can be time stamped
 533          * at a time, the register values must belong to this packet and
 534          * therefore none of the other additional attributes need to be
 535          * compared.
 536          */
 537         rxstmp = (u64)er32(RXSTMPL);
 538         rxstmp |= (u64)er32(RXSTMPH) << 32;
 539         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 540
 541         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 542 }
 543
 544 /**
 545  * e1000_receive_skb - helper function to handle Rx indications
 546  * @adapter: board private structure
 547  * @staterr: descriptor extended error and status field as written by hardware
 548  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 549  * @skb: pointer to sk_buff to be indicated to stack
 550  **/
 551 static void e1000_receive_skb(struct e1000_adapter *adapter,
 552                               struct net_device *netdev, struct sk_buff *skb,
 553                               u32 staterr, __le16 vlan)
 554 {
 555         u16 tag = le16_to_cpu(vlan);
 556
 557         e1000e_rx_hwtstamp(adapter, staterr, skb);
 558
 559         skb->protocol = eth_type_trans(skb, netdev);
 560
 561         if (staterr & E1000_RXD_STAT_VP)
 562                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 563
 564         napi_gro_receive(&adapter->napi, skb);
 565 }
 566
 567 /**
 568  * e1000_rx_checksum - Receive Checksum Offload
 569  * @adapter: board private structure
 570  * @status_err: receive descriptor status and error fields
 571  * @csum: receive descriptor csum field
 572  * @sk_buff: socket buffer with received data
 573  **/
 574 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 575                               struct sk_buff *skb)
 576 {
 577         u16 status = (u16)status_err;
 578         u8 errors = (u8)(status_err >> 24);
 579
 580         skb_checksum_none_assert(skb);
 581
 582         /* Rx checksum disabled */
 583         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 584                 return;
 585
 586         /* Ignore Checksum bit is set */
 587         if (status & E1000_RXD_STAT_IXSM)
 588                 return;
 589
 590         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 591         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 592                 /* let the stack verify checksum errors */
 593                 adapter->hw_csum_err++;
 594                 return;
 595         }
 596
 597         /* TCP/UDP Checksum has not been calculated */
 598         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 599                 return;
 600
 601         /* It must be a TCP or UDP packet with a valid checksum */
 602         skb->ip_summed = CHECKSUM_UNNECESSARY;
 603         adapter->hw_csum_good++;
 604 }
 605
 606 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 607 {
 608         struct e1000_adapter *adapter = rx_ring->adapter;
 609         struct e1000_hw *hw = &adapter->hw;
 610         s32 ret_val = __ew32_prepare(hw);
 611
 612         writel(i, rx_ring->tail);
 613
 614         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 615                 u32 rctl = er32(RCTL);
 616
 617                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 618                 e_err("ME firmware caused invalid RDT - resetting\n");
 619                 schedule_work(&adapter->reset_task);
 620         }
 621 }
 622
 623 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 624 {
 625         struct e1000_adapter *adapter = tx_ring->adapter;
 626         struct e1000_hw *hw = &adapter->hw;
 627         s32 ret_val = __ew32_prepare(hw);
 628
 629         writel(i, tx_ring->tail);
 630
 631         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 632                 u32 tctl = er32(TCTL);
 633
 634                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 635                 e_err("ME firmware caused invalid TDT - resetting\n");
 636                 schedule_work(&adapter->reset_task);
 637         }
 638 }
 639
 640 /**
 641  * e1000_alloc_rx_buffers - Replace used receive buffers
 642  * @rx_ring: Rx descriptor ring
 643  **/
 644 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 645                                    int cleaned_count, gfp_t gfp)
 646 {
 647         struct e1000_adapter *adapter = rx_ring->adapter;
 648         struct net_device *netdev = adapter->netdev;
 649         struct pci_dev *pdev = adapter->pdev;
 650         union e1000_rx_desc_extended *rx_desc;
 651         struct e1000_buffer *buffer_info;
 652         struct sk_buff *skb;
 653         unsigned int i;
 654         unsigned int bufsz = adapter->rx_buffer_len;
 655
 656         i = rx_ring->next_to_use;
 657         buffer_info = &rx_ring->buffer_info[i];
 658
 659         while (cleaned_count--) {
 660                 skb = buffer_info->skb;
 661                 if (skb) {
 662                         skb_trim(skb, 0);
 663                         goto map_skb;
 664                 }
 665
 666                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 667                 if (!skb) {
 668                         /* Better luck next round */
 669                         adapter->alloc_rx_buff_failed++;
 670                         break;
 671                 }
 672
 673                 buffer_info->skb = skb;
 674 map_skb:
 675                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 676                                                   adapter->rx_buffer_len,
 677                                                   DMA_FROM_DEVICE);
 678                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 679                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 680                         adapter->rx_dma_failed++;
 681                         break;
 682                 }
 683
 684                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 685                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 686
 687                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 688                         /* Force memory writes to complete before letting h/w
 689                          * know there are new descriptors to fetch.  (Only
 690                          * applicable for weak-ordered memory model archs,
 691                          * such as IA-64).
 692                          */
 693                         wmb();
 694                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 695                                 e1000e_update_rdt_wa(rx_ring, i);
 696                         else
 697                                 writel(i, rx_ring->tail);
 698                 }
 699                 i++;
 700                 if (i == rx_ring->count)
 701                         i = 0;
 702                 buffer_info = &rx_ring->buffer_info[i];
 703         }
 704
 705         rx_ring->next_to_use = i;
 706 }
 707
 708 /**
 709  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 710  * @rx_ring: Rx descriptor ring
 711  **/
 712 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 713                                       int cleaned_count, gfp_t gfp)
 714 {
 715         struct e1000_adapter *adapter = rx_ring->adapter;
 716         struct net_device *netdev = adapter->netdev;
 717         struct pci_dev *pdev = adapter->pdev;
 718         union e1000_rx_desc_packet_split *rx_desc;
 719         struct e1000_buffer *buffer_info;
 720         struct e1000_ps_page *ps_page;
 721         struct sk_buff *skb;
 722         unsigned int i, j;
 723
 724         i = rx_ring->next_to_use;
 725         buffer_info = &rx_ring->buffer_info[i];
 726
 727         while (cleaned_count--) {
 728                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 729
 730                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 731                         ps_page = &buffer_info->ps_pages[j];
 732                         if (j >= adapter->rx_ps_pages) {
 733                                 /* all unused desc entries get hw null ptr */
 734                                 rx_desc->read.buffer_addr[j + 1] =
 735                                     ~cpu_to_le64(0);
 736                                 continue;
 737                         }
 738                         if (!ps_page->page) {
 739                                 ps_page->page = alloc_page(gfp);
 740                                 if (!ps_page->page) {
 741                                         adapter->alloc_rx_buff_failed++;
 742                                         goto no_buffers;
 743                                 }
 744                                 ps_page->dma = dma_map_page(&pdev->dev,
 745                                                             ps_page->page,
 746                                                             0, PAGE_SIZE,
 747                                                             DMA_FROM_DEVICE);
 748                                 if (dma_mapping_error(&pdev->dev,
 749                                                       ps_page->dma)) {
 750                                         dev_err(&adapter->pdev->dev,
 751                                                 "Rx DMA page map failed\n");
 752                                         adapter->rx_dma_failed++;
 753                                         goto no_buffers;
 754                                 }
 755                         }
 756                         /* Refresh the desc even if buffer_addrs
 757                          * didn't change because each write-back
 758                          * erases this info.
 759                          */
 760                         rx_desc->read.buffer_addr[j + 1] =
 761                             cpu_to_le64(ps_page->dma);
 762                 }
 763
 764                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 765                                                   gfp);
 766
 767                 if (!skb) {
 768                         adapter->alloc_rx_buff_failed++;
 769                         break;
 770                 }
 771
 772                 buffer_info->skb = skb;
 773                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 774                                                   adapter->rx_ps_bsize0,
 775                                                   DMA_FROM_DEVICE);
 776                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 777                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 778                         adapter->rx_dma_failed++;
 779                         /* cleanup skb */
 780                         dev_kfree_skb_any(skb);
 781                         buffer_info->skb = NULL;
 782                         break;
 783                 }
 784
 785                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 786
 787                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 788                         /* Force memory writes to complete before letting h/w
 789                          * know there are new descriptors to fetch.  (Only
 790                          * applicable for weak-ordered memory model archs,
 791                          * such as IA-64).
 792                          */
 793                         wmb();
 794                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 795                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 796                         else
 797                                 writel(i << 1, rx_ring->tail);
 798                 }
 799
 800                 i++;
 801                 if (i == rx_ring->count)
 802                         i = 0;
 803                 buffer_info = &rx_ring->buffer_info[i];
 804         }
 805
 806 no_buffers:
 807         rx_ring->next_to_use = i;
 808 }
 809
 810 /**
 811  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 812  * @rx_ring: Rx descriptor ring
 813  * @cleaned_count: number of buffers to allocate this pass
 814  **/
 815
 816 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 817                                          int cleaned_count, gfp_t gfp)
 818 {
 819         struct e1000_adapter *adapter = rx_ring->adapter;
 820         struct net_device *netdev = adapter->netdev;
 821         struct pci_dev *pdev = adapter->pdev;
 822         union e1000_rx_desc_extended *rx_desc;
 823         struct e1000_buffer *buffer_info;
 824         struct sk_buff *skb;
 825         unsigned int i;
 826         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 827
 828         i = rx_ring->next_to_use;
 829         buffer_info = &rx_ring->buffer_info[i];
 830
 831         while (cleaned_count--) {
 832                 skb = buffer_info->skb;
 833                 if (skb) {
 834                         skb_trim(skb, 0);
 835                         goto check_page;
 836                 }
 837
 838                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 839                 if (unlikely(!skb)) {
 840                         /* Better luck next round */
 841                         adapter->alloc_rx_buff_failed++;
 842                         break;
 843                 }
 844
 845                 buffer_info->skb = skb;
 846 check_page:
 847                 /* allocate a new page if necessary */
 848                 if (!buffer_info->page) {
 849                         buffer_info->page = alloc_page(gfp);
 850                         if (unlikely(!buffer_info->page)) {
 851                                 adapter->alloc_rx_buff_failed++;
 852                                 break;
 853                         }
 854                 }
 855
 856                 if (!buffer_info->dma) {
 857                         buffer_info->dma = dma_map_page(&pdev->dev,
 858                                                         buffer_info->page, 0,
 859                                                         PAGE_SIZE,
 860                                                         DMA_FROM_DEVICE);
 861                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 862                                 adapter->alloc_rx_buff_failed++;
 863                                 break;
 864                         }
 865                 }
 866
 867                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 868                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 869
 870                 if (unlikely(++i == rx_ring->count))
 871                         i = 0;
 872                 buffer_info = &rx_ring->buffer_info[i];
 873         }
 874
 875         if (likely(rx_ring->next_to_use != i)) {
 876                 rx_ring->next_to_use = i;
 877                 if (unlikely(i-- == 0))
 878                         i = (rx_ring->count - 1);
 879
 880                 /* Force memory writes to complete before letting h/w
 881                  * know there are new descriptors to fetch.  (Only
 882                  * applicable for weak-ordered memory model archs,
 883                  * such as IA-64).
 884                  */
 885                 wmb();
 886                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 887                         e1000e_update_rdt_wa(rx_ring, i);
 888                 else
 889                         writel(i, rx_ring->tail);
 890         }
 891 }
 892
 893 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 894                                  struct sk_buff *skb)
 895 {
 896         if (netdev->features & NETIF_F_RXHASH)
 897                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 898 }
 899
 900 /**
 901  * e1000_clean_rx_irq - Send received data up the network stack
 902  * @rx_ring: Rx descriptor ring
 903  *
 904  * the return value indicates whether actual cleaning was done, there
 905  * is no guarantee that everything was cleaned
 906  **/
 907 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 908                                int work_to_do)
 909 {
 910         struct e1000_adapter *adapter = rx_ring->adapter;
 911         struct net_device *netdev = adapter->netdev;
 912         struct pci_dev *pdev = adapter->pdev;
 913         struct e1000_hw *hw = &adapter->hw;
 914         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 915         struct e1000_buffer *buffer_info, *next_buffer;
 916         u32 length, staterr;
 917         unsigned int i;
 918         int cleaned_count = 0;
 919         bool cleaned = false;
 920         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 921
 922         i = rx_ring->next_to_clean;
 923         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 924         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 925         buffer_info = &rx_ring->buffer_info[i];
 926
 927         while (staterr & E1000_RXD_STAT_DD) {
 928                 struct sk_buff *skb;
 929
 930                 if (*work_done >= work_to_do)
 931                         break;
 932                 (*work_done)++;
 933                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 934
 935                 skb = buffer_info->skb;
 936                 buffer_info->skb = NULL;
 937
 938                 prefetch(skb->data - NET_IP_ALIGN);
 939
 940                 i++;
 941                 if (i == rx_ring->count)
 942                         i = 0;
 943                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 944                 prefetch(next_rxd);
 945
 946                 next_buffer = &rx_ring->buffer_info[i];
 947
 948                 cleaned = true;
 949                 cleaned_count++;
 950                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 951                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 952                 buffer_info->dma = 0;
 953
 954                 length = le16_to_cpu(rx_desc->wb.upper.length);
 955
 956                 /* !EOP means multiple descriptors were used to store a single
 957                  * packet, if that's the case we need to toss it.  In fact, we
 958                  * need to toss every packet with the EOP bit clear and the
 959                  * next frame that _does_ have the EOP bit set, as it is by
 960                  * definition only a frame fragment
 961                  */
 962                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 963                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 964
 965                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 966                         /* All receives must fit into a single buffer */
 967                         e_dbg("Receive packet consumed multiple buffers\n");
 968                         /* recycle */
 969                         buffer_info->skb = skb;
 970                         if (staterr & E1000_RXD_STAT_EOP)
 971                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 972                         goto next_desc;
 973                 }
 974
 975                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 976                              !(netdev->features & NETIF_F_RXALL))) {
 977                         /* recycle */
 978                         buffer_info->skb = skb;
 979                         goto next_desc;
 980                 }
 981
 982                 /* adjust length to remove Ethernet CRC */
 983                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 984                         /* If configured to store CRC, don't subtract FCS,
 985                          * but keep the FCS bytes out of the total_rx_bytes
 986                          * counter
 987                          */
 988                         if (netdev->features & NETIF_F_RXFCS)
 989                                 total_rx_bytes -= 4;
 990                         else
 991                                 length -= 4;
 992                 }
 993
 994                 total_rx_bytes += length;
 995                 total_rx_packets++;
 996
 997                 /* code added for copybreak, this should improve
 998                  * performance for small packets with large amounts
 999                  * of reassembly being done in the stack
1000                  */
1001                 if (length < copybreak) {
1002                         struct sk_buff *new_skb =
1003                                 napi_alloc_skb(&adapter->napi, length);
1004                         if (new_skb) {
1005                                 skb_copy_to_linear_data_offset(new_skb,
1006                                                                -NET_IP_ALIGN,
1007                                                                (skb->data -
1008                                                                 NET_IP_ALIGN),
1009                                                                (length +
1010                                                                 NET_IP_ALIGN));
1011                                 /* save the skb in buffer_info as good */
1012                                 buffer_info->skb = skb;
1013                                 skb = new_skb;
1014                         }
1015                         /* else just continue with the old one */
1016                 }
1017                 /* end copybreak code */
1018                 skb_put(skb, length);
1019
1020                 /* Receive Checksum Offload */
1021                 e1000_rx_checksum(adapter, staterr, skb);
1022
1023                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1024
1025                 e1000_receive_skb(adapter, netdev, skb, staterr,
1026                                   rx_desc->wb.upper.vlan);
1027
1028 next_desc:
1029                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1030
1031                 /* return some buffers to hardware, one at a time is too slow */
1032                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1033                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1034                                               GFP_ATOMIC);
1035                         cleaned_count = 0;
1036                 }
1037
1038                 /* use prefetched values */
1039                 rx_desc = next_rxd;
1040                 buffer_info = next_buffer;
1041
1042                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1043         }
1044         rx_ring->next_to_clean = i;
1045
1046         cleaned_count = e1000_desc_unused(rx_ring);
1047         if (cleaned_count)
1048                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1049
1050         adapter->total_rx_bytes += total_rx_bytes;
1051         adapter->total_rx_packets += total_rx_packets;
1052         return cleaned;
1053 }
1054
1055 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1056                             struct e1000_buffer *buffer_info,
1057                             bool drop)
1058 {
1059         struct e1000_adapter *adapter = tx_ring->adapter;
1060
1061         if (buffer_info->dma) {
1062                 if (buffer_info->mapped_as_page)
1063                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1064                                        buffer_info->length, DMA_TO_DEVICE);
1065                 else
1066                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1067                                          buffer_info->length, DMA_TO_DEVICE);
1068                 buffer_info->dma = 0;
1069         }
1070         if (buffer_info->skb) {
1071                 if (drop)
1072                         dev_kfree_skb_any(buffer_info->skb);
1073                 else
1074                         dev_consume_skb_any(buffer_info->skb);
1075                 buffer_info->skb = NULL;
1076         }
1077         buffer_info->time_stamp = 0;
1078 }
1079
1080 static void e1000_print_hw_hang(struct work_struct *work)
1081 {
1082         struct e1000_adapter *adapter = container_of(work,
1083                                                      struct e1000_adapter,
1084                                                      print_hang_task);
1085         struct net_device *netdev = adapter->netdev;
1086         struct e1000_ring *tx_ring = adapter->tx_ring;
1087         unsigned int i = tx_ring->next_to_clean;
1088         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1089         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1090         struct e1000_hw *hw = &adapter->hw;
1091         u16 phy_status, phy_1000t_status, phy_ext_status;
1092         u16 pci_status;
1093
1094         if (test_bit(__E1000_DOWN, &adapter->state))
1095                 return;
1096
1097         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1098                 /* May be block on write-back, flush and detect again
1099                  * flush pending descriptor writebacks to memory
1100                  */
1101                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1102                 /* execute the writes immediately */
1103                 e1e_flush();
1104                 /* Due to rare timing issues, write to TIDV again to ensure
1105                  * the write is successful
1106                  */
1107                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1108                 /* execute the writes immediately */
1109                 e1e_flush();
1110                 adapter->tx_hang_recheck = true;
1111                 return;
1112         }
1113         adapter->tx_hang_recheck = false;
1114
1115         if (er32(TDH(0)) == er32(TDT(0))) {
1116                 e_dbg("false hang detected, ignoring\n");
1117                 return;
1118         }
1119
1120         /* Real hang detected */
1121         netif_stop_queue(netdev);
1122
1123         e1e_rphy(hw, MII_BMSR, &phy_status);
1124         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1125         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1126
1127         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1128
1129         /* detected Hardware unit hang */
1130         e_err("Detected Hardware Unit Hang:\n"
1131               "  TDH                  <%x>\n"
1132               "  TDT                  <%x>\n"
1133               "  next_to_use          <%x>\n"
1134               "  next_to_clean        <%x>\n"
1135               "buffer_info[next_to_clean]:\n"
1136               "  time_stamp           <%lx>\n"
1137               "  next_to_watch        <%x>\n"
1138               "  jiffies              <%lx>\n"
1139               "  next_to_watch.status <%x>\n"
1140               "MAC Status             <%x>\n"
1141               "PHY Status             <%x>\n"
1142               "PHY 1000BASE-T Status  <%x>\n"
1143               "PHY Extended Status    <%x>\n"
1144               "PCI Status             <%x>\n",
1145               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1146               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1147               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1148               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1149
1150         e1000e_dump(adapter);
1151
1152         /* Suggest workaround for known h/w issue */
1153         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1154                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1155 }
1156
1157 /**
1158  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1159  * @work: pointer to work struct
1160  *
1161  * This work function polls the TSYNCTXCTL valid bit to determine when a
1162  * timestamp has been taken for the current stored skb.  The timestamp must
1163  * be for this skb because only one such packet is allowed in the queue.
1164  */
1165 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1166 {
1167         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1168                                                      tx_hwtstamp_work);
1169         struct e1000_hw *hw = &adapter->hw;
1170
1171         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1172                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1173                 struct skb_shared_hwtstamps shhwtstamps;
1174                 u64 txstmp;
1175
1176                 txstmp = er32(TXSTMPL);
1177                 txstmp |= (u64)er32(TXSTMPH) << 32;
1178
1179                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1180
1181                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1182                  * prior to notifying the stack of a Tx timestamp.
1183                  */
1184                 adapter->tx_hwtstamp_skb = NULL;
1185                 wmb(); /* force write prior to skb_tstamp_tx */
1186
1187                 skb_tstamp_tx(skb, &shhwtstamps);
1188                 dev_consume_skb_any(skb);
1189         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1190                               + adapter->tx_timeout_factor * HZ)) {
1191                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1192                 adapter->tx_hwtstamp_skb = NULL;
1193                 adapter->tx_hwtstamp_timeouts++;
1194                 e_warn("clearing Tx timestamp hang\n");
1195         } else {
1196                 /* reschedule to check later */
1197                 schedule_work(&adapter->tx_hwtstamp_work);
1198         }
1199 }
1200
1201 /**
1202  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1203  * @tx_ring: Tx descriptor ring
1204  *
1205  * the return value indicates whether actual cleaning was done, there
1206  * is no guarantee that everything was cleaned
1207  **/
1208 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1209 {
1210         struct e1000_adapter *adapter = tx_ring->adapter;
1211         struct net_device *netdev = adapter->netdev;
1212         struct e1000_hw *hw = &adapter->hw;
1213         struct e1000_tx_desc *tx_desc, *eop_desc;
1214         struct e1000_buffer *buffer_info;
1215         unsigned int i, eop;
1216         unsigned int count = 0;
1217         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1218         unsigned int bytes_compl = 0, pkts_compl = 0;
1219
1220         i = tx_ring->next_to_clean;
1221         eop = tx_ring->buffer_info[i].next_to_watch;
1222         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1223
1224         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1225                (count < tx_ring->count)) {
1226                 bool cleaned = false;
1227
1228                 dma_rmb();              /* read buffer_info after eop_desc */
1229                 for (; !cleaned; count++) {
1230                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1231                         buffer_info = &tx_ring->buffer_info[i];
1232                         cleaned = (i == eop);
1233
1234                         if (cleaned) {
1235                                 total_tx_packets += buffer_info->segs;
1236                                 total_tx_bytes += buffer_info->bytecount;
1237                                 if (buffer_info->skb) {
1238                                         bytes_compl += buffer_info->skb->len;
1239                                         pkts_compl++;
1240                                 }
1241                         }
1242
1243                         e1000_put_txbuf(tx_ring, buffer_info, false);
1244                         tx_desc->upper.data = 0;
1245
1246                         i++;
1247                         if (i == tx_ring->count)
1248                                 i = 0;
1249                 }
1250
1251                 if (i == tx_ring->next_to_use)
1252                         break;
1253                 eop = tx_ring->buffer_info[i].next_to_watch;
1254                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1255         }
1256
1257         tx_ring->next_to_clean = i;
1258
1259         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1260
1261 #define TX_WAKE_THRESHOLD 32
1262         if (count && netif_carrier_ok(netdev) &&
1263             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1264                 /* Make sure that anybody stopping the queue after this
1265                  * sees the new next_to_clean.
1266                  */
1267                 smp_mb();
1268
1269                 if (netif_queue_stopped(netdev) &&
1270                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1271                         netif_wake_queue(netdev);
1272                         ++adapter->restart_queue;
1273                 }
1274         }
1275
1276         if (adapter->detect_tx_hung) {
1277                 /* Detect a transmit hang in hardware, this serializes the
1278                  * check with the clearing of time_stamp and movement of i
1279                  */
1280                 adapter->detect_tx_hung = false;
1281                 if (tx_ring->buffer_info[i].time_stamp &&
1282                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1283                                + (adapter->tx_timeout_factor * HZ)) &&
1284                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1285                         schedule_work(&adapter->print_hang_task);
1286                 else
1287                         adapter->tx_hang_recheck = false;
1288         }
1289         adapter->total_tx_bytes += total_tx_bytes;
1290         adapter->total_tx_packets += total_tx_packets;
1291         return count < tx_ring->count;
1292 }
1293
1294 /**
1295  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1296  * @rx_ring: Rx descriptor ring
1297  *
1298  * the return value indicates whether actual cleaning was done, there
1299  * is no guarantee that everything was cleaned
1300  **/
1301 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1302                                   int work_to_do)
1303 {
1304         struct e1000_adapter *adapter = rx_ring->adapter;
1305         struct e1000_hw *hw = &adapter->hw;
1306         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1307         struct net_device *netdev = adapter->netdev;
1308         struct pci_dev *pdev = adapter->pdev;
1309         struct e1000_buffer *buffer_info, *next_buffer;
1310         struct e1000_ps_page *ps_page;
1311         struct sk_buff *skb;
1312         unsigned int i, j;
1313         u32 length, staterr;
1314         int cleaned_count = 0;
1315         bool cleaned = false;
1316         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1317
1318         i = rx_ring->next_to_clean;
1319         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1320         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1321         buffer_info = &rx_ring->buffer_info[i];
1322
1323         while (staterr & E1000_RXD_STAT_DD) {
1324                 if (*work_done >= work_to_do)
1325                         break;
1326                 (*work_done)++;
1327                 skb = buffer_info->skb;
1328                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1329
1330                 /* in the packet split case this is header only */
1331                 prefetch(skb->data - NET_IP_ALIGN);
1332
1333                 i++;
1334                 if (i == rx_ring->count)
1335                         i = 0;
1336                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1337                 prefetch(next_rxd);
1338
1339                 next_buffer = &rx_ring->buffer_info[i];
1340
1341                 cleaned = true;
1342                 cleaned_count++;
1343                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1344                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1345                 buffer_info->dma = 0;
1346
1347                 /* see !EOP comment in other Rx routine */
1348                 if (!(staterr & E1000_RXD_STAT_EOP))
1349                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1350
1351                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1352                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1353                         dev_kfree_skb_irq(skb);
1354                         if (staterr & E1000_RXD_STAT_EOP)
1355                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1356                         goto next_desc;
1357                 }
1358
1359                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1360                              !(netdev->features & NETIF_F_RXALL))) {
1361                         dev_kfree_skb_irq(skb);
1362                         goto next_desc;
1363                 }
1364
1365                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1366
1367                 if (!length) {
1368                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1369                         dev_kfree_skb_irq(skb);
1370                         goto next_desc;
1371                 }
1372
1373                 /* Good Receive */
1374                 skb_put(skb, length);
1375
1376                 {
1377                         /* this looks ugly, but it seems compiler issues make
1378                          * it more efficient than reusing j
1379                          */
1380                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1381
1382                         /* page alloc/put takes too long and effects small
1383                          * packet throughput, so unsplit small packets and
1384                          * save the alloc/put only valid in softirq (napi)
1385                          * context to call kmap_*
1386                          */
1387                         if (l1 && (l1 <= copybreak) &&
1388                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1389                                 u8 *vaddr;
1390
1391                                 ps_page = &buffer_info->ps_pages[0];
1392
1393                                 /* there is no documentation about how to call
1394                                  * kmap_atomic, so we can't hold the mapping
1395                                  * very long
1396                                  */
1397                                 dma_sync_single_for_cpu(&pdev->dev,
1398                                                         ps_page->dma,
1399                                                         PAGE_SIZE,
1400                                                         DMA_FROM_DEVICE);
1401                                 vaddr = kmap_atomic(ps_page->page);
1402                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1403                                 kunmap_atomic(vaddr);
1404                                 dma_sync_single_for_device(&pdev->dev,
1405                                                            ps_page->dma,
1406                                                            PAGE_SIZE,
1407                                                            DMA_FROM_DEVICE);
1408
1409                                 /* remove the CRC */
1410                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1411                                         if (!(netdev->features & NETIF_F_RXFCS))
1412                                                 l1 -= 4;
1413                                 }
1414
1415                                 skb_put(skb, l1);
1416                                 goto copydone;
1417                         }       /* if */
1418                 }
1419
1420                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1421                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1422                         if (!length)
1423                                 break;
1424
1425                         ps_page = &buffer_info->ps_pages[j];
1426                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1427                                        DMA_FROM_DEVICE);
1428                         ps_page->dma = 0;
1429                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1430                         ps_page->page = NULL;
1431                         skb->len += length;
1432                         skb->data_len += length;
1433                         skb->truesize += PAGE_SIZE;
1434                 }
1435
1436                 /* strip the ethernet crc, problem is we're using pages now so
1437                  * this whole operation can get a little cpu intensive
1438                  */
1439                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1440                         if (!(netdev->features & NETIF_F_RXFCS))
1441                                 pskb_trim(skb, skb->len - 4);
1442                 }
1443
1444 copydone:
1445                 total_rx_bytes += skb->len;
1446                 total_rx_packets++;
1447
1448                 e1000_rx_checksum(adapter, staterr, skb);
1449
1450                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1451
1452                 if (rx_desc->wb.upper.header_status &
1453                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1454                         adapter->rx_hdr_split++;
1455
1456                 e1000_receive_skb(adapter, netdev, skb, staterr,
1457                                   rx_desc->wb.middle.vlan);
1458
1459 next_desc:
1460                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1461                 buffer_info->skb = NULL;
1462
1463                 /* return some buffers to hardware, one at a time is too slow */
1464                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1465                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1466                                               GFP_ATOMIC);
1467                         cleaned_count = 0;
1468                 }
1469
1470                 /* use prefetched values */
1471                 rx_desc = next_rxd;
1472                 buffer_info = next_buffer;
1473
1474                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1475         }
1476         rx_ring->next_to_clean = i;
1477
1478         cleaned_count = e1000_desc_unused(rx_ring);
1479         if (cleaned_count)
1480                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1481
1482         adapter->total_rx_bytes += total_rx_bytes;
1483         adapter->total_rx_packets += total_rx_packets;
1484         return cleaned;
1485 }
1486
1487 /**
1488  * e1000_consume_page - helper function
1489  **/
1490 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1491                                u16 length)
1492 {
1493         bi->page = NULL;
1494         skb->len += length;
1495         skb->data_len += length;
1496         skb->truesize += PAGE_SIZE;
1497 }
1498
1499 /**
1500  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1501  * @adapter: board private structure
1502  *
1503  * the return value indicates whether actual cleaning was done, there
1504  * is no guarantee that everything was cleaned
1505  **/
1506 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1507                                      int work_to_do)
1508 {
1509         struct e1000_adapter *adapter = rx_ring->adapter;
1510         struct net_device *netdev = adapter->netdev;
1511         struct pci_dev *pdev = adapter->pdev;
1512         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1513         struct e1000_buffer *buffer_info, *next_buffer;
1514         u32 length, staterr;
1515         unsigned int i;
1516         int cleaned_count = 0;
1517         bool cleaned = false;
1518         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1519         struct skb_shared_info *shinfo;
1520
1521         i = rx_ring->next_to_clean;
1522         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1523         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1524         buffer_info = &rx_ring->buffer_info[i];
1525
1526         while (staterr & E1000_RXD_STAT_DD) {
1527                 struct sk_buff *skb;
1528
1529                 if (*work_done >= work_to_do)
1530                         break;
1531                 (*work_done)++;
1532                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1533
1534                 skb = buffer_info->skb;
1535                 buffer_info->skb = NULL;
1536
1537                 ++i;
1538                 if (i == rx_ring->count)
1539                         i = 0;
1540                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1541                 prefetch(next_rxd);
1542
1543                 next_buffer = &rx_ring->buffer_info[i];
1544
1545                 cleaned = true;
1546                 cleaned_count++;
1547                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1548                                DMA_FROM_DEVICE);
1549                 buffer_info->dma = 0;
1550
1551                 length = le16_to_cpu(rx_desc->wb.upper.length);
1552
1553                 /* errors is only valid for DD + EOP descriptors */
1554                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1555                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1556                               !(netdev->features & NETIF_F_RXALL)))) {
1557                         /* recycle both page and skb */
1558                         buffer_info->skb = skb;
1559                         /* an error means any chain goes out the window too */
1560                         if (rx_ring->rx_skb_top)
1561                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1562                         rx_ring->rx_skb_top = NULL;
1563                         goto next_desc;
1564                 }
1565 #define rxtop (rx_ring->rx_skb_top)
1566                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1567                         /* this descriptor is only the beginning (or middle) */
1568                         if (!rxtop) {
1569                                 /* this is the beginning of a chain */
1570                                 rxtop = skb;
1571                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1572                                                    0, length);
1573                         } else {
1574                                 /* this is the middle of a chain */
1575                                 shinfo = skb_shinfo(rxtop);
1576                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1577                                                    buffer_info->page, 0,
1578                                                    length);
1579                                 /* re-use the skb, only consumed the page */
1580                                 buffer_info->skb = skb;
1581                         }
1582                         e1000_consume_page(buffer_info, rxtop, length);
1583                         goto next_desc;
1584                 } else {
1585                         if (rxtop) {
1586                                 /* end of the chain */
1587                                 shinfo = skb_shinfo(rxtop);
1588                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589                                                    buffer_info->page, 0,
1590                                                    length);
1591                                 /* re-use the current skb, we only consumed the
1592                                  * page
1593                                  */
1594                                 buffer_info->skb = skb;
1595                                 skb = rxtop;
1596                                 rxtop = NULL;
1597                                 e1000_consume_page(buffer_info, skb, length);
1598                         } else {
1599                                 /* no chain, got EOP, this buf is the packet
1600                                  * copybreak to save the put_page/alloc_page
1601                                  */
1602                                 if (length <= copybreak &&
1603                                     skb_tailroom(skb) >= length) {
1604                                         u8 *vaddr;
1605                                         vaddr = kmap_atomic(buffer_info->page);
1606                                         memcpy(skb_tail_pointer(skb), vaddr,
1607                                                length);
1608                                         kunmap_atomic(vaddr);
1609                                         /* re-use the page, so don't erase
1610                                          * buffer_info->page
1611                                          */
1612                                         skb_put(skb, length);
1613                                 } else {
1614                                         skb_fill_page_desc(skb, 0,
1615                                                            buffer_info->page, 0,
1616                                                            length);
1617                                         e1000_consume_page(buffer_info, skb,
1618                                                            length);
1619                                 }
1620                         }
1621                 }
1622
1623                 /* Receive Checksum Offload */
1624                 e1000_rx_checksum(adapter, staterr, skb);
1625
1626                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1627
1628                 /* probably a little skewed due to removing CRC */
1629                 total_rx_bytes += skb->len;
1630                 total_rx_packets++;
1631
1632                 /* eth type trans needs skb->data to point to something */
1633                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1634                         e_err("pskb_may_pull failed.\n");
1635                         dev_kfree_skb_irq(skb);
1636                         goto next_desc;
1637                 }
1638
1639                 e1000_receive_skb(adapter, netdev, skb, staterr,
1640                                   rx_desc->wb.upper.vlan);
1641
1642 next_desc:
1643                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1644
1645                 /* return some buffers to hardware, one at a time is too slow */
1646                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1647                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1648                                               GFP_ATOMIC);
1649                         cleaned_count = 0;
1650                 }
1651
1652                 /* use prefetched values */
1653                 rx_desc = next_rxd;
1654                 buffer_info = next_buffer;
1655
1656                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1657         }
1658         rx_ring->next_to_clean = i;
1659
1660         cleaned_count = e1000_desc_unused(rx_ring);
1661         if (cleaned_count)
1662                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1663
1664         adapter->total_rx_bytes += total_rx_bytes;
1665         adapter->total_rx_packets += total_rx_packets;
1666         return cleaned;
1667 }
1668
1669 /**
1670  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1671  * @rx_ring: Rx descriptor ring
1672  **/
1673 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1674 {
1675         struct e1000_adapter *adapter = rx_ring->adapter;
1676         struct e1000_buffer *buffer_info;
1677         struct e1000_ps_page *ps_page;
1678         struct pci_dev *pdev = adapter->pdev;
1679         unsigned int i, j;
1680
1681         /* Free all the Rx ring sk_buffs */
1682         for (i = 0; i < rx_ring->count; i++) {
1683                 buffer_info = &rx_ring->buffer_info[i];
1684                 if (buffer_info->dma) {
1685                         if (adapter->clean_rx == e1000_clean_rx_irq)
1686                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1687                                                  adapter->rx_buffer_len,
1688                                                  DMA_FROM_DEVICE);
1689                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1690                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1691                                                PAGE_SIZE, DMA_FROM_DEVICE);
1692                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1693                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1694                                                  adapter->rx_ps_bsize0,
1695                                                  DMA_FROM_DEVICE);
1696                         buffer_info->dma = 0;
1697                 }
1698
1699                 if (buffer_info->page) {
1700                         put_page(buffer_info->page);
1701                         buffer_info->page = NULL;
1702                 }
1703
1704                 if (buffer_info->skb) {
1705                         dev_kfree_skb(buffer_info->skb);
1706                         buffer_info->skb = NULL;
1707                 }
1708
1709                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1710                         ps_page = &buffer_info->ps_pages[j];
1711                         if (!ps_page->page)
1712                                 break;
1713                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1714                                        DMA_FROM_DEVICE);
1715                         ps_page->dma = 0;
1716                         put_page(ps_page->page);
1717                         ps_page->page = NULL;
1718                 }
1719         }
1720
1721         /* there also may be some cached data from a chained receive */
1722         if (rx_ring->rx_skb_top) {
1723                 dev_kfree_skb(rx_ring->rx_skb_top);
1724                 rx_ring->rx_skb_top = NULL;
1725         }
1726
1727         /* Zero out the descriptor ring */
1728         memset(rx_ring->desc, 0, rx_ring->size);
1729
1730         rx_ring->next_to_clean = 0;
1731         rx_ring->next_to_use = 0;
1732         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1733 }
1734
1735 static void e1000e_downshift_workaround(struct work_struct *work)
1736 {
1737         struct e1000_adapter *adapter = container_of(work,
1738                                                      struct e1000_adapter,
1739                                                      downshift_task);
1740
1741         if (test_bit(__E1000_DOWN, &adapter->state))
1742                 return;
1743
1744         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1745 }
1746
1747 /**
1748  * e1000_intr_msi - Interrupt Handler
1749  * @irq: interrupt number
1750  * @data: pointer to a network interface device structure
1751  **/
1752 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1753 {
1754         struct net_device *netdev = data;
1755         struct e1000_adapter *adapter = netdev_priv(netdev);
1756         struct e1000_hw *hw = &adapter->hw;
1757         u32 icr = er32(ICR);
1758
1759         /* read ICR disables interrupts using IAM */
1760         if (icr & E1000_ICR_LSC) {
1761                 hw->mac.get_link_status = true;
1762                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1763                  * disconnect (LSC) before accessing any PHY registers
1764                  */
1765                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1766                     (!(er32(STATUS) & E1000_STATUS_LU)))
1767                         schedule_work(&adapter->downshift_task);
1768
1769                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1770                  * link down event; disable receives here in the ISR and reset
1771                  * adapter in watchdog
1772                  */
1773                 if (netif_carrier_ok(netdev) &&
1774                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1775                         /* disable receives */
1776                         u32 rctl = er32(RCTL);
1777
1778                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1779                         adapter->flags |= FLAG_RESTART_NOW;
1780                 }
1781                 /* guard against interrupt when we're going down */
1782                 if (!test_bit(__E1000_DOWN, &adapter->state))
1783                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1784         }
1785
1786         /* Reset on uncorrectable ECC error */
1787         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1788                 u32 pbeccsts = er32(PBECCSTS);
1789
1790                 adapter->corr_errors +=
1791                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1792                 adapter->uncorr_errors +=
1793                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1794                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1795
1796                 /* Do the reset outside of interrupt context */
1797                 schedule_work(&adapter->reset_task);
1798
1799                 /* return immediately since reset is imminent */
1800                 return IRQ_HANDLED;
1801         }
1802
1803         if (napi_schedule_prep(&adapter->napi)) {
1804                 adapter->total_tx_bytes = 0;
1805                 adapter->total_tx_packets = 0;
1806                 adapter->total_rx_bytes = 0;
1807                 adapter->total_rx_packets = 0;
1808                 __napi_schedule(&adapter->napi);
1809         }
1810
1811         return IRQ_HANDLED;
1812 }
1813
1814 /**
1815  * e1000_intr - Interrupt Handler
1816  * @irq: interrupt number
1817  * @data: pointer to a network interface device structure
1818  **/
1819 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1820 {
1821         struct net_device *netdev = data;
1822         struct e1000_adapter *adapter = netdev_priv(netdev);
1823         struct e1000_hw *hw = &adapter->hw;
1824         u32 rctl, icr = er32(ICR);
1825
1826         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1827                 return IRQ_NONE;        /* Not our interrupt */
1828
1829         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1830          * not set, then the adapter didn't send an interrupt
1831          */
1832         if (!(icr & E1000_ICR_INT_ASSERTED))
1833                 return IRQ_NONE;
1834
1835         /* Interrupt Auto-Mask...upon reading ICR,
1836          * interrupts are masked.  No need for the
1837          * IMC write
1838          */
1839
1840         if (icr & E1000_ICR_LSC) {
1841                 hw->mac.get_link_status = true;
1842                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1843                  * disconnect (LSC) before accessing any PHY registers
1844                  */
1845                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1846                     (!(er32(STATUS) & E1000_STATUS_LU)))
1847                         schedule_work(&adapter->downshift_task);
1848
1849                 /* 80003ES2LAN workaround--
1850                  * For packet buffer work-around on link down event;
1851                  * disable receives here in the ISR and
1852                  * reset adapter in watchdog
1853                  */
1854                 if (netif_carrier_ok(netdev) &&
1855                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1856                         /* disable receives */
1857                         rctl = er32(RCTL);
1858                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1859                         adapter->flags |= FLAG_RESTART_NOW;
1860                 }
1861                 /* guard against interrupt when we're going down */
1862                 if (!test_bit(__E1000_DOWN, &adapter->state))
1863                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1864         }
1865
1866         /* Reset on uncorrectable ECC error */
1867         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1868                 u32 pbeccsts = er32(PBECCSTS);
1869
1870                 adapter->corr_errors +=
1871                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1872                 adapter->uncorr_errors +=
1873                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1874                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1875
1876                 /* Do the reset outside of interrupt context */
1877                 schedule_work(&adapter->reset_task);
1878
1879                 /* return immediately since reset is imminent */
1880                 return IRQ_HANDLED;
1881         }
1882
1883         if (napi_schedule_prep(&adapter->napi)) {
1884                 adapter->total_tx_bytes = 0;
1885                 adapter->total_tx_packets = 0;
1886                 adapter->total_rx_bytes = 0;
1887                 adapter->total_rx_packets = 0;
1888                 __napi_schedule(&adapter->napi);
1889         }
1890
1891         return IRQ_HANDLED;
1892 }
1893
1894 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1895 {
1896         struct net_device *netdev = data;
1897         struct e1000_adapter *adapter = netdev_priv(netdev);
1898         struct e1000_hw *hw = &adapter->hw;
1899         u32 icr = er32(ICR);
1900
1901         if (icr & adapter->eiac_mask)
1902                 ew32(ICS, (icr & adapter->eiac_mask));
1903
1904         if (icr & E1000_ICR_LSC) {
1905                 hw->mac.get_link_status = true;
1906                 /* guard against interrupt when we're going down */
1907                 if (!test_bit(__E1000_DOWN, &adapter->state))
1908                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1909         }
1910
1911         if (!test_bit(__E1000_DOWN, &adapter->state))
1912                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1913
1914         return IRQ_HANDLED;
1915 }
1916
1917 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1918 {
1919         struct net_device *netdev = data;
1920         struct e1000_adapter *adapter = netdev_priv(netdev);
1921         struct e1000_hw *hw = &adapter->hw;
1922         struct e1000_ring *tx_ring = adapter->tx_ring;
1923
1924         adapter->total_tx_bytes = 0;
1925         adapter->total_tx_packets = 0;
1926
1927         if (!e1000_clean_tx_irq(tx_ring))
1928                 /* Ring was not completely cleaned, so fire another interrupt */
1929                 ew32(ICS, tx_ring->ims_val);
1930
1931         if (!test_bit(__E1000_DOWN, &adapter->state))
1932                 ew32(IMS, adapter->tx_ring->ims_val);
1933
1934         return IRQ_HANDLED;
1935 }
1936
1937 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1938 {
1939         struct net_device *netdev = data;
1940         struct e1000_adapter *adapter = netdev_priv(netdev);
1941         struct e1000_ring *rx_ring = adapter->rx_ring;
1942
1943         /* Write the ITR value calculated at the end of the
1944          * previous interrupt.
1945          */
1946         if (rx_ring->set_itr) {
1947                 u32 itr = rx_ring->itr_val ?
1948                           1000000000 / (rx_ring->itr_val * 256) : 0;
1949
1950                 writel(itr, rx_ring->itr_register);
1951                 rx_ring->set_itr = 0;
1952         }
1953
1954         if (napi_schedule_prep(&adapter->napi)) {
1955                 adapter->total_rx_bytes = 0;
1956                 adapter->total_rx_packets = 0;
1957                 __napi_schedule(&adapter->napi);
1958         }
1959         return IRQ_HANDLED;
1960 }
1961
1962 /**
1963  * e1000_configure_msix - Configure MSI-X hardware
1964  *
1965  * e1000_configure_msix sets up the hardware to properly
1966  * generate MSI-X interrupts.
1967  **/
1968 static void e1000_configure_msix(struct e1000_adapter *adapter)
1969 {
1970         struct e1000_hw *hw = &adapter->hw;
1971         struct e1000_ring *rx_ring = adapter->rx_ring;
1972         struct e1000_ring *tx_ring = adapter->tx_ring;
1973         int vector = 0;
1974         u32 ctrl_ext, ivar = 0;
1975
1976         adapter->eiac_mask = 0;
1977
1978         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1979         if (hw->mac.type == e1000_82574) {
1980                 u32 rfctl = er32(RFCTL);
1981
1982                 rfctl |= E1000_RFCTL_ACK_DIS;
1983                 ew32(RFCTL, rfctl);
1984         }
1985
1986         /* Configure Rx vector */
1987         rx_ring->ims_val = E1000_IMS_RXQ0;
1988         adapter->eiac_mask |= rx_ring->ims_val;
1989         if (rx_ring->itr_val)
1990                 writel(1000000000 / (rx_ring->itr_val * 256),
1991                        rx_ring->itr_register);
1992         else
1993                 writel(1, rx_ring->itr_register);
1994         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1995
1996         /* Configure Tx vector */
1997         tx_ring->ims_val = E1000_IMS_TXQ0;
1998         vector++;
1999         if (tx_ring->itr_val)
2000                 writel(1000000000 / (tx_ring->itr_val * 256),
2001                        tx_ring->itr_register);
2002         else
2003                 writel(1, tx_ring->itr_register);
2004         adapter->eiac_mask |= tx_ring->ims_val;
2005         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2006
2007         /* set vector for Other Causes, e.g. link changes */
2008         vector++;
2009         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2010         if (rx_ring->itr_val)
2011                 writel(1000000000 / (rx_ring->itr_val * 256),
2012                        hw->hw_addr + E1000_EITR_82574(vector));
2013         else
2014                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2015
2016         /* Cause Tx interrupts on every write back */
2017         ivar |= BIT(31);
2018
2019         ew32(IVAR, ivar);
2020
2021         /* enable MSI-X PBA support */
2022         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2023         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2024         ew32(CTRL_EXT, ctrl_ext);
2025         e1e_flush();
2026 }
2027
2028 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2029 {
2030         if (adapter->msix_entries) {
2031                 pci_disable_msix(adapter->pdev);
2032                 kfree(adapter->msix_entries);
2033                 adapter->msix_entries = NULL;
2034         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2035                 pci_disable_msi(adapter->pdev);
2036                 adapter->flags &= ~FLAG_MSI_ENABLED;
2037         }
2038 }
2039
2040 /**
2041  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2042  *
2043  * Attempt to configure interrupts using the best available
2044  * capabilities of the hardware and kernel.
2045  **/
2046 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2047 {
2048         int err;
2049         int i;
2050
2051         switch (adapter->int_mode) {
2052         case E1000E_INT_MODE_MSIX:
2053                 if (adapter->flags & FLAG_HAS_MSIX) {
2054                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2055                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2056                                                         sizeof(struct
2057                                                                msix_entry),
2058                                                         GFP_KERNEL);
2059                         if (adapter->msix_entries) {
2060                                 struct e1000_adapter *a = adapter;
2061
2062                                 for (i = 0; i < adapter->num_vectors; i++)
2063                                         adapter->msix_entries[i].entry = i;
2064
2065                                 err = pci_enable_msix_range(a->pdev,
2066                                                             a->msix_entries,
2067                                                             a->num_vectors,
2068                                                             a->num_vectors);
2069                                 if (err > 0)
2070                                         return;
2071                         }
2072                         /* MSI-X failed, so fall through and try MSI */
2073                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2074                         e1000e_reset_interrupt_capability(adapter);
2075                 }
2076                 adapter->int_mode = E1000E_INT_MODE_MSI;
2077                 /* Fall through */
2078         case E1000E_INT_MODE_MSI:
2079                 if (!pci_enable_msi(adapter->pdev)) {
2080                         adapter->flags |= FLAG_MSI_ENABLED;
2081                 } else {
2082                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2083                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2084                 }
2085                 /* Fall through */
2086         case E1000E_INT_MODE_LEGACY:
2087                 /* Don't do anything; this is the system default */
2088                 break;
2089         }
2090
2091         /* store the number of vectors being used */
2092         adapter->num_vectors = 1;
2093 }
2094
2095 /**
2096  * e1000_request_msix - Initialize MSI-X interrupts
2097  *
2098  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2099  * kernel.
2100  **/
2101 static int e1000_request_msix(struct e1000_adapter *adapter)
2102 {
2103         struct net_device *netdev = adapter->netdev;
2104         int err = 0, vector = 0;
2105
2106         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2107                 snprintf(adapter->rx_ring->name,
2108                          sizeof(adapter->rx_ring->name) - 1,
2109                          "%.14s-rx-0", netdev->name);
2110         else
2111                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2112         err = request_irq(adapter->msix_entries[vector].vector,
2113                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2114                           netdev);
2115         if (err)
2116                 return err;
2117         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2118             E1000_EITR_82574(vector);
2119         adapter->rx_ring->itr_val = adapter->itr;
2120         vector++;
2121
2122         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2123                 snprintf(adapter->tx_ring->name,
2124                          sizeof(adapter->tx_ring->name) - 1,
2125                          "%.14s-tx-0", netdev->name);
2126         else
2127                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2128         err = request_irq(adapter->msix_entries[vector].vector,
2129                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2130                           netdev);
2131         if (err)
2132                 return err;
2133         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2134             E1000_EITR_82574(vector);
2135         adapter->tx_ring->itr_val = adapter->itr;
2136         vector++;
2137
2138         err = request_irq(adapter->msix_entries[vector].vector,
2139                           e1000_msix_other, 0, netdev->name, netdev);
2140         if (err)
2141                 return err;
2142
2143         e1000_configure_msix(adapter);
2144
2145         return 0;
2146 }
2147
2148 /**
2149  * e1000_request_irq - initialize interrupts
2150  *
2151  * Attempts to configure interrupts using the best available
2152  * capabilities of the hardware and kernel.
2153  **/
2154 static int e1000_request_irq(struct e1000_adapter *adapter)
2155 {
2156         struct net_device *netdev = adapter->netdev;
2157         int err;
2158
2159         if (adapter->msix_entries) {
2160                 err = e1000_request_msix(adapter);
2161                 if (!err)
2162                         return err;
2163                 /* fall back to MSI */
2164                 e1000e_reset_interrupt_capability(adapter);
2165                 adapter->int_mode = E1000E_INT_MODE_MSI;
2166                 e1000e_set_interrupt_capability(adapter);
2167         }
2168         if (adapter->flags & FLAG_MSI_ENABLED) {
2169                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2170                                   netdev->name, netdev);
2171                 if (!err)
2172                         return err;
2173
2174                 /* fall back to legacy interrupt */
2175                 e1000e_reset_interrupt_capability(adapter);
2176                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2177         }
2178
2179         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2180                           netdev->name, netdev);
2181         if (err)
2182                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2183
2184         return err;
2185 }
2186
2187 static void e1000_free_irq(struct e1000_adapter *adapter)
2188 {
2189         struct net_device *netdev = adapter->netdev;
2190
2191         if (adapter->msix_entries) {
2192                 int vector = 0;
2193
2194                 free_irq(adapter->msix_entries[vector].vector, netdev);
2195                 vector++;
2196
2197                 free_irq(adapter->msix_entries[vector].vector, netdev);
2198                 vector++;
2199
2200                 /* Other Causes interrupt vector */
2201                 free_irq(adapter->msix_entries[vector].vector, netdev);
2202                 return;
2203         }
2204
2205         free_irq(adapter->pdev->irq, netdev);
2206 }
2207
2208 /**
2209  * e1000_irq_disable - Mask off interrupt generation on the NIC
2210  **/
2211 static void e1000_irq_disable(struct e1000_adapter *adapter)
2212 {
2213         struct e1000_hw *hw = &adapter->hw;
2214
2215         ew32(IMC, ~0);
2216         if (adapter->msix_entries)
2217                 ew32(EIAC_82574, 0);
2218         e1e_flush();
2219
2220         if (adapter->msix_entries) {
2221                 int i;
2222
2223                 for (i = 0; i < adapter->num_vectors; i++)
2224                         synchronize_irq(adapter->msix_entries[i].vector);
2225         } else {
2226                 synchronize_irq(adapter->pdev->irq);
2227         }
2228 }
2229
2230 /**
2231  * e1000_irq_enable - Enable default interrupt generation settings
2232  **/
2233 static void e1000_irq_enable(struct e1000_adapter *adapter)
2234 {
2235         struct e1000_hw *hw = &adapter->hw;
2236
2237         if (adapter->msix_entries) {
2238                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2239                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2240                      IMS_OTHER_MASK);
2241         } else if (hw->mac.type >= e1000_pch_lpt) {
2242                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2243         } else {
2244                 ew32(IMS, IMS_ENABLE_MASK);
2245         }
2246         e1e_flush();
2247 }
2248
2249 /**
2250  * e1000e_get_hw_control - get control of the h/w from f/w
2251  * @adapter: address of board private structure
2252  *
2253  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2254  * For ASF and Pass Through versions of f/w this means that
2255  * the driver is loaded. For AMT version (only with 82573)
2256  * of the f/w this means that the network i/f is open.
2257  **/
2258 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2259 {
2260         struct e1000_hw *hw = &adapter->hw;
2261         u32 ctrl_ext;
2262         u32 swsm;
2263
2264         /* Let firmware know the driver has taken over */
2265         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2266                 swsm = er32(SWSM);
2267                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2268         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2269                 ctrl_ext = er32(CTRL_EXT);
2270                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2271         }
2272 }
2273
2274 /**
2275  * e1000e_release_hw_control - release control of the h/w to f/w
2276  * @adapter: address of board private structure
2277  *
2278  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2279  * For ASF and Pass Through versions of f/w this means that the
2280  * driver is no longer loaded. For AMT version (only with 82573) i
2281  * of the f/w this means that the network i/f is closed.
2282  *
2283  **/
2284 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2285 {
2286         struct e1000_hw *hw = &adapter->hw;
2287         u32 ctrl_ext;
2288         u32 swsm;
2289
2290         /* Let firmware taken over control of h/w */
2291         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2292                 swsm = er32(SWSM);
2293                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2294         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2295                 ctrl_ext = er32(CTRL_EXT);
2296                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2297         }
2298 }
2299
2300 /**
2301  * e1000_alloc_ring_dma - allocate memory for a ring structure
2302  **/
2303 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2304                                 struct e1000_ring *ring)
2305 {
2306         struct pci_dev *pdev = adapter->pdev;
2307
2308         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2309                                         GFP_KERNEL);
2310         if (!ring->desc)
2311                 return -ENOMEM;
2312
2313         return 0;
2314 }
2315
2316 /**
2317  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2318  * @tx_ring: Tx descriptor ring
2319  *
2320  * Return 0 on success, negative on failure
2321  **/
2322 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2323 {
2324         struct e1000_adapter *adapter = tx_ring->adapter;
2325         int err = -ENOMEM, size;
2326
2327         size = sizeof(struct e1000_buffer) * tx_ring->count;
2328         tx_ring->buffer_info = vzalloc(size);
2329         if (!tx_ring->buffer_info)
2330                 goto err;
2331
2332         /* round up to nearest 4K */
2333         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2334         tx_ring->size = ALIGN(tx_ring->size, 4096);
2335
2336         err = e1000_alloc_ring_dma(adapter, tx_ring);
2337         if (err)
2338                 goto err;
2339
2340         tx_ring->next_to_use = 0;
2341         tx_ring->next_to_clean = 0;
2342
2343         return 0;
2344 err:
2345         vfree(tx_ring->buffer_info);
2346         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2347         return err;
2348 }
2349
2350 /**
2351  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2352  * @rx_ring: Rx descriptor ring
2353  *
2354  * Returns 0 on success, negative on failure
2355  **/
2356 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2357 {
2358         struct e1000_adapter *adapter = rx_ring->adapter;
2359         struct e1000_buffer *buffer_info;
2360         int i, size, desc_len, err = -ENOMEM;
2361
2362         size = sizeof(struct e1000_buffer) * rx_ring->count;
2363         rx_ring->buffer_info = vzalloc(size);
2364         if (!rx_ring->buffer_info)
2365                 goto err;
2366
2367         for (i = 0; i < rx_ring->count; i++) {
2368                 buffer_info = &rx_ring->buffer_info[i];
2369                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2370                                                 sizeof(struct e1000_ps_page),
2371                                                 GFP_KERNEL);
2372                 if (!buffer_info->ps_pages)
2373                         goto err_pages;
2374         }
2375
2376         desc_len = sizeof(union e1000_rx_desc_packet_split);
2377
2378         /* Round up to nearest 4K */
2379         rx_ring->size = rx_ring->count * desc_len;
2380         rx_ring->size = ALIGN(rx_ring->size, 4096);
2381
2382         err = e1000_alloc_ring_dma(adapter, rx_ring);
2383         if (err)
2384                 goto err_pages;
2385
2386         rx_ring->next_to_clean = 0;
2387         rx_ring->next_to_use = 0;
2388         rx_ring->rx_skb_top = NULL;
2389
2390         return 0;
2391
2392 err_pages:
2393         for (i = 0; i < rx_ring->count; i++) {
2394                 buffer_info = &rx_ring->buffer_info[i];
2395                 kfree(buffer_info->ps_pages);
2396         }
2397 err:
2398         vfree(rx_ring->buffer_info);
2399         e_err("Unable to allocate memory for the receive descriptor ring\n");
2400         return err;
2401 }
2402
2403 /**
2404  * e1000_clean_tx_ring - Free Tx Buffers
2405  * @tx_ring: Tx descriptor ring
2406  **/
2407 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2408 {
2409         struct e1000_adapter *adapter = tx_ring->adapter;
2410         struct e1000_buffer *buffer_info;
2411         unsigned long size;
2412         unsigned int i;
2413
2414         for (i = 0; i < tx_ring->count; i++) {
2415                 buffer_info = &tx_ring->buffer_info[i];
2416                 e1000_put_txbuf(tx_ring, buffer_info, false);
2417         }
2418
2419         netdev_reset_queue(adapter->netdev);
2420         size = sizeof(struct e1000_buffer) * tx_ring->count;
2421         memset(tx_ring->buffer_info, 0, size);
2422
2423         memset(tx_ring->desc, 0, tx_ring->size);
2424
2425         tx_ring->next_to_use = 0;
2426         tx_ring->next_to_clean = 0;
2427 }
2428
2429 /**
2430  * e1000e_free_tx_resources - Free Tx Resources per Queue
2431  * @tx_ring: Tx descriptor ring
2432  *
2433  * Free all transmit software resources
2434  **/
2435 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2436 {
2437         struct e1000_adapter *adapter = tx_ring->adapter;
2438         struct pci_dev *pdev = adapter->pdev;
2439
2440         e1000_clean_tx_ring(tx_ring);
2441
2442         vfree(tx_ring->buffer_info);
2443         tx_ring->buffer_info = NULL;
2444
2445         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2446                           tx_ring->dma);
2447         tx_ring->desc = NULL;
2448 }
2449
2450 /**
2451  * e1000e_free_rx_resources - Free Rx Resources
2452  * @rx_ring: Rx descriptor ring
2453  *
2454  * Free all receive software resources
2455  **/
2456 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2457 {
2458         struct e1000_adapter *adapter = rx_ring->adapter;
2459         struct pci_dev *pdev = adapter->pdev;
2460         int i;
2461
2462         e1000_clean_rx_ring(rx_ring);
2463
2464         for (i = 0; i < rx_ring->count; i++)
2465                 kfree(rx_ring->buffer_info[i].ps_pages);
2466
2467         vfree(rx_ring->buffer_info);
2468         rx_ring->buffer_info = NULL;
2469
2470         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2471                           rx_ring->dma);
2472         rx_ring->desc = NULL;
2473 }
2474
2475 /**
2476  * e1000_update_itr - update the dynamic ITR value based on statistics
2477  * @adapter: pointer to adapter
2478  * @itr_setting: current adapter->itr
2479  * @packets: the number of packets during this measurement interval
2480  * @bytes: the number of bytes during this measurement interval
2481  *
2482  *      Stores a new ITR value based on packets and byte
2483  *      counts during the last interrupt.  The advantage of per interrupt
2484  *      computation is faster updates and more accurate ITR for the current
2485  *      traffic pattern.  Constants in this function were computed
2486  *      based on theoretical maximum wire speed and thresholds were set based
2487  *      on testing data as well as attempting to minimize response time
2488  *      while increasing bulk throughput.  This functionality is controlled
2489  *      by the InterruptThrottleRate module parameter.
2490  **/
2491 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2492 {
2493         unsigned int retval = itr_setting;
2494
2495         if (packets == 0)
2496                 return itr_setting;
2497
2498         switch (itr_setting) {
2499         case lowest_latency:
2500                 /* handle TSO and jumbo frames */
2501                 if (bytes / packets > 8000)
2502                         retval = bulk_latency;
2503                 else if ((packets < 5) && (bytes > 512))
2504                         retval = low_latency;
2505                 break;
2506         case low_latency:       /* 50 usec aka 20000 ints/s */
2507                 if (bytes > 10000) {
2508                         /* this if handles the TSO accounting */
2509                         if (bytes / packets > 8000)
2510                                 retval = bulk_latency;
2511                         else if ((packets < 10) || ((bytes / packets) > 1200))
2512                                 retval = bulk_latency;
2513                         else if ((packets > 35))
2514                                 retval = lowest_latency;
2515                 } else if (bytes / packets > 2000) {
2516                         retval = bulk_latency;
2517                 } else if (packets <= 2 && bytes < 512) {
2518                         retval = lowest_latency;
2519                 }
2520                 break;
2521         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2522                 if (bytes > 25000) {
2523                         if (packets > 35)
2524                                 retval = low_latency;
2525                 } else if (bytes < 6000) {
2526                         retval = low_latency;
2527                 }
2528                 break;
2529         }
2530
2531         return retval;
2532 }
2533
2534 static void e1000_set_itr(struct e1000_adapter *adapter)
2535 {
2536         u16 current_itr;
2537         u32 new_itr = adapter->itr;
2538
2539         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2540         if (adapter->link_speed != SPEED_1000) {
2541                 current_itr = 0;
2542                 new_itr = 4000;
2543                 goto set_itr_now;
2544         }
2545
2546         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2547                 new_itr = 0;
2548                 goto set_itr_now;
2549         }
2550
2551         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2552                                            adapter->total_tx_packets,
2553                                            adapter->total_tx_bytes);
2554         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2555         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2556                 adapter->tx_itr = low_latency;
2557
2558         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2559                                            adapter->total_rx_packets,
2560                                            adapter->total_rx_bytes);
2561         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2562         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2563                 adapter->rx_itr = low_latency;
2564
2565         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2566
2567         /* counts and packets in update_itr are dependent on these numbers */
2568         switch (current_itr) {
2569         case lowest_latency:
2570                 new_itr = 70000;
2571                 break;
2572         case low_latency:
2573                 new_itr = 20000;        /* aka hwitr = ~200 */
2574                 break;
2575         case bulk_latency:
2576                 new_itr = 4000;
2577                 break;
2578         default:
2579                 break;
2580         }
2581
2582 set_itr_now:
2583         if (new_itr != adapter->itr) {
2584                 /* this attempts to bias the interrupt rate towards Bulk
2585                  * by adding intermediate steps when interrupt rate is
2586                  * increasing
2587                  */
2588                 new_itr = new_itr > adapter->itr ?
2589                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2590                 adapter->itr = new_itr;
2591                 adapter->rx_ring->itr_val = new_itr;
2592                 if (adapter->msix_entries)
2593                         adapter->rx_ring->set_itr = 1;
2594                 else
2595                         e1000e_write_itr(adapter, new_itr);
2596         }
2597 }
2598
2599 /**
2600  * e1000e_write_itr - write the ITR value to the appropriate registers
2601  * @adapter: address of board private structure
2602  * @itr: new ITR value to program
2603  *
2604  * e1000e_write_itr determines if the adapter is in MSI-X mode
2605  * and, if so, writes the EITR registers with the ITR value.
2606  * Otherwise, it writes the ITR value into the ITR register.
2607  **/
2608 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2609 {
2610         struct e1000_hw *hw = &adapter->hw;
2611         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2612
2613         if (adapter->msix_entries) {
2614                 int vector;
2615
2616                 for (vector = 0; vector < adapter->num_vectors; vector++)
2617                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2618         } else {
2619                 ew32(ITR, new_itr);
2620         }
2621 }
2622
2623 /**
2624  * e1000_alloc_queues - Allocate memory for all rings
2625  * @adapter: board private structure to initialize
2626  **/
2627 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2628 {
2629         int size = sizeof(struct e1000_ring);
2630
2631         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2632         if (!adapter->tx_ring)
2633                 goto err;
2634         adapter->tx_ring->count = adapter->tx_ring_count;
2635         adapter->tx_ring->adapter = adapter;
2636
2637         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2638         if (!adapter->rx_ring)
2639                 goto err;
2640         adapter->rx_ring->count = adapter->rx_ring_count;
2641         adapter->rx_ring->adapter = adapter;
2642
2643         return 0;
2644 err:
2645         e_err("Unable to allocate memory for queues\n");
2646         kfree(adapter->rx_ring);
2647         kfree(adapter->tx_ring);
2648         return -ENOMEM;
2649 }
2650
2651 /**
2652  * e1000e_poll - NAPI Rx polling callback
2653  * @napi: struct associated with this polling callback
2654  * @budget: number of packets driver is allowed to process this poll
2655  **/
2656 static int e1000e_poll(struct napi_struct *napi, int budget)
2657 {
2658         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2659                                                      napi);
2660         struct e1000_hw *hw = &adapter->hw;
2661         struct net_device *poll_dev = adapter->netdev;
2662         int tx_cleaned = 1, work_done = 0;
2663
2664         adapter = netdev_priv(poll_dev);
2665
2666         if (!adapter->msix_entries ||
2667             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2668                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2669
2670         adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2671
2672         if (!tx_cleaned || work_done == budget)
2673                 return budget;
2674
2675         /* Exit the polling mode, but don't re-enable interrupts if stack might
2676          * poll us due to busy-polling
2677          */
2678         if (likely(napi_complete_done(napi, work_done))) {
2679                 if (adapter->itr_setting & 3)
2680                         e1000_set_itr(adapter);
2681                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2682                         if (adapter->msix_entries)
2683                                 ew32(IMS, adapter->rx_ring->ims_val);
2684                         else
2685                                 e1000_irq_enable(adapter);
2686                 }
2687         }
2688
2689         return work_done;
2690 }
2691
2692 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2693                                  __always_unused __be16 proto, u16 vid)
2694 {
2695         struct e1000_adapter *adapter = netdev_priv(netdev);
2696         struct e1000_hw *hw = &adapter->hw;
2697         u32 vfta, index;
2698
2699         /* don't update vlan cookie if already programmed */
2700         if ((adapter->hw.mng_cookie.status &
2701              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2702             (vid == adapter->mng_vlan_id))
2703                 return 0;
2704
2705         /* add VID to filter table */
2706         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2707                 index = (vid >> 5) & 0x7F;
2708                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2709                 vfta |= BIT((vid & 0x1F));
2710                 hw->mac.ops.write_vfta(hw, index, vfta);
2711         }
2712
2713         set_bit(vid, adapter->active_vlans);
2714
2715         return 0;
2716 }
2717
2718 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2719                                   __always_unused __be16 proto, u16 vid)
2720 {
2721         struct e1000_adapter *adapter = netdev_priv(netdev);
2722         struct e1000_hw *hw = &adapter->hw;
2723         u32 vfta, index;
2724
2725         if ((adapter->hw.mng_cookie.status &
2726              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2727             (vid == adapter->mng_vlan_id)) {
2728                 /* release control to f/w */
2729                 e1000e_release_hw_control(adapter);
2730                 return 0;
2731         }
2732
2733         /* remove VID from filter table */
2734         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2735                 index = (vid >> 5) & 0x7F;
2736                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2737                 vfta &= ~BIT((vid & 0x1F));
2738                 hw->mac.ops.write_vfta(hw, index, vfta);
2739         }
2740
2741         clear_bit(vid, adapter->active_vlans);
2742
2743         return 0;
2744 }
2745
2746 /**
2747  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2748  * @adapter: board private structure to initialize
2749  **/
2750 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2751 {
2752         struct net_device *netdev = adapter->netdev;
2753         struct e1000_hw *hw = &adapter->hw;
2754         u32 rctl;
2755
2756         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2757                 /* disable VLAN receive filtering */
2758                 rctl = er32(RCTL);
2759                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2760                 ew32(RCTL, rctl);
2761
2762                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2763                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2764                                                adapter->mng_vlan_id);
2765                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2766                 }
2767         }
2768 }
2769
2770 /**
2771  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2772  * @adapter: board private structure to initialize
2773  **/
2774 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2775 {
2776         struct e1000_hw *hw = &adapter->hw;
2777         u32 rctl;
2778
2779         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2780                 /* enable VLAN receive filtering */
2781                 rctl = er32(RCTL);
2782                 rctl |= E1000_RCTL_VFE;
2783                 rctl &= ~E1000_RCTL_CFIEN;
2784                 ew32(RCTL, rctl);
2785         }
2786 }
2787
2788 /**
2789  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2790  * @adapter: board private structure to initialize
2791  **/
2792 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2793 {
2794         struct e1000_hw *hw = &adapter->hw;
2795         u32 ctrl;
2796
2797         /* disable VLAN tag insert/strip */
2798         ctrl = er32(CTRL);
2799         ctrl &= ~E1000_CTRL_VME;
2800         ew32(CTRL, ctrl);
2801 }
2802
2803 /**
2804  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2805  * @adapter: board private structure to initialize
2806  **/
2807 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2808 {
2809         struct e1000_hw *hw = &adapter->hw;
2810         u32 ctrl;
2811
2812         /* enable VLAN tag insert/strip */
2813         ctrl = er32(CTRL);
2814         ctrl |= E1000_CTRL_VME;
2815         ew32(CTRL, ctrl);
2816 }
2817
2818 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2819 {
2820         struct net_device *netdev = adapter->netdev;
2821         u16 vid = adapter->hw.mng_cookie.vlan_id;
2822         u16 old_vid = adapter->mng_vlan_id;
2823
2824         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2825                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2826                 adapter->mng_vlan_id = vid;
2827         }
2828
2829         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2830                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2831 }
2832
2833 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2834 {
2835         u16 vid;
2836
2837         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2838
2839         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2840             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2841 }
2842
2843 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2844 {
2845         struct e1000_hw *hw = &adapter->hw;
2846         u32 manc, manc2h, mdef, i, j;
2847
2848         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2849                 return;
2850
2851         manc = er32(MANC);
2852
2853         /* enable receiving management packets to the host. this will probably
2854          * generate destination unreachable messages from the host OS, but
2855          * the packets will be handled on SMBUS
2856          */
2857         manc |= E1000_MANC_EN_MNG2HOST;
2858         manc2h = er32(MANC2H);
2859
2860         switch (hw->mac.type) {
2861         default:
2862                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2863                 break;
2864         case e1000_82574:
2865         case e1000_82583:
2866                 /* Check if IPMI pass-through decision filter already exists;
2867                  * if so, enable it.
2868                  */
2869                 for (i = 0, j = 0; i < 8; i++) {
2870                         mdef = er32(MDEF(i));
2871
2872                         /* Ignore filters with anything other than IPMI ports */
2873                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2874                                 continue;
2875
2876                         /* Enable this decision filter in MANC2H */
2877                         if (mdef)
2878                                 manc2h |= BIT(i);
2879
2880                         j |= mdef;
2881                 }
2882
2883                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2884                         break;
2885
2886                 /* Create new decision filter in an empty filter */
2887                 for (i = 0, j = 0; i < 8; i++)
2888                         if (er32(MDEF(i)) == 0) {
2889                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2890                                                E1000_MDEF_PORT_664));
2891                                 manc2h |= BIT(1);
2892                                 j++;
2893                                 break;
2894                         }
2895
2896                 if (!j)
2897                         e_warn("Unable to create IPMI pass-through filter\n");
2898                 break;
2899         }
2900
2901         ew32(MANC2H, manc2h);
2902         ew32(MANC, manc);
2903 }
2904
2905 /**
2906  * e1000_configure_tx - Configure Transmit Unit after Reset
2907  * @adapter: board private structure
2908  *
2909  * Configure the Tx unit of the MAC after a reset.
2910  **/
2911 static void e1000_configure_tx(struct e1000_adapter *adapter)
2912 {
2913         struct e1000_hw *hw = &adapter->hw;
2914         struct e1000_ring *tx_ring = adapter->tx_ring;
2915         u64 tdba;
2916         u32 tdlen, tctl, tarc;
2917
2918         /* Setup the HW Tx Head and Tail descriptor pointers */
2919         tdba = tx_ring->dma;
2920         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2921         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2922         ew32(TDBAH(0), (tdba >> 32));
2923         ew32(TDLEN(0), tdlen);
2924         ew32(TDH(0), 0);
2925         ew32(TDT(0), 0);
2926         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2927         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2928
2929         writel(0, tx_ring->head);
2930         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2931                 e1000e_update_tdt_wa(tx_ring, 0);
2932         else
2933                 writel(0, tx_ring->tail);
2934
2935         /* Set the Tx Interrupt Delay register */
2936         ew32(TIDV, adapter->tx_int_delay);
2937         /* Tx irq moderation */
2938         ew32(TADV, adapter->tx_abs_int_delay);
2939
2940         if (adapter->flags2 & FLAG2_DMA_BURST) {
2941                 u32 txdctl = er32(TXDCTL(0));
2942
2943                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2944                             E1000_TXDCTL_WTHRESH);
2945                 /* set up some performance related parameters to encourage the
2946                  * hardware to use the bus more efficiently in bursts, depends
2947                  * on the tx_int_delay to be enabled,
2948                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2949                  * hthresh = 1 ==> prefetch when one or more available
2950                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2951                  * BEWARE: this seems to work but should be considered first if
2952                  * there are Tx hangs or other Tx related bugs
2953                  */
2954                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2955                 ew32(TXDCTL(0), txdctl);
2956         }
2957         /* erratum work around: set txdctl the same for both queues */
2958         ew32(TXDCTL(1), er32(TXDCTL(0)));
2959
2960         /* Program the Transmit Control Register */
2961         tctl = er32(TCTL);
2962         tctl &= ~E1000_TCTL_CT;
2963         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2964                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2965
2966         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2967                 tarc = er32(TARC(0));
2968                 /* set the speed mode bit, we'll clear it if we're not at
2969                  * gigabit link later
2970                  */
2971 #define SPEED_MODE_BIT BIT(21)
2972                 tarc |= SPEED_MODE_BIT;
2973                 ew32(TARC(0), tarc);
2974         }
2975
2976         /* errata: program both queues to unweighted RR */
2977         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2978                 tarc = er32(TARC(0));
2979                 tarc |= 1;
2980                 ew32(TARC(0), tarc);
2981                 tarc = er32(TARC(1));
2982                 tarc |= 1;
2983                 ew32(TARC(1), tarc);
2984         }
2985
2986         /* Setup Transmit Descriptor Settings for eop descriptor */
2987         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2988
2989         /* only set IDE if we are delaying interrupts using the timers */
2990         if (adapter->tx_int_delay)
2991                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2992
2993         /* enable Report Status bit */
2994         adapter->txd_cmd |= E1000_TXD_CMD_RS;
2995
2996         ew32(TCTL, tctl);
2997
2998         hw->mac.ops.config_collision_dist(hw);
2999
3000         /* SPT and KBL Si errata workaround to avoid data corruption */
3001         if (hw->mac.type == e1000_pch_spt) {
3002                 u32 reg_val;
3003
3004                 reg_val = er32(IOSFPC);
3005                 reg_val |= E1000_RCTL_RDMTS_HEX;
3006                 ew32(IOSFPC, reg_val);
3007
3008                 reg_val = er32(TARC(0));
3009                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3010                  * Dropping the number of outstanding requests from
3011                  * 3 to 2 in order to avoid a buffer overrun.
3012                  */
3013                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3014                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3015                 ew32(TARC(0), reg_val);
3016         }
3017 }
3018
3019 /**
3020  * e1000_setup_rctl - configure the receive control registers
3021  * @adapter: Board private structure
3022  **/
3023 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3024                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3025 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3026 {
3027         struct e1000_hw *hw = &adapter->hw;
3028         u32 rctl, rfctl;
3029         u32 pages = 0;
3030
3031         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3032          * If jumbo frames not set, program related MAC/PHY registers
3033          * to h/w defaults
3034          */
3035         if (hw->mac.type >= e1000_pch2lan) {
3036                 s32 ret_val;
3037
3038                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3039                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3040                 else
3041                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3042
3043                 if (ret_val)
3044                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3045         }
3046
3047         /* Program MC offset vector base */
3048         rctl = er32(RCTL);
3049         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3050         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3051             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3052             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3053
3054         /* Do not Store bad packets */
3055         rctl &= ~E1000_RCTL_SBP;
3056
3057         /* Enable Long Packet receive */
3058         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3059                 rctl &= ~E1000_RCTL_LPE;
3060         else
3061                 rctl |= E1000_RCTL_LPE;
3062
3063         /* Some systems expect that the CRC is included in SMBUS traffic. The
3064          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3065          * host memory when this is enabled
3066          */
3067         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3068                 rctl |= E1000_RCTL_SECRC;
3069
3070         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3071         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3072                 u16 phy_data;
3073
3074                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3075                 phy_data &= 0xfff8;
3076                 phy_data |= BIT(2);
3077                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3078
3079                 e1e_rphy(hw, 22, &phy_data);
3080                 phy_data &= 0x0fff;
3081                 phy_data |= BIT(14);
3082                 e1e_wphy(hw, 0x10, 0x2823);
3083                 e1e_wphy(hw, 0x11, 0x0003);
3084                 e1e_wphy(hw, 22, phy_data);
3085         }
3086
3087         /* Setup buffer sizes */
3088         rctl &= ~E1000_RCTL_SZ_4096;
3089         rctl |= E1000_RCTL_BSEX;
3090         switch (adapter->rx_buffer_len) {
3091         case 2048:
3092         default:
3093                 rctl |= E1000_RCTL_SZ_2048;
3094                 rctl &= ~E1000_RCTL_BSEX;
3095                 break;
3096         case 4096:
3097                 rctl |= E1000_RCTL_SZ_4096;
3098                 break;
3099         case 8192:
3100                 rctl |= E1000_RCTL_SZ_8192;
3101                 break;
3102         case 16384:
3103                 rctl |= E1000_RCTL_SZ_16384;
3104                 break;
3105         }
3106
3107         /* Enable Extended Status in all Receive Descriptors */
3108         rfctl = er32(RFCTL);
3109         rfctl |= E1000_RFCTL_EXTEN;
3110         ew32(RFCTL, rfctl);
3111
3112         /* 82571 and greater support packet-split where the protocol
3113          * header is placed in skb->data and the packet data is
3114          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3115          * In the case of a non-split, skb->data is linearly filled,
3116          * followed by the page buffers.  Therefore, skb->data is
3117          * sized to hold the largest protocol header.
3118          *
3119          * allocations using alloc_page take too long for regular MTU
3120          * so only enable packet split for jumbo frames
3121          *
3122          * Using pages when the page size is greater than 16k wastes
3123          * a lot of memory, since we allocate 3 pages at all times
3124          * per packet.
3125          */
3126         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3127         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3128                 adapter->rx_ps_pages = pages;
3129         else
3130                 adapter->rx_ps_pages = 0;
3131
3132         if (adapter->rx_ps_pages) {
3133                 u32 psrctl = 0;
3134
3135                 /* Enable Packet split descriptors */
3136                 rctl |= E1000_RCTL_DTYP_PS;
3137
3138                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3139
3140                 switch (adapter->rx_ps_pages) {
3141                 case 3:
3142                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3143                         /* fall-through */
3144                 case 2:
3145                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3146                         /* fall-through */
3147                 case 1:
3148                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3149                         break;
3150                 }
3151
3152                 ew32(PSRCTL, psrctl);
3153         }
3154
3155         /* This is useful for sniffing bad packets. */
3156         if (adapter->netdev->features & NETIF_F_RXALL) {
3157                 /* UPE and MPE will be handled by normal PROMISC logic
3158                  * in e1000e_set_rx_mode
3159                  */
3160                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3161                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3162                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3163
3164                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3165                           E1000_RCTL_DPF |      /* Allow filtered pause */
3166                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3167                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3168                  * and that breaks VLANs.
3169                  */
3170         }
3171
3172         ew32(RCTL, rctl);
3173         /* just started the receive unit, no need to restart */
3174         adapter->flags &= ~FLAG_RESTART_NOW;
3175 }
3176
3177 /**
3178  * e1000_configure_rx - Configure Receive Unit after Reset
3179  * @adapter: board private structure
3180  *
3181  * Configure the Rx unit of the MAC after a reset.
3182  **/
3183 static void e1000_configure_rx(struct e1000_adapter *adapter)
3184 {
3185         struct e1000_hw *hw = &adapter->hw;
3186         struct e1000_ring *rx_ring = adapter->rx_ring;
3187         u64 rdba;
3188         u32 rdlen, rctl, rxcsum, ctrl_ext;
3189
3190         if (adapter->rx_ps_pages) {
3191                 /* this is a 32 byte descriptor */
3192                 rdlen = rx_ring->count *
3193                     sizeof(union e1000_rx_desc_packet_split);
3194                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3195                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3196         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3197                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3198                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3199                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3200         } else {
3201                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3202                 adapter->clean_rx = e1000_clean_rx_irq;
3203                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3204         }
3205
3206         /* disable receives while setting up the descriptors */
3207         rctl = er32(RCTL);
3208         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3209                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3210         e1e_flush();
3211         usleep_range(10000, 11000);
3212
3213         if (adapter->flags2 & FLAG2_DMA_BURST) {
3214                 /* set the writeback threshold (only takes effect if the RDTR
3215                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3216                  * enable prefetching of 0x20 Rx descriptors
3217                  * granularity = 01
3218                  * wthresh = 04,
3219                  * hthresh = 04,
3220                  * pthresh = 0x20
3221                  */
3222                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3223                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3224         }
3225
3226         /* set the Receive Delay Timer Register */
3227         ew32(RDTR, adapter->rx_int_delay);
3228
3229         /* irq moderation */
3230         ew32(RADV, adapter->rx_abs_int_delay);
3231         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3232                 e1000e_write_itr(adapter, adapter->itr);
3233
3234         ctrl_ext = er32(CTRL_EXT);
3235         /* Auto-Mask interrupts upon ICR access */
3236         ctrl_ext |= E1000_CTRL_EXT_IAME;
3237         ew32(IAM, 0xffffffff);
3238         ew32(CTRL_EXT, ctrl_ext);
3239         e1e_flush();
3240
3241         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3242          * the Base and Length of the Rx Descriptor Ring
3243          */
3244         rdba = rx_ring->dma;
3245         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3246         ew32(RDBAH(0), (rdba >> 32));
3247         ew32(RDLEN(0), rdlen);
3248         ew32(RDH(0), 0);
3249         ew32(RDT(0), 0);
3250         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3251         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3252
3253         writel(0, rx_ring->head);
3254         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3255                 e1000e_update_rdt_wa(rx_ring, 0);
3256         else
3257                 writel(0, rx_ring->tail);
3258
3259         /* Enable Receive Checksum Offload for TCP and UDP */
3260         rxcsum = er32(RXCSUM);
3261         if (adapter->netdev->features & NETIF_F_RXCSUM)
3262                 rxcsum |= E1000_RXCSUM_TUOFL;
3263         else
3264                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3265         ew32(RXCSUM, rxcsum);
3266
3267         /* With jumbo frames, excessive C-state transition latencies result
3268          * in dropped transactions.
3269          */
3270         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3271                 u32 lat =
3272                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3273                      adapter->max_frame_size) * 8 / 1000;
3274
3275                 if (adapter->flags & FLAG_IS_ICH) {
3276                         u32 rxdctl = er32(RXDCTL(0));
3277
3278                         ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3279                 }
3280
3281                 dev_info(&adapter->pdev->dev,
3282                          "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3283                 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3284         } else {
3285                 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3286                                                PM_QOS_DEFAULT_VALUE);
3287         }
3288
3289         /* Enable Receives */
3290         ew32(RCTL, rctl);
3291 }
3292
3293 /**
3294  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3295  * @netdev: network interface device structure
3296  *
3297  * Writes multicast address list to the MTA hash table.
3298  * Returns: -ENOMEM on failure
3299  *                0 on no addresses written
3300  *                X on writing X addresses to MTA
3301  */
3302 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3303 {
3304         struct e1000_adapter *adapter = netdev_priv(netdev);
3305         struct e1000_hw *hw = &adapter->hw;
3306         struct netdev_hw_addr *ha;
3307         u8 *mta_list;
3308         int i;
3309
3310         if (netdev_mc_empty(netdev)) {
3311                 /* nothing to program, so clear mc list */
3312                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3313                 return 0;
3314         }
3315
3316         mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3317         if (!mta_list)
3318                 return -ENOMEM;
3319
3320         /* update_mc_addr_list expects a packed array of only addresses. */
3321         i = 0;
3322         netdev_for_each_mc_addr(ha, netdev)
3323             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3324
3325         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3326         kfree(mta_list);
3327
3328         return netdev_mc_count(netdev);
3329 }
3330
3331 /**
3332  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3333  * @netdev: network interface device structure
3334  *
3335  * Writes unicast address list to the RAR table.
3336  * Returns: -ENOMEM on failure/insufficient address space
3337  *                0 on no addresses written
3338  *                X on writing X addresses to the RAR table
3339  **/
3340 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3341 {
3342         struct e1000_adapter *adapter = netdev_priv(netdev);
3343         struct e1000_hw *hw = &adapter->hw;
3344         unsigned int rar_entries;
3345         int count = 0;
3346
3347         rar_entries = hw->mac.ops.rar_get_count(hw);
3348
3349         /* save a rar entry for our hardware address */
3350         rar_entries--;
3351
3352         /* save a rar entry for the LAA workaround */
3353         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3354                 rar_entries--;
3355
3356         /* return ENOMEM indicating insufficient memory for addresses */
3357         if (netdev_uc_count(netdev) > rar_entries)
3358                 return -ENOMEM;
3359
3360         if (!netdev_uc_empty(netdev) && rar_entries) {
3361                 struct netdev_hw_addr *ha;
3362
3363                 /* write the addresses in reverse order to avoid write
3364                  * combining
3365                  */
3366                 netdev_for_each_uc_addr(ha, netdev) {
3367                         int ret_val;
3368
3369                         if (!rar_entries)
3370                                 break;
3371                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3372                         if (ret_val < 0)
3373                                 return -ENOMEM;
3374                         count++;
3375                 }
3376         }
3377
3378         /* zero out the remaining RAR entries not used above */
3379         for (; rar_entries > 0; rar_entries--) {
3380                 ew32(RAH(rar_entries), 0);
3381                 ew32(RAL(rar_entries), 0);
3382         }
3383         e1e_flush();
3384
3385         return count;
3386 }
3387
3388 /**
3389  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3390  * @netdev: network interface device structure
3391  *
3392  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3393  * address list or the network interface flags are updated.  This routine is
3394  * responsible for configuring the hardware for proper unicast, multicast,
3395  * promiscuous mode, and all-multi behavior.
3396  **/
3397 static void e1000e_set_rx_mode(struct net_device *netdev)
3398 {
3399         struct e1000_adapter *adapter = netdev_priv(netdev);
3400         struct e1000_hw *hw = &adapter->hw;
3401         u32 rctl;
3402
3403         if (pm_runtime_suspended(netdev->dev.parent))
3404                 return;
3405
3406         /* Check for Promiscuous and All Multicast modes */
3407         rctl = er32(RCTL);
3408
3409         /* clear the affected bits */
3410         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3411
3412         if (netdev->flags & IFF_PROMISC) {
3413                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3414                 /* Do not hardware filter VLANs in promisc mode */
3415                 e1000e_vlan_filter_disable(adapter);
3416         } else {
3417                 int count;
3418
3419                 if (netdev->flags & IFF_ALLMULTI) {
3420                         rctl |= E1000_RCTL_MPE;
3421                 } else {
3422                         /* Write addresses to the MTA, if the attempt fails
3423                          * then we should just turn on promiscuous mode so
3424                          * that we can at least receive multicast traffic
3425                          */
3426                         count = e1000e_write_mc_addr_list(netdev);
3427                         if (count < 0)
3428                                 rctl |= E1000_RCTL_MPE;
3429                 }
3430                 e1000e_vlan_filter_enable(adapter);
3431                 /* Write addresses to available RAR registers, if there is not
3432                  * sufficient space to store all the addresses then enable
3433                  * unicast promiscuous mode
3434                  */
3435                 count = e1000e_write_uc_addr_list(netdev);
3436                 if (count < 0)
3437                         rctl |= E1000_RCTL_UPE;
3438         }
3439
3440         ew32(RCTL, rctl);
3441
3442         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3443                 e1000e_vlan_strip_enable(adapter);
3444         else
3445                 e1000e_vlan_strip_disable(adapter);
3446 }
3447
3448 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3449 {
3450         struct e1000_hw *hw = &adapter->hw;
3451         u32 mrqc, rxcsum;
3452         u32 rss_key[10];
3453         int i;
3454
3455         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3456         for (i = 0; i < 10; i++)
3457                 ew32(RSSRK(i), rss_key[i]);
3458
3459         /* Direct all traffic to queue 0 */
3460         for (i = 0; i < 32; i++)
3461                 ew32(RETA(i), 0);
3462
3463         /* Disable raw packet checksumming so that RSS hash is placed in
3464          * descriptor on writeback.
3465          */
3466         rxcsum = er32(RXCSUM);
3467         rxcsum |= E1000_RXCSUM_PCSD;
3468
3469         ew32(RXCSUM, rxcsum);
3470
3471         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3472                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3473                 E1000_MRQC_RSS_FIELD_IPV6 |
3474                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3475                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3476
3477         ew32(MRQC, mrqc);
3478 }
3479
3480 /**
3481  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3482  * @adapter: board private structure
3483  * @timinca: pointer to returned time increment attributes
3484  *
3485  * Get attributes for incrementing the System Time Register SYSTIML/H at
3486  * the default base frequency, and set the cyclecounter shift value.
3487  **/
3488 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3489 {
3490         struct e1000_hw *hw = &adapter->hw;
3491         u32 incvalue, incperiod, shift;
3492
3493         /* Make sure clock is enabled on I217/I218/I219  before checking
3494          * the frequency
3495          */
3496         if ((hw->mac.type >= e1000_pch_lpt) &&
3497             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3498             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3499                 u32 fextnvm7 = er32(FEXTNVM7);
3500
3501                 if (!(fextnvm7 & BIT(0))) {
3502                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3503                         e1e_flush();
3504                 }
3505         }
3506
3507         switch (hw->mac.type) {
3508         case e1000_pch2lan:
3509                 /* Stable 96MHz frequency */
3510                 incperiod = INCPERIOD_96MHZ;
3511                 incvalue = INCVALUE_96MHZ;
3512                 shift = INCVALUE_SHIFT_96MHZ;
3513                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3514                 break;
3515         case e1000_pch_lpt:
3516                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3517                         /* Stable 96MHz frequency */
3518                         incperiod = INCPERIOD_96MHZ;
3519                         incvalue = INCVALUE_96MHZ;
3520                         shift = INCVALUE_SHIFT_96MHZ;
3521                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3522                 } else {
3523                         /* Stable 25MHz frequency */
3524                         incperiod = INCPERIOD_25MHZ;
3525                         incvalue = INCVALUE_25MHZ;
3526                         shift = INCVALUE_SHIFT_25MHZ;
3527                         adapter->cc.shift = shift;
3528                 }
3529                 break;
3530         case e1000_pch_spt:
3531                 /* Stable 24MHz frequency */
3532                 incperiod = INCPERIOD_24MHZ;
3533                 incvalue = INCVALUE_24MHZ;
3534                 shift = INCVALUE_SHIFT_24MHZ;
3535                 adapter->cc.shift = shift;
3536                 break;
3537         case e1000_pch_cnp:
3538         case e1000_pch_tgp:
3539         case e1000_pch_adp:
3540                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3541                         /* Stable 24MHz frequency */
3542                         incperiod = INCPERIOD_24MHZ;
3543                         incvalue = INCVALUE_24MHZ;
3544                         shift = INCVALUE_SHIFT_24MHZ;
3545                         adapter->cc.shift = shift;
3546                 } else {
3547                         /* Stable 38400KHz frequency */
3548                         incperiod = INCPERIOD_38400KHZ;
3549                         incvalue = INCVALUE_38400KHZ;
3550                         shift = INCVALUE_SHIFT_38400KHZ;
3551                         adapter->cc.shift = shift;
3552                 }
3553                 break;
3554         case e1000_82574:
3555         case e1000_82583:
3556                 /* Stable 25MHz frequency */
3557                 incperiod = INCPERIOD_25MHZ;
3558                 incvalue = INCVALUE_25MHZ;
3559                 shift = INCVALUE_SHIFT_25MHZ;
3560                 adapter->cc.shift = shift;
3561                 break;
3562         default:
3563                 return -EINVAL;
3564         }
3565
3566         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3567                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3568
3569         return 0;
3570 }
3571
3572 /**
3573  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3574  * @adapter: board private structure
3575  *
3576  * Outgoing time stamping can be enabled and disabled. Play nice and
3577  * disable it when requested, although it shouldn't cause any overhead
3578  * when no packet needs it. At most one packet in the queue may be
3579  * marked for time stamping, otherwise it would be impossible to tell
3580  * for sure to which packet the hardware time stamp belongs.
3581  *
3582  * Incoming time stamping has to be configured via the hardware filters.
3583  * Not all combinations are supported, in particular event type has to be
3584  * specified. Matching the kind of event packet is not supported, with the
3585  * exception of "all V2 events regardless of level 2 or 4".
3586  **/
3587 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3588                                   struct hwtstamp_config *config)
3589 {
3590         struct e1000_hw *hw = &adapter->hw;
3591         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3592         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3593         u32 rxmtrl = 0;
3594         u16 rxudp = 0;
3595         bool is_l4 = false;
3596         bool is_l2 = false;
3597         u32 regval;
3598
3599         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3600                 return -EINVAL;
3601
3602         /* flags reserved for future extensions - must be zero */
3603         if (config->flags)
3604                 return -EINVAL;
3605
3606         switch (config->tx_type) {
3607         case HWTSTAMP_TX_OFF:
3608                 tsync_tx_ctl = 0;
3609                 break;
3610         case HWTSTAMP_TX_ON:
3611                 break;
3612         default:
3613                 return -ERANGE;
3614         }
3615
3616         switch (config->rx_filter) {
3617         case HWTSTAMP_FILTER_NONE:
3618                 tsync_rx_ctl = 0;
3619                 break;
3620         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3621                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3622                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3623                 is_l4 = true;
3624                 break;
3625         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3626                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3627                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3628                 is_l4 = true;
3629                 break;
3630         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3631                 /* Also time stamps V2 L2 Path Delay Request/Response */
3632                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3633                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3634                 is_l2 = true;
3635                 break;
3636         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3637                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3638                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3639                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3640                 is_l2 = true;
3641                 break;
3642         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3643                 /* Hardware cannot filter just V2 L4 Sync messages;
3644                  * fall-through to V2 (both L2 and L4) Sync.
3645                  */
3646         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3647                 /* Also time stamps V2 Path Delay Request/Response. */
3648                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3649                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3650                 is_l2 = true;
3651                 is_l4 = true;
3652                 break;
3653         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3654                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3655                  * fall-through to V2 (both L2 and L4) Delay Request.
3656                  */
3657         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3658                 /* Also time stamps V2 Path Delay Request/Response. */
3659                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3660                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3661                 is_l2 = true;
3662                 is_l4 = true;
3663                 break;
3664         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3665         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3666                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3667                  * fall-through to all V2 (both L2 and L4) Events.
3668                  */
3669         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3670                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3671                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3672                 is_l2 = true;
3673                 is_l4 = true;
3674                 break;
3675         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3676                 /* For V1, the hardware can only filter Sync messages or
3677                  * Delay Request messages but not both so fall-through to
3678                  * time stamp all packets.
3679                  */
3680         case HWTSTAMP_FILTER_NTP_ALL:
3681         case HWTSTAMP_FILTER_ALL:
3682                 is_l2 = true;
3683                 is_l4 = true;
3684                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3685                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3686                 break;
3687         default:
3688                 return -ERANGE;
3689         }
3690
3691         adapter->hwtstamp_config = *config;
3692
3693         /* enable/disable Tx h/w time stamping */
3694         regval = er32(TSYNCTXCTL);
3695         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3696         regval |= tsync_tx_ctl;
3697         ew32(TSYNCTXCTL, regval);
3698         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3699             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3700                 e_err("Timesync Tx Control register not set as expected\n");
3701                 return -EAGAIN;
3702         }
3703
3704         /* enable/disable Rx h/w time stamping */
3705         regval = er32(TSYNCRXCTL);
3706         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3707         regval |= tsync_rx_ctl;
3708         ew32(TSYNCRXCTL, regval);
3709         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3710                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3711             (regval & (E1000_TSYNCRXCTL_ENABLED |
3712                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3713                 e_err("Timesync Rx Control register not set as expected\n");
3714                 return -EAGAIN;
3715         }
3716
3717         /* L2: define ethertype filter for time stamped packets */
3718         if (is_l2)
3719                 rxmtrl |= ETH_P_1588;
3720
3721         /* define which PTP packets get time stamped */
3722         ew32(RXMTRL, rxmtrl);
3723
3724         /* Filter by destination port */
3725         if (is_l4) {
3726                 rxudp = PTP_EV_PORT;
3727                 cpu_to_be16s(&rxudp);
3728         }
3729         ew32(RXUDP, rxudp);
3730
3731         e1e_flush();
3732
3733         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3734         er32(RXSTMPH);
3735         er32(TXSTMPH);
3736
3737         return 0;
3738 }
3739
3740 /**
3741  * e1000_configure - configure the hardware for Rx and Tx
3742  * @adapter: private board structure
3743  **/
3744 static void e1000_configure(struct e1000_adapter *adapter)
3745 {
3746         struct e1000_ring *rx_ring = adapter->rx_ring;
3747
3748         e1000e_set_rx_mode(adapter->netdev);
3749
3750         e1000_restore_vlan(adapter);
3751         e1000_init_manageability_pt(adapter);
3752
3753         e1000_configure_tx(adapter);
3754
3755         if (adapter->netdev->features & NETIF_F_RXHASH)
3756                 e1000e_setup_rss_hash(adapter);
3757         e1000_setup_rctl(adapter);
3758         e1000_configure_rx(adapter);
3759         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3760 }
3761
3762 /**
3763  * e1000e_power_up_phy - restore link in case the phy was powered down
3764  * @adapter: address of board private structure
3765  *
3766  * The phy may be powered down to save power and turn off link when the
3767  * driver is unloaded and wake on lan is not enabled (among others)
3768  * *** this routine MUST be followed by a call to e1000e_reset ***
3769  **/
3770 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3771 {
3772         if (adapter->hw.phy.ops.power_up)
3773                 adapter->hw.phy.ops.power_up(&adapter->hw);
3774
3775         adapter->hw.mac.ops.setup_link(&adapter->hw);
3776 }
3777
3778 /**
3779  * e1000_power_down_phy - Power down the PHY
3780  *
3781  * Power down the PHY so no link is implied when interface is down.
3782  * The PHY cannot be powered down if management or WoL is active.
3783  */
3784 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3785 {
3786         if (adapter->hw.phy.ops.power_down)
3787                 adapter->hw.phy.ops.power_down(&adapter->hw);
3788 }
3789
3790 /**
3791  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3792  *
3793  * We want to clear all pending descriptors from the TX ring.
3794  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3795  * the data of the next descriptor. We don't care about the data we are about
3796  * to reset the HW.
3797  */
3798 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3799 {
3800         struct e1000_hw *hw = &adapter->hw;
3801         struct e1000_ring *tx_ring = adapter->tx_ring;
3802         struct e1000_tx_desc *tx_desc = NULL;
3803         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3804         u16 size = 512;
3805
3806         tctl = er32(TCTL);
3807         ew32(TCTL, tctl | E1000_TCTL_EN);
3808         tdt = er32(TDT(0));
3809         BUG_ON(tdt != tx_ring->next_to_use);
3810         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3811         tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3812
3813         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3814         tx_desc->upper.data = 0;
3815         /* flush descriptors to memory before notifying the HW */
3816         wmb();
3817         tx_ring->next_to_use++;
3818         if (tx_ring->next_to_use == tx_ring->count)
3819                 tx_ring->next_to_use = 0;
3820         ew32(TDT(0), tx_ring->next_to_use);
3821         usleep_range(200, 250);
3822 }
3823
3824 /**
3825  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3826  *
3827  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3828  */
3829 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3830 {
3831         u32 rctl, rxdctl;
3832         struct e1000_hw *hw = &adapter->hw;
3833
3834         rctl = er32(RCTL);
3835         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3836         e1e_flush();
3837         usleep_range(100, 150);
3838
3839         rxdctl = er32(RXDCTL(0));
3840         /* zero the lower 14 bits (prefetch and host thresholds) */
3841         rxdctl &= 0xffffc000;
3842
3843         /* update thresholds: prefetch threshold to 31, host threshold to 1
3844          * and make sure the granularity is "descriptors" and not "cache lines"
3845          */
3846         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3847
3848         ew32(RXDCTL(0), rxdctl);
3849         /* momentarily enable the RX ring for the changes to take effect */
3850         ew32(RCTL, rctl | E1000_RCTL_EN);
3851         e1e_flush();
3852         usleep_range(100, 150);
3853         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3854 }
3855
3856 /**
3857  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3858  *
3859  * In i219, the descriptor rings must be emptied before resetting the HW
3860  * or before changing the device state to D3 during runtime (runtime PM).
3861  *
3862  * Failure to do this will cause the HW to enter a unit hang state which can
3863  * only be released by PCI reset on the device
3864  *
3865  */
3866
3867 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3868 {
3869         u16 hang_state;
3870         u32 fext_nvm11, tdlen;
3871         struct e1000_hw *hw = &adapter->hw;
3872
3873         /* First, disable MULR fix in FEXTNVM11 */
3874         fext_nvm11 = er32(FEXTNVM11);
3875         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3876         ew32(FEXTNVM11, fext_nvm11);
3877         /* do nothing if we're not in faulty state, or if the queue is empty */
3878         tdlen = er32(TDLEN(0));
3879         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3880                              &hang_state);
3881         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3882                 return;
3883         e1000_flush_tx_ring(adapter);
3884         /* recheck, maybe the fault is caused by the rx ring */
3885         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3886                              &hang_state);
3887         if (hang_state & FLUSH_DESC_REQUIRED)
3888                 e1000_flush_rx_ring(adapter);
3889 }
3890
3891 /**
3892  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3893  * @adapter: board private structure
3894  *
3895  * When the MAC is reset, all hardware bits for timesync will be reset to the
3896  * default values. This function will restore the settings last in place.
3897  * Since the clock SYSTIME registers are reset, we will simply restore the
3898  * cyclecounter to the kernel real clock time.
3899  **/
3900 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3901 {
3902         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3903         struct e1000_hw *hw = &adapter->hw;
3904         unsigned long flags;
3905         u32 timinca;
3906         s32 ret_val;
3907
3908         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3909                 return;
3910
3911         if (info->adjfreq) {
3912                 /* restore the previous ptp frequency delta */
3913                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3914         } else {
3915                 /* set the default base frequency if no adjustment possible */
3916                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3917                 if (!ret_val)
3918                         ew32(TIMINCA, timinca);
3919         }
3920
3921         if (ret_val) {
3922                 dev_warn(&adapter->pdev->dev,
3923                          "Failed to restore TIMINCA clock rate delta: %d\n",
3924                          ret_val);
3925                 return;
3926         }
3927
3928         /* reset the systim ns time counter */
3929         spin_lock_irqsave(&adapter->systim_lock, flags);
3930         timecounter_init(&adapter->tc, &adapter->cc,
3931                          ktime_to_ns(ktime_get_real()));
3932         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3933
3934         /* restore the previous hwtstamp configuration settings */
3935         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3936 }
3937
3938 /**
3939  * e1000e_reset - bring the hardware into a known good state
3940  *
3941  * This function boots the hardware and enables some settings that
3942  * require a configuration cycle of the hardware - those cannot be
3943  * set/changed during runtime. After reset the device needs to be
3944  * properly configured for Rx, Tx etc.
3945  */
3946 void e1000e_reset(struct e1000_adapter *adapter)
3947 {
3948         struct e1000_mac_info *mac = &adapter->hw.mac;
3949         struct e1000_fc_info *fc = &adapter->hw.fc;
3950         struct e1000_hw *hw = &adapter->hw;
3951         u32 tx_space, min_tx_space, min_rx_space;
3952         u32 pba = adapter->pba;
3953         u16 hwm;
3954
3955         /* reset Packet Buffer Allocation to default */
3956         ew32(PBA, pba);
3957
3958         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3959                 /* To maintain wire speed transmits, the Tx FIFO should be
3960                  * large enough to accommodate two full transmit packets,
3961                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3962                  * the Rx FIFO should be large enough to accommodate at least
3963                  * one full receive packet and is similarly rounded up and
3964                  * expressed in KB.
3965                  */
3966                 pba = er32(PBA);
3967                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3968                 tx_space = pba >> 16;
3969                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3970                 pba &= 0xffff;
3971                 /* the Tx fifo also stores 16 bytes of information about the Tx
3972                  * but don't include ethernet FCS because hardware appends it
3973                  */
3974                 min_tx_space = (adapter->max_frame_size +
3975                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3976                 min_tx_space = ALIGN(min_tx_space, 1024);
3977                 min_tx_space >>= 10;
3978                 /* software strips receive CRC, so leave room for it */
3979                 min_rx_space = adapter->max_frame_size;
3980                 min_rx_space = ALIGN(min_rx_space, 1024);
3981                 min_rx_space >>= 10;
3982
3983                 /* If current Tx allocation is less than the min Tx FIFO size,
3984                  * and the min Tx FIFO size is less than the current Rx FIFO
3985                  * allocation, take space away from current Rx allocation
3986                  */
3987                 if ((tx_space < min_tx_space) &&
3988                     ((min_tx_space - tx_space) < pba)) {
3989                         pba -= min_tx_space - tx_space;
3990
3991                         /* if short on Rx space, Rx wins and must trump Tx
3992                          * adjustment
3993                          */
3994                         if (pba < min_rx_space)
3995                                 pba = min_rx_space;
3996                 }
3997
3998                 ew32(PBA, pba);
3999         }
4000
4001         /* flow control settings
4002          *
4003          * The high water mark must be low enough to fit one full frame
4004          * (or the size used for early receive) above it in the Rx FIFO.
4005          * Set it to the lower of:
4006          * - 90% of the Rx FIFO size, and
4007          * - the full Rx FIFO size minus one full frame
4008          */
4009         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4010                 fc->pause_time = 0xFFFF;
4011         else
4012                 fc->pause_time = E1000_FC_PAUSE_TIME;
4013         fc->send_xon = true;
4014         fc->current_mode = fc->requested_mode;
4015
4016         switch (hw->mac.type) {
4017         case e1000_ich9lan:
4018         case e1000_ich10lan:
4019                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4020                         pba = 14;
4021                         ew32(PBA, pba);
4022                         fc->high_water = 0x2800;
4023                         fc->low_water = fc->high_water - 8;
4024                         break;
4025                 }
4026                 /* fall-through */
4027         default:
4028                 hwm = min(((pba << 10) * 9 / 10),
4029                           ((pba << 10) - adapter->max_frame_size));
4030
4031                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4032                 fc->low_water = fc->high_water - 8;
4033                 break;
4034         case e1000_pchlan:
4035                 /* Workaround PCH LOM adapter hangs with certain network
4036                  * loads.  If hangs persist, try disabling Tx flow control.
4037                  */
4038                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4039                         fc->high_water = 0x3500;
4040                         fc->low_water = 0x1500;
4041                 } else {
4042                         fc->high_water = 0x5000;
4043                         fc->low_water = 0x3000;
4044                 }
4045                 fc->refresh_time = 0x1000;
4046                 break;
4047         case e1000_pch2lan:
4048         case e1000_pch_lpt:
4049         case e1000_pch_spt:
4050         case e1000_pch_cnp:
4051                 /* fall-through */
4052         case e1000_pch_tgp:
4053         case e1000_pch_adp:
4054                 fc->refresh_time = 0xFFFF;
4055                 fc->pause_time = 0xFFFF;
4056
4057                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4058                         fc->high_water = 0x05C20;
4059                         fc->low_water = 0x05048;
4060                         break;
4061                 }
4062
4063                 pba = 14;
4064                 ew32(PBA, pba);
4065                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4066                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4067                 break;
4068         }
4069
4070         /* Alignment of Tx data is on an arbitrary byte boundary with the
4071          * maximum size per Tx descriptor limited only to the transmit
4072          * allocation of the packet buffer minus 96 bytes with an upper
4073          * limit of 24KB due to receive synchronization limitations.
4074          */
4075         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4076                                        24 << 10);
4077
4078         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4079          * fit in receive buffer.
4080          */
4081         if (adapter->itr_setting & 0x3) {
4082                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4083                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4084                                 dev_info(&adapter->pdev->dev,
4085                                          "Interrupt Throttle Rate off\n");
4086                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4087                                 e1000e_write_itr(adapter, 0);
4088                         }
4089                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4090                         dev_info(&adapter->pdev->dev,
4091                                  "Interrupt Throttle Rate on\n");
4092                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4093                         adapter->itr = 20000;
4094                         e1000e_write_itr(adapter, adapter->itr);
4095                 }
4096         }
4097
4098         if (hw->mac.type >= e1000_pch_spt)
4099                 e1000_flush_desc_rings(adapter);
4100         /* Allow time for pending master requests to run */
4101         mac->ops.reset_hw(hw);
4102
4103         /* For parts with AMT enabled, let the firmware know
4104          * that the network interface is in control
4105          */
4106         if (adapter->flags & FLAG_HAS_AMT)
4107                 e1000e_get_hw_control(adapter);
4108
4109         ew32(WUC, 0);
4110
4111         if (mac->ops.init_hw(hw))
4112                 e_err("Hardware Error\n");
4113
4114         e1000_update_mng_vlan(adapter);
4115
4116         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4117         ew32(VET, ETH_P_8021Q);
4118
4119         e1000e_reset_adaptive(hw);
4120
4121         /* restore systim and hwtstamp settings */
4122         e1000e_systim_reset(adapter);
4123
4124         /* Set EEE advertisement as appropriate */
4125         if (adapter->flags2 & FLAG2_HAS_EEE) {
4126                 s32 ret_val;
4127                 u16 adv_addr;
4128
4129                 switch (hw->phy.type) {
4130                 case e1000_phy_82579:
4131                         adv_addr = I82579_EEE_ADVERTISEMENT;
4132                         break;
4133                 case e1000_phy_i217:
4134                         adv_addr = I217_EEE_ADVERTISEMENT;
4135                         break;
4136                 default:
4137                         dev_err(&adapter->pdev->dev,
4138                                 "Invalid PHY type setting EEE advertisement\n");
4139                         return;
4140                 }
4141
4142                 ret_val = hw->phy.ops.acquire(hw);
4143                 if (ret_val) {
4144                         dev_err(&adapter->pdev->dev,
4145                                 "EEE advertisement - unable to acquire PHY\n");
4146                         return;
4147                 }
4148
4149                 e1000_write_emi_reg_locked(hw, adv_addr,
4150                                            hw->dev_spec.ich8lan.eee_disable ?
4151                                            0 : adapter->eee_advert);
4152
4153                 hw->phy.ops.release(hw);
4154         }
4155
4156         if (!netif_running(adapter->netdev) &&
4157             !test_bit(__E1000_TESTING, &adapter->state))
4158                 e1000_power_down_phy(adapter);
4159
4160         e1000_get_phy_info(hw);
4161
4162         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4163             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4164                 u16 phy_data = 0;
4165                 /* speed up time to link by disabling smart power down, ignore
4166                  * the return value of this function because there is nothing
4167                  * different we would do if it failed
4168                  */
4169                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4170                 phy_data &= ~IGP02E1000_PM_SPD;
4171                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4172         }
4173         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4174                 u32 reg;
4175
4176                 /* Fextnvm7 @ 0xe4[2] = 1 */
4177                 reg = er32(FEXTNVM7);
4178                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4179                 ew32(FEXTNVM7, reg);
4180                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4181                 reg = er32(FEXTNVM9);
4182                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4183                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4184                 ew32(FEXTNVM9, reg);
4185         }
4186
4187 }
4188
4189 /**
4190  * e1000e_trigger_lsc - trigger an LSC interrupt
4191  * @adapter:
4192  *
4193  * Fire a link status change interrupt to start the watchdog.
4194  **/
4195 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4196 {
4197         struct e1000_hw *hw = &adapter->hw;
4198
4199         if (adapter->msix_entries)
4200                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4201         else
4202                 ew32(ICS, E1000_ICS_LSC);
4203 }
4204
4205 void e1000e_up(struct e1000_adapter *adapter)
4206 {
4207         /* hardware has been reset, we need to reload some things */
4208         e1000_configure(adapter);
4209
4210         clear_bit(__E1000_DOWN, &adapter->state);
4211
4212         if (adapter->msix_entries)
4213                 e1000_configure_msix(adapter);
4214         e1000_irq_enable(adapter);
4215
4216         /* Tx queue started by watchdog timer when link is up */
4217
4218         e1000e_trigger_lsc(adapter);
4219 }
4220
4221 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4222 {
4223         struct e1000_hw *hw = &adapter->hw;
4224
4225         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4226                 return;
4227
4228         /* flush pending descriptor writebacks to memory */
4229         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4230         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4231
4232         /* execute the writes immediately */
4233         e1e_flush();
4234
4235         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4236          * write is successful
4237          */
4238         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4239         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4240
4241         /* execute the writes immediately */
4242         e1e_flush();
4243 }
4244
4245 static void e1000e_update_stats(struct e1000_adapter *adapter);
4246
4247 /**
4248  * e1000e_down - quiesce the device and optionally reset the hardware
4249  * @adapter: board private structure
4250  * @reset: boolean flag to reset the hardware or not
4251  */
4252 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4253 {
4254         struct net_device *netdev = adapter->netdev;
4255         struct e1000_hw *hw = &adapter->hw;
4256         u32 tctl, rctl;
4257
4258         /* signal that we're down so the interrupt handler does not
4259          * reschedule our watchdog timer
4260          */
4261         set_bit(__E1000_DOWN, &adapter->state);
4262
4263         netif_carrier_off(netdev);
4264
4265         /* disable receives in the hardware */
4266         rctl = er32(RCTL);
4267         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4268                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4269         /* flush and sleep below */
4270
4271         netif_stop_queue(netdev);
4272
4273         /* disable transmits in the hardware */
4274         tctl = er32(TCTL);
4275         tctl &= ~E1000_TCTL_EN;
4276         ew32(TCTL, tctl);
4277
4278         /* flush both disables and wait for them to finish */
4279         e1e_flush();
4280         usleep_range(10000, 11000);
4281
4282         e1000_irq_disable(adapter);
4283
4284         napi_synchronize(&adapter->napi);
4285
4286         del_timer_sync(&adapter->watchdog_timer);
4287         del_timer_sync(&adapter->phy_info_timer);
4288
4289         spin_lock(&adapter->stats64_lock);
4290         e1000e_update_stats(adapter);
4291         spin_unlock(&adapter->stats64_lock);
4292
4293         e1000e_flush_descriptors(adapter);
4294
4295         adapter->link_speed = 0;
4296         adapter->link_duplex = 0;
4297
4298         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4299         if ((hw->mac.type >= e1000_pch2lan) &&
4300             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4301             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4302                 e_dbg("failed to disable jumbo frame workaround mode\n");
4303
4304         if (!pci_channel_offline(adapter->pdev)) {
4305                 if (reset)
4306                         e1000e_reset(adapter);
4307                 else if (hw->mac.type >= e1000_pch_spt)
4308                         e1000_flush_desc_rings(adapter);
4309         }
4310         e1000_clean_tx_ring(adapter->tx_ring);
4311         e1000_clean_rx_ring(adapter->rx_ring);
4312 }
4313
4314 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4315 {
4316         might_sleep();
4317         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4318                 usleep_range(1000, 1100);
4319         e1000e_down(adapter, true);
4320         e1000e_up(adapter);
4321         clear_bit(__E1000_RESETTING, &adapter->state);
4322 }
4323
4324 /**
4325  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4326  * @hw: pointer to the HW structure
4327  * @systim: PHC time value read, sanitized and returned
4328  * @sts: structure to hold system time before and after reading SYSTIML,
4329  * may be NULL
4330  *
4331  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4332  * check to see that the time is incrementing at a reasonable
4333  * rate and is a multiple of incvalue.
4334  **/
4335 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4336                                   struct ptp_system_timestamp *sts)
4337 {
4338         u64 time_delta, rem, temp;
4339         u64 systim_next;
4340         u32 incvalue;
4341         int i;
4342
4343         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4344         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4345                 /* latch SYSTIMH on read of SYSTIML */
4346                 ptp_read_system_prets(sts);
4347                 systim_next = (u64)er32(SYSTIML);
4348                 ptp_read_system_postts(sts);
4349                 systim_next |= (u64)er32(SYSTIMH) << 32;
4350
4351                 time_delta = systim_next - systim;
4352                 temp = time_delta;
4353                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4354                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4355
4356                 systim = systim_next;
4357
4358                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4359                         break;
4360         }
4361
4362         return systim;
4363 }
4364
4365 /**
4366  * e1000e_read_systim - read SYSTIM register
4367  * @adapter: board private structure
4368  * @sts: structure which will contain system time before and after reading
4369  * SYSTIML, may be NULL
4370  **/
4371 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4372                        struct ptp_system_timestamp *sts)
4373 {
4374         struct e1000_hw *hw = &adapter->hw;
4375         u32 systimel, systimel_2, systimeh;
4376         u64 systim;
4377         /* SYSTIMH latching upon SYSTIML read does not work well.
4378          * This means that if SYSTIML overflows after we read it but before
4379          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4380          * will experience a huge non linear increment in the systime value
4381          * to fix that we test for overflow and if true, we re-read systime.
4382          */
4383         ptp_read_system_prets(sts);
4384         systimel = er32(SYSTIML);
4385         ptp_read_system_postts(sts);
4386         systimeh = er32(SYSTIMH);
4387         /* Is systimel is so large that overflow is possible? */
4388         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4389                 ptp_read_system_prets(sts);
4390                 systimel_2 = er32(SYSTIML);
4391                 ptp_read_system_postts(sts);
4392                 if (systimel > systimel_2) {
4393                         /* There was an overflow, read again SYSTIMH, and use
4394                          * systimel_2
4395                          */
4396                         systimeh = er32(SYSTIMH);
4397                         systimel = systimel_2;
4398                 }
4399         }
4400         systim = (u64)systimel;
4401         systim |= (u64)systimeh << 32;
4402
4403         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4404                 systim = e1000e_sanitize_systim(hw, systim, sts);
4405
4406         return systim;
4407 }
4408
4409 /**
4410  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4411  * @cc: cyclecounter structure
4412  **/
4413 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4414 {
4415         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4416                                                      cc);
4417
4418         return e1000e_read_systim(adapter, NULL);
4419 }
4420
4421 /**
4422  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4423  * @adapter: board private structure to initialize
4424  *
4425  * e1000_sw_init initializes the Adapter private data structure.
4426  * Fields are initialized based on PCI device information and
4427  * OS network device settings (MTU size).
4428  **/
4429 static int e1000_sw_init(struct e1000_adapter *adapter)
4430 {
4431         struct net_device *netdev = adapter->netdev;
4432
4433         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4434         adapter->rx_ps_bsize0 = 128;
4435         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4436         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4437         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4438         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4439
4440         spin_lock_init(&adapter->stats64_lock);
4441
4442         e1000e_set_interrupt_capability(adapter);
4443
4444         if (e1000_alloc_queues(adapter))
4445                 return -ENOMEM;
4446
4447         /* Setup hardware time stamping cyclecounter */
4448         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4449                 adapter->cc.read = e1000e_cyclecounter_read;
4450                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4451                 adapter->cc.mult = 1;
4452                 /* cc.shift set in e1000e_get_base_tininca() */
4453
4454                 spin_lock_init(&adapter->systim_lock);
4455                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4456         }
4457
4458         /* Explicitly disable IRQ since the NIC can be in any state. */
4459         e1000_irq_disable(adapter);
4460
4461         set_bit(__E1000_DOWN, &adapter->state);
4462         return 0;
4463 }
4464
4465 /**
4466  * e1000_intr_msi_test - Interrupt Handler
4467  * @irq: interrupt number
4468  * @data: pointer to a network interface device structure
4469  **/
4470 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4471 {
4472         struct net_device *netdev = data;
4473         struct e1000_adapter *adapter = netdev_priv(netdev);
4474         struct e1000_hw *hw = &adapter->hw;
4475         u32 icr = er32(ICR);
4476
4477         e_dbg("icr is %08X\n", icr);
4478         if (icr & E1000_ICR_RXSEQ) {
4479                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4480                 /* Force memory writes to complete before acknowledging the
4481                  * interrupt is handled.
4482                  */
4483                 wmb();
4484         }
4485
4486         return IRQ_HANDLED;
4487 }
4488
4489 /**
4490  * e1000_test_msi_interrupt - Returns 0 for successful test
4491  * @adapter: board private struct
4492  *
4493  * code flow taken from tg3.c
4494  **/
4495 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4496 {
4497         struct net_device *netdev = adapter->netdev;
4498         struct e1000_hw *hw = &adapter->hw;
4499         int err;
4500
4501         /* poll_enable hasn't been called yet, so don't need disable */
4502         /* clear any pending events */
4503         er32(ICR);
4504
4505         /* free the real vector and request a test handler */
4506         e1000_free_irq(adapter);
4507         e1000e_reset_interrupt_capability(adapter);
4508
4509         /* Assume that the test fails, if it succeeds then the test
4510          * MSI irq handler will unset this flag
4511          */
4512         adapter->flags |= FLAG_MSI_TEST_FAILED;
4513
4514         err = pci_enable_msi(adapter->pdev);
4515         if (err)
4516                 goto msi_test_failed;
4517
4518         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4519                           netdev->name, netdev);
4520         if (err) {
4521                 pci_disable_msi(adapter->pdev);
4522                 goto msi_test_failed;
4523         }
4524
4525         /* Force memory writes to complete before enabling and firing an
4526          * interrupt.
4527          */
4528         wmb();
4529
4530         e1000_irq_enable(adapter);
4531
4532         /* fire an unusual interrupt on the test handler */
4533         ew32(ICS, E1000_ICS_RXSEQ);
4534         e1e_flush();
4535         msleep(100);
4536
4537         e1000_irq_disable(adapter);
4538
4539         rmb();                  /* read flags after interrupt has been fired */
4540
4541         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4542                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4543                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4544         } else {
4545                 e_dbg("MSI interrupt test succeeded!\n");
4546         }
4547
4548         free_irq(adapter->pdev->irq, netdev);
4549         pci_disable_msi(adapter->pdev);
4550
4551 msi_test_failed:
4552         e1000e_set_interrupt_capability(adapter);
4553         return e1000_request_irq(adapter);
4554 }
4555
4556 /**
4557  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4558  * @adapter: board private struct
4559  *
4560  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4561  **/
4562 static int e1000_test_msi(struct e1000_adapter *adapter)
4563 {
4564         int err;
4565         u16 pci_cmd;
4566
4567         if (!(adapter->flags & FLAG_MSI_ENABLED))
4568                 return 0;
4569
4570         /* disable SERR in case the MSI write causes a master abort */
4571         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4572         if (pci_cmd & PCI_COMMAND_SERR)
4573                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4574                                       pci_cmd & ~PCI_COMMAND_SERR);
4575
4576         err = e1000_test_msi_interrupt(adapter);
4577
4578         /* re-enable SERR */
4579         if (pci_cmd & PCI_COMMAND_SERR) {
4580                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4581                 pci_cmd |= PCI_COMMAND_SERR;
4582                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4583         }
4584
4585         return err;
4586 }
4587
4588 /**
4589  * e1000e_open - Called when a network interface is made active
4590  * @netdev: network interface device structure
4591  *
4592  * Returns 0 on success, negative value on failure
4593  *
4594  * The open entry point is called when a network interface is made
4595  * active by the system (IFF_UP).  At this point all resources needed
4596  * for transmit and receive operations are allocated, the interrupt
4597  * handler is registered with the OS, the watchdog timer is started,
4598  * and the stack is notified that the interface is ready.
4599  **/
4600 int e1000e_open(struct net_device *netdev)
4601 {
4602         struct e1000_adapter *adapter = netdev_priv(netdev);
4603         struct e1000_hw *hw = &adapter->hw;
4604         struct pci_dev *pdev = adapter->pdev;
4605         int err;
4606
4607         /* disallow open during test */
4608         if (test_bit(__E1000_TESTING, &adapter->state))
4609                 return -EBUSY;
4610
4611         pm_runtime_get_sync(&pdev->dev);
4612
4613         netif_carrier_off(netdev);
4614         netif_stop_queue(netdev);
4615
4616         /* allocate transmit descriptors */
4617         err = e1000e_setup_tx_resources(adapter->tx_ring);
4618         if (err)
4619                 goto err_setup_tx;
4620
4621         /* allocate receive descriptors */
4622         err = e1000e_setup_rx_resources(adapter->rx_ring);
4623         if (err)
4624                 goto err_setup_rx;
4625
4626         /* If AMT is enabled, let the firmware know that the network
4627          * interface is now open and reset the part to a known state.
4628          */
4629         if (adapter->flags & FLAG_HAS_AMT) {
4630                 e1000e_get_hw_control(adapter);
4631                 e1000e_reset(adapter);
4632         }
4633
4634         e1000e_power_up_phy(adapter);
4635
4636         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4637         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4638                 e1000_update_mng_vlan(adapter);
4639
4640         /* DMA latency requirement to workaround jumbo issue */
4641         cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4642
4643         /* before we allocate an interrupt, we must be ready to handle it.
4644          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4645          * as soon as we call pci_request_irq, so we have to setup our
4646          * clean_rx handler before we do so.
4647          */
4648         e1000_configure(adapter);
4649
4650         err = e1000_request_irq(adapter);
4651         if (err)
4652                 goto err_req_irq;
4653
4654         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4655          * ignore e1000e MSI messages, which means we need to test our MSI
4656          * interrupt now
4657          */
4658         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4659                 err = e1000_test_msi(adapter);
4660                 if (err) {
4661                         e_err("Interrupt allocation failed\n");
4662                         goto err_req_irq;
4663                 }
4664         }
4665
4666         /* From here on the code is the same as e1000e_up() */
4667         clear_bit(__E1000_DOWN, &adapter->state);
4668
4669         napi_enable(&adapter->napi);
4670
4671         e1000_irq_enable(adapter);
4672
4673         adapter->tx_hang_recheck = false;
4674
4675         hw->mac.get_link_status = true;
4676         pm_runtime_put(&pdev->dev);
4677
4678         e1000e_trigger_lsc(adapter);
4679
4680         return 0;
4681
4682 err_req_irq:
4683         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4684         e1000e_release_hw_control(adapter);
4685         e1000_power_down_phy(adapter);
4686         e1000e_free_rx_resources(adapter->rx_ring);
4687 err_setup_rx:
4688         e1000e_free_tx_resources(adapter->tx_ring);
4689 err_setup_tx:
4690         e1000e_reset(adapter);
4691         pm_runtime_put_sync(&pdev->dev);
4692
4693         return err;
4694 }
4695
4696 /**
4697  * e1000e_close - Disables a network interface
4698  * @netdev: network interface device structure
4699  *
4700  * Returns 0, this is not allowed to fail
4701  *
4702  * The close entry point is called when an interface is de-activated
4703  * by the OS.  The hardware is still under the drivers control, but
4704  * needs to be disabled.  A global MAC reset is issued to stop the
4705  * hardware, and all transmit and receive resources are freed.
4706  **/
4707 int e1000e_close(struct net_device *netdev)
4708 {
4709         struct e1000_adapter *adapter = netdev_priv(netdev);
4710         struct pci_dev *pdev = adapter->pdev;
4711         int count = E1000_CHECK_RESET_COUNT;
4712
4713         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4714                 usleep_range(10000, 11000);
4715
4716         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4717
4718         pm_runtime_get_sync(&pdev->dev);
4719
4720         if (netif_device_present(netdev)) {
4721                 e1000e_down(adapter, true);
4722                 e1000_free_irq(adapter);
4723
4724                 /* Link status message must follow this format */
4725                 netdev_info(netdev, "NIC Link is Down\n");
4726         }
4727
4728         napi_disable(&adapter->napi);
4729
4730         e1000e_free_tx_resources(adapter->tx_ring);
4731         e1000e_free_rx_resources(adapter->rx_ring);
4732
4733         /* kill manageability vlan ID if supported, but not if a vlan with
4734          * the same ID is registered on the host OS (let 8021q kill it)
4735          */
4736         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4737                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4738                                        adapter->mng_vlan_id);
4739
4740         /* If AMT is enabled, let the firmware know that the network
4741          * interface is now closed
4742          */
4743         if ((adapter->flags & FLAG_HAS_AMT) &&
4744             !test_bit(__E1000_TESTING, &adapter->state))
4745                 e1000e_release_hw_control(adapter);
4746
4747         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4748
4749         pm_runtime_put_sync(&pdev->dev);
4750
4751         return 0;
4752 }
4753
4754 /**
4755  * e1000_set_mac - Change the Ethernet Address of the NIC
4756  * @netdev: network interface device structure
4757  * @p: pointer to an address structure
4758  *
4759  * Returns 0 on success, negative on failure
4760  **/
4761 static int e1000_set_mac(struct net_device *netdev, void *p)
4762 {
4763         struct e1000_adapter *adapter = netdev_priv(netdev);
4764         struct e1000_hw *hw = &adapter->hw;
4765         struct sockaddr *addr = p;
4766
4767         if (!is_valid_ether_addr(addr->sa_data))
4768                 return -EADDRNOTAVAIL;
4769
4770         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4771         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4772
4773         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4774
4775         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4776                 /* activate the work around */
4777                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4778
4779                 /* Hold a copy of the LAA in RAR[14] This is done so that
4780                  * between the time RAR[0] gets clobbered  and the time it
4781                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4782                  * of the RARs and no incoming packets directed to this port
4783                  * are dropped. Eventually the LAA will be in RAR[0] and
4784                  * RAR[14]
4785                  */
4786                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4787                                     adapter->hw.mac.rar_entry_count - 1);
4788         }
4789
4790         return 0;
4791 }
4792
4793 /**
4794  * e1000e_update_phy_task - work thread to update phy
4795  * @work: pointer to our work struct
4796  *
4797  * this worker thread exists because we must acquire a
4798  * semaphore to read the phy, which we could msleep while
4799  * waiting for it, and we can't msleep in a timer.
4800  **/
4801 static void e1000e_update_phy_task(struct work_struct *work)
4802 {
4803         struct e1000_adapter *adapter = container_of(work,
4804                                                      struct e1000_adapter,
4805                                                      update_phy_task);
4806         struct e1000_hw *hw = &adapter->hw;
4807
4808         if (test_bit(__E1000_DOWN, &adapter->state))
4809                 return;
4810
4811         e1000_get_phy_info(hw);
4812
4813         /* Enable EEE on 82579 after link up */
4814         if (hw->phy.type >= e1000_phy_82579)
4815                 e1000_set_eee_pchlan(hw);
4816 }
4817
4818 /**
4819  * e1000_update_phy_info - timre call-back to update PHY info
4820  * @data: pointer to adapter cast into an unsigned long
4821  *
4822  * Need to wait a few seconds after link up to get diagnostic information from
4823  * the phy
4824  **/
4825 static void e1000_update_phy_info(struct timer_list *t)
4826 {
4827         struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4828
4829         if (test_bit(__E1000_DOWN, &adapter->state))
4830                 return;
4831
4832         schedule_work(&adapter->update_phy_task);
4833 }
4834
4835 /**
4836  * e1000e_update_phy_stats - Update the PHY statistics counters
4837  * @adapter: board private structure
4838  *
4839  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4840  **/
4841 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4842 {
4843         struct e1000_hw *hw = &adapter->hw;
4844         s32 ret_val;
4845         u16 phy_data;
4846
4847         ret_val = hw->phy.ops.acquire(hw);
4848         if (ret_val)
4849                 return;
4850
4851         /* A page set is expensive so check if already on desired page.
4852          * If not, set to the page with the PHY status registers.
4853          */
4854         hw->phy.addr = 1;
4855         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4856                                            &phy_data);
4857         if (ret_val)
4858                 goto release;
4859         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4860                 ret_val = hw->phy.ops.set_page(hw,
4861                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4862                 if (ret_val)
4863                         goto release;
4864         }
4865
4866         /* Single Collision Count */
4867         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4868         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4869         if (!ret_val)
4870                 adapter->stats.scc += phy_data;
4871
4872         /* Excessive Collision Count */
4873         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4874         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4875         if (!ret_val)
4876                 adapter->stats.ecol += phy_data;
4877
4878         /* Multiple Collision Count */
4879         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4880         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4881         if (!ret_val)
4882                 adapter->stats.mcc += phy_data;
4883
4884         /* Late Collision Count */
4885         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4886         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4887         if (!ret_val)
4888                 adapter->stats.latecol += phy_data;
4889
4890         /* Collision Count - also used for adaptive IFS */
4891         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4892         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4893         if (!ret_val)
4894                 hw->mac.collision_delta = phy_data;
4895
4896         /* Defer Count */
4897         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4898         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4899         if (!ret_val)
4900                 adapter->stats.dc += phy_data;
4901
4902         /* Transmit with no CRS */
4903         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4904         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4905         if (!ret_val)
4906                 adapter->stats.tncrs += phy_data;
4907
4908 release:
4909         hw->phy.ops.release(hw);
4910 }
4911
4912 /**
4913  * e1000e_update_stats - Update the board statistics counters
4914  * @adapter: board private structure
4915  **/
4916 static void e1000e_update_stats(struct e1000_adapter *adapter)
4917 {
4918         struct net_device *netdev = adapter->netdev;
4919         struct e1000_hw *hw = &adapter->hw;
4920         struct pci_dev *pdev = adapter->pdev;
4921
4922         /* Prevent stats update while adapter is being reset, or if the pci
4923          * connection is down.
4924          */
4925         if (adapter->link_speed == 0)
4926                 return;
4927         if (pci_channel_offline(pdev))
4928                 return;
4929
4930         adapter->stats.crcerrs += er32(CRCERRS);
4931         adapter->stats.gprc += er32(GPRC);
4932         adapter->stats.gorc += er32(GORCL);
4933         er32(GORCH);            /* Clear gorc */
4934         adapter->stats.bprc += er32(BPRC);
4935         adapter->stats.mprc += er32(MPRC);
4936         adapter->stats.roc += er32(ROC);
4937
4938         adapter->stats.mpc += er32(MPC);
4939
4940         /* Half-duplex statistics */
4941         if (adapter->link_duplex == HALF_DUPLEX) {
4942                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4943                         e1000e_update_phy_stats(adapter);
4944                 } else {
4945                         adapter->stats.scc += er32(SCC);
4946                         adapter->stats.ecol += er32(ECOL);
4947                         adapter->stats.mcc += er32(MCC);
4948                         adapter->stats.latecol += er32(LATECOL);
4949                         adapter->stats.dc += er32(DC);
4950
4951                         hw->mac.collision_delta = er32(COLC);
4952
4953                         if ((hw->mac.type != e1000_82574) &&
4954                             (hw->mac.type != e1000_82583))
4955                                 adapter->stats.tncrs += er32(TNCRS);
4956                 }
4957                 adapter->stats.colc += hw->mac.collision_delta;
4958         }
4959
4960         adapter->stats.xonrxc += er32(XONRXC);
4961         adapter->stats.xontxc += er32(XONTXC);
4962         adapter->stats.xoffrxc += er32(XOFFRXC);
4963         adapter->stats.xofftxc += er32(XOFFTXC);
4964         adapter->stats.gptc += er32(GPTC);
4965         adapter->stats.gotc += er32(GOTCL);
4966         er32(GOTCH);            /* Clear gotc */
4967         adapter->stats.rnbc += er32(RNBC);
4968         adapter->stats.ruc += er32(RUC);
4969
4970         adapter->stats.mptc += er32(MPTC);
4971         adapter->stats.bptc += er32(BPTC);
4972
4973         /* used for adaptive IFS */
4974
4975         hw->mac.tx_packet_delta = er32(TPT);
4976         adapter->stats.tpt += hw->mac.tx_packet_delta;
4977
4978         adapter->stats.algnerrc += er32(ALGNERRC);
4979         adapter->stats.rxerrc += er32(RXERRC);
4980         adapter->stats.cexterr += er32(CEXTERR);
4981         adapter->stats.tsctc += er32(TSCTC);
4982         adapter->stats.tsctfc += er32(TSCTFC);
4983
4984         /* Fill out the OS statistics structure */
4985         netdev->stats.multicast = adapter->stats.mprc;
4986         netdev->stats.collisions = adapter->stats.colc;
4987
4988         /* Rx Errors */
4989
4990         /* RLEC on some newer hardware can be incorrect so build
4991          * our own version based on RUC and ROC
4992          */
4993         netdev->stats.rx_errors = adapter->stats.rxerrc +
4994             adapter->stats.crcerrs + adapter->stats.algnerrc +
4995             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4996         netdev->stats.rx_length_errors = adapter->stats.ruc +
4997             adapter->stats.roc;
4998         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4999         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5000         netdev->stats.rx_missed_errors = adapter->stats.mpc;
5001
5002         /* Tx Errors */
5003         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5004         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5005         netdev->stats.tx_window_errors = adapter->stats.latecol;
5006         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5007
5008         /* Tx Dropped needs to be maintained elsewhere */
5009
5010         /* Management Stats */
5011         adapter->stats.mgptc += er32(MGTPTC);
5012         adapter->stats.mgprc += er32(MGTPRC);
5013         adapter->stats.mgpdc += er32(MGTPDC);
5014
5015         /* Correctable ECC Errors */
5016         if (hw->mac.type >= e1000_pch_lpt) {
5017                 u32 pbeccsts = er32(PBECCSTS);
5018
5019                 adapter->corr_errors +=
5020                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5021                 adapter->uncorr_errors +=
5022                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5023                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5024         }
5025 }
5026
5027 /**
5028  * e1000_phy_read_status - Update the PHY register status snapshot
5029  * @adapter: board private structure
5030  **/
5031 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5032 {
5033         struct e1000_hw *hw = &adapter->hw;
5034         struct e1000_phy_regs *phy = &adapter->phy_regs;
5035
5036         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5037             (er32(STATUS) & E1000_STATUS_LU) &&
5038             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5039                 int ret_val;
5040
5041                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5042                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5043                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5044                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5045                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5046                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5047                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5048                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5049                 if (ret_val)
5050                         e_warn("Error reading PHY register\n");
5051         } else {
5052                 /* Do not read PHY registers if link is not up
5053                  * Set values to typical power-on defaults
5054                  */
5055                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5056                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5057                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5058                              BMSR_ERCAP);
5059                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5060                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5061                 phy->lpa = 0;
5062                 phy->expansion = EXPANSION_ENABLENPAGE;
5063                 phy->ctrl1000 = ADVERTISE_1000FULL;
5064                 phy->stat1000 = 0;
5065                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5066         }
5067 }
5068
5069 static void e1000_print_link_info(struct e1000_adapter *adapter)
5070 {
5071         struct e1000_hw *hw = &adapter->hw;
5072         u32 ctrl = er32(CTRL);
5073
5074         /* Link status message must follow this format for user tools */
5075         netdev_info(adapter->netdev,
5076                     "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5077                     adapter->link_speed,
5078                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5079                     (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5080                     (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5081                     (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5082 }
5083
5084 static bool e1000e_has_link(struct e1000_adapter *adapter)
5085 {
5086         struct e1000_hw *hw = &adapter->hw;
5087         bool link_active = false;
5088         s32 ret_val = 0;
5089
5090         /* get_link_status is set on LSC (link status) interrupt or
5091          * Rx sequence error interrupt.  get_link_status will stay
5092          * true until the check_for_link establishes link
5093          * for copper adapters ONLY
5094          */
5095         switch (hw->phy.media_type) {
5096         case e1000_media_type_copper:
5097                 if (hw->mac.get_link_status) {
5098                         ret_val = hw->mac.ops.check_for_link(hw);
5099                         link_active = !hw->mac.get_link_status;
5100                 } else {
5101                         link_active = true;
5102                 }
5103                 break;
5104         case e1000_media_type_fiber:
5105                 ret_val = hw->mac.ops.check_for_link(hw);
5106                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5107                 break;
5108         case e1000_media_type_internal_serdes:
5109                 ret_val = hw->mac.ops.check_for_link(hw);
5110                 link_active = hw->mac.serdes_has_link;
5111                 break;
5112         default:
5113         case e1000_media_type_unknown:
5114                 break;
5115         }
5116
5117         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5118             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5119                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5120                 e_info("Gigabit has been disabled, downgrading speed\n");
5121         }
5122
5123         return link_active;
5124 }
5125
5126 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5127 {
5128         /* make sure the receive unit is started */
5129         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5130             (adapter->flags & FLAG_RESTART_NOW)) {
5131                 struct e1000_hw *hw = &adapter->hw;
5132                 u32 rctl = er32(RCTL);
5133
5134                 ew32(RCTL, rctl | E1000_RCTL_EN);
5135                 adapter->flags &= ~FLAG_RESTART_NOW;
5136         }
5137 }
5138
5139 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5140 {
5141         struct e1000_hw *hw = &adapter->hw;
5142
5143         /* With 82574 controllers, PHY needs to be checked periodically
5144          * for hung state and reset, if two calls return true
5145          */
5146         if (e1000_check_phy_82574(hw))
5147                 adapter->phy_hang_count++;
5148         else
5149                 adapter->phy_hang_count = 0;
5150
5151         if (adapter->phy_hang_count > 1) {
5152                 adapter->phy_hang_count = 0;
5153                 e_dbg("PHY appears hung - resetting\n");
5154                 schedule_work(&adapter->reset_task);
5155         }
5156 }
5157
5158 /**
5159  * e1000_watchdog - Timer Call-back
5160  * @data: pointer to adapter cast into an unsigned long
5161  **/
5162 static void e1000_watchdog(struct timer_list *t)
5163 {
5164         struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5165
5166         /* Do the rest outside of interrupt context */
5167         schedule_work(&adapter->watchdog_task);
5168
5169         /* TODO: make this use queue_delayed_work() */
5170 }
5171
5172 static void e1000_watchdog_task(struct work_struct *work)
5173 {
5174         struct e1000_adapter *adapter = container_of(work,
5175                                                      struct e1000_adapter,
5176                                                      watchdog_task);
5177         struct net_device *netdev = adapter->netdev;
5178         struct e1000_mac_info *mac = &adapter->hw.mac;
5179         struct e1000_phy_info *phy = &adapter->hw.phy;
5180         struct e1000_ring *tx_ring = adapter->tx_ring;
5181         u32 dmoff_exit_timeout = 100, tries = 0;
5182         struct e1000_hw *hw = &adapter->hw;
5183         u32 link, tctl, pcim_state;
5184
5185         if (test_bit(__E1000_DOWN, &adapter->state))
5186                 return;
5187
5188         link = e1000e_has_link(adapter);
5189         if ((netif_carrier_ok(netdev)) && link) {
5190                 /* Cancel scheduled suspend requests. */
5191                 pm_runtime_resume(netdev->dev.parent);
5192
5193                 e1000e_enable_receives(adapter);
5194                 goto link_up;
5195         }
5196
5197         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5198             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5199                 e1000_update_mng_vlan(adapter);
5200
5201         if (link) {
5202                 if (!netif_carrier_ok(netdev)) {
5203                         bool txb2b = true;
5204
5205                         /* Cancel scheduled suspend requests. */
5206                         pm_runtime_resume(netdev->dev.parent);
5207
5208                         /* Checking if MAC is in DMoff state*/
5209                         pcim_state = er32(STATUS);
5210                         while (pcim_state & E1000_STATUS_PCIM_STATE) {
5211                                 if (tries++ == dmoff_exit_timeout) {
5212                                         e_dbg("Error in exiting dmoff\n");
5213                                         break;
5214                                 }
5215                                 usleep_range(10000, 20000);
5216                                 pcim_state = er32(STATUS);
5217
5218                                 /* Checking if MAC exited DMoff state */
5219                                 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5220                                         e1000_phy_hw_reset(&adapter->hw);
5221                         }
5222
5223                         /* update snapshot of PHY registers on LSC */
5224                         e1000_phy_read_status(adapter);
5225                         mac->ops.get_link_up_info(&adapter->hw,
5226                                                   &adapter->link_speed,
5227                                                   &adapter->link_duplex);
5228                         e1000_print_link_info(adapter);
5229
5230                         /* check if SmartSpeed worked */
5231                         e1000e_check_downshift(hw);
5232                         if (phy->speed_downgraded)
5233                                 netdev_warn(netdev,
5234                                             "Link Speed was downgraded by SmartSpeed\n");
5235
5236                         /* On supported PHYs, check for duplex mismatch only
5237                          * if link has autonegotiated at 10/100 half
5238                          */
5239                         if ((hw->phy.type == e1000_phy_igp_3 ||
5240                              hw->phy.type == e1000_phy_bm) &&
5241                             hw->mac.autoneg &&
5242                             (adapter->link_speed == SPEED_10 ||
5243                              adapter->link_speed == SPEED_100) &&
5244                             (adapter->link_duplex == HALF_DUPLEX)) {
5245                                 u16 autoneg_exp;
5246
5247                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5248
5249                                 if (!(autoneg_exp & EXPANSION_NWAY))
5250                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5251                         }
5252
5253                         /* adjust timeout factor according to speed/duplex */
5254                         adapter->tx_timeout_factor = 1;
5255                         switch (adapter->link_speed) {
5256                         case SPEED_10:
5257                                 txb2b = false;
5258                                 adapter->tx_timeout_factor = 16;
5259                                 break;
5260                         case SPEED_100:
5261                                 txb2b = false;
5262                                 adapter->tx_timeout_factor = 10;
5263                                 break;
5264                         }
5265
5266                         /* workaround: re-program speed mode bit after
5267                          * link-up event
5268                          */
5269                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5270                             !txb2b) {
5271                                 u32 tarc0;
5272
5273                                 tarc0 = er32(TARC(0));
5274                                 tarc0 &= ~SPEED_MODE_BIT;
5275                                 ew32(TARC(0), tarc0);
5276                         }
5277
5278                         /* disable TSO for pcie and 10/100 speeds, to avoid
5279                          * some hardware issues
5280                          */
5281                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5282                                 switch (adapter->link_speed) {
5283                                 case SPEED_10:
5284                                 case SPEED_100:
5285                                         e_info("10/100 speed: disabling TSO\n");
5286                                         netdev->features &= ~NETIF_F_TSO;
5287                                         netdev->features &= ~NETIF_F_TSO6;
5288                                         break;
5289                                 case SPEED_1000:
5290                                         netdev->features |= NETIF_F_TSO;
5291                                         netdev->features |= NETIF_F_TSO6;
5292                                         break;
5293                                 default:
5294                                         /* oops */
5295                                         break;
5296                                 }
5297                         }
5298
5299                         /* enable transmits in the hardware, need to do this
5300                          * after setting TARC(0)
5301                          */
5302                         tctl = er32(TCTL);
5303                         tctl |= E1000_TCTL_EN;
5304                         ew32(TCTL, tctl);
5305
5306                         /* Perform any post-link-up configuration before
5307                          * reporting link up.
5308                          */
5309                         if (phy->ops.cfg_on_link_up)
5310                                 phy->ops.cfg_on_link_up(hw);
5311
5312                         netif_wake_queue(netdev);
5313                         netif_carrier_on(netdev);
5314
5315                         if (!test_bit(__E1000_DOWN, &adapter->state))
5316                                 mod_timer(&adapter->phy_info_timer,
5317                                           round_jiffies(jiffies + 2 * HZ));
5318                 }
5319         } else {
5320                 if (netif_carrier_ok(netdev)) {
5321                         adapter->link_speed = 0;
5322                         adapter->link_duplex = 0;
5323                         /* Link status message must follow this format */
5324                         netdev_info(netdev, "NIC Link is Down\n");
5325                         netif_carrier_off(netdev);
5326                         netif_stop_queue(netdev);
5327                         if (!test_bit(__E1000_DOWN, &adapter->state))
5328                                 mod_timer(&adapter->phy_info_timer,
5329                                           round_jiffies(jiffies + 2 * HZ));
5330
5331                         /* 8000ES2LAN requires a Rx packet buffer work-around
5332                          * on link down event; reset the controller to flush
5333                          * the Rx packet buffer.
5334                          */
5335                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5336                                 adapter->flags |= FLAG_RESTART_NOW;
5337                         else
5338                                 pm_schedule_suspend(netdev->dev.parent,
5339                                                     LINK_TIMEOUT);
5340                 }
5341         }
5342
5343 link_up:
5344         spin_lock(&adapter->stats64_lock);
5345         e1000e_update_stats(adapter);
5346
5347         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5348         adapter->tpt_old = adapter->stats.tpt;
5349         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5350         adapter->colc_old = adapter->stats.colc;
5351
5352         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5353         adapter->gorc_old = adapter->stats.gorc;
5354         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5355         adapter->gotc_old = adapter->stats.gotc;
5356         spin_unlock(&adapter->stats64_lock);
5357
5358         /* If the link is lost the controller stops DMA, but
5359          * if there is queued Tx work it cannot be done.  So
5360          * reset the controller to flush the Tx packet buffers.
5361          */
5362         if (!netif_carrier_ok(netdev) &&
5363             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5364                 adapter->flags |= FLAG_RESTART_NOW;
5365
5366         /* If reset is necessary, do it outside of interrupt context. */
5367         if (adapter->flags & FLAG_RESTART_NOW) {
5368                 schedule_work(&adapter->reset_task);
5369                 /* return immediately since reset is imminent */
5370                 return;
5371         }
5372
5373         e1000e_update_adaptive(&adapter->hw);
5374
5375         /* Simple mode for Interrupt Throttle Rate (ITR) */
5376         if (adapter->itr_setting == 4) {
5377                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5378                  * Total asymmetrical Tx or Rx gets ITR=8000;
5379                  * everyone else is between 2000-8000.
5380                  */
5381                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5382                 u32 dif = (adapter->gotc > adapter->gorc ?
5383                            adapter->gotc - adapter->gorc :
5384                            adapter->gorc - adapter->gotc) / 10000;
5385                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5386
5387                 e1000e_write_itr(adapter, itr);
5388         }
5389
5390         /* Cause software interrupt to ensure Rx ring is cleaned */
5391         if (adapter->msix_entries)
5392                 ew32(ICS, adapter->rx_ring->ims_val);
5393         else
5394                 ew32(ICS, E1000_ICS_RXDMT0);
5395
5396         /* flush pending descriptors to memory before detecting Tx hang */
5397         e1000e_flush_descriptors(adapter);
5398
5399         /* Force detection of hung controller every watchdog period */
5400         adapter->detect_tx_hung = true;
5401
5402         /* With 82571 controllers, LAA may be overwritten due to controller
5403          * reset from the other port. Set the appropriate LAA in RAR[0]
5404          */
5405         if (e1000e_get_laa_state_82571(hw))
5406                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5407
5408         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5409                 e1000e_check_82574_phy_workaround(adapter);
5410
5411         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5412         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5413                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5414                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5415                         er32(RXSTMPH);
5416                         adapter->rx_hwtstamp_cleared++;
5417                 } else {
5418                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5419                 }
5420         }
5421
5422         /* Reset the timer */
5423         if (!test_bit(__E1000_DOWN, &adapter->state))
5424                 mod_timer(&adapter->watchdog_timer,
5425                           round_jiffies(jiffies + 2 * HZ));
5426 }
5427
5428 #define E1000_TX_FLAGS_CSUM             0x00000001
5429 #define E1000_TX_FLAGS_VLAN             0x00000002
5430 #define E1000_TX_FLAGS_TSO              0x00000004
5431 #define E1000_TX_FLAGS_IPV4             0x00000008
5432 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5433 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5434 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5435 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5436
5437 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5438                      __be16 protocol)
5439 {
5440         struct e1000_context_desc *context_desc;
5441         struct e1000_buffer *buffer_info;
5442         unsigned int i;
5443         u32 cmd_length = 0;
5444         u16 ipcse = 0, mss;
5445         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5446         int err;
5447
5448         if (!skb_is_gso(skb))
5449                 return 0;
5450
5451         err = skb_cow_head(skb, 0);
5452         if (err < 0)
5453                 return err;
5454
5455         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5456         mss = skb_shinfo(skb)->gso_size;
5457         if (protocol == htons(ETH_P_IP)) {
5458                 struct iphdr *iph = ip_hdr(skb);
5459                 iph->tot_len = 0;
5460                 iph->check = 0;
5461                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5462                                                          0, IPPROTO_TCP, 0);
5463                 cmd_length = E1000_TXD_CMD_IP;
5464                 ipcse = skb_transport_offset(skb) - 1;
5465         } else if (skb_is_gso_v6(skb)) {
5466                 tcp_v6_gso_csum_prep(skb);
5467                 ipcse = 0;
5468         }
5469         ipcss = skb_network_offset(skb);
5470         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5471         tucss = skb_transport_offset(skb);
5472         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5473
5474         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5475                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5476
5477         i = tx_ring->next_to_use;
5478         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5479         buffer_info = &tx_ring->buffer_info[i];
5480
5481         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5482         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5483         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5484         context_desc->upper_setup.tcp_fields.tucss = tucss;
5485         context_desc->upper_setup.tcp_fields.tucso = tucso;
5486         context_desc->upper_setup.tcp_fields.tucse = 0;
5487         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5488         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5489         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5490
5491         buffer_info->time_stamp = jiffies;
5492         buffer_info->next_to_watch = i;
5493
5494         i++;
5495         if (i == tx_ring->count)
5496                 i = 0;
5497         tx_ring->next_to_use = i;
5498
5499         return 1;
5500 }
5501
5502 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5503                           __be16 protocol)
5504 {
5505         struct e1000_adapter *adapter = tx_ring->adapter;
5506         struct e1000_context_desc *context_desc;
5507         struct e1000_buffer *buffer_info;
5508         unsigned int i;
5509         u8 css;
5510         u32 cmd_len = E1000_TXD_CMD_DEXT;
5511
5512         if (skb->ip_summed != CHECKSUM_PARTIAL)
5513                 return false;
5514
5515         switch (protocol) {
5516         case cpu_to_be16(ETH_P_IP):
5517                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5518                         cmd_len |= E1000_TXD_CMD_TCP;
5519                 break;
5520         case cpu_to_be16(ETH_P_IPV6):
5521                 /* XXX not handling all IPV6 headers */
5522                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5523                         cmd_len |= E1000_TXD_CMD_TCP;
5524                 break;
5525         default:
5526                 if (unlikely(net_ratelimit()))
5527                         e_warn("checksum_partial proto=%x!\n",
5528                                be16_to_cpu(protocol));
5529                 break;
5530         }
5531
5532         css = skb_checksum_start_offset(skb);
5533
5534         i = tx_ring->next_to_use;
5535         buffer_info = &tx_ring->buffer_info[i];
5536         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5537
5538         context_desc->lower_setup.ip_config = 0;
5539         context_desc->upper_setup.tcp_fields.tucss = css;
5540         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5541         context_desc->upper_setup.tcp_fields.tucse = 0;
5542         context_desc->tcp_seg_setup.data = 0;
5543         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5544
5545         buffer_info->time_stamp = jiffies;
5546         buffer_info->next_to_watch = i;
5547
5548         i++;
5549         if (i == tx_ring->count)
5550                 i = 0;
5551         tx_ring->next_to_use = i;
5552
5553         return true;
5554 }
5555
5556 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5557                         unsigned int first, unsigned int max_per_txd,
5558                         unsigned int nr_frags)
5559 {
5560         struct e1000_adapter *adapter = tx_ring->adapter;
5561         struct pci_dev *pdev = adapter->pdev;
5562         struct e1000_buffer *buffer_info;
5563         unsigned int len = skb_headlen(skb);
5564         unsigned int offset = 0, size, count = 0, i;
5565         unsigned int f, bytecount, segs;
5566
5567         i = tx_ring->next_to_use;
5568
5569         while (len) {
5570                 buffer_info = &tx_ring->buffer_info[i];
5571                 size = min(len, max_per_txd);
5572
5573                 buffer_info->length = size;
5574                 buffer_info->time_stamp = jiffies;
5575                 buffer_info->next_to_watch = i;
5576                 buffer_info->dma = dma_map_single(&pdev->dev,
5577                                                   skb->data + offset,
5578                                                   size, DMA_TO_DEVICE);
5579                 buffer_info->mapped_as_page = false;
5580                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5581                         goto dma_error;
5582
5583                 len -= size;
5584                 offset += size;
5585                 count++;
5586
5587                 if (len) {
5588                         i++;
5589                         if (i == tx_ring->count)
5590                                 i = 0;
5591                 }
5592         }
5593
5594         for (f = 0; f < nr_frags; f++) {
5595                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5596
5597                 len = skb_frag_size(frag);
5598                 offset = 0;
5599
5600                 while (len) {
5601                         i++;
5602                         if (i == tx_ring->count)
5603                                 i = 0;
5604
5605                         buffer_info = &tx_ring->buffer_info[i];
5606                         size = min(len, max_per_txd);
5607
5608                         buffer_info->length = size;
5609                         buffer_info->time_stamp = jiffies;
5610                         buffer_info->next_to_watch = i;
5611                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5612                                                             offset, size,
5613                                                             DMA_TO_DEVICE);
5614                         buffer_info->mapped_as_page = true;
5615                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5616                                 goto dma_error;
5617
5618                         len -= size;
5619                         offset += size;
5620                         count++;
5621                 }
5622         }
5623
5624         segs = skb_shinfo(skb)->gso_segs ? : 1;
5625         /* multiply data chunks by size of headers */
5626         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5627
5628         tx_ring->buffer_info[i].skb = skb;
5629         tx_ring->buffer_info[i].segs = segs;
5630         tx_ring->buffer_info[i].bytecount = bytecount;
5631         tx_ring->buffer_info[first].next_to_watch = i;
5632
5633         return count;
5634
5635 dma_error:
5636         dev_err(&pdev->dev, "Tx DMA map failed\n");
5637         buffer_info->dma = 0;
5638         if (count)
5639                 count--;
5640
5641         while (count--) {
5642                 if (i == 0)
5643                         i += tx_ring->count;
5644                 i--;
5645                 buffer_info = &tx_ring->buffer_info[i];
5646                 e1000_put_txbuf(tx_ring, buffer_info, true);
5647         }
5648
5649         return 0;
5650 }
5651
5652 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5653 {
5654         struct e1000_adapter *adapter = tx_ring->adapter;
5655         struct e1000_tx_desc *tx_desc = NULL;
5656         struct e1000_buffer *buffer_info;
5657         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5658         unsigned int i;
5659
5660         if (tx_flags & E1000_TX_FLAGS_TSO) {
5661                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5662                     E1000_TXD_CMD_TSE;
5663                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5664
5665                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5666                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5667         }
5668
5669         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5670                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5671                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5672         }
5673
5674         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5675                 txd_lower |= E1000_TXD_CMD_VLE;
5676                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5677         }
5678
5679         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5680                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5681
5682         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5683                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5684                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5685         }
5686
5687         i = tx_ring->next_to_use;
5688
5689         do {
5690                 buffer_info = &tx_ring->buffer_info[i];
5691                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5692                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5693                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5694                                                   buffer_info->length);
5695                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5696
5697                 i++;
5698                 if (i == tx_ring->count)
5699                         i = 0;
5700         } while (--count > 0);
5701
5702         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5703
5704         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5705         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5706                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5707
5708         /* Force memory writes to complete before letting h/w
5709          * know there are new descriptors to fetch.  (Only
5710          * applicable for weak-ordered memory model archs,
5711          * such as IA-64).
5712          */
5713         wmb();
5714
5715         tx_ring->next_to_use = i;
5716 }
5717
5718 #define MINIMUM_DHCP_PACKET_SIZE 282
5719 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5720                                     struct sk_buff *skb)
5721 {
5722         struct e1000_hw *hw = &adapter->hw;
5723         u16 length, offset;
5724
5725         if (skb_vlan_tag_present(skb) &&
5726             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5727               (adapter->hw.mng_cookie.status &
5728                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5729                 return 0;
5730
5731         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5732                 return 0;
5733
5734         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5735                 return 0;
5736
5737         {
5738                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5739                 struct udphdr *udp;
5740
5741                 if (ip->protocol != IPPROTO_UDP)
5742                         return 0;
5743
5744                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5745                 if (ntohs(udp->dest) != 67)
5746                         return 0;
5747
5748                 offset = (u8 *)udp + 8 - skb->data;
5749                 length = skb->len - offset;
5750                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5751         }
5752
5753         return 0;
5754 }
5755
5756 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5757 {
5758         struct e1000_adapter *adapter = tx_ring->adapter;
5759
5760         netif_stop_queue(adapter->netdev);
5761         /* Herbert's original patch had:
5762          *  smp_mb__after_netif_stop_queue();
5763          * but since that doesn't exist yet, just open code it.
5764          */
5765         smp_mb();
5766
5767         /* We need to check again in a case another CPU has just
5768          * made room available.
5769          */
5770         if (e1000_desc_unused(tx_ring) < size)
5771                 return -EBUSY;
5772
5773         /* A reprieve! */
5774         netif_start_queue(adapter->netdev);
5775         ++adapter->restart_queue;
5776         return 0;
5777 }
5778
5779 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5780 {
5781         BUG_ON(size > tx_ring->count);
5782
5783         if (e1000_desc_unused(tx_ring) >= size)
5784                 return 0;
5785         return __e1000_maybe_stop_tx(tx_ring, size);
5786 }
5787
5788 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5789                                     struct net_device *netdev)
5790 {
5791         struct e1000_adapter *adapter = netdev_priv(netdev);
5792         struct e1000_ring *tx_ring = adapter->tx_ring;
5793         unsigned int first;
5794         unsigned int tx_flags = 0;
5795         unsigned int len = skb_headlen(skb);
5796         unsigned int nr_frags;
5797         unsigned int mss;
5798         int count = 0;
5799         int tso;
5800         unsigned int f;
5801         __be16 protocol = vlan_get_protocol(skb);
5802
5803         if (test_bit(__E1000_DOWN, &adapter->state)) {
5804                 dev_kfree_skb_any(skb);
5805                 return NETDEV_TX_OK;
5806         }
5807
5808         if (skb->len <= 0) {
5809                 dev_kfree_skb_any(skb);
5810                 return NETDEV_TX_OK;
5811         }
5812
5813         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5814          * pad skb in order to meet this minimum size requirement
5815          */
5816         if (skb_put_padto(skb, 17))
5817                 return NETDEV_TX_OK;
5818
5819         mss = skb_shinfo(skb)->gso_size;
5820         if (mss) {
5821                 u8 hdr_len;
5822
5823                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5824                  * points to just header, pull a few bytes of payload from
5825                  * frags into skb->data
5826                  */
5827                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5828                 /* we do this workaround for ES2LAN, but it is un-necessary,
5829                  * avoiding it could save a lot of cycles
5830                  */
5831                 if (skb->data_len && (hdr_len == len)) {
5832                         unsigned int pull_size;
5833
5834                         pull_size = min_t(unsigned int, 4, skb->data_len);
5835                         if (!__pskb_pull_tail(skb, pull_size)) {
5836                                 e_err("__pskb_pull_tail failed.\n");
5837                                 dev_kfree_skb_any(skb);
5838                                 return NETDEV_TX_OK;
5839                         }
5840                         len = skb_headlen(skb);
5841                 }
5842         }
5843
5844         /* reserve a descriptor for the offload context */
5845         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5846                 count++;
5847         count++;
5848
5849         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5850
5851         nr_frags = skb_shinfo(skb)->nr_frags;
5852         for (f = 0; f < nr_frags; f++)
5853                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5854                                       adapter->tx_fifo_limit);
5855
5856         if (adapter->hw.mac.tx_pkt_filtering)
5857                 e1000_transfer_dhcp_info(adapter, skb);
5858
5859         /* need: count + 2 desc gap to keep tail from touching
5860          * head, otherwise try next time
5861          */
5862         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5863                 return NETDEV_TX_BUSY;
5864
5865         if (skb_vlan_tag_present(skb)) {
5866                 tx_flags |= E1000_TX_FLAGS_VLAN;
5867                 tx_flags |= (skb_vlan_tag_get(skb) <<
5868                              E1000_TX_FLAGS_VLAN_SHIFT);
5869         }
5870
5871         first = tx_ring->next_to_use;
5872
5873         tso = e1000_tso(tx_ring, skb, protocol);
5874         if (tso < 0) {
5875                 dev_kfree_skb_any(skb);
5876                 return NETDEV_TX_OK;
5877         }
5878
5879         if (tso)
5880                 tx_flags |= E1000_TX_FLAGS_TSO;
5881         else if (e1000_tx_csum(tx_ring, skb, protocol))
5882                 tx_flags |= E1000_TX_FLAGS_CSUM;
5883
5884         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5885          * 82571 hardware supports TSO capabilities for IPv6 as well...
5886          * no longer assume, we must.
5887          */
5888         if (protocol == htons(ETH_P_IP))
5889                 tx_flags |= E1000_TX_FLAGS_IPV4;
5890
5891         if (unlikely(skb->no_fcs))
5892                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5893
5894         /* if count is 0 then mapping error has occurred */
5895         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5896                              nr_frags);
5897         if (count) {
5898                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5899                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5900                         if (!adapter->tx_hwtstamp_skb) {
5901                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5902                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5903                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5904                                 adapter->tx_hwtstamp_start = jiffies;
5905                                 schedule_work(&adapter->tx_hwtstamp_work);
5906                         } else {
5907                                 adapter->tx_hwtstamp_skipped++;
5908                         }
5909                 }
5910
5911                 skb_tx_timestamp(skb);
5912
5913                 netdev_sent_queue(netdev, skb->len);
5914                 e1000_tx_queue(tx_ring, tx_flags, count);
5915                 /* Make sure there is space in the ring for the next send. */
5916                 e1000_maybe_stop_tx(tx_ring,
5917                                     (MAX_SKB_FRAGS *
5918                                      DIV_ROUND_UP(PAGE_SIZE,
5919                                                   adapter->tx_fifo_limit) + 2));
5920
5921                 if (!netdev_xmit_more() ||
5922                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5923                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5924                                 e1000e_update_tdt_wa(tx_ring,
5925                                                      tx_ring->next_to_use);
5926                         else
5927                                 writel(tx_ring->next_to_use, tx_ring->tail);
5928                 }
5929         } else {
5930                 dev_kfree_skb_any(skb);
5931                 tx_ring->buffer_info[first].time_stamp = 0;
5932                 tx_ring->next_to_use = first;
5933         }
5934
5935         return NETDEV_TX_OK;
5936 }
5937
5938 /**
5939  * e1000_tx_timeout - Respond to a Tx Hang
5940  * @netdev: network interface device structure
5941  **/
5942 static void e1000_tx_timeout(struct net_device *netdev, unsigned int txqueue)
5943 {
5944         struct e1000_adapter *adapter = netdev_priv(netdev);
5945
5946         /* Do the reset outside of interrupt context */
5947         adapter->tx_timeout_count++;
5948         schedule_work(&adapter->reset_task);
5949 }
5950
5951 static void e1000_reset_task(struct work_struct *work)
5952 {
5953         struct e1000_adapter *adapter;
5954         adapter = container_of(work, struct e1000_adapter, reset_task);
5955
5956         /* don't run the task if already down */
5957         if (test_bit(__E1000_DOWN, &adapter->state))
5958                 return;
5959
5960         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5961                 e1000e_dump(adapter);
5962                 e_err("Reset adapter unexpectedly\n");
5963         }
5964         e1000e_reinit_locked(adapter);
5965 }
5966
5967 /**
5968  * e1000_get_stats64 - Get System Network Statistics
5969  * @netdev: network interface device structure
5970  * @stats: rtnl_link_stats64 pointer
5971  *
5972  * Returns the address of the device statistics structure.
5973  **/
5974 void e1000e_get_stats64(struct net_device *netdev,
5975                         struct rtnl_link_stats64 *stats)
5976 {
5977         struct e1000_adapter *adapter = netdev_priv(netdev);
5978
5979         spin_lock(&adapter->stats64_lock);
5980         e1000e_update_stats(adapter);
5981         /* Fill out the OS statistics structure */
5982         stats->rx_bytes = adapter->stats.gorc;
5983         stats->rx_packets = adapter->stats.gprc;
5984         stats->tx_bytes = adapter->stats.gotc;
5985         stats->tx_packets = adapter->stats.gptc;
5986         stats->multicast = adapter->stats.mprc;
5987         stats->collisions = adapter->stats.colc;
5988
5989         /* Rx Errors */
5990
5991         /* RLEC on some newer hardware can be incorrect so build
5992          * our own version based on RUC and ROC
5993          */
5994         stats->rx_errors = adapter->stats.rxerrc +
5995             adapter->stats.crcerrs + adapter->stats.algnerrc +
5996             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5997         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5998         stats->rx_crc_errors = adapter->stats.crcerrs;
5999         stats->rx_frame_errors = adapter->stats.algnerrc;
6000         stats->rx_missed_errors = adapter->stats.mpc;
6001
6002         /* Tx Errors */
6003         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6004         stats->tx_aborted_errors = adapter->stats.ecol;
6005         stats->tx_window_errors = adapter->stats.latecol;
6006         stats->tx_carrier_errors = adapter->stats.tncrs;
6007
6008         /* Tx Dropped needs to be maintained elsewhere */
6009
6010         spin_unlock(&adapter->stats64_lock);
6011 }
6012
6013 /**
6014  * e1000_change_mtu - Change the Maximum Transfer Unit
6015  * @netdev: network interface device structure
6016  * @new_mtu: new value for maximum frame size
6017  *
6018  * Returns 0 on success, negative on failure
6019  **/
6020 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6021 {
6022         struct e1000_adapter *adapter = netdev_priv(netdev);
6023         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6024
6025         /* Jumbo frame support */
6026         if ((new_mtu > ETH_DATA_LEN) &&
6027             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6028                 e_err("Jumbo Frames not supported.\n");
6029                 return -EINVAL;
6030         }
6031
6032         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6033         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6034             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6035             (new_mtu > ETH_DATA_LEN)) {
6036                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6037                 return -EINVAL;
6038         }
6039
6040         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6041                 usleep_range(1000, 1100);
6042         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6043         adapter->max_frame_size = max_frame;
6044         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6045                    netdev->mtu, new_mtu);
6046         netdev->mtu = new_mtu;
6047
6048         pm_runtime_get_sync(netdev->dev.parent);
6049
6050         if (netif_running(netdev))
6051                 e1000e_down(adapter, true);
6052
6053         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6054          * means we reserve 2 more, this pushes us to allocate from the next
6055          * larger slab size.
6056          * i.e. RXBUFFER_2048 --> size-4096 slab
6057          * However with the new *_jumbo_rx* routines, jumbo receives will use
6058          * fragmented skbs
6059          */
6060
6061         if (max_frame <= 2048)
6062                 adapter->rx_buffer_len = 2048;
6063         else
6064                 adapter->rx_buffer_len = 4096;
6065
6066         /* adjust allocation if LPE protects us, and we aren't using SBP */
6067         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6068                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6069
6070         if (netif_running(netdev))
6071                 e1000e_up(adapter);
6072         else
6073                 e1000e_reset(adapter);
6074
6075         pm_runtime_put_sync(netdev->dev.parent);
6076
6077         clear_bit(__E1000_RESETTING, &adapter->state);
6078
6079         return 0;
6080 }
6081
6082 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6083                            int cmd)
6084 {
6085         struct e1000_adapter *adapter = netdev_priv(netdev);
6086         struct mii_ioctl_data *data = if_mii(ifr);
6087
6088         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6089                 return -EOPNOTSUPP;
6090
6091         switch (cmd) {
6092         case SIOCGMIIPHY:
6093                 data->phy_id = adapter->hw.phy.addr;
6094                 break;
6095         case SIOCGMIIREG:
6096                 e1000_phy_read_status(adapter);
6097
6098                 switch (data->reg_num & 0x1F) {
6099                 case MII_BMCR:
6100                         data->val_out = adapter->phy_regs.bmcr;
6101                         break;
6102                 case MII_BMSR:
6103                         data->val_out = adapter->phy_regs.bmsr;
6104                         break;
6105                 case MII_PHYSID1:
6106                         data->val_out = (adapter->hw.phy.id >> 16);
6107                         break;
6108                 case MII_PHYSID2:
6109                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6110                         break;
6111                 case MII_ADVERTISE:
6112                         data->val_out = adapter->phy_regs.advertise;
6113                         break;
6114                 case MII_LPA:
6115                         data->val_out = adapter->phy_regs.lpa;
6116                         break;
6117                 case MII_EXPANSION:
6118                         data->val_out = adapter->phy_regs.expansion;
6119                         break;
6120                 case MII_CTRL1000:
6121                         data->val_out = adapter->phy_regs.ctrl1000;
6122                         break;
6123                 case MII_STAT1000:
6124                         data->val_out = adapter->phy_regs.stat1000;
6125                         break;
6126                 case MII_ESTATUS:
6127                         data->val_out = adapter->phy_regs.estatus;
6128                         break;
6129                 default:
6130                         return -EIO;
6131                 }
6132                 break;
6133         case SIOCSMIIREG:
6134         default:
6135                 return -EOPNOTSUPP;
6136         }
6137         return 0;
6138 }
6139
6140 /**
6141  * e1000e_hwtstamp_ioctl - control hardware time stamping
6142  * @netdev: network interface device structure
6143  * @ifreq: interface request
6144  *
6145  * Outgoing time stamping can be enabled and disabled. Play nice and
6146  * disable it when requested, although it shouldn't cause any overhead
6147  * when no packet needs it. At most one packet in the queue may be
6148  * marked for time stamping, otherwise it would be impossible to tell
6149  * for sure to which packet the hardware time stamp belongs.
6150  *
6151  * Incoming time stamping has to be configured via the hardware filters.
6152  * Not all combinations are supported, in particular event type has to be
6153  * specified. Matching the kind of event packet is not supported, with the
6154  * exception of "all V2 events regardless of level 2 or 4".
6155  **/
6156 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6157 {
6158         struct e1000_adapter *adapter = netdev_priv(netdev);
6159         struct hwtstamp_config config;
6160         int ret_val;
6161
6162         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6163                 return -EFAULT;
6164
6165         ret_val = e1000e_config_hwtstamp(adapter, &config);
6166         if (ret_val)
6167                 return ret_val;
6168
6169         switch (config.rx_filter) {
6170         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6171         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6172         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6173         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6174         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6175         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6176                 /* With V2 type filters which specify a Sync or Delay Request,
6177                  * Path Delay Request/Response messages are also time stamped
6178                  * by hardware so notify the caller the requested packets plus
6179                  * some others are time stamped.
6180                  */
6181                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6182                 break;
6183         default:
6184                 break;
6185         }
6186
6187         return copy_to_user(ifr->ifr_data, &config,
6188                             sizeof(config)) ? -EFAULT : 0;
6189 }
6190
6191 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6192 {
6193         struct e1000_adapter *adapter = netdev_priv(netdev);
6194
6195         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6196                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6197 }
6198
6199 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6200 {
6201         switch (cmd) {
6202         case SIOCGMIIPHY:
6203         case SIOCGMIIREG:
6204         case SIOCSMIIREG:
6205                 return e1000_mii_ioctl(netdev, ifr, cmd);
6206         case SIOCSHWTSTAMP:
6207                 return e1000e_hwtstamp_set(netdev, ifr);
6208         case SIOCGHWTSTAMP:
6209                 return e1000e_hwtstamp_get(netdev, ifr);
6210         default:
6211                 return -EOPNOTSUPP;
6212         }
6213 }
6214
6215 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6216 {
6217         struct e1000_hw *hw = &adapter->hw;
6218         u32 i, mac_reg, wuc;
6219         u16 phy_reg, wuc_enable;
6220         int retval;
6221
6222         /* copy MAC RARs to PHY RARs */
6223         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6224
6225         retval = hw->phy.ops.acquire(hw);
6226         if (retval) {
6227                 e_err("Could not acquire PHY\n");
6228                 return retval;
6229         }
6230
6231         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6232         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6233         if (retval)
6234                 goto release;
6235
6236         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6237         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6238                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6239                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6240                                            (u16)(mac_reg & 0xFFFF));
6241                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6242                                            (u16)((mac_reg >> 16) & 0xFFFF));
6243         }
6244
6245         /* configure PHY Rx Control register */
6246         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6247         mac_reg = er32(RCTL);
6248         if (mac_reg & E1000_RCTL_UPE)
6249                 phy_reg |= BM_RCTL_UPE;
6250         if (mac_reg & E1000_RCTL_MPE)
6251                 phy_reg |= BM_RCTL_MPE;
6252         phy_reg &= ~(BM_RCTL_MO_MASK);
6253         if (mac_reg & E1000_RCTL_MO_3)
6254                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6255                             << BM_RCTL_MO_SHIFT);
6256         if (mac_reg & E1000_RCTL_BAM)
6257                 phy_reg |= BM_RCTL_BAM;
6258         if (mac_reg & E1000_RCTL_PMCF)
6259                 phy_reg |= BM_RCTL_PMCF;
6260         mac_reg = er32(CTRL);
6261         if (mac_reg & E1000_CTRL_RFCE)
6262                 phy_reg |= BM_RCTL_RFCE;
6263         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6264
6265         wuc = E1000_WUC_PME_EN;
6266         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6267                 wuc |= E1000_WUC_APME;
6268
6269         /* enable PHY wakeup in MAC register */
6270         ew32(WUFC, wufc);
6271         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6272                    E1000_WUC_PME_STATUS | wuc));
6273
6274         /* configure and enable PHY wakeup in PHY registers */
6275         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6276         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6277
6278         /* activate PHY wakeup */
6279         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6280         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6281         if (retval)
6282                 e_err("Could not set PHY Host Wakeup bit\n");
6283 release:
6284         hw->phy.ops.release(hw);
6285
6286         return retval;
6287 }
6288
6289 static void e1000e_flush_lpic(struct pci_dev *pdev)
6290 {
6291         struct net_device *netdev = pci_get_drvdata(pdev);
6292         struct e1000_adapter *adapter = netdev_priv(netdev);
6293         struct e1000_hw *hw = &adapter->hw;
6294         u32 ret_val;
6295
6296         pm_runtime_get_sync(netdev->dev.parent);
6297
6298         ret_val = hw->phy.ops.acquire(hw);
6299         if (ret_val)
6300                 goto fl_out;
6301
6302         pr_info("EEE TX LPI TIMER: %08X\n",
6303                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6304
6305         hw->phy.ops.release(hw);
6306
6307 fl_out:
6308         pm_runtime_put_sync(netdev->dev.parent);
6309 }
6310
6311 #ifdef CONFIG_PM_SLEEP
6312 /* S0ix implementation */
6313 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6314 {
6315         struct e1000_hw *hw = &adapter->hw;
6316         u32 mac_data;
6317         u16 phy_data;
6318
6319         /* Disable the periodic inband message,
6320          * don't request PCIe clock in K1 page770_17[10:9] = 10b
6321          */
6322         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6323         phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6324         phy_data |= BIT(10);
6325         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6326
6327         /* Make sure we don't exit K1 every time a new packet arrives
6328          * 772_29[5] = 1 CS_Mode_Stay_In_K1
6329          */
6330         e1e_rphy(hw, I217_CGFREG, &phy_data);
6331         phy_data |= BIT(5);
6332         e1e_wphy(hw, I217_CGFREG, phy_data);
6333
6334         /* Change the MAC/PHY interface to SMBus
6335          * Force the SMBus in PHY page769_23[0] = 1
6336          * Force the SMBus in MAC CTRL_EXT[11] = 1
6337          */
6338         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6339         phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6340         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6341         mac_data = er32(CTRL_EXT);
6342         mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6343         ew32(CTRL_EXT, mac_data);
6344
6345         /* DFT control: PHY bit: page769_20[0] = 1
6346          * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6347          */
6348         e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6349         phy_data |= BIT(0);
6350         e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6351
6352         mac_data = er32(EXTCNF_CTRL);
6353         mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6354         ew32(EXTCNF_CTRL, mac_data);
6355
6356         /* Check MAC Tx/Rx packet buffer pointers.
6357          * Reset MAC Tx/Rx packet buffer pointers to suppress any
6358          * pending traffic indication that would prevent power gating.
6359          */
6360         mac_data = er32(TDFH);
6361         if (mac_data)
6362                 ew32(TDFH, 0);
6363         mac_data = er32(TDFT);
6364         if (mac_data)
6365                 ew32(TDFT, 0);
6366         mac_data = er32(TDFHS);
6367         if (mac_data)
6368                 ew32(TDFHS, 0);
6369         mac_data = er32(TDFTS);
6370         if (mac_data)
6371                 ew32(TDFTS, 0);
6372         mac_data = er32(TDFPC);
6373         if (mac_data)
6374                 ew32(TDFPC, 0);
6375         mac_data = er32(RDFH);
6376         if (mac_data)
6377                 ew32(RDFH, 0);
6378         mac_data = er32(RDFT);
6379         if (mac_data)
6380                 ew32(RDFT, 0);
6381         mac_data = er32(RDFHS);
6382         if (mac_data)
6383                 ew32(RDFHS, 0);
6384         mac_data = er32(RDFTS);
6385         if (mac_data)
6386                 ew32(RDFTS, 0);
6387         mac_data = er32(RDFPC);
6388         if (mac_data)
6389                 ew32(RDFPC, 0);
6390
6391         /* Enable the Dynamic Power Gating in the MAC */
6392         mac_data = er32(FEXTNVM7);
6393         mac_data |= BIT(22);
6394         ew32(FEXTNVM7, mac_data);
6395
6396         /* Disable the time synchronization clock */
6397         mac_data = er32(FEXTNVM7);
6398         mac_data |= BIT(31);
6399         mac_data &= ~BIT(0);
6400         ew32(FEXTNVM7, mac_data);
6401
6402         /* Dynamic Power Gating Enable */
6403         mac_data = er32(CTRL_EXT);
6404         mac_data |= BIT(3);
6405         ew32(CTRL_EXT, mac_data);
6406
6407         /* Enable the Dynamic Clock Gating in the DMA and MAC */
6408         mac_data = er32(CTRL_EXT);
6409         mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6410         ew32(CTRL_EXT, mac_data);
6411
6412         /* No MAC DPG gating SLP_S0 in modern standby
6413          * Switch the logic of the lanphypc to use PMC counter
6414          */
6415         mac_data = er32(FEXTNVM5);
6416         mac_data |= BIT(7);
6417         ew32(FEXTNVM5, mac_data);
6418 }
6419
6420 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6421 {
6422         struct e1000_hw *hw = &adapter->hw;
6423         u32 mac_data;
6424         u16 phy_data;
6425
6426         /* Disable the Dynamic Power Gating in the MAC */
6427         mac_data = er32(FEXTNVM7);
6428         mac_data &= 0xFFBFFFFF;
6429         ew32(FEXTNVM7, mac_data);
6430
6431         /* Enable the time synchronization clock */
6432         mac_data = er32(FEXTNVM7);
6433         mac_data |= BIT(0);
6434         ew32(FEXTNVM7, mac_data);
6435
6436         /* Disable Dynamic Power Gating */
6437         mac_data = er32(CTRL_EXT);
6438         mac_data &= 0xFFFFFFF7;
6439         ew32(CTRL_EXT, mac_data);
6440
6441         /* Disable the Dynamic Clock Gating in the DMA and MAC */
6442         mac_data = er32(CTRL_EXT);
6443         mac_data &= 0xFFF7FFFF;
6444         ew32(CTRL_EXT, mac_data);
6445
6446         /* Revert the lanphypc logic to use the internal Gbe counter
6447          * and not the PMC counter
6448          */
6449         mac_data = er32(FEXTNVM5);
6450         mac_data &= 0xFFFFFF7F;
6451         ew32(FEXTNVM5, mac_data);
6452
6453         /* Enable the periodic inband message,
6454          * Request PCIe clock in K1 page770_17[10:9] =01b
6455          */
6456         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6457         phy_data &= 0xFBFF;
6458         phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6459         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6460
6461         /* Return back configuration
6462          * 772_29[5] = 0 CS_Mode_Stay_In_K1
6463          */
6464         e1e_rphy(hw, I217_CGFREG, &phy_data);
6465         phy_data &= 0xFFDF;
6466         e1e_wphy(hw, I217_CGFREG, phy_data);
6467
6468         /* Change the MAC/PHY interface to Kumeran
6469          * Unforce the SMBus in PHY page769_23[0] = 0
6470          * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6471          */
6472         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6473         phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6474         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6475         mac_data = er32(CTRL_EXT);
6476         mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6477         ew32(CTRL_EXT, mac_data);
6478 }
6479 #endif /* CONFIG_PM_SLEEP */
6480
6481 static int e1000e_pm_freeze(struct device *dev)
6482 {
6483         struct net_device *netdev = dev_get_drvdata(dev);
6484         struct e1000_adapter *adapter = netdev_priv(netdev);
6485         bool present;
6486
6487         rtnl_lock();
6488
6489         present = netif_device_present(netdev);
6490         netif_device_detach(netdev);
6491
6492         if (present && netif_running(netdev)) {
6493                 int count = E1000_CHECK_RESET_COUNT;
6494
6495                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6496                         usleep_range(10000, 11000);
6497
6498                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6499
6500                 /* Quiesce the device without resetting the hardware */
6501                 e1000e_down(adapter, false);
6502                 e1000_free_irq(adapter);
6503         }
6504         rtnl_unlock();
6505
6506         e1000e_reset_interrupt_capability(adapter);
6507
6508         /* Allow time for pending master requests to run */
6509         e1000e_disable_pcie_master(&adapter->hw);
6510
6511         return 0;
6512 }
6513
6514 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6515 {
6516         struct net_device *netdev = pci_get_drvdata(pdev);
6517         struct e1000_adapter *adapter = netdev_priv(netdev);
6518         struct e1000_hw *hw = &adapter->hw;
6519         u32 ctrl, ctrl_ext, rctl, status;
6520         /* Runtime suspend should only enable wakeup for link changes */
6521         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6522         int retval = 0;
6523
6524         status = er32(STATUS);
6525         if (status & E1000_STATUS_LU)
6526                 wufc &= ~E1000_WUFC_LNKC;
6527
6528         if (wufc) {
6529                 e1000_setup_rctl(adapter);
6530                 e1000e_set_rx_mode(netdev);
6531
6532                 /* turn on all-multi mode if wake on multicast is enabled */
6533                 if (wufc & E1000_WUFC_MC) {
6534                         rctl = er32(RCTL);
6535                         rctl |= E1000_RCTL_MPE;
6536                         ew32(RCTL, rctl);
6537                 }
6538
6539                 ctrl = er32(CTRL);
6540                 ctrl |= E1000_CTRL_ADVD3WUC;
6541                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6542                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6543                 ew32(CTRL, ctrl);
6544
6545                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6546                     adapter->hw.phy.media_type ==
6547                     e1000_media_type_internal_serdes) {
6548                         /* keep the laser running in D3 */
6549                         ctrl_ext = er32(CTRL_EXT);
6550                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6551                         ew32(CTRL_EXT, ctrl_ext);
6552                 }
6553
6554                 if (!runtime)
6555                         e1000e_power_up_phy(adapter);
6556
6557                 if (adapter->flags & FLAG_IS_ICH)
6558                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6559
6560                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6561                         /* enable wakeup by the PHY */
6562                         retval = e1000_init_phy_wakeup(adapter, wufc);
6563                         if (retval)
6564                                 return retval;
6565                 } else {
6566                         /* enable wakeup by the MAC */
6567                         ew32(WUFC, wufc);
6568                         ew32(WUC, E1000_WUC_PME_EN);
6569                 }
6570         } else {
6571                 ew32(WUC, 0);
6572                 ew32(WUFC, 0);
6573
6574                 e1000_power_down_phy(adapter);
6575         }
6576
6577         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6578                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6579         } else if (hw->mac.type >= e1000_pch_lpt) {
6580                 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6581                         /* ULP does not support wake from unicast, multicast
6582                          * or broadcast.
6583                          */
6584                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6585
6586                 if (retval)
6587                         return retval;
6588         }
6589
6590         /* Ensure that the appropriate bits are set in LPI_CTRL
6591          * for EEE in Sx
6592          */
6593         if ((hw->phy.type >= e1000_phy_i217) &&
6594             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6595                 u16 lpi_ctrl = 0;
6596
6597                 retval = hw->phy.ops.acquire(hw);
6598                 if (!retval) {
6599                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6600                                                  &lpi_ctrl);
6601                         if (!retval) {
6602                                 if (adapter->eee_advert &
6603                                     hw->dev_spec.ich8lan.eee_lp_ability &
6604                                     I82579_EEE_100_SUPPORTED)
6605                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6606                                 if (adapter->eee_advert &
6607                                     hw->dev_spec.ich8lan.eee_lp_ability &
6608                                     I82579_EEE_1000_SUPPORTED)
6609                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6610
6611                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6612                                                          lpi_ctrl);
6613                         }
6614                 }
6615                 hw->phy.ops.release(hw);
6616         }
6617
6618         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6619          * would have already happened in close and is redundant.
6620          */
6621         e1000e_release_hw_control(adapter);
6622
6623         pci_clear_master(pdev);
6624
6625         /* The pci-e switch on some quad port adapters will report a
6626          * correctable error when the MAC transitions from D0 to D3.  To
6627          * prevent this we need to mask off the correctable errors on the
6628          * downstream port of the pci-e switch.
6629          *
6630          * We don't have the associated upstream bridge while assigning
6631          * the PCI device into guest. For example, the KVM on power is
6632          * one of the cases.
6633          */
6634         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6635                 struct pci_dev *us_dev = pdev->bus->self;
6636                 u16 devctl;
6637
6638                 if (!us_dev)
6639                         return 0;
6640
6641                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6642                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6643                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6644
6645                 pci_save_state(pdev);
6646                 pci_prepare_to_sleep(pdev);
6647
6648                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6649         }
6650
6651         return 0;
6652 }
6653
6654 /**
6655  * __e1000e_disable_aspm - Disable ASPM states
6656  * @pdev: pointer to PCI device struct
6657  * @state: bit-mask of ASPM states to disable
6658  * @locked: indication if this context holds pci_bus_sem locked.
6659  *
6660  * Some devices *must* have certain ASPM states disabled per hardware errata.
6661  **/
6662 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6663 {
6664         struct pci_dev *parent = pdev->bus->self;
6665         u16 aspm_dis_mask = 0;
6666         u16 pdev_aspmc, parent_aspmc;
6667
6668         switch (state) {
6669         case PCIE_LINK_STATE_L0S:
6670         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6671                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6672                 /* fall-through - can't have L1 without L0s */
6673         case PCIE_LINK_STATE_L1:
6674                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6675                 break;
6676         default:
6677                 return;
6678         }
6679
6680         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6681         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6682
6683         if (parent) {
6684                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6685                                           &parent_aspmc);
6686                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6687         }
6688
6689         /* Nothing to do if the ASPM states to be disabled already are */
6690         if (!(pdev_aspmc & aspm_dis_mask) &&
6691             (!parent || !(parent_aspmc & aspm_dis_mask)))
6692                 return;
6693
6694         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6695                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6696                  "L0s" : "",
6697                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6698                  "L1" : "");
6699
6700 #ifdef CONFIG_PCIEASPM
6701         if (locked)
6702                 pci_disable_link_state_locked(pdev, state);
6703         else
6704                 pci_disable_link_state(pdev, state);
6705
6706         /* Double-check ASPM control.  If not disabled by the above, the
6707          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6708          * not enabled); override by writing PCI config space directly.
6709          */
6710         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6711         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6712
6713         if (!(aspm_dis_mask & pdev_aspmc))
6714                 return;
6715 #endif
6716
6717         /* Both device and parent should have the same ASPM setting.
6718          * Disable ASPM in downstream component first and then upstream.
6719          */
6720         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6721
6722         if (parent)
6723                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6724                                            aspm_dis_mask);
6725 }
6726
6727 /**
6728  * e1000e_disable_aspm - Disable ASPM states.
6729  * @pdev: pointer to PCI device struct
6730  * @state: bit-mask of ASPM states to disable
6731  *
6732  * This function acquires the pci_bus_sem!
6733  * Some devices *must* have certain ASPM states disabled per hardware errata.
6734  **/
6735 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6736 {
6737         __e1000e_disable_aspm(pdev, state, 0);
6738 }
6739
6740 /**
6741  * e1000e_disable_aspm_locked   Disable ASPM states.
6742  * @pdev: pointer to PCI device struct
6743  * @state: bit-mask of ASPM states to disable
6744  *
6745  * This function must be called with pci_bus_sem acquired!
6746  * Some devices *must* have certain ASPM states disabled per hardware errata.
6747  **/
6748 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6749 {
6750         __e1000e_disable_aspm(pdev, state, 1);
6751 }
6752
6753 static int e1000e_pm_thaw(struct device *dev)
6754 {
6755         struct net_device *netdev = dev_get_drvdata(dev);
6756         struct e1000_adapter *adapter = netdev_priv(netdev);
6757         int rc = 0;
6758
6759         e1000e_set_interrupt_capability(adapter);
6760
6761         rtnl_lock();
6762         if (netif_running(netdev)) {
6763                 rc = e1000_request_irq(adapter);
6764                 if (rc)
6765                         goto err_irq;
6766
6767                 e1000e_up(adapter);
6768         }
6769
6770         netif_device_attach(netdev);
6771 err_irq:
6772         rtnl_unlock();
6773
6774         return rc;
6775 }
6776
6777 #ifdef CONFIG_PM
6778 static int __e1000_resume(struct pci_dev *pdev)
6779 {
6780         struct net_device *netdev = pci_get_drvdata(pdev);
6781         struct e1000_adapter *adapter = netdev_priv(netdev);
6782         struct e1000_hw *hw = &adapter->hw;
6783         u16 aspm_disable_flag = 0;
6784
6785         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6786                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6787         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6788                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6789         if (aspm_disable_flag)
6790                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6791
6792         pci_set_master(pdev);
6793
6794         if (hw->mac.type >= e1000_pch2lan)
6795                 e1000_resume_workarounds_pchlan(&adapter->hw);
6796
6797         e1000e_power_up_phy(adapter);
6798
6799         /* report the system wakeup cause from S3/S4 */
6800         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6801                 u16 phy_data;
6802
6803                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6804                 if (phy_data) {
6805                         e_info("PHY Wakeup cause - %s\n",
6806                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6807                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6808                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6809                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6810                                phy_data & E1000_WUS_LNKC ?
6811                                "Link Status Change" : "other");
6812                 }
6813                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6814         } else {
6815                 u32 wus = er32(WUS);
6816
6817                 if (wus) {
6818                         e_info("MAC Wakeup cause - %s\n",
6819                                wus & E1000_WUS_EX ? "Unicast Packet" :
6820                                wus & E1000_WUS_MC ? "Multicast Packet" :
6821                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6822                                wus & E1000_WUS_MAG ? "Magic Packet" :
6823                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6824                                "other");
6825                 }
6826                 ew32(WUS, ~0);
6827         }
6828
6829         e1000e_reset(adapter);
6830
6831         e1000_init_manageability_pt(adapter);
6832
6833         /* If the controller has AMT, do not set DRV_LOAD until the interface
6834          * is up.  For all other cases, let the f/w know that the h/w is now
6835          * under the control of the driver.
6836          */
6837         if (!(adapter->flags & FLAG_HAS_AMT))
6838                 e1000e_get_hw_control(adapter);
6839
6840         return 0;
6841 }
6842
6843 #ifdef CONFIG_PM_SLEEP
6844 static int e1000e_pm_suspend(struct device *dev)
6845 {
6846         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6847         struct e1000_adapter *adapter = netdev_priv(netdev);
6848         struct pci_dev *pdev = to_pci_dev(dev);
6849         struct e1000_hw *hw = &adapter->hw;
6850         int rc;
6851
6852         e1000e_flush_lpic(pdev);
6853
6854         e1000e_pm_freeze(dev);
6855
6856         rc = __e1000_shutdown(pdev, false);
6857         if (rc)
6858                 e1000e_pm_thaw(dev);
6859
6860         /* Introduce S0ix implementation */
6861         if (hw->mac.type >= e1000_pch_cnp)
6862                 e1000e_s0ix_entry_flow(adapter);
6863
6864         return rc;
6865 }
6866
6867 static int e1000e_pm_resume(struct device *dev)
6868 {
6869         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6870         struct e1000_adapter *adapter = netdev_priv(netdev);
6871         struct pci_dev *pdev = to_pci_dev(dev);
6872         struct e1000_hw *hw = &adapter->hw;
6873         int rc;
6874
6875         /* Introduce S0ix implementation */
6876         if (hw->mac.type >= e1000_pch_cnp)
6877                 e1000e_s0ix_exit_flow(adapter);
6878
6879         rc = __e1000_resume(pdev);
6880         if (rc)
6881                 return rc;
6882
6883         return e1000e_pm_thaw(dev);
6884 }
6885 #endif /* CONFIG_PM_SLEEP */
6886
6887 static int e1000e_pm_runtime_idle(struct device *dev)
6888 {
6889         struct net_device *netdev = dev_get_drvdata(dev);
6890         struct e1000_adapter *adapter = netdev_priv(netdev);
6891         u16 eee_lp;
6892
6893         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6894
6895         if (!e1000e_has_link(adapter)) {
6896                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6897                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6898         }
6899
6900         return -EBUSY;
6901 }
6902
6903 static int e1000e_pm_runtime_resume(struct device *dev)
6904 {
6905         struct pci_dev *pdev = to_pci_dev(dev);
6906         struct net_device *netdev = pci_get_drvdata(pdev);
6907         struct e1000_adapter *adapter = netdev_priv(netdev);
6908         int rc;
6909
6910         rc = __e1000_resume(pdev);
6911         if (rc)
6912                 return rc;
6913
6914         if (netdev->flags & IFF_UP)
6915                 e1000e_up(adapter);
6916
6917         return rc;
6918 }
6919
6920 static int e1000e_pm_runtime_suspend(struct device *dev)
6921 {
6922         struct pci_dev *pdev = to_pci_dev(dev);
6923         struct net_device *netdev = pci_get_drvdata(pdev);
6924         struct e1000_adapter *adapter = netdev_priv(netdev);
6925
6926         if (netdev->flags & IFF_UP) {
6927                 int count = E1000_CHECK_RESET_COUNT;
6928
6929                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6930                         usleep_range(10000, 11000);
6931
6932                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6933
6934                 /* Down the device without resetting the hardware */
6935                 e1000e_down(adapter, false);
6936         }
6937
6938         if (__e1000_shutdown(pdev, true)) {
6939                 e1000e_pm_runtime_resume(dev);
6940                 return -EBUSY;
6941         }
6942
6943         return 0;
6944 }
6945 #endif /* CONFIG_PM */
6946
6947 static void e1000_shutdown(struct pci_dev *pdev)
6948 {
6949         e1000e_flush_lpic(pdev);
6950
6951         e1000e_pm_freeze(&pdev->dev);
6952
6953         __e1000_shutdown(pdev, false);
6954 }
6955
6956 #ifdef CONFIG_NET_POLL_CONTROLLER
6957
6958 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6959 {
6960         struct net_device *netdev = data;
6961         struct e1000_adapter *adapter = netdev_priv(netdev);
6962
6963         if (adapter->msix_entries) {
6964                 int vector, msix_irq;
6965
6966                 vector = 0;
6967                 msix_irq = adapter->msix_entries[vector].vector;
6968                 if (disable_hardirq(msix_irq))
6969                         e1000_intr_msix_rx(msix_irq, netdev);
6970                 enable_irq(msix_irq);
6971
6972                 vector++;
6973                 msix_irq = adapter->msix_entries[vector].vector;
6974                 if (disable_hardirq(msix_irq))
6975                         e1000_intr_msix_tx(msix_irq, netdev);
6976                 enable_irq(msix_irq);
6977
6978                 vector++;
6979                 msix_irq = adapter->msix_entries[vector].vector;
6980                 if (disable_hardirq(msix_irq))
6981                         e1000_msix_other(msix_irq, netdev);
6982                 enable_irq(msix_irq);
6983         }
6984
6985         return IRQ_HANDLED;
6986 }
6987
6988 /**
6989  * e1000_netpoll
6990  * @netdev: network interface device structure
6991  *
6992  * Polling 'interrupt' - used by things like netconsole to send skbs
6993  * without having to re-enable interrupts. It's not called while
6994  * the interrupt routine is executing.
6995  */
6996 static void e1000_netpoll(struct net_device *netdev)
6997 {
6998         struct e1000_adapter *adapter = netdev_priv(netdev);
6999
7000         switch (adapter->int_mode) {
7001         case E1000E_INT_MODE_MSIX:
7002                 e1000_intr_msix(adapter->pdev->irq, netdev);
7003                 break;
7004         case E1000E_INT_MODE_MSI:
7005                 if (disable_hardirq(adapter->pdev->irq))
7006                         e1000_intr_msi(adapter->pdev->irq, netdev);
7007                 enable_irq(adapter->pdev->irq);
7008                 break;
7009         default:                /* E1000E_INT_MODE_LEGACY */
7010                 if (disable_hardirq(adapter->pdev->irq))
7011                         e1000_intr(adapter->pdev->irq, netdev);
7012                 enable_irq(adapter->pdev->irq);
7013                 break;
7014         }
7015 }
7016 #endif
7017
7018 /**
7019  * e1000_io_error_detected - called when PCI error is detected
7020  * @pdev: Pointer to PCI device
7021  * @state: The current pci connection state
7022  *
7023  * This function is called after a PCI bus error affecting
7024  * this device has been detected.
7025  */
7026 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7027                                                 pci_channel_state_t state)
7028 {
7029         e1000e_pm_freeze(&pdev->dev);
7030
7031         if (state == pci_channel_io_perm_failure)
7032                 return PCI_ERS_RESULT_DISCONNECT;
7033
7034         pci_disable_device(pdev);
7035
7036         /* Request a slot slot reset. */
7037         return PCI_ERS_RESULT_NEED_RESET;
7038 }
7039
7040 /**
7041  * e1000_io_slot_reset - called after the pci bus has been reset.
7042  * @pdev: Pointer to PCI device
7043  *
7044  * Restart the card from scratch, as if from a cold-boot. Implementation
7045  * resembles the first-half of the e1000e_pm_resume routine.
7046  */
7047 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7048 {
7049         struct net_device *netdev = pci_get_drvdata(pdev);
7050         struct e1000_adapter *adapter = netdev_priv(netdev);
7051         struct e1000_hw *hw = &adapter->hw;
7052         u16 aspm_disable_flag = 0;
7053         int err;
7054         pci_ers_result_t result;
7055
7056         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7057                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7058         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7059                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7060         if (aspm_disable_flag)
7061                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7062
7063         err = pci_enable_device_mem(pdev);
7064         if (err) {
7065                 dev_err(&pdev->dev,
7066                         "Cannot re-enable PCI device after reset.\n");
7067                 result = PCI_ERS_RESULT_DISCONNECT;
7068         } else {
7069                 pdev->state_saved = true;
7070                 pci_restore_state(pdev);
7071                 pci_set_master(pdev);
7072
7073                 pci_enable_wake(pdev, PCI_D3hot, 0);
7074                 pci_enable_wake(pdev, PCI_D3cold, 0);
7075
7076                 e1000e_reset(adapter);
7077                 ew32(WUS, ~0);
7078                 result = PCI_ERS_RESULT_RECOVERED;
7079         }
7080
7081         return result;
7082 }
7083
7084 /**
7085  * e1000_io_resume - called when traffic can start flowing again.
7086  * @pdev: Pointer to PCI device
7087  *
7088  * This callback is called when the error recovery driver tells us that
7089  * its OK to resume normal operation. Implementation resembles the
7090  * second-half of the e1000e_pm_resume routine.
7091  */
7092 static void e1000_io_resume(struct pci_dev *pdev)
7093 {
7094         struct net_device *netdev = pci_get_drvdata(pdev);
7095         struct e1000_adapter *adapter = netdev_priv(netdev);
7096
7097         e1000_init_manageability_pt(adapter);
7098
7099         e1000e_pm_thaw(&pdev->dev);
7100
7101         /* If the controller has AMT, do not set DRV_LOAD until the interface
7102          * is up.  For all other cases, let the f/w know that the h/w is now
7103          * under the control of the driver.
7104          */
7105         if (!(adapter->flags & FLAG_HAS_AMT))
7106                 e1000e_get_hw_control(adapter);
7107 }
7108
7109 static void e1000_print_device_info(struct e1000_adapter *adapter)
7110 {
7111         struct e1000_hw *hw = &adapter->hw;
7112         struct net_device *netdev = adapter->netdev;
7113         u32 ret_val;
7114         u8 pba_str[E1000_PBANUM_LENGTH];
7115
7116         /* print bus type/speed/width info */
7117         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7118                /* bus width */
7119                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7120                 "Width x1"),
7121                /* MAC address */
7122                netdev->dev_addr);
7123         e_info("Intel(R) PRO/%s Network Connection\n",
7124                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7125         ret_val = e1000_read_pba_string_generic(hw, pba_str,
7126                                                 E1000_PBANUM_LENGTH);
7127         if (ret_val)
7128                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7129         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7130                hw->mac.type, hw->phy.type, pba_str);
7131 }
7132
7133 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7134 {
7135         struct e1000_hw *hw = &adapter->hw;
7136         int ret_val;
7137         u16 buf = 0;
7138
7139         if (hw->mac.type != e1000_82573)
7140                 return;
7141
7142         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7143         le16_to_cpus(&buf);
7144         if (!ret_val && (!(buf & BIT(0)))) {
7145                 /* Deep Smart Power Down (DSPD) */
7146                 dev_warn(&adapter->pdev->dev,
7147                          "Warning: detected DSPD enabled in EEPROM\n");
7148         }
7149 }
7150
7151 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7152                                             netdev_features_t features)
7153 {
7154         struct e1000_adapter *adapter = netdev_priv(netdev);
7155         struct e1000_hw *hw = &adapter->hw;
7156
7157         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7158         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7159                 features &= ~NETIF_F_RXFCS;
7160
7161         /* Since there is no support for separate Rx/Tx vlan accel
7162          * enable/disable make sure Tx flag is always in same state as Rx.
7163          */
7164         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7165                 features |= NETIF_F_HW_VLAN_CTAG_TX;
7166         else
7167                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7168
7169         return features;
7170 }
7171
7172 static int e1000_set_features(struct net_device *netdev,
7173                               netdev_features_t features)
7174 {
7175         struct e1000_adapter *adapter = netdev_priv(netdev);
7176         netdev_features_t changed = features ^ netdev->features;
7177
7178         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7179                 adapter->flags |= FLAG_TSO_FORCE;
7180
7181         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7182                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7183                          NETIF_F_RXALL)))
7184                 return 0;
7185
7186         if (changed & NETIF_F_RXFCS) {
7187                 if (features & NETIF_F_RXFCS) {
7188                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7189                 } else {
7190                         /* We need to take it back to defaults, which might mean
7191                          * stripping is still disabled at the adapter level.
7192                          */
7193                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7194                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7195                         else
7196                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7197                 }
7198         }
7199
7200         netdev->features = features;
7201
7202         if (netif_running(netdev))
7203                 e1000e_reinit_locked(adapter);
7204         else
7205                 e1000e_reset(adapter);
7206
7207         return 1;
7208 }
7209
7210 static const struct net_device_ops e1000e_netdev_ops = {
7211         .ndo_open               = e1000e_open,
7212         .ndo_stop               = e1000e_close,
7213         .ndo_start_xmit         = e1000_xmit_frame,
7214         .ndo_get_stats64        = e1000e_get_stats64,
7215         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7216         .ndo_set_mac_address    = e1000_set_mac,
7217         .ndo_change_mtu         = e1000_change_mtu,
7218         .ndo_do_ioctl           = e1000_ioctl,
7219         .ndo_tx_timeout         = e1000_tx_timeout,
7220         .ndo_validate_addr      = eth_validate_addr,
7221
7222         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7223         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7224 #ifdef CONFIG_NET_POLL_CONTROLLER
7225         .ndo_poll_controller    = e1000_netpoll,
7226 #endif
7227         .ndo_set_features = e1000_set_features,
7228         .ndo_fix_features = e1000_fix_features,
7229         .ndo_features_check     = passthru_features_check,
7230 };
7231
7232 /**
7233  * e1000_probe - Device Initialization Routine
7234  * @pdev: PCI device information struct
7235  * @ent: entry in e1000_pci_tbl
7236  *
7237  * Returns 0 on success, negative on failure
7238  *
7239  * e1000_probe initializes an adapter identified by a pci_dev structure.
7240  * The OS initialization, configuring of the adapter private structure,
7241  * and a hardware reset occur.
7242  **/
7243 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7244 {
7245         struct net_device *netdev;
7246         struct e1000_adapter *adapter;
7247         struct e1000_hw *hw;
7248         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7249         resource_size_t mmio_start, mmio_len;
7250         resource_size_t flash_start, flash_len;
7251         static int cards_found;
7252         u16 aspm_disable_flag = 0;
7253         int bars, i, err, pci_using_dac;
7254         u16 eeprom_data = 0;
7255         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7256         s32 ret_val = 0;
7257
7258         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7259                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7260         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7261                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7262         if (aspm_disable_flag)
7263                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7264
7265         err = pci_enable_device_mem(pdev);
7266         if (err)
7267                 return err;
7268
7269         pci_using_dac = 0;
7270         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7271         if (!err) {
7272                 pci_using_dac = 1;
7273         } else {
7274                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7275                 if (err) {
7276                         dev_err(&pdev->dev,
7277                                 "No usable DMA configuration, aborting\n");
7278                         goto err_dma;
7279                 }
7280         }
7281
7282         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7283         err = pci_request_selected_regions_exclusive(pdev, bars,
7284                                                      e1000e_driver_name);
7285         if (err)
7286                 goto err_pci_reg;
7287
7288         /* AER (Advanced Error Reporting) hooks */
7289         pci_enable_pcie_error_reporting(pdev);
7290
7291         pci_set_master(pdev);
7292         /* PCI config space info */
7293         err = pci_save_state(pdev);
7294         if (err)
7295                 goto err_alloc_etherdev;
7296
7297         err = -ENOMEM;
7298         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7299         if (!netdev)
7300                 goto err_alloc_etherdev;
7301
7302         SET_NETDEV_DEV(netdev, &pdev->dev);
7303
7304         netdev->irq = pdev->irq;
7305
7306         pci_set_drvdata(pdev, netdev);
7307         adapter = netdev_priv(netdev);
7308         hw = &adapter->hw;
7309         adapter->netdev = netdev;
7310         adapter->pdev = pdev;
7311         adapter->ei = ei;
7312         adapter->pba = ei->pba;
7313         adapter->flags = ei->flags;
7314         adapter->flags2 = ei->flags2;
7315         adapter->hw.adapter = adapter;
7316         adapter->hw.mac.type = ei->mac;
7317         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7318         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7319
7320         mmio_start = pci_resource_start(pdev, 0);
7321         mmio_len = pci_resource_len(pdev, 0);
7322
7323         err = -EIO;
7324         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7325         if (!adapter->hw.hw_addr)
7326                 goto err_ioremap;
7327
7328         if ((adapter->flags & FLAG_HAS_FLASH) &&
7329             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7330             (hw->mac.type < e1000_pch_spt)) {
7331                 flash_start = pci_resource_start(pdev, 1);
7332                 flash_len = pci_resource_len(pdev, 1);
7333                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7334                 if (!adapter->hw.flash_address)
7335                         goto err_flashmap;
7336         }
7337
7338         /* Set default EEE advertisement */
7339         if (adapter->flags2 & FLAG2_HAS_EEE)
7340                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7341
7342         /* construct the net_device struct */
7343         netdev->netdev_ops = &e1000e_netdev_ops;
7344         e1000e_set_ethtool_ops(netdev);
7345         netdev->watchdog_timeo = 5 * HZ;
7346         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7347         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7348
7349         netdev->mem_start = mmio_start;
7350         netdev->mem_end = mmio_start + mmio_len;
7351
7352         adapter->bd_number = cards_found++;
7353
7354         e1000e_check_options(adapter);
7355
7356         /* setup adapter struct */
7357         err = e1000_sw_init(adapter);
7358         if (err)
7359                 goto err_sw_init;
7360
7361         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7362         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7363         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7364
7365         err = ei->get_variants(adapter);
7366         if (err)
7367                 goto err_hw_init;
7368
7369         if ((adapter->flags & FLAG_IS_ICH) &&
7370             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7371             (hw->mac.type < e1000_pch_spt))
7372                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7373
7374         hw->mac.ops.get_bus_info(&adapter->hw);
7375
7376         adapter->hw.phy.autoneg_wait_to_complete = 0;
7377
7378         /* Copper options */
7379         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7380                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7381                 adapter->hw.phy.disable_polarity_correction = 0;
7382                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7383         }
7384
7385         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7386                 dev_info(&pdev->dev,
7387                          "PHY reset is blocked due to SOL/IDER session.\n");
7388
7389         /* Set initial default active device features */
7390         netdev->features = (NETIF_F_SG |
7391                             NETIF_F_HW_VLAN_CTAG_RX |
7392                             NETIF_F_HW_VLAN_CTAG_TX |
7393                             NETIF_F_TSO |
7394                             NETIF_F_TSO6 |
7395                             NETIF_F_RXHASH |
7396                             NETIF_F_RXCSUM |
7397                             NETIF_F_HW_CSUM);
7398
7399         /* Set user-changeable features (subset of all device features) */
7400         netdev->hw_features = netdev->features;
7401         netdev->hw_features |= NETIF_F_RXFCS;
7402         netdev->priv_flags |= IFF_SUPP_NOFCS;
7403         netdev->hw_features |= NETIF_F_RXALL;
7404
7405         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7406                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7407
7408         netdev->vlan_features |= (NETIF_F_SG |
7409                                   NETIF_F_TSO |
7410                                   NETIF_F_TSO6 |
7411                                   NETIF_F_HW_CSUM);
7412
7413         netdev->priv_flags |= IFF_UNICAST_FLT;
7414
7415         if (pci_using_dac) {
7416                 netdev->features |= NETIF_F_HIGHDMA;
7417                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7418         }
7419
7420         /* MTU range: 68 - max_hw_frame_size */
7421         netdev->min_mtu = ETH_MIN_MTU;
7422         netdev->max_mtu = adapter->max_hw_frame_size -
7423                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7424
7425         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7426                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7427
7428         /* before reading the NVM, reset the controller to
7429          * put the device in a known good starting state
7430          */
7431         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7432
7433         /* systems with ASPM and others may see the checksum fail on the first
7434          * attempt. Let's give it a few tries
7435          */
7436         for (i = 0;; i++) {
7437                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7438                         break;
7439                 if (i == 2) {
7440                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7441                         err = -EIO;
7442                         goto err_eeprom;
7443                 }
7444         }
7445
7446         e1000_eeprom_checks(adapter);
7447
7448         /* copy the MAC address */
7449         if (e1000e_read_mac_addr(&adapter->hw))
7450                 dev_err(&pdev->dev,
7451                         "NVM Read Error while reading MAC address\n");
7452
7453         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7454
7455         if (!is_valid_ether_addr(netdev->dev_addr)) {
7456                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7457                         netdev->dev_addr);
7458                 err = -EIO;
7459                 goto err_eeprom;
7460         }
7461
7462         timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7463         timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7464
7465         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7466         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7467         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7468         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7469         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7470
7471         /* Initialize link parameters. User can change them with ethtool */
7472         adapter->hw.mac.autoneg = 1;
7473         adapter->fc_autoneg = true;
7474         adapter->hw.fc.requested_mode = e1000_fc_default;
7475         adapter->hw.fc.current_mode = e1000_fc_default;
7476         adapter->hw.phy.autoneg_advertised = 0x2f;
7477
7478         /* Initial Wake on LAN setting - If APM wake is enabled in
7479          * the EEPROM, enable the ACPI Magic Packet filter
7480          */
7481         if (adapter->flags & FLAG_APME_IN_WUC) {
7482                 /* APME bit in EEPROM is mapped to WUC.APME */
7483                 eeprom_data = er32(WUC);
7484                 eeprom_apme_mask = E1000_WUC_APME;
7485                 if ((hw->mac.type > e1000_ich10lan) &&
7486                     (eeprom_data & E1000_WUC_PHY_WAKE))
7487                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7488         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7489                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7490                     (adapter->hw.bus.func == 1))
7491                         ret_val = e1000_read_nvm(&adapter->hw,
7492                                               NVM_INIT_CONTROL3_PORT_B,
7493                                               1, &eeprom_data);
7494                 else
7495                         ret_val = e1000_read_nvm(&adapter->hw,
7496                                               NVM_INIT_CONTROL3_PORT_A,
7497                                               1, &eeprom_data);
7498         }
7499
7500         /* fetch WoL from EEPROM */
7501         if (ret_val)
7502                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7503         else if (eeprom_data & eeprom_apme_mask)
7504                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7505
7506         /* now that we have the eeprom settings, apply the special cases
7507          * where the eeprom may be wrong or the board simply won't support
7508          * wake on lan on a particular port
7509          */
7510         if (!(adapter->flags & FLAG_HAS_WOL))
7511                 adapter->eeprom_wol = 0;
7512
7513         /* initialize the wol settings based on the eeprom settings */
7514         adapter->wol = adapter->eeprom_wol;
7515
7516         /* make sure adapter isn't asleep if manageability is enabled */
7517         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7518             (hw->mac.ops.check_mng_mode(hw)))
7519                 device_wakeup_enable(&pdev->dev);
7520
7521         /* save off EEPROM version number */
7522         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7523
7524         if (ret_val) {
7525                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7526                 adapter->eeprom_vers = 0;
7527         }
7528
7529         /* init PTP hardware clock */
7530         e1000e_ptp_init(adapter);
7531
7532         /* reset the hardware with the new settings */
7533         e1000e_reset(adapter);
7534
7535         /* If the controller has AMT, do not set DRV_LOAD until the interface
7536          * is up.  For all other cases, let the f/w know that the h/w is now
7537          * under the control of the driver.
7538          */
7539         if (!(adapter->flags & FLAG_HAS_AMT))
7540                 e1000e_get_hw_control(adapter);
7541
7542         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7543         err = register_netdev(netdev);
7544         if (err)
7545                 goto err_register;
7546
7547         /* carrier off reporting is important to ethtool even BEFORE open */
7548         netif_carrier_off(netdev);
7549
7550         e1000_print_device_info(adapter);
7551
7552         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
7553
7554         if (pci_dev_run_wake(pdev) && hw->mac.type < e1000_pch_cnp)
7555                 pm_runtime_put_noidle(&pdev->dev);
7556
7557         return 0;
7558
7559 err_register:
7560         if (!(adapter->flags & FLAG_HAS_AMT))
7561                 e1000e_release_hw_control(adapter);
7562 err_eeprom:
7563         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7564                 e1000_phy_hw_reset(&adapter->hw);
7565 err_hw_init:
7566         kfree(adapter->tx_ring);
7567         kfree(adapter->rx_ring);
7568 err_sw_init:
7569         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7570                 iounmap(adapter->hw.flash_address);
7571         e1000e_reset_interrupt_capability(adapter);
7572 err_flashmap:
7573         iounmap(adapter->hw.hw_addr);
7574 err_ioremap:
7575         free_netdev(netdev);
7576 err_alloc_etherdev:
7577         pci_release_mem_regions(pdev);
7578 err_pci_reg:
7579 err_dma:
7580         pci_disable_device(pdev);
7581         return err;
7582 }
7583
7584 /**
7585  * e1000_remove - Device Removal Routine
7586  * @pdev: PCI device information struct
7587  *
7588  * e1000_remove is called by the PCI subsystem to alert the driver
7589  * that it should release a PCI device.  The could be caused by a
7590  * Hot-Plug event, or because the driver is going to be removed from
7591  * memory.
7592  **/
7593 static void e1000_remove(struct pci_dev *pdev)
7594 {
7595         struct net_device *netdev = pci_get_drvdata(pdev);
7596         struct e1000_adapter *adapter = netdev_priv(netdev);
7597
7598         e1000e_ptp_remove(adapter);
7599
7600         /* The timers may be rescheduled, so explicitly disable them
7601          * from being rescheduled.
7602          */
7603         set_bit(__E1000_DOWN, &adapter->state);
7604         del_timer_sync(&adapter->watchdog_timer);
7605         del_timer_sync(&adapter->phy_info_timer);
7606
7607         cancel_work_sync(&adapter->reset_task);
7608         cancel_work_sync(&adapter->watchdog_task);
7609         cancel_work_sync(&adapter->downshift_task);
7610         cancel_work_sync(&adapter->update_phy_task);
7611         cancel_work_sync(&adapter->print_hang_task);
7612
7613         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7614                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7615                 if (adapter->tx_hwtstamp_skb) {
7616                         dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7617                         adapter->tx_hwtstamp_skb = NULL;
7618                 }
7619         }
7620
7621         unregister_netdev(netdev);
7622
7623         if (pci_dev_run_wake(pdev))
7624                 pm_runtime_get_noresume(&pdev->dev);
7625
7626         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7627          * would have already happened in close and is redundant.
7628          */
7629         e1000e_release_hw_control(adapter);
7630
7631         e1000e_reset_interrupt_capability(adapter);
7632         kfree(adapter->tx_ring);
7633         kfree(adapter->rx_ring);
7634
7635         iounmap(adapter->hw.hw_addr);
7636         if ((adapter->hw.flash_address) &&
7637             (adapter->hw.mac.type < e1000_pch_spt))
7638                 iounmap(adapter->hw.flash_address);
7639         pci_release_mem_regions(pdev);
7640
7641         free_netdev(netdev);
7642
7643         /* AER disable */
7644         pci_disable_pcie_error_reporting(pdev);
7645
7646         pci_disable_device(pdev);
7647 }
7648
7649 /* PCI Error Recovery (ERS) */
7650 static const struct pci_error_handlers e1000_err_handler = {
7651         .error_detected = e1000_io_error_detected,
7652         .slot_reset = e1000_io_slot_reset,
7653         .resume = e1000_io_resume,
7654 };
7655
7656 static const struct pci_device_id e1000_pci_tbl[] = {
7657         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7658         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7659         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7660         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7661           board_82571 },
7662         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7663         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7664         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7665         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7666         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7667
7668         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7669         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7670         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7671         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7672
7673         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7674         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7675         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7676
7677         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7678         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7679         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7680
7681         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7682           board_80003es2lan },
7683         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7684           board_80003es2lan },
7685         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7686           board_80003es2lan },
7687         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7688           board_80003es2lan },
7689
7690         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7691         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7692         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7693         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7694         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7695         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7696         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7697         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7698
7699         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7700         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7701         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7702         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7703         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7704         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7705         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7706         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7707         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7708
7709         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7710         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7711         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7712
7713         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7714         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7715         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7716
7717         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7718         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7719         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7720         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7721
7722         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7723         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7724
7725         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7726         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7727         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7728         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7729         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7730         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7731         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7732         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7733         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7734         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7735         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7736         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7737         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7738         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7739         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7740         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7741         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7742         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7743         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7744         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7745         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7746         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7747         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7748         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7749         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7750         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7751         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7752         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7753         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7754         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7755         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7756         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_cnp },
7757         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_cnp },
7758         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_cnp },
7759         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_cnp },
7760         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_cnp },
7761         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_cnp },
7762         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_cnp },
7763         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_cnp },
7764         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_cnp },
7765         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_cnp },
7766
7767         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7768 };
7769 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7770
7771 static const struct dev_pm_ops e1000_pm_ops = {
7772 #ifdef CONFIG_PM_SLEEP
7773         .suspend        = e1000e_pm_suspend,
7774         .resume         = e1000e_pm_resume,
7775         .freeze         = e1000e_pm_freeze,
7776         .thaw           = e1000e_pm_thaw,
7777         .poweroff       = e1000e_pm_suspend,
7778         .restore        = e1000e_pm_resume,
7779 #endif
7780         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7781                            e1000e_pm_runtime_idle)
7782 };
7783
7784 /* PCI Device API Driver */
7785 static struct pci_driver e1000_driver = {
7786         .name     = e1000e_driver_name,
7787         .id_table = e1000_pci_tbl,
7788         .probe    = e1000_probe,
7789         .remove   = e1000_remove,
7790         .driver   = {
7791                 .pm = &e1000_pm_ops,
7792         },
7793         .shutdown = e1000_shutdown,
7794         .err_handler = &e1000_err_handler
7795 };
7796
7797 /**
7798  * e1000_init_module - Driver Registration Routine
7799  *
7800  * e1000_init_module is the first routine called when the driver is
7801  * loaded. All it does is register with the PCI subsystem.
7802  **/
7803 static int __init e1000_init_module(void)
7804 {
7805         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7806                 e1000e_driver_version);
7807         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7808
7809         return pci_register_driver(&e1000_driver);
7810 }
7811 module_init(e1000_init_module);
7812
7813 /**
7814  * e1000_exit_module - Driver Exit Cleanup Routine
7815  *
7816  * e1000_exit_module is called just before the driver is removed
7817  * from memory.
7818  **/
7819 static void __exit e1000_exit_module(void)
7820 {
7821         pci_unregister_driver(&e1000_driver);
7822 }
7823 module_exit(e1000_exit_module);
7824
7825 MODULE_AUTHOR("Intel Corporation, <[email protected]>");
7826 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7827 MODULE_LICENSE("GPL v2");
7828 MODULE_VERSION(DRV_VERSION);
7829
7830 /* netdev.c */