drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <[email protected]>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <[email protected]>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <[email protected]>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38 #include <drm/drm_eld.h>
  39
  40 #include "i915_drv.h"
  41 #include "i915_reg.h"
  42 #include "intel_atomic.h"
  43 #include "intel_audio.h"
  44 #include "intel_connector.h"
  45 #include "intel_crtc.h"
  46 #include "intel_de.h"
  47 #include "intel_display_types.h"
  48 #include "intel_fdi.h"
  49 #include "intel_fifo_underrun.h"
  50 #include "intel_gmbus.h"
  51 #include "intel_hdmi.h"
  52 #include "intel_hotplug.h"
  53 #include "intel_panel.h"
  54 #include "intel_sdvo.h"
  55 #include "intel_sdvo_regs.h"
  56
  57 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  58 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  59 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  60 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  61
  62 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK | SDVO_TV_MASK)
  63
  64 #define IS_TV(c)                ((c)->output_flag & SDVO_TV_MASK)
  65 #define IS_TMDS(c)              ((c)->output_flag & SDVO_TMDS_MASK)
  66 #define IS_LVDS(c)              ((c)->output_flag & SDVO_LVDS_MASK)
  67 #define IS_TV_OR_LVDS(c)        ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  68 #define IS_DIGITAL(c)           ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  69
  70 #define HAS_DDC(c)              ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
  71                                                      SDVO_LVDS_MASK))
  72
  73 static const char * const tv_format_names[] = {
  74         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  75         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  76         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  77         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  78         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  79         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  80         "SECAM_60"
  81 };
  82
  83 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  84
  85 struct intel_sdvo;
  86
  87 struct intel_sdvo_ddc {
  88         struct i2c_adapter ddc;
  89         struct intel_sdvo *sdvo;
  90         u8 ddc_bus;
  91 };
  92
  93 struct intel_sdvo {
  94         struct intel_encoder base;
  95
  96         struct i2c_adapter *i2c;
  97         u8 slave_addr;
  98
  99         struct intel_sdvo_ddc ddc[3];
 100
 101         /* Register for the SDVO device: SDVOB or SDVOC */
 102         i915_reg_t sdvo_reg;
 103
 104         /*
 105          * Capabilities of the SDVO device returned by
 106          * intel_sdvo_get_capabilities()
 107          */
 108         struct intel_sdvo_caps caps;
 109
 110         u8 colorimetry_cap;
 111
 112         /* Pixel clock limitations reported by the SDVO device, in kHz */
 113         int pixel_clock_min, pixel_clock_max;
 114
 115         /*
 116          * Hotplug activation bits for this device
 117          */
 118         u16 hotplug_active;
 119
 120         /*
 121          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 122          */
 123         u8 dtd_sdvo_flags;
 124 };
 125
 126 struct intel_sdvo_connector {
 127         struct intel_connector base;
 128
 129         /* Mark the type of connector */
 130         u16 output_flag;
 131
 132         /* This contains all current supported TV format */
 133         u8 tv_format_supported[TV_FORMAT_NUM];
 134         int   format_supported_num;
 135         struct drm_property *tv_format;
 136
 137         /* add the property for the SDVO-TV */
 138         struct drm_property *left;
 139         struct drm_property *right;
 140         struct drm_property *top;
 141         struct drm_property *bottom;
 142         struct drm_property *hpos;
 143         struct drm_property *vpos;
 144         struct drm_property *contrast;
 145         struct drm_property *saturation;
 146         struct drm_property *hue;
 147         struct drm_property *sharpness;
 148         struct drm_property *flicker_filter;
 149         struct drm_property *flicker_filter_adaptive;
 150         struct drm_property *flicker_filter_2d;
 151         struct drm_property *tv_chroma_filter;
 152         struct drm_property *tv_luma_filter;
 153         struct drm_property *dot_crawl;
 154
 155         /* add the property for the SDVO-TV/LVDS */
 156         struct drm_property *brightness;
 157
 158         /* this is to get the range of margin.*/
 159         u32 max_hscan, max_vscan;
 160
 161         /**
 162          * This is set if we treat the device as HDMI, instead of DVI.
 163          */
 164         bool is_hdmi;
 165 };
 166
 167 struct intel_sdvo_connector_state {
 168         /* base.base: tv.saturation/contrast/hue/brightness */
 169         struct intel_digital_connector_state base;
 170
 171         struct {
 172                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 173                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 174                 unsigned chroma_filter, luma_filter, dot_crawl;
 175         } tv;
 176 };
 177
 178 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 179 {
 180         return container_of(encoder, struct intel_sdvo, base);
 181 }
 182
 183 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 184 {
 185         return to_sdvo(intel_attached_encoder(connector));
 186 }
 187
 188 static struct intel_sdvo_connector *
 189 to_intel_sdvo_connector(struct drm_connector *connector)
 190 {
 191         return container_of(connector, struct intel_sdvo_connector, base.base);
 192 }
 193
 194 #define to_intel_sdvo_connector_state(conn_state) \
 195         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 196
 197 static bool
 198 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 199 static bool
 200 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 201                               struct intel_sdvo_connector *intel_sdvo_connector,
 202                               int type);
 203 static bool
 204 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 205                                    struct intel_sdvo_connector *intel_sdvo_connector);
 206
 207 /*
 208  * Writes the SDVOB or SDVOC with the given value, but always writes both
 209  * SDVOB and SDVOC to work around apparent hardware issues (according to
 210  * comments in the BIOS).
 211  */
 212 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 213 {
 214         struct drm_device *dev = intel_sdvo->base.base.dev;
 215         struct drm_i915_private *dev_priv = to_i915(dev);
 216         u32 bval = val, cval = val;
 217         int i;
 218
 219         if (HAS_PCH_SPLIT(dev_priv)) {
 220                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 221                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 222                 /*
 223                  * HW workaround, need to write this twice for issue
 224                  * that may result in first write getting masked.
 225                  */
 226                 if (HAS_PCH_IBX(dev_priv)) {
 227                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 228                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 229                 }
 230                 return;
 231         }
 232
 233         if (intel_sdvo->base.port == PORT_B)
 234                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 235         else
 236                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 237
 238         /*
 239          * Write the registers twice for luck. Sometimes,
 240          * writing them only once doesn't appear to 'stick'.
 241          * The BIOS does this too. Yay, magic
 242          */
 243         for (i = 0; i < 2; i++) {
 244                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 245                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 246
 247                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 248                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 249         }
 250 }
 251
 252 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 253 {
 254         struct i2c_msg msgs[] = {
 255                 {
 256                         .addr = intel_sdvo->slave_addr,
 257                         .flags = 0,
 258                         .len = 1,
 259                         .buf = &addr,
 260                 },
 261                 {
 262                         .addr = intel_sdvo->slave_addr,
 263                         .flags = I2C_M_RD,
 264                         .len = 1,
 265                         .buf = ch,
 266                 }
 267         };
 268         int ret;
 269
 270         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 271                 return true;
 272
 273         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 274         return false;
 275 }
 276
 277 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 278
 279 /** Mapping of command numbers to names, for debug output */
 280 static const struct {
 281         u8 cmd;
 282         const char *name;
 283 } __packed sdvo_cmd_names[] = {
 284         SDVO_CMD_NAME_ENTRY(RESET),
 285         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 286         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 287         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 288         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 289         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 290         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 291         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 292         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 293         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 294         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 295         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 296         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 297         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 298         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 299         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 300         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 301         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 302         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 303         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 304         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 305         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 306         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 307         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 308         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 309         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 310         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 311         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 312         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 313         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 314         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 315         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 316         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 317         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 318         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 319         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 320         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 321         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 322         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 323         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 324         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 325         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 326
 327         /* Add the op code for SDVO enhancements */
 328         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 329         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 330         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 331         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 332         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 333         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 334         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 335         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 336         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 337         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 338         SDVO_CMD_NAME_ENTRY(GET_HUE),
 339         SDVO_CMD_NAME_ENTRY(SET_HUE),
 340         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 341         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 342         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 343         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 344         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 345         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 346         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 347         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 348         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 349         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 350         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 351         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 352         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 353         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 354         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 355         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 356         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 357         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 358         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 359         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 360         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 361         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 362         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 363         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 364         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 365         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 366         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 367         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 369         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 370         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 372
 373         /* HDMI op code */
 374         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 375         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 376         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 377         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 378         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 379         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 380         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 381         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 382         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 383         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 384         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 385         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 386         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 387         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 388         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 389         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 390         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 391         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 392         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 393         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 394 };
 395
 396 #undef SDVO_CMD_NAME_ENTRY
 397
 398 static const char *sdvo_cmd_name(u8 cmd)
 399 {
 400         int i;
 401
 402         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 403                 if (cmd == sdvo_cmd_names[i].cmd)
 404                         return sdvo_cmd_names[i].name;
 405         }
 406
 407         return NULL;
 408 }
 409
 410 #define SDVO_NAME(svdo) ((svdo)->base.port == PORT_B ? "SDVOB" : "SDVOC")
 411
 412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 413                                    const void *args, int args_len)
 414 {
 415         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 416         const char *cmd_name;
 417         int i, pos = 0;
 418         char buffer[64];
 419
 420 #define BUF_PRINT(args...) \
 421         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 422
 423         for (i = 0; i < args_len; i++) {
 424                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 425         }
 426         for (; i < 8; i++) {
 427                 BUF_PRINT("   ");
 428         }
 429
 430         cmd_name = sdvo_cmd_name(cmd);
 431         if (cmd_name)
 432                 BUF_PRINT("(%s)", cmd_name);
 433         else
 434                 BUF_PRINT("(%02X)", cmd);
 435
 436         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 437 #undef BUF_PRINT
 438
 439         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 440 }
 441
 442 static const char * const cmd_status_names[] = {
 443         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 444         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 445         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 446         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 447         [SDVO_CMD_STATUS_PENDING] = "Pending",
 448         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 449         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 450 };
 451
 452 static const char *sdvo_cmd_status(u8 status)
 453 {
 454         if (status < ARRAY_SIZE(cmd_status_names))
 455                 return cmd_status_names[status];
 456         else
 457                 return NULL;
 458 }
 459
 460 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 461                                    const void *args, int args_len,
 462                                    bool unlocked)
 463 {
 464         u8 *buf, status;
 465         struct i2c_msg *msgs;
 466         int i, ret = true;
 467
 468         /* Would be simpler to allocate both in one go ? */
 469         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 470         if (!buf)
 471                 return false;
 472
 473         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 474         if (!msgs) {
 475                 kfree(buf);
 476                 return false;
 477         }
 478
 479         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 480
 481         for (i = 0; i < args_len; i++) {
 482                 msgs[i].addr = intel_sdvo->slave_addr;
 483                 msgs[i].flags = 0;
 484                 msgs[i].len = 2;
 485                 msgs[i].buf = buf + 2 *i;
 486                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 487                 buf[2*i + 1] = ((u8*)args)[i];
 488         }
 489         msgs[i].addr = intel_sdvo->slave_addr;
 490         msgs[i].flags = 0;
 491         msgs[i].len = 2;
 492         msgs[i].buf = buf + 2*i;
 493         buf[2*i + 0] = SDVO_I2C_OPCODE;
 494         buf[2*i + 1] = cmd;
 495
 496         /* the following two are to read the response */
 497         status = SDVO_I2C_CMD_STATUS;
 498         msgs[i+1].addr = intel_sdvo->slave_addr;
 499         msgs[i+1].flags = 0;
 500         msgs[i+1].len = 1;
 501         msgs[i+1].buf = &status;
 502
 503         msgs[i+2].addr = intel_sdvo->slave_addr;
 504         msgs[i+2].flags = I2C_M_RD;
 505         msgs[i+2].len = 1;
 506         msgs[i+2].buf = &status;
 507
 508         if (unlocked)
 509                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 510         else
 511                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 512         if (ret < 0) {
 513                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 514                 ret = false;
 515                 goto out;
 516         }
 517         if (ret != i+3) {
 518                 /* failure in I2C transfer */
 519                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 520                 ret = false;
 521         }
 522
 523 out:
 524         kfree(msgs);
 525         kfree(buf);
 526         return ret;
 527 }
 528
 529 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 530                                  const void *args, int args_len)
 531 {
 532         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 533 }
 534
 535 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 536                                      void *response, int response_len)
 537 {
 538         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 539         const char *cmd_status;
 540         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 541         u8 status;
 542         int i, pos = 0;
 543         char buffer[64];
 544
 545         buffer[0] = '\0';
 546
 547         /*
 548          * The documentation states that all commands will be
 549          * processed within 15µs, and that we need only poll
 550          * the status byte a maximum of 3 times in order for the
 551          * command to be complete.
 552          *
 553          * Check 5 times in case the hardware failed to read the docs.
 554          *
 555          * Also beware that the first response by many devices is to
 556          * reply PENDING and stall for time. TVs are notorious for
 557          * requiring longer than specified to complete their replies.
 558          * Originally (in the DDX long ago), the delay was only ever 15ms
 559          * with an additional delay of 30ms applied for TVs added later after
 560          * many experiments. To accommodate both sets of delays, we do a
 561          * sequence of slow checks if the device is falling behind and fails
 562          * to reply within 5*15µs.
 563          */
 564         if (!intel_sdvo_read_byte(intel_sdvo,
 565                                   SDVO_I2C_CMD_STATUS,
 566                                   &status))
 567                 goto log_fail;
 568
 569         while ((status == SDVO_CMD_STATUS_PENDING ||
 570                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 571                 if (retry < 10)
 572                         msleep(15);
 573                 else
 574                         udelay(15);
 575
 576                 if (!intel_sdvo_read_byte(intel_sdvo,
 577                                           SDVO_I2C_CMD_STATUS,
 578                                           &status))
 579                         goto log_fail;
 580         }
 581
 582 #define BUF_PRINT(args...) \
 583         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 584
 585         cmd_status = sdvo_cmd_status(status);
 586         if (cmd_status)
 587                 BUF_PRINT("(%s)", cmd_status);
 588         else
 589                 BUF_PRINT("(??? %d)", status);
 590
 591         if (status != SDVO_CMD_STATUS_SUCCESS)
 592                 goto log_fail;
 593
 594         /* Read the command response */
 595         for (i = 0; i < response_len; i++) {
 596                 if (!intel_sdvo_read_byte(intel_sdvo,
 597                                           SDVO_I2C_RETURN_0 + i,
 598                                           &((u8 *)response)[i]))
 599                         goto log_fail;
 600                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 601         }
 602
 603         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 604 #undef BUF_PRINT
 605
 606         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 607         return true;
 608
 609 log_fail:
 610         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 611                       SDVO_NAME(intel_sdvo), buffer);
 612         return false;
 613 }
 614
 615 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 616 {
 617         if (adjusted_mode->crtc_clock >= 100000)
 618                 return 1;
 619         else if (adjusted_mode->crtc_clock >= 50000)
 620                 return 2;
 621         else
 622                 return 4;
 623 }
 624
 625 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 626                                                 u8 ddc_bus)
 627 {
 628         /* This must be the immediately preceding write before the i2c xfer */
 629         return __intel_sdvo_write_cmd(intel_sdvo,
 630                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 631                                       &ddc_bus, 1, false);
 632 }
 633
 634 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 635 {
 636         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 637                 return false;
 638
 639         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 640 }
 641
 642 static bool
 643 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 644 {
 645         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 646                 return false;
 647
 648         return intel_sdvo_read_response(intel_sdvo, value, len);
 649 }
 650
 651 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 652 {
 653         struct intel_sdvo_set_target_input_args targets = {};
 654         return intel_sdvo_set_value(intel_sdvo,
 655                                     SDVO_CMD_SET_TARGET_INPUT,
 656                                     &targets, sizeof(targets));
 657 }
 658
 659 /*
 660  * Return whether each input is trained.
 661  *
 662  * This function is making an assumption about the layout of the response,
 663  * which should be checked against the docs.
 664  */
 665 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 666 {
 667         struct intel_sdvo_get_trained_inputs_response response;
 668
 669         BUILD_BUG_ON(sizeof(response) != 1);
 670         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 671                                   &response, sizeof(response)))
 672                 return false;
 673
 674         *input_1 = response.input0_trained;
 675         *input_2 = response.input1_trained;
 676         return true;
 677 }
 678
 679 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 680                                           u16 outputs)
 681 {
 682         return intel_sdvo_set_value(intel_sdvo,
 683                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 684                                     &outputs, sizeof(outputs));
 685 }
 686
 687 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 688                                           u16 *outputs)
 689 {
 690         return intel_sdvo_get_value(intel_sdvo,
 691                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 692                                     outputs, sizeof(*outputs));
 693 }
 694
 695 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 696                                                int mode)
 697 {
 698         u8 state = SDVO_ENCODER_STATE_ON;
 699
 700         switch (mode) {
 701         case DRM_MODE_DPMS_ON:
 702                 state = SDVO_ENCODER_STATE_ON;
 703                 break;
 704         case DRM_MODE_DPMS_STANDBY:
 705                 state = SDVO_ENCODER_STATE_STANDBY;
 706                 break;
 707         case DRM_MODE_DPMS_SUSPEND:
 708                 state = SDVO_ENCODER_STATE_SUSPEND;
 709                 break;
 710         case DRM_MODE_DPMS_OFF:
 711                 state = SDVO_ENCODER_STATE_OFF;
 712                 break;
 713         }
 714
 715         return intel_sdvo_set_value(intel_sdvo,
 716                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 717 }
 718
 719 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 720                                                    int *clock_min,
 721                                                    int *clock_max)
 722 {
 723         struct intel_sdvo_pixel_clock_range clocks;
 724
 725         BUILD_BUG_ON(sizeof(clocks) != 4);
 726         if (!intel_sdvo_get_value(intel_sdvo,
 727                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 728                                   &clocks, sizeof(clocks)))
 729                 return false;
 730
 731         /* Convert the values from units of 10 kHz to kHz. */
 732         *clock_min = clocks.min * 10;
 733         *clock_max = clocks.max * 10;
 734         return true;
 735 }
 736
 737 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 738                                          u16 outputs)
 739 {
 740         return intel_sdvo_set_value(intel_sdvo,
 741                                     SDVO_CMD_SET_TARGET_OUTPUT,
 742                                     &outputs, sizeof(outputs));
 743 }
 744
 745 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 746                                   struct intel_sdvo_dtd *dtd)
 747 {
 748         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 749                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 750 }
 751
 752 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 753                                   struct intel_sdvo_dtd *dtd)
 754 {
 755         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 756                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 757 }
 758
 759 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 760                                          struct intel_sdvo_dtd *dtd)
 761 {
 762         return intel_sdvo_set_timing(intel_sdvo,
 763                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 764 }
 765
 766 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 767                                          struct intel_sdvo_dtd *dtd)
 768 {
 769         return intel_sdvo_set_timing(intel_sdvo,
 770                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 771 }
 772
 773 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 774                                         struct intel_sdvo_dtd *dtd)
 775 {
 776         return intel_sdvo_get_timing(intel_sdvo,
 777                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 778 }
 779
 780 static bool
 781 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 782                                          struct intel_sdvo_connector *intel_sdvo_connector,
 783                                          const struct drm_display_mode *mode)
 784 {
 785         struct intel_sdvo_preferred_input_timing_args args;
 786
 787         memset(&args, 0, sizeof(args));
 788         args.clock = mode->clock / 10;
 789         args.width = mode->hdisplay;
 790         args.height = mode->vdisplay;
 791         args.interlace = 0;
 792
 793         if (IS_LVDS(intel_sdvo_connector)) {
 794                 const struct drm_display_mode *fixed_mode =
 795                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 796
 797                 if (fixed_mode->hdisplay != args.width ||
 798                     fixed_mode->vdisplay != args.height)
 799                         args.scaled = 1;
 800         }
 801
 802         return intel_sdvo_set_value(intel_sdvo,
 803                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 804                                     &args, sizeof(args));
 805 }
 806
 807 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 808                                                   struct intel_sdvo_dtd *dtd)
 809 {
 810         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 811         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 812         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 813                                     &dtd->part1, sizeof(dtd->part1)) &&
 814                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 815                                      &dtd->part2, sizeof(dtd->part2));
 816 }
 817
 818 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 819 {
 820         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 821 }
 822
 823 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 824                                          const struct drm_display_mode *mode)
 825 {
 826         u16 width, height;
 827         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 828         u16 h_sync_offset, v_sync_offset;
 829         int mode_clock;
 830
 831         memset(dtd, 0, sizeof(*dtd));
 832
 833         width = mode->hdisplay;
 834         height = mode->vdisplay;
 835
 836         /* do some mode translations */
 837         h_blank_len = mode->htotal - mode->hdisplay;
 838         h_sync_len = mode->hsync_end - mode->hsync_start;
 839
 840         v_blank_len = mode->vtotal - mode->vdisplay;
 841         v_sync_len = mode->vsync_end - mode->vsync_start;
 842
 843         h_sync_offset = mode->hsync_start - mode->hdisplay;
 844         v_sync_offset = mode->vsync_start - mode->vdisplay;
 845
 846         mode_clock = mode->clock;
 847         mode_clock /= 10;
 848         dtd->part1.clock = mode_clock;
 849
 850         dtd->part1.h_active = width & 0xff;
 851         dtd->part1.h_blank = h_blank_len & 0xff;
 852         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 853                 ((h_blank_len >> 8) & 0xf);
 854         dtd->part1.v_active = height & 0xff;
 855         dtd->part1.v_blank = v_blank_len & 0xff;
 856         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 857                 ((v_blank_len >> 8) & 0xf);
 858
 859         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 860         dtd->part2.h_sync_width = h_sync_len & 0xff;
 861         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 862                 (v_sync_len & 0xf);
 863         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 864                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 865                 ((v_sync_len & 0x30) >> 4);
 866
 867         dtd->part2.dtd_flags = 0x18;
 868         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 869                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 870         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 871                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 872         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 873                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 874
 875         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 876 }
 877
 878 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 879                                          const struct intel_sdvo_dtd *dtd)
 880 {
 881         struct drm_display_mode mode = {};
 882
 883         mode.hdisplay = dtd->part1.h_active;
 884         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 885         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 886         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 887         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 888         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 889         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 890         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 891
 892         mode.vdisplay = dtd->part1.v_active;
 893         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 894         mode.vsync_start = mode.vdisplay;
 895         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 896         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 897         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 898         mode.vsync_end = mode.vsync_start +
 899                 (dtd->part2.v_sync_off_width & 0xf);
 900         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 901         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 902         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 903
 904         mode.clock = dtd->part1.clock * 10;
 905
 906         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 907                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 908         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 909                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 910         else
 911                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 912         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 913                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 914         else
 915                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 916
 917         drm_mode_set_crtcinfo(&mode, 0);
 918
 919         drm_mode_copy(pmode, &mode);
 920 }
 921
 922 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 923 {
 924         struct intel_sdvo_encode encode;
 925
 926         BUILD_BUG_ON(sizeof(encode) != 2);
 927         return intel_sdvo_get_value(intel_sdvo,
 928                                   SDVO_CMD_GET_SUPP_ENCODE,
 929                                   &encode, sizeof(encode));
 930 }
 931
 932 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 933                                   u8 mode)
 934 {
 935         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 936 }
 937
 938 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 939                                        u8 mode)
 940 {
 941         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 942 }
 943
 944 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 945                                              u8 pixel_repeat)
 946 {
 947         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 948                                     &pixel_repeat, 1);
 949 }
 950
 951 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 952                                        u8 audio_state)
 953 {
 954         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 955                                     &audio_state, 1);
 956 }
 957
 958 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 959                                      u8 *hbuf_size)
 960 {
 961         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 962                                   hbuf_size, 1))
 963                 return false;
 964
 965         /* Buffer size is 0 based, hooray! However zero means zero. */
 966         if (*hbuf_size)
 967                 (*hbuf_size)++;
 968
 969         return true;
 970 }
 971
 972 #if 0
 973 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 974 {
 975         int i, j;
 976         u8 set_buf_index[2];
 977         u8 av_split;
 978         u8 buf_size;
 979         u8 buf[48];
 980         u8 *pos;
 981
 982         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 983
 984         for (i = 0; i <= av_split; i++) {
 985                 set_buf_index[0] = i; set_buf_index[1] = 0;
 986                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 987                                      set_buf_index, 2);
 988                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 989                 intel_sdvo_read_response(encoder, &buf_size, 1);
 990
 991                 pos = buf;
 992                 for (j = 0; j <= buf_size; j += 8) {
 993                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 994                                              NULL, 0);
 995                         intel_sdvo_read_response(encoder, pos, 8);
 996                         pos += 8;
 997                 }
 998         }
 999 }
1000 #endif
1001
1002 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1003                                        unsigned int if_index, u8 tx_rate,
1004                                        const u8 *data, unsigned int length)
1005 {
1006         u8 set_buf_index[2] = { if_index, 0 };
1007         u8 hbuf_size, tmp[8];
1008         int i;
1009
1010         if (!intel_sdvo_set_value(intel_sdvo,
1011                                   SDVO_CMD_SET_HBUF_INDEX,
1012                                   set_buf_index, 2))
1013                 return false;
1014
1015         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1016                 return false;
1017
1018         DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1019                       if_index, length, hbuf_size);
1020
1021         if (hbuf_size < length)
1022                 return false;
1023
1024         for (i = 0; i < hbuf_size; i += 8) {
1025                 memset(tmp, 0, 8);
1026                 if (i < length)
1027                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1028
1029                 if (!intel_sdvo_set_value(intel_sdvo,
1030                                           SDVO_CMD_SET_HBUF_DATA,
1031                                           tmp, 8))
1032                         return false;
1033         }
1034
1035         return intel_sdvo_set_value(intel_sdvo,
1036                                     SDVO_CMD_SET_HBUF_TXRATE,
1037                                     &tx_rate, 1);
1038 }
1039
1040 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1041                                          unsigned int if_index,
1042                                          u8 *data, unsigned int length)
1043 {
1044         u8 set_buf_index[2] = { if_index, 0 };
1045         u8 hbuf_size, tx_rate, av_split;
1046         int i;
1047
1048         if (!intel_sdvo_get_value(intel_sdvo,
1049                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1050                                   &av_split, 1))
1051                 return -ENXIO;
1052
1053         if (av_split < if_index)
1054                 return 0;
1055
1056         if (!intel_sdvo_set_value(intel_sdvo,
1057                                   SDVO_CMD_SET_HBUF_INDEX,
1058                                   set_buf_index, 2))
1059                 return -ENXIO;
1060
1061         if (!intel_sdvo_get_value(intel_sdvo,
1062                                   SDVO_CMD_GET_HBUF_TXRATE,
1063                                   &tx_rate, 1))
1064                 return -ENXIO;
1065
1066         /* TX_DISABLED doesn't mean disabled for ELD */
1067         if (if_index != SDVO_HBUF_INDEX_ELD && tx_rate == SDVO_HBUF_TX_DISABLED)
1068                 return 0;
1069
1070         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1071                 return false;
1072
1073         DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1074                       if_index, length, hbuf_size);
1075
1076         hbuf_size = min_t(unsigned int, length, hbuf_size);
1077
1078         for (i = 0; i < hbuf_size; i += 8) {
1079                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1080                         return -ENXIO;
1081                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1082                                               min_t(unsigned int, 8, hbuf_size - i)))
1083                         return -ENXIO;
1084         }
1085
1086         return hbuf_size;
1087 }
1088
1089 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1090                                              struct intel_crtc_state *crtc_state,
1091                                              struct drm_connector_state *conn_state)
1092 {
1093         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1094         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1095         const struct drm_display_mode *adjusted_mode =
1096                 &crtc_state->hw.adjusted_mode;
1097         int ret;
1098
1099         if (!crtc_state->has_hdmi_sink)
1100                 return true;
1101
1102         crtc_state->infoframes.enable |=
1103                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1104
1105         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1106                                                        conn_state->connector,
1107                                                        adjusted_mode);
1108         if (ret)
1109                 return false;
1110
1111         drm_hdmi_avi_infoframe_quant_range(frame,
1112                                            conn_state->connector,
1113                                            adjusted_mode,
1114                                            crtc_state->limited_color_range ?
1115                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1116                                            HDMI_QUANTIZATION_RANGE_FULL);
1117
1118         ret = hdmi_avi_infoframe_check(frame);
1119         if (drm_WARN_ON(&dev_priv->drm, ret))
1120                 return false;
1121
1122         return true;
1123 }
1124
1125 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1126                                          const struct intel_crtc_state *crtc_state)
1127 {
1128         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1129         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1130         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1131         ssize_t len;
1132
1133         if ((crtc_state->infoframes.enable &
1134              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1135                 return true;
1136
1137         if (drm_WARN_ON(&dev_priv->drm,
1138                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1139                 return false;
1140
1141         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1142         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1143                 return false;
1144
1145         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1146                                           SDVO_HBUF_TX_VSYNC,
1147                                           sdvo_data, len);
1148 }
1149
1150 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1151                                          struct intel_crtc_state *crtc_state)
1152 {
1153         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1154         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1155         ssize_t len;
1156         int ret;
1157
1158         if (!crtc_state->has_hdmi_sink)
1159                 return;
1160
1161         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1162                                         sdvo_data, sizeof(sdvo_data));
1163         if (len < 0) {
1164                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1165                 return;
1166         } else if (len == 0) {
1167                 return;
1168         }
1169
1170         crtc_state->infoframes.enable |=
1171                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1172
1173         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1174         if (ret) {
1175                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1176                 return;
1177         }
1178
1179         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1180                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1181                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1182 }
1183
1184 static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
1185                                struct intel_crtc_state *crtc_state)
1186 {
1187         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1188         ssize_t len;
1189         u8 val;
1190
1191         if (!crtc_state->has_audio)
1192                 return;
1193
1194         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, &val, 1))
1195                 return;
1196
1197         if ((val & SDVO_AUDIO_ELD_VALID) == 0)
1198                 return;
1199
1200         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1201                                         crtc_state->eld, sizeof(crtc_state->eld));
1202         if (len < 0)
1203                 drm_dbg_kms(&i915->drm, "failed to read ELD\n");
1204 }
1205
1206 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1207                                      const struct drm_connector_state *conn_state)
1208 {
1209         struct intel_sdvo_tv_format format;
1210         u32 format_map;
1211
1212         format_map = 1 << conn_state->tv.mode;
1213         memset(&format, 0, sizeof(format));
1214         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1215
1216         BUILD_BUG_ON(sizeof(format) != 6);
1217         return intel_sdvo_set_value(intel_sdvo,
1218                                     SDVO_CMD_SET_TV_FORMAT,
1219                                     &format, sizeof(format));
1220 }
1221
1222 static bool
1223 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1224                                         struct intel_sdvo_connector *intel_sdvo_connector,
1225                                         const struct drm_display_mode *mode)
1226 {
1227         struct intel_sdvo_dtd output_dtd;
1228
1229         if (!intel_sdvo_set_target_output(intel_sdvo,
1230                                           intel_sdvo_connector->output_flag))
1231                 return false;
1232
1233         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1234         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1235                 return false;
1236
1237         return true;
1238 }
1239
1240 /*
1241  * Asks the sdvo controller for the preferred input mode given the output mode.
1242  * Unfortunately we have to set up the full output mode to do that.
1243  */
1244 static bool
1245 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1246                                     struct intel_sdvo_connector *intel_sdvo_connector,
1247                                     const struct drm_display_mode *mode,
1248                                     struct drm_display_mode *adjusted_mode)
1249 {
1250         struct intel_sdvo_dtd input_dtd;
1251
1252         /* Reset the input timing to the screen. Assume always input 0. */
1253         if (!intel_sdvo_set_target_input(intel_sdvo))
1254                 return false;
1255
1256         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1257                                                       intel_sdvo_connector,
1258                                                       mode))
1259                 return false;
1260
1261         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1262                                                    &input_dtd))
1263                 return false;
1264
1265         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1266         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1267
1268         return true;
1269 }
1270
1271 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1272 {
1273         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1274         unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
1275         struct dpll *clock = &pipe_config->dpll;
1276
1277         /*
1278          * SDVO TV has fixed PLL values depend on its clock range,
1279          * this mirrors vbios setting.
1280          */
1281         if (dotclock >= 100000 && dotclock < 140500) {
1282                 clock->p1 = 2;
1283                 clock->p2 = 10;
1284                 clock->n = 3;
1285                 clock->m1 = 16;
1286                 clock->m2 = 8;
1287         } else if (dotclock >= 140500 && dotclock <= 200000) {
1288                 clock->p1 = 1;
1289                 clock->p2 = 10;
1290                 clock->n = 6;
1291                 clock->m1 = 12;
1292                 clock->m2 = 8;
1293         } else {
1294                 drm_dbg_kms(&dev_priv->drm,
1295                             "SDVO TV clock out of range: %i\n", dotclock);
1296                 return -EINVAL;
1297         }
1298
1299         pipe_config->clock_set = true;
1300
1301         return 0;
1302 }
1303
1304 static bool intel_has_hdmi_sink(struct intel_sdvo_connector *intel_sdvo_connector,
1305                                 const struct drm_connector_state *conn_state)
1306 {
1307         struct drm_connector *connector = conn_state->connector;
1308
1309         return intel_sdvo_connector->is_hdmi &&
1310                 connector->display_info.is_hdmi &&
1311                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1312 }
1313
1314 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1315                                            const struct intel_crtc_state *crtc_state,
1316                                            const struct drm_connector_state *conn_state)
1317 {
1318         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1319
1320         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1321                 return false;
1322
1323         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1324 }
1325
1326 static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
1327                                  const struct intel_crtc_state *crtc_state,
1328                                  const struct drm_connector_state *conn_state)
1329 {
1330         struct drm_connector *connector = conn_state->connector;
1331         struct intel_sdvo_connector *intel_sdvo_connector =
1332                 to_intel_sdvo_connector(connector);
1333         const struct intel_digital_connector_state *intel_conn_state =
1334                 to_intel_digital_connector_state(conn_state);
1335
1336         if (!crtc_state->has_hdmi_sink)
1337                 return false;
1338
1339         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
1340                 return intel_sdvo_connector->is_hdmi &&
1341                         connector->display_info.has_audio;
1342         else
1343                 return intel_conn_state->force_audio == HDMI_AUDIO_ON;
1344 }
1345
1346 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1347                                      struct intel_crtc_state *pipe_config,
1348                                      struct drm_connector_state *conn_state)
1349 {
1350         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1351         struct intel_sdvo_connector *intel_sdvo_connector =
1352                 to_intel_sdvo_connector(conn_state->connector);
1353         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1354         struct drm_display_mode *mode = &pipe_config->hw.mode;
1355
1356         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) {
1357                 pipe_config->has_pch_encoder = true;
1358                 if (!intel_fdi_compute_pipe_bpp(pipe_config))
1359                         return -EINVAL;
1360         }
1361
1362         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1363         /* FIXME: Don't increase pipe_bpp */
1364         pipe_config->pipe_bpp = 8*3;
1365         pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
1366         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1367
1368         /*
1369          * We need to construct preferred input timings based on our
1370          * output timings.  To do that, we have to set the output
1371          * timings, even though this isn't really the right place in
1372          * the sequence to do it. Oh well.
1373          */
1374         if (IS_TV(intel_sdvo_connector)) {
1375                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1376                                                              intel_sdvo_connector,
1377                                                              mode))
1378                         return -EINVAL;
1379
1380                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1381                                                            intel_sdvo_connector,
1382                                                            mode,
1383                                                            adjusted_mode);
1384                 pipe_config->sdvo_tv_clock = true;
1385         } else if (IS_LVDS(intel_sdvo_connector)) {
1386                 const struct drm_display_mode *fixed_mode =
1387                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1388                 int ret;
1389
1390                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1391                                                  adjusted_mode);
1392                 if (ret)
1393                         return ret;
1394
1395                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1396                                                              intel_sdvo_connector,
1397                                                              fixed_mode))
1398                         return -EINVAL;
1399
1400                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1401                                                            intel_sdvo_connector,
1402                                                            mode,
1403                                                            adjusted_mode);
1404         }
1405
1406         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1407                 return -EINVAL;
1408
1409         /*
1410          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1411          * SDVO device will factor out the multiplier during mode_set.
1412          */
1413         pipe_config->pixel_multiplier =
1414                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1415
1416         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, conn_state);
1417
1418         pipe_config->has_audio =
1419                 intel_sdvo_has_audio(encoder, pipe_config, conn_state) &&
1420                 intel_audio_compute_config(encoder, pipe_config, conn_state);
1421
1422         pipe_config->limited_color_range =
1423                 intel_sdvo_limited_color_range(encoder, pipe_config,
1424                                                conn_state);
1425
1426         /* Clock computation needs to happen after pixel multiplier. */
1427         if (IS_TV(intel_sdvo_connector)) {
1428                 int ret;
1429
1430                 ret = i9xx_adjust_sdvo_tv_clock(pipe_config);
1431                 if (ret)
1432                         return ret;
1433         }
1434
1435         if (conn_state->picture_aspect_ratio)
1436                 adjusted_mode->picture_aspect_ratio =
1437                         conn_state->picture_aspect_ratio;
1438
1439         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1440                                               pipe_config, conn_state)) {
1441                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1442                 return -EINVAL;
1443         }
1444
1445         return 0;
1446 }
1447
1448 #define UPDATE_PROPERTY(input, NAME) \
1449         do { \
1450                 val = input; \
1451                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1452         } while (0)
1453
1454 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1455                                     const struct intel_sdvo_connector_state *sdvo_state)
1456 {
1457         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1458         struct intel_sdvo_connector *intel_sdvo_conn =
1459                 to_intel_sdvo_connector(conn_state->connector);
1460         u16 val;
1461
1462         if (intel_sdvo_conn->left)
1463                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1464
1465         if (intel_sdvo_conn->top)
1466                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1467
1468         if (intel_sdvo_conn->hpos)
1469                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1470
1471         if (intel_sdvo_conn->vpos)
1472                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1473
1474         if (intel_sdvo_conn->saturation)
1475                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1476
1477         if (intel_sdvo_conn->contrast)
1478                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1479
1480         if (intel_sdvo_conn->hue)
1481                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1482
1483         if (intel_sdvo_conn->brightness)
1484                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1485
1486         if (intel_sdvo_conn->sharpness)
1487                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1488
1489         if (intel_sdvo_conn->flicker_filter)
1490                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1491
1492         if (intel_sdvo_conn->flicker_filter_2d)
1493                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1494
1495         if (intel_sdvo_conn->flicker_filter_adaptive)
1496                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1497
1498         if (intel_sdvo_conn->tv_chroma_filter)
1499                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1500
1501         if (intel_sdvo_conn->tv_luma_filter)
1502                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1503
1504         if (intel_sdvo_conn->dot_crawl)
1505                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1506
1507 #undef UPDATE_PROPERTY
1508 }
1509
1510 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1511                                   struct intel_encoder *intel_encoder,
1512                                   const struct intel_crtc_state *crtc_state,
1513                                   const struct drm_connector_state *conn_state)
1514 {
1515         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1516         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1517         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1518         const struct intel_sdvo_connector_state *sdvo_state =
1519                 to_intel_sdvo_connector_state(conn_state);
1520         struct intel_sdvo_connector *intel_sdvo_connector =
1521                 to_intel_sdvo_connector(conn_state->connector);
1522         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1523         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1524         u32 sdvox;
1525         struct intel_sdvo_in_out_map in_out;
1526         struct intel_sdvo_dtd input_dtd, output_dtd;
1527         int rate;
1528
1529         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1530
1531         /*
1532          * First, set the input mapping for the first input to our controlled
1533          * output. This is only correct if we're a single-input device, in
1534          * which case the first input is the output from the appropriate SDVO
1535          * channel on the motherboard.  In a two-input device, the first input
1536          * will be SDVOB and the second SDVOC.
1537          */
1538         in_out.in0 = intel_sdvo_connector->output_flag;
1539         in_out.in1 = 0;
1540
1541         intel_sdvo_set_value(intel_sdvo,
1542                              SDVO_CMD_SET_IN_OUT_MAP,
1543                              &in_out, sizeof(in_out));
1544
1545         /* Set the output timings to the screen */
1546         if (!intel_sdvo_set_target_output(intel_sdvo,
1547                                           intel_sdvo_connector->output_flag))
1548                 return;
1549
1550         /* lvds has a special fixed output timing. */
1551         if (IS_LVDS(intel_sdvo_connector)) {
1552                 const struct drm_display_mode *fixed_mode =
1553                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1554
1555                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1556         } else {
1557                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1558         }
1559         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1560                 drm_info(&dev_priv->drm,
1561                          "Setting output timings on %s failed\n",
1562                          SDVO_NAME(intel_sdvo));
1563
1564         /* Set the input timing to the screen. Assume always input 0. */
1565         if (!intel_sdvo_set_target_input(intel_sdvo))
1566                 return;
1567
1568         if (crtc_state->has_hdmi_sink) {
1569                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1570                 intel_sdvo_set_colorimetry(intel_sdvo,
1571                                            crtc_state->limited_color_range ?
1572                                            SDVO_COLORIMETRY_RGB220 :
1573                                            SDVO_COLORIMETRY_RGB256);
1574                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1575                 intel_sdvo_set_pixel_replication(intel_sdvo,
1576                                                  !!(adjusted_mode->flags &
1577                                                     DRM_MODE_FLAG_DBLCLK));
1578         } else
1579                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1580
1581         if (IS_TV(intel_sdvo_connector) &&
1582             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1583                 return;
1584
1585         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1586
1587         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1588                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1589         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1590                 drm_info(&dev_priv->drm,
1591                          "Setting input timings on %s failed\n",
1592                          SDVO_NAME(intel_sdvo));
1593
1594         switch (crtc_state->pixel_multiplier) {
1595         default:
1596                 drm_WARN(&dev_priv->drm, 1,
1597                          "unknown pixel multiplier specified\n");
1598                 fallthrough;
1599         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1600         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1601         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1602         }
1603         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1604                 return;
1605
1606         /* Set the SDVO control regs. */
1607         if (DISPLAY_VER(dev_priv) >= 4) {
1608                 /* The real mode polarity is set by the SDVO commands, using
1609                  * struct intel_sdvo_dtd. */
1610                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1611                 if (DISPLAY_VER(dev_priv) < 5)
1612                         sdvox |= SDVO_BORDER_ENABLE;
1613         } else {
1614                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1615                 if (intel_sdvo->base.port == PORT_B)
1616                         sdvox &= SDVOB_PRESERVE_MASK;
1617                 else
1618                         sdvox &= SDVOC_PRESERVE_MASK;
1619                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1620         }
1621
1622         if (HAS_PCH_CPT(dev_priv))
1623                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1624         else
1625                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1626
1627         if (DISPLAY_VER(dev_priv) >= 4) {
1628                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1629         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1630                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1631                 /* done in crtc_mode_set as it lives inside the dpll register */
1632         } else {
1633                 sdvox |= (crtc_state->pixel_multiplier - 1)
1634                         << SDVO_PORT_MULTIPLY_SHIFT;
1635         }
1636
1637         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1638             DISPLAY_VER(dev_priv) < 5)
1639                 sdvox |= SDVO_STALL_SELECT;
1640         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1641 }
1642
1643 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1644 {
1645         struct intel_sdvo_connector *intel_sdvo_connector =
1646                 to_intel_sdvo_connector(&connector->base);
1647         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1648         u16 active_outputs = 0;
1649
1650         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1651
1652         return active_outputs & intel_sdvo_connector->output_flag;
1653 }
1654
1655 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1656                              i915_reg_t sdvo_reg, enum pipe *pipe)
1657 {
1658         u32 val;
1659
1660         val = intel_de_read(dev_priv, sdvo_reg);
1661
1662         /* asserts want to know the pipe even if the port is disabled */
1663         if (HAS_PCH_CPT(dev_priv))
1664                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1665         else if (IS_CHERRYVIEW(dev_priv))
1666                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1667         else
1668                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1669
1670         return val & SDVO_ENABLE;
1671 }
1672
1673 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1674                                     enum pipe *pipe)
1675 {
1676         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1677         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1678         u16 active_outputs = 0;
1679         bool ret;
1680
1681         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1682
1683         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1684
1685         return ret || active_outputs;
1686 }
1687
1688 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1689                                   struct intel_crtc_state *pipe_config)
1690 {
1691         struct drm_device *dev = encoder->base.dev;
1692         struct drm_i915_private *dev_priv = to_i915(dev);
1693         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1694         struct intel_sdvo_dtd dtd;
1695         int encoder_pixel_multiplier = 0;
1696         int dotclock;
1697         u32 flags = 0, sdvox;
1698         u8 val;
1699         bool ret;
1700
1701         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1702
1703         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1704
1705         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1706         if (!ret) {
1707                 /*
1708                  * Some sdvo encoders are not spec compliant and don't
1709                  * implement the mandatory get_timings function.
1710                  */
1711                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1712                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1713         } else {
1714                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1715                         flags |= DRM_MODE_FLAG_PHSYNC;
1716                 else
1717                         flags |= DRM_MODE_FLAG_NHSYNC;
1718
1719                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1720                         flags |= DRM_MODE_FLAG_PVSYNC;
1721                 else
1722                         flags |= DRM_MODE_FLAG_NVSYNC;
1723         }
1724
1725         pipe_config->hw.adjusted_mode.flags |= flags;
1726
1727         /*
1728          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1729          * the sdvo port register, on all other platforms it is part of the dpll
1730          * state. Since the general pipe state readout happens before the
1731          * encoder->get_config we so already have a valid pixel multplier on all
1732          * other platfroms.
1733          */
1734         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1735                 pipe_config->pixel_multiplier =
1736                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1737                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1738         }
1739
1740         dotclock = pipe_config->port_clock;
1741
1742         if (pipe_config->pixel_multiplier)
1743                 dotclock /= pipe_config->pixel_multiplier;
1744
1745         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1746
1747         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1748         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1749                                  &val, 1)) {
1750                 switch (val) {
1751                 case SDVO_CLOCK_RATE_MULT_1X:
1752                         encoder_pixel_multiplier = 1;
1753                         break;
1754                 case SDVO_CLOCK_RATE_MULT_2X:
1755                         encoder_pixel_multiplier = 2;
1756                         break;
1757                 case SDVO_CLOCK_RATE_MULT_4X:
1758                         encoder_pixel_multiplier = 4;
1759                         break;
1760                 }
1761         }
1762
1763         drm_WARN(dev,
1764                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1765                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1766                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1767
1768         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1769                                  &val, 1)) {
1770                 if (val == SDVO_COLORIMETRY_RGB220)
1771                         pipe_config->limited_color_range = true;
1772         }
1773
1774         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1775                                  &val, 1)) {
1776                 if (val & SDVO_AUDIO_PRESENCE_DETECT)
1777                         pipe_config->has_audio = true;
1778         }
1779
1780         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1781                                  &val, 1)) {
1782                 if (val == SDVO_ENCODE_HDMI)
1783                         pipe_config->has_hdmi_sink = true;
1784         }
1785
1786         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1787
1788         intel_sdvo_get_eld(intel_sdvo, pipe_config);
1789 }
1790
1791 static void intel_sdvo_disable_audio(struct intel_encoder *encoder,
1792                                      const struct intel_crtc_state *old_crtc_state,
1793                                      const struct drm_connector_state *old_conn_state)
1794 {
1795         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1796
1797         if (!old_crtc_state->has_audio)
1798                 return;
1799
1800         intel_sdvo_set_audio_state(intel_sdvo, 0);
1801 }
1802
1803 static void intel_sdvo_enable_audio(struct intel_encoder *encoder,
1804                                     const struct intel_crtc_state *crtc_state,
1805                                     const struct drm_connector_state *conn_state)
1806 {
1807         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1808         const u8 *eld = crtc_state->eld;
1809
1810         if (!crtc_state->has_audio)
1811                 return;
1812
1813         intel_sdvo_set_audio_state(intel_sdvo, 0);
1814
1815         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1816                                    SDVO_HBUF_TX_DISABLED,
1817                                    eld, drm_eld_size(eld));
1818
1819         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1820                                    SDVO_AUDIO_PRESENCE_DETECT);
1821 }
1822
1823 static void intel_disable_sdvo(struct intel_atomic_state *state,
1824                                struct intel_encoder *encoder,
1825                                const struct intel_crtc_state *old_crtc_state,
1826                                const struct drm_connector_state *conn_state)
1827 {
1828         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1829         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1830         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1831         u32 temp;
1832
1833         encoder->audio_disable(encoder, old_crtc_state, conn_state);
1834
1835         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1836         if (0)
1837                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1838                                                    DRM_MODE_DPMS_OFF);
1839
1840         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1841
1842         temp &= ~SDVO_ENABLE;
1843         intel_sdvo_write_sdvox(intel_sdvo, temp);
1844
1845         /*
1846          * HW workaround for IBX, we need to move the port
1847          * to transcoder A after disabling it to allow the
1848          * matching DP port to be enabled on transcoder A.
1849          */
1850         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1851                 /*
1852                  * We get CPU/PCH FIFO underruns on the other pipe when
1853                  * doing the workaround. Sweep them under the rug.
1854                  */
1855                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1856                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1857
1858                 temp &= ~SDVO_PIPE_SEL_MASK;
1859                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1860                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1861
1862                 temp &= ~SDVO_ENABLE;
1863                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1864
1865                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1866                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1867                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1868         }
1869 }
1870
1871 static void pch_disable_sdvo(struct intel_atomic_state *state,
1872                              struct intel_encoder *encoder,
1873                              const struct intel_crtc_state *old_crtc_state,
1874                              const struct drm_connector_state *old_conn_state)
1875 {
1876 }
1877
1878 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1879                                   struct intel_encoder *encoder,
1880                                   const struct intel_crtc_state *old_crtc_state,
1881                                   const struct drm_connector_state *old_conn_state)
1882 {
1883         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1884 }
1885
1886 static void intel_enable_sdvo(struct intel_atomic_state *state,
1887                               struct intel_encoder *encoder,
1888                               const struct intel_crtc_state *pipe_config,
1889                               const struct drm_connector_state *conn_state)
1890 {
1891         struct drm_device *dev = encoder->base.dev;
1892         struct drm_i915_private *dev_priv = to_i915(dev);
1893         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1894         struct intel_sdvo_connector *intel_sdvo_connector =
1895                 to_intel_sdvo_connector(conn_state->connector);
1896         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1897         u32 temp;
1898         bool input1, input2;
1899         int i;
1900         bool success;
1901
1902         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1903         temp |= SDVO_ENABLE;
1904         intel_sdvo_write_sdvox(intel_sdvo, temp);
1905
1906         for (i = 0; i < 2; i++)
1907                 intel_crtc_wait_for_next_vblank(crtc);
1908
1909         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1910         /*
1911          * Warn if the device reported failure to sync.
1912          *
1913          * A lot of SDVO devices fail to notify of sync, but it's
1914          * a given it the status is a success, we succeeded.
1915          */
1916         if (success && !input1) {
1917                 drm_dbg_kms(&dev_priv->drm,
1918                             "First %s output reported failure to "
1919                             "sync\n", SDVO_NAME(intel_sdvo));
1920         }
1921
1922         if (0)
1923                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1924                                                    DRM_MODE_DPMS_ON);
1925         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo_connector->output_flag);
1926
1927         encoder->audio_enable(encoder, pipe_config, conn_state);
1928 }
1929
1930 static enum drm_mode_status
1931 intel_sdvo_mode_valid(struct drm_connector *connector,
1932                       struct drm_display_mode *mode)
1933 {
1934         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1935         struct intel_sdvo_connector *intel_sdvo_connector =
1936                 to_intel_sdvo_connector(connector);
1937         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1938         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
1939         int clock = mode->clock;
1940
1941         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1942                 return MODE_NO_DBLESCAN;
1943
1944         if (clock > max_dotclk)
1945                 return MODE_CLOCK_HIGH;
1946
1947         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1948                 if (!has_hdmi_sink)
1949                         return MODE_CLOCK_LOW;
1950                 clock *= 2;
1951         }
1952
1953         if (intel_sdvo->pixel_clock_min > clock)
1954                 return MODE_CLOCK_LOW;
1955
1956         if (intel_sdvo->pixel_clock_max < clock)
1957                 return MODE_CLOCK_HIGH;
1958
1959         if (IS_LVDS(intel_sdvo_connector)) {
1960                 enum drm_mode_status status;
1961
1962                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1963                 if (status != MODE_OK)
1964                         return status;
1965         }
1966
1967         return MODE_OK;
1968 }
1969
1970 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1971 {
1972         BUILD_BUG_ON(sizeof(*caps) != 8);
1973         if (!intel_sdvo_get_value(intel_sdvo,
1974                                   SDVO_CMD_GET_DEVICE_CAPS,
1975                                   caps, sizeof(*caps)))
1976                 return false;
1977
1978         DRM_DEBUG_KMS("SDVO capabilities:\n"
1979                       "  vendor_id: %d\n"
1980                       "  device_id: %d\n"
1981                       "  device_rev_id: %d\n"
1982                       "  sdvo_version_major: %d\n"
1983                       "  sdvo_version_minor: %d\n"
1984                       "  sdvo_num_inputs: %d\n"
1985                       "  smooth_scaling: %d\n"
1986                       "  sharp_scaling: %d\n"
1987                       "  up_scaling: %d\n"
1988                       "  down_scaling: %d\n"
1989                       "  stall_support: %d\n"
1990                       "  output_flags: %d\n",
1991                       caps->vendor_id,
1992                       caps->device_id,
1993                       caps->device_rev_id,
1994                       caps->sdvo_version_major,
1995                       caps->sdvo_version_minor,
1996                       caps->sdvo_num_inputs,
1997                       caps->smooth_scaling,
1998                       caps->sharp_scaling,
1999                       caps->up_scaling,
2000                       caps->down_scaling,
2001                       caps->stall_support,
2002                       caps->output_flags);
2003
2004         return true;
2005 }
2006
2007 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
2008 {
2009         u8 cap;
2010
2011         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
2012                                   &cap, sizeof(cap)))
2013                 return SDVO_COLORIMETRY_RGB256;
2014
2015         return cap;
2016 }
2017
2018 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
2019 {
2020         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
2021         u16 hotplug;
2022
2023         if (!I915_HAS_HOTPLUG(dev_priv))
2024                 return 0;
2025
2026         /*
2027          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
2028          * on the line.
2029          */
2030         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
2031                 return 0;
2032
2033         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
2034                                         &hotplug, sizeof(hotplug)))
2035                 return 0;
2036
2037         return hotplug;
2038 }
2039
2040 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
2041 {
2042         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
2043
2044         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
2045                              &intel_sdvo->hotplug_active, 2);
2046 }
2047
2048 static enum intel_hotplug_state
2049 intel_sdvo_hotplug(struct intel_encoder *encoder,
2050                    struct intel_connector *connector)
2051 {
2052         intel_sdvo_enable_hotplug(encoder);
2053
2054         return intel_encoder_hotplug(encoder, connector);
2055 }
2056
2057 static const struct drm_edid *
2058 intel_sdvo_get_edid(struct drm_connector *connector)
2059 {
2060         struct i2c_adapter *ddc = connector->ddc;
2061
2062         if (!ddc)
2063                 return NULL;
2064
2065         return drm_edid_read_ddc(connector, ddc);
2066 }
2067
2068 /* Mac mini hack -- use the same DDC as the analog connector */
2069 static const struct drm_edid *
2070 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2071 {
2072         struct drm_i915_private *i915 = to_i915(connector->dev);
2073         struct i2c_adapter *ddc;
2074
2075         ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.crt_ddc_pin);
2076         if (!ddc)
2077                 return NULL;
2078
2079         return drm_edid_read_ddc(connector, ddc);
2080 }
2081
2082 static enum drm_connector_status
2083 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2084 {
2085         enum drm_connector_status status;
2086         const struct drm_edid *drm_edid;
2087
2088         drm_edid = intel_sdvo_get_edid(connector);
2089
2090         /*
2091          * When there is no edid and no monitor is connected with VGA
2092          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2093          */
2094         if (!drm_edid)
2095                 drm_edid = intel_sdvo_get_analog_edid(connector);
2096
2097         status = connector_status_unknown;
2098         if (drm_edid) {
2099                 /* DDC bus is shared, match EDID to connector type */
2100                 if (drm_edid_is_digital(drm_edid))
2101                         status = connector_status_connected;
2102                 else
2103                         status = connector_status_disconnected;
2104                 drm_edid_free(drm_edid);
2105         }
2106
2107         return status;
2108 }
2109
2110 static bool
2111 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2112                                   const struct drm_edid *drm_edid)
2113 {
2114         bool monitor_is_digital = drm_edid_is_digital(drm_edid);
2115         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2116
2117         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2118                       connector_is_digital, monitor_is_digital);
2119         return connector_is_digital == monitor_is_digital;
2120 }
2121
2122 static enum drm_connector_status
2123 intel_sdvo_detect(struct drm_connector *connector, bool force)
2124 {
2125         struct drm_i915_private *i915 = to_i915(connector->dev);
2126         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2127         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2128         enum drm_connector_status ret;
2129         u16 response;
2130
2131         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2132                       connector->base.id, connector->name);
2133
2134         if (!intel_display_device_enabled(i915))
2135                 return connector_status_disconnected;
2136
2137         if (!intel_sdvo_set_target_output(intel_sdvo,
2138                                           intel_sdvo_connector->output_flag))
2139                 return connector_status_unknown;
2140
2141         if (!intel_sdvo_get_value(intel_sdvo,
2142                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2143                                   &response, 2))
2144                 return connector_status_unknown;
2145
2146         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2147                       response & 0xff, response >> 8,
2148                       intel_sdvo_connector->output_flag);
2149
2150         if (response == 0)
2151                 return connector_status_disconnected;
2152
2153         if ((intel_sdvo_connector->output_flag & response) == 0)
2154                 ret = connector_status_disconnected;
2155         else if (IS_TMDS(intel_sdvo_connector))
2156                 ret = intel_sdvo_tmds_sink_detect(connector);
2157         else {
2158                 const struct drm_edid *drm_edid;
2159
2160                 /* if we have an edid check it matches the connection */
2161                 drm_edid = intel_sdvo_get_edid(connector);
2162                 if (!drm_edid)
2163                         drm_edid = intel_sdvo_get_analog_edid(connector);
2164                 if (drm_edid) {
2165                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2166                                                               drm_edid))
2167                                 ret = connector_status_connected;
2168                         else
2169                                 ret = connector_status_disconnected;
2170
2171                         drm_edid_free(drm_edid);
2172                 } else {
2173                         ret = connector_status_connected;
2174                 }
2175         }
2176
2177         return ret;
2178 }
2179
2180 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2181 {
2182         int num_modes = 0;
2183         const struct drm_edid *drm_edid;
2184
2185         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2186                       connector->base.id, connector->name);
2187
2188         /* set the bus switch and get the modes */
2189         drm_edid = intel_sdvo_get_edid(connector);
2190
2191         /*
2192          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2193          * link between analog and digital outputs. So, if the regular SDVO
2194          * DDC fails, check to see if the analog output is disconnected, in
2195          * which case we'll look there for the digital DDC data.
2196          */
2197         if (!drm_edid)
2198                 drm_edid = intel_sdvo_get_analog_edid(connector);
2199
2200         if (!drm_edid)
2201                 return 0;
2202
2203         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2204                                               drm_edid))
2205                 num_modes += intel_connector_update_modes(connector, drm_edid);
2206
2207         drm_edid_free(drm_edid);
2208
2209         return num_modes;
2210 }
2211
2212 /*
2213  * Set of SDVO TV modes.
2214  * Note!  This is in reply order (see loop in get_tv_modes).
2215  * XXX: all 60Hz refresh?
2216  */
2217 static const struct drm_display_mode sdvo_tv_modes[] = {
2218         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2219                    416, 0, 200, 201, 232, 233, 0,
2220                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2221         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2222                    416, 0, 240, 241, 272, 273, 0,
2223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2224         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2225                    496, 0, 300, 301, 332, 333, 0,
2226                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2227         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2228                    736, 0, 350, 351, 382, 383, 0,
2229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2230         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2231                    736, 0, 400, 401, 432, 433, 0,
2232                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2233         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2234                    736, 0, 480, 481, 512, 513, 0,
2235                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2236         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2237                    800, 0, 480, 481, 512, 513, 0,
2238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2239         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2240                    800, 0, 576, 577, 608, 609, 0,
2241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2242         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2243                    816, 0, 350, 351, 382, 383, 0,
2244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2245         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2246                    816, 0, 400, 401, 432, 433, 0,
2247                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2248         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2249                    816, 0, 480, 481, 512, 513, 0,
2250                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2251         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2252                    816, 0, 540, 541, 572, 573, 0,
2253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2254         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2255                    816, 0, 576, 577, 608, 609, 0,
2256                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2257         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2258                    864, 0, 576, 577, 608, 609, 0,
2259                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2260         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2261                    896, 0, 600, 601, 632, 633, 0,
2262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2263         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2264                    928, 0, 624, 625, 656, 657, 0,
2265                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2266         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2267                    1016, 0, 766, 767, 798, 799, 0,
2268                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2269         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2270                    1120, 0, 768, 769, 800, 801, 0,
2271                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2272         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2273                    1376, 0, 1024, 1025, 1056, 1057, 0,
2274                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2275 };
2276
2277 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2278 {
2279         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2280         struct intel_sdvo_connector *intel_sdvo_connector =
2281                 to_intel_sdvo_connector(connector);
2282         const struct drm_connector_state *conn_state = connector->state;
2283         struct intel_sdvo_sdtv_resolution_request tv_res;
2284         u32 reply = 0, format_map = 0;
2285         int num_modes = 0;
2286         int i;
2287
2288         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2289                       connector->base.id, connector->name);
2290
2291         /*
2292          * Read the list of supported input resolutions for the selected TV
2293          * format.
2294          */
2295         format_map = 1 << conn_state->tv.mode;
2296         memcpy(&tv_res, &format_map,
2297                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2298
2299         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo_connector->output_flag))
2300                 return 0;
2301
2302         BUILD_BUG_ON(sizeof(tv_res) != 3);
2303         if (!intel_sdvo_write_cmd(intel_sdvo,
2304                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2305                                   &tv_res, sizeof(tv_res)))
2306                 return 0;
2307         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2308                 return 0;
2309
2310         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2311                 if (reply & (1 << i)) {
2312                         struct drm_display_mode *nmode;
2313                         nmode = drm_mode_duplicate(connector->dev,
2314                                                    &sdvo_tv_modes[i]);
2315                         if (nmode) {
2316                                 drm_mode_probed_add(connector, nmode);
2317                                 num_modes++;
2318                         }
2319                 }
2320         }
2321
2322         return num_modes;
2323 }
2324
2325 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2326 {
2327         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2328
2329         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2330                     connector->base.id, connector->name);
2331
2332         return intel_panel_get_modes(to_intel_connector(connector));
2333 }
2334
2335 static int intel_sdvo_get_modes(struct drm_connector *connector)
2336 {
2337         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2338
2339         if (IS_TV(intel_sdvo_connector))
2340                 return intel_sdvo_get_tv_modes(connector);
2341         else if (IS_LVDS(intel_sdvo_connector))
2342                 return intel_sdvo_get_lvds_modes(connector);
2343         else
2344                 return intel_sdvo_get_ddc_modes(connector);
2345 }
2346
2347 static int
2348 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2349                                          const struct drm_connector_state *state,
2350                                          struct drm_property *property,
2351                                          u64 *val)
2352 {
2353         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2354         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2355
2356         if (property == intel_sdvo_connector->tv_format) {
2357                 int i;
2358
2359                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2360                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2361                                 *val = i;
2362
2363                                 return 0;
2364                         }
2365
2366                 drm_WARN_ON(connector->dev, 1);
2367                 *val = 0;
2368         } else if (property == intel_sdvo_connector->top ||
2369                    property == intel_sdvo_connector->bottom)
2370                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2371         else if (property == intel_sdvo_connector->left ||
2372                  property == intel_sdvo_connector->right)
2373                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2374         else if (property == intel_sdvo_connector->hpos)
2375                 *val = sdvo_state->tv.hpos;
2376         else if (property == intel_sdvo_connector->vpos)
2377                 *val = sdvo_state->tv.vpos;
2378         else if (property == intel_sdvo_connector->saturation)
2379                 *val = state->tv.saturation;
2380         else if (property == intel_sdvo_connector->contrast)
2381                 *val = state->tv.contrast;
2382         else if (property == intel_sdvo_connector->hue)
2383                 *val = state->tv.hue;
2384         else if (property == intel_sdvo_connector->brightness)
2385                 *val = state->tv.brightness;
2386         else if (property == intel_sdvo_connector->sharpness)
2387                 *val = sdvo_state->tv.sharpness;
2388         else if (property == intel_sdvo_connector->flicker_filter)
2389                 *val = sdvo_state->tv.flicker_filter;
2390         else if (property == intel_sdvo_connector->flicker_filter_2d)
2391                 *val = sdvo_state->tv.flicker_filter_2d;
2392         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2393                 *val = sdvo_state->tv.flicker_filter_adaptive;
2394         else if (property == intel_sdvo_connector->tv_chroma_filter)
2395                 *val = sdvo_state->tv.chroma_filter;
2396         else if (property == intel_sdvo_connector->tv_luma_filter)
2397                 *val = sdvo_state->tv.luma_filter;
2398         else if (property == intel_sdvo_connector->dot_crawl)
2399                 *val = sdvo_state->tv.dot_crawl;
2400         else
2401                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2402
2403         return 0;
2404 }
2405
2406 static int
2407 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2408                                          struct drm_connector_state *state,
2409                                          struct drm_property *property,
2410                                          u64 val)
2411 {
2412         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2413         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2414
2415         if (property == intel_sdvo_connector->tv_format) {
2416                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2417
2418                 if (state->crtc) {
2419                         struct drm_crtc_state *crtc_state =
2420                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2421
2422                         crtc_state->connectors_changed = true;
2423                 }
2424         } else if (property == intel_sdvo_connector->top ||
2425                    property == intel_sdvo_connector->bottom)
2426                 /* Cannot set these independent from each other */
2427                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2428         else if (property == intel_sdvo_connector->left ||
2429                  property == intel_sdvo_connector->right)
2430                 /* Cannot set these independent from each other */
2431                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2432         else if (property == intel_sdvo_connector->hpos)
2433                 sdvo_state->tv.hpos = val;
2434         else if (property == intel_sdvo_connector->vpos)
2435                 sdvo_state->tv.vpos = val;
2436         else if (property == intel_sdvo_connector->saturation)
2437                 state->tv.saturation = val;
2438         else if (property == intel_sdvo_connector->contrast)
2439                 state->tv.contrast = val;
2440         else if (property == intel_sdvo_connector->hue)
2441                 state->tv.hue = val;
2442         else if (property == intel_sdvo_connector->brightness)
2443                 state->tv.brightness = val;
2444         else if (property == intel_sdvo_connector->sharpness)
2445                 sdvo_state->tv.sharpness = val;
2446         else if (property == intel_sdvo_connector->flicker_filter)
2447                 sdvo_state->tv.flicker_filter = val;
2448         else if (property == intel_sdvo_connector->flicker_filter_2d)
2449                 sdvo_state->tv.flicker_filter_2d = val;
2450         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2451                 sdvo_state->tv.flicker_filter_adaptive = val;
2452         else if (property == intel_sdvo_connector->tv_chroma_filter)
2453                 sdvo_state->tv.chroma_filter = val;
2454         else if (property == intel_sdvo_connector->tv_luma_filter)
2455                 sdvo_state->tv.luma_filter = val;
2456         else if (property == intel_sdvo_connector->dot_crawl)
2457                 sdvo_state->tv.dot_crawl = val;
2458         else
2459                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2460
2461         return 0;
2462 }
2463
2464 static struct drm_connector_state *
2465 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2466 {
2467         struct intel_sdvo_connector_state *state;
2468
2469         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2470         if (!state)
2471                 return NULL;
2472
2473         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2474         return &state->base.base;
2475 }
2476
2477 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2478         .detect = intel_sdvo_detect,
2479         .fill_modes = drm_helper_probe_single_connector_modes,
2480         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2481         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2482         .late_register = intel_connector_register,
2483         .early_unregister = intel_connector_unregister,
2484         .destroy = intel_connector_destroy,
2485         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2486         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2487 };
2488
2489 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2490                                    struct drm_atomic_state *state)
2491 {
2492         struct drm_connector_state *new_conn_state =
2493                 drm_atomic_get_new_connector_state(state, conn);
2494         struct drm_connector_state *old_conn_state =
2495                 drm_atomic_get_old_connector_state(state, conn);
2496         struct intel_sdvo_connector_state *old_state =
2497                 to_intel_sdvo_connector_state(old_conn_state);
2498         struct intel_sdvo_connector_state *new_state =
2499                 to_intel_sdvo_connector_state(new_conn_state);
2500
2501         if (new_conn_state->crtc &&
2502             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2503              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2504                 struct drm_crtc_state *crtc_state =
2505                         drm_atomic_get_new_crtc_state(state,
2506                                                       new_conn_state->crtc);
2507
2508                 crtc_state->connectors_changed = true;
2509         }
2510
2511         return intel_digital_connector_atomic_check(conn, state);
2512 }
2513
2514 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2515         .get_modes = intel_sdvo_get_modes,
2516         .mode_valid = intel_sdvo_mode_valid,
2517         .atomic_check = intel_sdvo_atomic_check,
2518 };
2519
2520 static void intel_sdvo_encoder_destroy(struct drm_encoder *_encoder)
2521 {
2522         struct intel_encoder *encoder = to_intel_encoder(_encoder);
2523         struct intel_sdvo *sdvo = to_sdvo(encoder);
2524         int i;
2525
2526         for (i = 0; i < ARRAY_SIZE(sdvo->ddc); i++) {
2527                 if (sdvo->ddc[i].ddc_bus)
2528                         i2c_del_adapter(&sdvo->ddc[i].ddc);
2529         }
2530
2531         drm_encoder_cleanup(&encoder->base);
2532         kfree(sdvo);
2533 };
2534
2535 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2536         .destroy = intel_sdvo_encoder_destroy,
2537 };
2538
2539 static int
2540 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo,
2541                          struct intel_sdvo_connector *connector)
2542 {
2543         u16 mask = 0;
2544         int num_bits;
2545
2546         /*
2547          * Make a mask of outputs less than or equal to our own priority in the
2548          * list.
2549          */
2550         switch (connector->output_flag) {
2551         case SDVO_OUTPUT_LVDS1:
2552                 mask |= SDVO_OUTPUT_LVDS1;
2553                 fallthrough;
2554         case SDVO_OUTPUT_LVDS0:
2555                 mask |= SDVO_OUTPUT_LVDS0;
2556                 fallthrough;
2557         case SDVO_OUTPUT_TMDS1:
2558                 mask |= SDVO_OUTPUT_TMDS1;
2559                 fallthrough;
2560         case SDVO_OUTPUT_TMDS0:
2561                 mask |= SDVO_OUTPUT_TMDS0;
2562                 fallthrough;
2563         case SDVO_OUTPUT_RGB1:
2564                 mask |= SDVO_OUTPUT_RGB1;
2565                 fallthrough;
2566         case SDVO_OUTPUT_RGB0:
2567                 mask |= SDVO_OUTPUT_RGB0;
2568                 break;
2569         }
2570
2571         /* Count bits to find what number we are in the priority list. */
2572         mask &= sdvo->caps.output_flags;
2573         num_bits = hweight16(mask);
2574         /* If more than 3 outputs, default to DDC bus 3 for now. */
2575         if (num_bits > 3)
2576                 num_bits = 3;
2577
2578         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2579         return num_bits;
2580 }
2581
2582 /*
2583  * Choose the appropriate DDC bus for control bus switch command for this
2584  * SDVO output based on the controlled output.
2585  *
2586  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2587  * outputs, then LVDS outputs.
2588  */
2589 static struct intel_sdvo_ddc *
2590 intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
2591                           struct intel_sdvo_connector *connector)
2592 {
2593         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2594         const struct sdvo_device_mapping *mapping;
2595         int ddc_bus;
2596
2597         if (sdvo->base.port == PORT_B)
2598                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2599         else
2600                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2601
2602         if (mapping->initialized)
2603                 ddc_bus = (mapping->ddc_pin & 0xf0) >> 4;
2604         else
2605                 ddc_bus = intel_sdvo_guess_ddc_bus(sdvo, connector);
2606
2607         if (ddc_bus < 1 || ddc_bus > 3)
2608                 return NULL;
2609
2610         return &sdvo->ddc[ddc_bus - 1];
2611 }
2612
2613 static void
2614 intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
2615 {
2616         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2617         const struct sdvo_device_mapping *mapping;
2618         u8 pin;
2619
2620         if (sdvo->base.port == PORT_B)
2621                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2622         else
2623                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2624
2625         if (mapping->initialized &&
2626             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2627                 pin = mapping->i2c_pin;
2628         else
2629                 pin = GMBUS_PIN_DPB;
2630
2631         drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] I2C pin %d, slave addr 0x%x\n",
2632                     sdvo->base.base.base.id, sdvo->base.base.name,
2633                     pin, sdvo->slave_addr);
2634
2635         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2636
2637         /*
2638          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2639          * our code totally fails once we start using gmbus. Hence fall back to
2640          * bit banging for now.
2641          */
2642         intel_gmbus_force_bit(sdvo->i2c, true);
2643 }
2644
2645 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2646 static void
2647 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2648 {
2649         intel_gmbus_force_bit(sdvo->i2c, false);
2650 }
2651
2652 static bool
2653 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
2654 {
2655         return intel_sdvo_check_supp_encode(intel_sdvo);
2656 }
2657
2658 static u8
2659 intel_sdvo_get_slave_addr(struct intel_sdvo *sdvo)
2660 {
2661         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2662         const struct sdvo_device_mapping *my_mapping, *other_mapping;
2663
2664         if (sdvo->base.port == PORT_B) {
2665                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2666                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2667         } else {
2668                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2669                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2670         }
2671
2672         /* If the BIOS described our SDVO device, take advantage of it. */
2673         if (my_mapping->slave_addr)
2674                 return my_mapping->slave_addr;
2675
2676         /*
2677          * If the BIOS only described a different SDVO device, use the
2678          * address that it isn't using.
2679          */
2680         if (other_mapping->slave_addr) {
2681                 if (other_mapping->slave_addr == 0x70)
2682                         return 0x72;
2683                 else
2684                         return 0x70;
2685         }
2686
2687         /*
2688          * No SDVO device info is found for another DVO port,
2689          * so use mapping assumption we had before BIOS parsing.
2690          */
2691         if (sdvo->base.port == PORT_B)
2692                 return 0x70;
2693         else
2694                 return 0x72;
2695 }
2696
2697 static int
2698 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
2699                           struct intel_sdvo *sdvo, int bit);
2700
2701 static int
2702 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2703                           struct intel_sdvo *encoder)
2704 {
2705         struct drm_i915_private *i915 = to_i915(encoder->base.base.dev);
2706         struct intel_sdvo_ddc *ddc = NULL;
2707         int ret;
2708
2709         if (HAS_DDC(connector))
2710                 ddc = intel_sdvo_select_ddc_bus(encoder, connector);
2711
2712         ret = drm_connector_init_with_ddc(encoder->base.base.dev,
2713                                           &connector->base.base,
2714                                           &intel_sdvo_connector_funcs,
2715                                           connector->base.base.connector_type,
2716                                           ddc ? &ddc->ddc : NULL);
2717         if (ret < 0)
2718                 return ret;
2719
2720         drm_connector_helper_add(&connector->base.base,
2721                                  &intel_sdvo_connector_helper_funcs);
2722
2723         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2724         connector->base.base.interlace_allowed = true;
2725         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2726
2727         intel_connector_attach_encoder(&connector->base, &encoder->base);
2728
2729         if (ddc)
2730                 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] using %s\n",
2731                             connector->base.base.base.id, connector->base.base.name,
2732                             ddc->ddc.name);
2733
2734         return 0;
2735 }
2736
2737 static void
2738 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2739                                struct intel_sdvo_connector *connector)
2740 {
2741         intel_attach_force_audio_property(&connector->base.base);
2742         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2743                 intel_attach_broadcast_rgb_property(&connector->base.base);
2744         intel_attach_aspect_ratio_property(&connector->base.base);
2745 }
2746
2747 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2748 {
2749         struct intel_sdvo_connector *sdvo_connector;
2750         struct intel_sdvo_connector_state *conn_state;
2751
2752         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2753         if (!sdvo_connector)
2754                 return NULL;
2755
2756         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2757         if (!conn_state) {
2758                 kfree(sdvo_connector);
2759                 return NULL;
2760         }
2761
2762         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2763                                             &conn_state->base.base);
2764
2765         intel_panel_init_alloc(&sdvo_connector->base);
2766
2767         return sdvo_connector;
2768 }
2769
2770 static bool
2771 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
2772 {
2773         struct drm_encoder *encoder = &intel_sdvo->base.base;
2774         struct drm_connector *connector;
2775         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2776         struct intel_connector *intel_connector;
2777         struct intel_sdvo_connector *intel_sdvo_connector;
2778
2779         DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type);
2780
2781         intel_sdvo_connector = intel_sdvo_connector_alloc();
2782         if (!intel_sdvo_connector)
2783                 return false;
2784
2785         intel_sdvo_connector->output_flag = type;
2786
2787         intel_connector = &intel_sdvo_connector->base;
2788         connector = &intel_connector->base;
2789         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2790                 intel_sdvo_connector->output_flag) {
2791                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2792                 /*
2793                  * Some SDVO devices have one-shot hotplug interrupts.
2794                  * Ensure that they get re-enabled when an interrupt happens.
2795                  */
2796                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2797                 intel_encoder->hotplug = intel_sdvo_hotplug;
2798                 intel_sdvo_enable_hotplug(intel_encoder);
2799         } else {
2800                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2801         }
2802         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2803         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2804
2805         if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
2806                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2807                 intel_sdvo_connector->is_hdmi = true;
2808         }
2809
2810         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2811                 kfree(intel_sdvo_connector);
2812                 return false;
2813         }
2814
2815         if (intel_sdvo_connector->is_hdmi)
2816                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2817
2818         return true;
2819 }
2820
2821 static bool
2822 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
2823 {
2824         struct drm_encoder *encoder = &intel_sdvo->base.base;
2825         struct drm_connector *connector;
2826         struct intel_connector *intel_connector;
2827         struct intel_sdvo_connector *intel_sdvo_connector;
2828
2829         DRM_DEBUG_KMS("initialising TV type 0x%x\n", type);
2830
2831         intel_sdvo_connector = intel_sdvo_connector_alloc();
2832         if (!intel_sdvo_connector)
2833                 return false;
2834
2835         intel_connector = &intel_sdvo_connector->base;
2836         connector = &intel_connector->base;
2837         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2838         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2839
2840         intel_sdvo_connector->output_flag = type;
2841
2842         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2843                 kfree(intel_sdvo_connector);
2844                 return false;
2845         }
2846
2847         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2848                 goto err;
2849
2850         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2851                 goto err;
2852
2853         return true;
2854
2855 err:
2856         intel_connector_destroy(connector);
2857         return false;
2858 }
2859
2860 static bool
2861 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
2862 {
2863         struct drm_encoder *encoder = &intel_sdvo->base.base;
2864         struct drm_connector *connector;
2865         struct intel_connector *intel_connector;
2866         struct intel_sdvo_connector *intel_sdvo_connector;
2867
2868         DRM_DEBUG_KMS("initialising analog type 0x%x\n", type);
2869
2870         intel_sdvo_connector = intel_sdvo_connector_alloc();
2871         if (!intel_sdvo_connector)
2872                 return false;
2873
2874         intel_connector = &intel_sdvo_connector->base;
2875         connector = &intel_connector->base;
2876         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2877         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2878         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2879
2880         intel_sdvo_connector->output_flag = type;
2881
2882         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2883                 kfree(intel_sdvo_connector);
2884                 return false;
2885         }
2886
2887         return true;
2888 }
2889
2890 static bool
2891 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
2892 {
2893         struct drm_encoder *encoder = &intel_sdvo->base.base;
2894         struct drm_i915_private *i915 = to_i915(encoder->dev);
2895         struct drm_connector *connector;
2896         struct intel_connector *intel_connector;
2897         struct intel_sdvo_connector *intel_sdvo_connector;
2898
2899         DRM_DEBUG_KMS("initialising LVDS type 0x%x\n", type);
2900
2901         intel_sdvo_connector = intel_sdvo_connector_alloc();
2902         if (!intel_sdvo_connector)
2903                 return false;
2904
2905         intel_connector = &intel_sdvo_connector->base;
2906         connector = &intel_connector->base;
2907         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2908         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2909
2910         intel_sdvo_connector->output_flag = type;
2911
2912         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2913                 kfree(intel_sdvo_connector);
2914                 return false;
2915         }
2916
2917         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2918                 goto err;
2919
2920         intel_bios_init_panel_late(i915, &intel_connector->panel, NULL, NULL);
2921
2922         /*
2923          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2924          * SDVO->LVDS transcoders can't cope with the EDID mode.
2925          */
2926         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2927
2928         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2929                 mutex_lock(&i915->drm.mode_config.mutex);
2930
2931                 intel_ddc_get_modes(connector, connector->ddc);
2932                 intel_panel_add_edid_fixed_modes(intel_connector, false);
2933
2934                 mutex_unlock(&i915->drm.mode_config.mutex);
2935         }
2936
2937         intel_panel_init(intel_connector, NULL);
2938
2939         if (!intel_panel_preferred_fixed_mode(intel_connector))
2940                 goto err;
2941
2942         return true;
2943
2944 err:
2945         intel_connector_destroy(connector);
2946         return false;
2947 }
2948
2949 static u16 intel_sdvo_filter_output_flags(u16 flags)
2950 {
2951         flags &= SDVO_OUTPUT_MASK;
2952
2953         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2954         if (!(flags & SDVO_OUTPUT_TMDS0))
2955                 flags &= ~SDVO_OUTPUT_TMDS1;
2956
2957         if (!(flags & SDVO_OUTPUT_RGB0))
2958                 flags &= ~SDVO_OUTPUT_RGB1;
2959
2960         if (!(flags & SDVO_OUTPUT_LVDS0))
2961                 flags &= ~SDVO_OUTPUT_LVDS1;
2962
2963         return flags;
2964 }
2965
2966 static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
2967 {
2968         if (type & SDVO_TMDS_MASK)
2969                 return intel_sdvo_dvi_init(sdvo, type);
2970         else if (type & SDVO_TV_MASK)
2971                 return intel_sdvo_tv_init(sdvo, type);
2972         else if (type & SDVO_RGB_MASK)
2973                 return intel_sdvo_analog_init(sdvo, type);
2974         else if (type & SDVO_LVDS_MASK)
2975                 return intel_sdvo_lvds_init(sdvo, type);
2976         else
2977                 return false;
2978 }
2979
2980 static bool
2981 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
2982 {
2983         static const u16 probe_order[] = {
2984                 SDVO_OUTPUT_TMDS0,
2985                 SDVO_OUTPUT_TMDS1,
2986                 /* TV has no XXX1 function block */
2987                 SDVO_OUTPUT_SVID0,
2988                 SDVO_OUTPUT_CVBS0,
2989                 SDVO_OUTPUT_YPRPB0,
2990                 SDVO_OUTPUT_RGB0,
2991                 SDVO_OUTPUT_RGB1,
2992                 SDVO_OUTPUT_LVDS0,
2993                 SDVO_OUTPUT_LVDS1,
2994         };
2995         u16 flags;
2996         int i;
2997
2998         flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
2999
3000         if (flags == 0) {
3001                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
3002                               SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
3003                 return false;
3004         }
3005
3006         for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
3007                 u16 type = flags & probe_order[i];
3008
3009                 if (!type)
3010                         continue;
3011
3012                 if (!intel_sdvo_output_init(intel_sdvo, type))
3013                         return false;
3014         }
3015
3016         intel_sdvo->base.pipe_mask = ~0;
3017
3018         return true;
3019 }
3020
3021 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
3022 {
3023         struct drm_device *dev = intel_sdvo->base.base.dev;
3024         struct drm_connector *connector, *tmp;
3025
3026         list_for_each_entry_safe(connector, tmp,
3027                                  &dev->mode_config.connector_list, head) {
3028                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3029                         drm_connector_unregister(connector);
3030                         intel_connector_destroy(connector);
3031                 }
3032         }
3033 }
3034
3035 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3036                                           struct intel_sdvo_connector *intel_sdvo_connector,
3037                                           int type)
3038 {
3039         struct drm_device *dev = intel_sdvo->base.base.dev;
3040         struct intel_sdvo_tv_format format;
3041         u32 format_map, i;
3042
3043         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3044                 return false;
3045
3046         BUILD_BUG_ON(sizeof(format) != 6);
3047         if (!intel_sdvo_get_value(intel_sdvo,
3048                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3049                                   &format, sizeof(format)))
3050                 return false;
3051
3052         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3053
3054         if (format_map == 0)
3055                 return false;
3056
3057         intel_sdvo_connector->format_supported_num = 0;
3058         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3059                 if (format_map & (1 << i))
3060                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3061
3062
3063         intel_sdvo_connector->tv_format =
3064                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
3065                                             "mode", intel_sdvo_connector->format_supported_num);
3066         if (!intel_sdvo_connector->tv_format)
3067                 return false;
3068
3069         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3070                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3071                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3072
3073         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3074         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3075                                    intel_sdvo_connector->tv_format, 0);
3076         return true;
3077
3078 }
3079
3080 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3081         if (enhancements.name) { \
3082                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3083                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3084                         return false; \
3085                 intel_sdvo_connector->name = \
3086                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3087                 if (!intel_sdvo_connector->name) return false; \
3088                 state_assignment = response; \
3089                 drm_object_attach_property(&connector->base, \
3090                                            intel_sdvo_connector->name, 0); \
3091                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3092                               data_value[0], data_value[1], response); \
3093         } \
3094 } while (0)
3095
3096 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3097
3098 static bool
3099 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3100                                       struct intel_sdvo_connector *intel_sdvo_connector,
3101                                       struct intel_sdvo_enhancements_reply enhancements)
3102 {
3103         struct drm_device *dev = intel_sdvo->base.base.dev;
3104         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3105         struct drm_connector_state *conn_state = connector->state;
3106         struct intel_sdvo_connector_state *sdvo_state =
3107                 to_intel_sdvo_connector_state(conn_state);
3108         u16 response, data_value[2];
3109
3110         /* when horizontal overscan is supported, Add the left/right property */
3111         if (enhancements.overscan_h) {
3112                 if (!intel_sdvo_get_value(intel_sdvo,
3113                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3114                                           &data_value, 4))
3115                         return false;
3116
3117                 if (!intel_sdvo_get_value(intel_sdvo,
3118                                           SDVO_CMD_GET_OVERSCAN_H,
3119                                           &response, 2))
3120                         return false;
3121
3122                 sdvo_state->tv.overscan_h = response;
3123
3124                 intel_sdvo_connector->max_hscan = data_value[0];
3125                 intel_sdvo_connector->left =
3126                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3127                 if (!intel_sdvo_connector->left)
3128                         return false;
3129
3130                 drm_object_attach_property(&connector->base,
3131                                            intel_sdvo_connector->left, 0);
3132
3133                 intel_sdvo_connector->right =
3134                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3135                 if (!intel_sdvo_connector->right)
3136                         return false;
3137
3138                 drm_object_attach_property(&connector->base,
3139                                               intel_sdvo_connector->right, 0);
3140                 DRM_DEBUG_KMS("h_overscan: max %d, "
3141                               "default %d, current %d\n",
3142                               data_value[0], data_value[1], response);
3143         }
3144
3145         if (enhancements.overscan_v) {
3146                 if (!intel_sdvo_get_value(intel_sdvo,
3147                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3148                                           &data_value, 4))
3149                         return false;
3150
3151                 if (!intel_sdvo_get_value(intel_sdvo,
3152                                           SDVO_CMD_GET_OVERSCAN_V,
3153                                           &response, 2))
3154                         return false;
3155
3156                 sdvo_state->tv.overscan_v = response;
3157
3158                 intel_sdvo_connector->max_vscan = data_value[0];
3159                 intel_sdvo_connector->top =
3160                         drm_property_create_range(dev, 0,
3161                                             "top_margin", 0, data_value[0]);
3162                 if (!intel_sdvo_connector->top)
3163                         return false;
3164
3165                 drm_object_attach_property(&connector->base,
3166                                            intel_sdvo_connector->top, 0);
3167
3168                 intel_sdvo_connector->bottom =
3169                         drm_property_create_range(dev, 0,
3170                                             "bottom_margin", 0, data_value[0]);
3171                 if (!intel_sdvo_connector->bottom)
3172                         return false;
3173
3174                 drm_object_attach_property(&connector->base,
3175                                               intel_sdvo_connector->bottom, 0);
3176                 DRM_DEBUG_KMS("v_overscan: max %d, "
3177                               "default %d, current %d\n",
3178                               data_value[0], data_value[1], response);
3179         }
3180
3181         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3182         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3183         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3184         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3185         ENHANCEMENT(&conn_state->tv, hue, HUE);
3186         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3187         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3188         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3189         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3190         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3191         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3192         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3193
3194         if (enhancements.dot_crawl) {
3195                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3196                         return false;
3197
3198                 sdvo_state->tv.dot_crawl = response & 0x1;
3199                 intel_sdvo_connector->dot_crawl =
3200                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3201                 if (!intel_sdvo_connector->dot_crawl)
3202                         return false;
3203
3204                 drm_object_attach_property(&connector->base,
3205                                            intel_sdvo_connector->dot_crawl, 0);
3206                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3207         }
3208
3209         return true;
3210 }
3211
3212 static bool
3213 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3214                                         struct intel_sdvo_connector *intel_sdvo_connector,
3215                                         struct intel_sdvo_enhancements_reply enhancements)
3216 {
3217         struct drm_device *dev = intel_sdvo->base.base.dev;
3218         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3219         u16 response, data_value[2];
3220
3221         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3222
3223         return true;
3224 }
3225 #undef ENHANCEMENT
3226 #undef _ENHANCEMENT
3227
3228 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3229                                                struct intel_sdvo_connector *intel_sdvo_connector)
3230 {
3231         union {
3232                 struct intel_sdvo_enhancements_reply reply;
3233                 u16 response;
3234         } enhancements;
3235
3236         BUILD_BUG_ON(sizeof(enhancements) != 2);
3237
3238         if (!intel_sdvo_get_value(intel_sdvo,
3239                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3240                                   &enhancements, sizeof(enhancements)) ||
3241             enhancements.response == 0) {
3242                 DRM_DEBUG_KMS("No enhancement is supported\n");
3243                 return true;
3244         }
3245
3246         if (IS_TV(intel_sdvo_connector))
3247                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3248         else if (IS_LVDS(intel_sdvo_connector))
3249                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3250         else
3251                 return true;
3252 }
3253
3254 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3255                                      struct i2c_msg *msgs,
3256                                      int num)
3257 {
3258         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3259         struct intel_sdvo *sdvo = ddc->sdvo;
3260
3261         if (!__intel_sdvo_set_control_bus_switch(sdvo, 1 << ddc->ddc_bus))
3262                 return -EIO;
3263
3264         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3265 }
3266
3267 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3268 {
3269         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3270         struct intel_sdvo *sdvo = ddc->sdvo;
3271
3272         return sdvo->i2c->algo->functionality(sdvo->i2c);
3273 }
3274
3275 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3276         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3277         .functionality  = intel_sdvo_ddc_proxy_func
3278 };
3279
3280 static void proxy_lock_bus(struct i2c_adapter *adapter,
3281                            unsigned int flags)
3282 {
3283         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3284         struct intel_sdvo *sdvo = ddc->sdvo;
3285
3286         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3287 }
3288
3289 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3290                              unsigned int flags)
3291 {
3292         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3293         struct intel_sdvo *sdvo = ddc->sdvo;
3294
3295         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3296 }
3297
3298 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3299                              unsigned int flags)
3300 {
3301         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3302         struct intel_sdvo *sdvo = ddc->sdvo;
3303
3304         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3305 }
3306
3307 static const struct i2c_lock_operations proxy_lock_ops = {
3308         .lock_bus =    proxy_lock_bus,
3309         .trylock_bus = proxy_trylock_bus,
3310         .unlock_bus =  proxy_unlock_bus,
3311 };
3312
3313 static int
3314 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
3315                           struct intel_sdvo *sdvo, int ddc_bus)
3316 {
3317         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
3318         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3319
3320         ddc->sdvo = sdvo;
3321         ddc->ddc_bus = ddc_bus;
3322
3323         ddc->ddc.owner = THIS_MODULE;
3324         ddc->ddc.class = I2C_CLASS_DDC;
3325         snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
3326                  port_name(sdvo->base.port), ddc_bus);
3327         ddc->ddc.dev.parent = &pdev->dev;
3328         ddc->ddc.algo_data = ddc;
3329         ddc->ddc.algo = &intel_sdvo_ddc_proxy;
3330         ddc->ddc.lock_ops = &proxy_lock_ops;
3331
3332         return i2c_add_adapter(&ddc->ddc);
3333 }
3334
3335 static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port)
3336 {
3337         if (HAS_PCH_SPLIT(dev_priv))
3338                 return port == PORT_B;
3339         else
3340                 return port == PORT_B || port == PORT_C;
3341 }
3342
3343 static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
3344                                    enum port port)
3345 {
3346         return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port),
3347                          "Platform does not support SDVO %c\n", port_name(port));
3348 }
3349
3350 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3351                      i915_reg_t sdvo_reg, enum port port)
3352 {
3353         struct intel_encoder *intel_encoder;
3354         struct intel_sdvo *intel_sdvo;
3355         int i;
3356
3357         if (!assert_port_valid(dev_priv, port))
3358                 return false;
3359
3360         if (!assert_sdvo_port_valid(dev_priv, port))
3361                 return false;
3362
3363         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3364         if (!intel_sdvo)
3365                 return false;
3366
3367         /* encoder type will be decided later */
3368         intel_encoder = &intel_sdvo->base;
3369         intel_encoder->type = INTEL_OUTPUT_SDVO;
3370         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3371         intel_encoder->port = port;
3372
3373         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3374                          &intel_sdvo_enc_funcs, 0,
3375                          "SDVO %c", port_name(port));
3376
3377         intel_sdvo->sdvo_reg = sdvo_reg;
3378         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(intel_sdvo) >> 1;
3379
3380         intel_sdvo_select_i2c_bus(intel_sdvo);
3381
3382         /* Read the regs to test if we can talk to the device */
3383         for (i = 0; i < 0x40; i++) {
3384                 u8 byte;
3385
3386                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3387                         drm_dbg_kms(&dev_priv->drm,
3388                                     "No SDVO device found on %s\n",
3389                                     SDVO_NAME(intel_sdvo));
3390                         goto err;
3391                 }
3392         }
3393
3394         intel_encoder->compute_config = intel_sdvo_compute_config;
3395         if (HAS_PCH_SPLIT(dev_priv)) {
3396                 intel_encoder->disable = pch_disable_sdvo;
3397                 intel_encoder->post_disable = pch_post_disable_sdvo;
3398         } else {
3399                 intel_encoder->disable = intel_disable_sdvo;
3400         }
3401         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3402         intel_encoder->enable = intel_enable_sdvo;
3403         intel_encoder->audio_enable = intel_sdvo_enable_audio;
3404         intel_encoder->audio_disable = intel_sdvo_disable_audio;
3405         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3406         intel_encoder->get_config = intel_sdvo_get_config;
3407
3408         /* In default case sdvo lvds is false */
3409         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3410                 goto err;
3411
3412         intel_sdvo->colorimetry_cap =
3413                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3414
3415         for (i = 0; i < ARRAY_SIZE(intel_sdvo->ddc); i++) {
3416                 int ret;
3417
3418                 ret = intel_sdvo_init_ddc_proxy(&intel_sdvo->ddc[i],
3419                                                 intel_sdvo, i + 1);
3420                 if (ret)
3421                         goto err;
3422         }
3423
3424         if (!intel_sdvo_output_setup(intel_sdvo)) {
3425                 drm_dbg_kms(&dev_priv->drm,
3426                             "SDVO output failed to setup on %s\n",
3427                             SDVO_NAME(intel_sdvo));
3428                 /* Output_setup can leave behind connectors! */
3429                 goto err_output;
3430         }
3431
3432         /*
3433          * Only enable the hotplug irq if we need it, to work around noisy
3434          * hotplug lines.
3435          */
3436         if (intel_sdvo->hotplug_active) {
3437                 if (intel_sdvo->base.port == PORT_B)
3438                         intel_encoder->hpd_pin = HPD_SDVO_B;
3439                 else
3440                         intel_encoder->hpd_pin = HPD_SDVO_C;
3441         }
3442
3443         /*
3444          * Cloning SDVO with anything is often impossible, since the SDVO
3445          * encoder can request a special input timing mode. And even if that's
3446          * not the case we have evidence that cloning a plain unscaled mode with
3447          * VGA doesn't really work. Furthermore the cloning flags are way too
3448          * simplistic anyway to express such constraints, so just give up on
3449          * cloning for SDVO encoders.
3450          */
3451         intel_sdvo->base.cloneable = 0;
3452
3453         /* Set the input timing to the screen. Assume always input 0. */
3454         if (!intel_sdvo_set_target_input(intel_sdvo))
3455                 goto err_output;
3456
3457         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3458                                                     &intel_sdvo->pixel_clock_min,
3459                                                     &intel_sdvo->pixel_clock_max))
3460                 goto err_output;
3461
3462         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3463                         "clock range %dMHz - %dMHz, "
3464                         "num inputs: %d, "
3465                         "output 1: %c, output 2: %c\n",
3466                         SDVO_NAME(intel_sdvo),
3467                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3468                         intel_sdvo->caps.device_rev_id,
3469                         intel_sdvo->pixel_clock_min / 1000,
3470                         intel_sdvo->pixel_clock_max / 1000,
3471                         intel_sdvo->caps.sdvo_num_inputs,
3472                         /* check currently supported outputs */
3473                         intel_sdvo->caps.output_flags &
3474                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
3475                          SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
3476                          SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
3477                         intel_sdvo->caps.output_flags &
3478                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
3479                          SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
3480         return true;
3481
3482 err_output:
3483         intel_sdvo_output_cleanup(intel_sdvo);
3484 err:
3485         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3486         intel_sdvo_encoder_destroy(&intel_encoder->base);
3487
3488         return false;
3489 }