1 # SPDX-License-Identifier: GPL-2.0
2 ccflags-y := -I $(srctree)/$(src)
3 ccflags-y += -I $(srctree)/$(src)/disp/dpu1
4 ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi
5 ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp
8 adreno/adreno_device.o \
15 adreno/a5xx_preempt.o \
20 msm-$(CONFIG_DRM_MSM_HDMI) += \
27 hdmi/hdmi_phy_8960.o \
28 hdmi/hdmi_phy_8996.o \
29 hdmi/hdmi_phy_8x60.o \
30 hdmi/hdmi_phy_8x74.o \
31 hdmi/hdmi_pll_8960.o \
33 msm-$(CONFIG_DRM_MSM_MDP4) += \
34 disp/mdp4/mdp4_crtc.o \
35 disp/mdp4/mdp4_dsi_encoder.o \
36 disp/mdp4/mdp4_dtv_encoder.o \
37 disp/mdp4/mdp4_lcdc_encoder.o \
38 disp/mdp4/mdp4_lvds_connector.o \
39 disp/mdp4/mdp4_lvds_pll.o \
40 disp/mdp4/mdp4_irq.o \
41 disp/mdp4/mdp4_kms.o \
42 disp/mdp4/mdp4_plane.o \
44 msm-$(CONFIG_DRM_MSM_MDP5) += \
45 disp/mdp5/mdp5_cfg.o \
46 disp/mdp5/mdp5_cmd_encoder.o \
47 disp/mdp5/mdp5_ctl.o \
48 disp/mdp5/mdp5_crtc.o \
49 disp/mdp5/mdp5_encoder.o \
50 disp/mdp5/mdp5_irq.o \
51 disp/mdp5/mdp5_kms.o \
52 disp/mdp5/mdp5_pipe.o \
53 disp/mdp5/mdp5_mixer.o \
54 disp/mdp5/mdp5_plane.o \
55 disp/mdp5/mdp5_smp.o \
57 msm-$(CONFIG_DRM_MSM_DPU) += \
58 disp/dpu1/dpu_core_perf.o \
59 disp/dpu1/dpu_crtc.o \
60 disp/dpu1/dpu_encoder.o \
61 disp/dpu1/dpu_encoder_phys_cmd.o \
62 disp/dpu1/dpu_encoder_phys_vid.o \
63 disp/dpu1/dpu_encoder_phys_wb.o \
64 disp/dpu1/dpu_formats.o \
65 disp/dpu1/dpu_hw_catalog.o \
66 disp/dpu1/dpu_hw_cdm.o \
67 disp/dpu1/dpu_hw_ctl.o \
68 disp/dpu1/dpu_hw_dsc.o \
69 disp/dpu1/dpu_hw_dsc_1_2.o \
70 disp/dpu1/dpu_hw_interrupts.o \
71 disp/dpu1/dpu_hw_intf.o \
72 disp/dpu1/dpu_hw_lm.o \
73 disp/dpu1/dpu_hw_pingpong.o \
74 disp/dpu1/dpu_hw_sspp.o \
75 disp/dpu1/dpu_hw_dspp.o \
76 disp/dpu1/dpu_hw_merge3d.o \
77 disp/dpu1/dpu_hw_top.o \
78 disp/dpu1/dpu_hw_util.o \
79 disp/dpu1/dpu_hw_vbif.o \
80 disp/dpu1/dpu_hw_wb.o \
82 disp/dpu1/dpu_plane.o \
84 disp/dpu1/dpu_vbif.o \
85 disp/dpu1/dpu_writeback.o
87 msm-$(CONFIG_DRM_MSM_MDSS) += \
93 disp/msm_disp_snapshot.o \
94 disp/msm_disp_snapshot_util.o \
96 msm_atomic_tracepoints.o \
115 msm_gpu_tracepoints.o \
118 msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
121 msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o
123 msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
134 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
136 msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
138 msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
144 msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
145 msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
146 msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
147 msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
148 msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
149 msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o
151 obj-$(CONFIG_DRM_MSM) += msm.o