drivers/gpu/drm/msm/Makefile

   1 # SPDX-License-Identifier: GPL-2.0
   2 ccflags-y := -I $(src)
   3 ccflags-y += -I $(obj)/generated
   4 ccflags-y += -I $(src)/disp/dpu1
   5 ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(src)/dsi
   6 ccflags-$(CONFIG_DRM_MSM_DP) += -I $(src)/dp
   7
   8 adreno-y := \
   9         adreno/adreno_device.o \
  10         adreno/adreno_gpu.o \
  11         adreno/a2xx_catalog.o \
  12         adreno/a2xx_gpu.o \
  13         adreno/a2xx_gpummu.o \
  14         adreno/a3xx_catalog.o \
  15         adreno/a3xx_gpu.o \
  16         adreno/a4xx_catalog.o \
  17         adreno/a4xx_gpu.o \
  18         adreno/a5xx_catalog.o \
  19         adreno/a5xx_gpu.o \
  20         adreno/a5xx_power.o \
  21         adreno/a5xx_preempt.o \
  22         adreno/a6xx_catalog.o \
  23         adreno/a6xx_gpu.o \
  24         adreno/a6xx_gmu.o \
  25         adreno/a6xx_hfi.o \
  26         adreno/a6xx_preempt.o \
  27
  28 adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
  29
  30 adreno-$(CONFIG_DRM_MSM_GPU_STATE)      += adreno/a6xx_gpu_state.o
  31
  32 msm-display-$(CONFIG_DRM_MSM_HDMI) += \
  33         hdmi/hdmi.o \
  34         hdmi/hdmi_audio.o \
  35         hdmi/hdmi_bridge.o \
  36         hdmi/hdmi_hpd.o \
  37         hdmi/hdmi_i2c.o \
  38         hdmi/hdmi_phy.o \
  39         hdmi/hdmi_phy_8960.o \
  40         hdmi/hdmi_phy_8996.o \
  41         hdmi/hdmi_phy_8998.o \
  42         hdmi/hdmi_phy_8x60.o \
  43         hdmi/hdmi_phy_8x74.o \
  44         hdmi/hdmi_pll_8960.o \
  45
  46 msm-display-$(CONFIG_DRM_MSM_MDP4) += \
  47         disp/mdp4/mdp4_crtc.o \
  48         disp/mdp4/mdp4_dsi_encoder.o \
  49         disp/mdp4/mdp4_dtv_encoder.o \
  50         disp/mdp4/mdp4_lcdc_encoder.o \
  51         disp/mdp4/mdp4_lvds_connector.o \
  52         disp/mdp4/mdp4_lvds_pll.o \
  53         disp/mdp4/mdp4_irq.o \
  54         disp/mdp4/mdp4_kms.o \
  55         disp/mdp4/mdp4_plane.o \
  56
  57 msm-display-$(CONFIG_DRM_MSM_MDP5) += \
  58         disp/mdp5/mdp5_cfg.o \
  59         disp/mdp5/mdp5_cmd_encoder.o \
  60         disp/mdp5/mdp5_ctl.o \
  61         disp/mdp5/mdp5_crtc.o \
  62         disp/mdp5/mdp5_encoder.o \
  63         disp/mdp5/mdp5_irq.o \
  64         disp/mdp5/mdp5_kms.o \
  65         disp/mdp5/mdp5_pipe.o \
  66         disp/mdp5/mdp5_mixer.o \
  67         disp/mdp5/mdp5_plane.o \
  68         disp/mdp5/mdp5_smp.o \
  69
  70 msm-display-$(CONFIG_DRM_MSM_DPU) += \
  71         disp/dpu1/dpu_core_perf.o \
  72         disp/dpu1/dpu_crtc.o \
  73         disp/dpu1/dpu_encoder.o \
  74         disp/dpu1/dpu_encoder_phys_cmd.o \
  75         disp/dpu1/dpu_encoder_phys_vid.o \
  76         disp/dpu1/dpu_encoder_phys_wb.o \
  77         disp/dpu1/dpu_formats.o \
  78         disp/dpu1/dpu_hw_catalog.o \
  79         disp/dpu1/dpu_hw_cdm.o \
  80         disp/dpu1/dpu_hw_ctl.o \
  81         disp/dpu1/dpu_hw_cwb.o \
  82         disp/dpu1/dpu_hw_dsc.o \
  83         disp/dpu1/dpu_hw_dsc_1_2.o \
  84         disp/dpu1/dpu_hw_interrupts.o \
  85         disp/dpu1/dpu_hw_intf.o \
  86         disp/dpu1/dpu_hw_lm.o \
  87         disp/dpu1/dpu_hw_pingpong.o \
  88         disp/dpu1/dpu_hw_sspp.o \
  89         disp/dpu1/dpu_hw_dspp.o \
  90         disp/dpu1/dpu_hw_merge3d.o \
  91         disp/dpu1/dpu_hw_top.o \
  92         disp/dpu1/dpu_hw_util.o \
  93         disp/dpu1/dpu_hw_vbif.o \
  94         disp/dpu1/dpu_hw_wb.o \
  95         disp/dpu1/dpu_kms.o \
  96         disp/dpu1/dpu_plane.o \
  97         disp/dpu1/dpu_rm.o \
  98         disp/dpu1/dpu_vbif.o \
  99         disp/dpu1/dpu_writeback.o
 100
 101 msm-display-$(CONFIG_DRM_MSM_MDSS) += \
 102         msm_mdss.o \
 103
 104 msm-display-y += \
 105         disp/mdp_format.o \
 106         disp/mdp_kms.o \
 107         disp/msm_disp_snapshot.o \
 108         disp/msm_disp_snapshot_util.o \
 109
 110 msm-y += \
 111         msm_atomic.o \
 112         msm_atomic_tracepoints.o \
 113         msm_debugfs.o \
 114         msm_drv.o \
 115         msm_fb.o \
 116         msm_fence.o \
 117         msm_gem.o \
 118         msm_gem_prime.o \
 119         msm_gem_shrinker.o \
 120         msm_gem_submit.o \
 121         msm_gem_vma.o \
 122         msm_gpu.o \
 123         msm_gpu_devfreq.o \
 124         msm_io_utils.o \
 125         msm_iommu.o \
 126         msm_kms.o \
 127         msm_perf.o \
 128         msm_rd.o \
 129         msm_ringbuffer.o \
 130         msm_submitqueue.o \
 131         msm_gpu_tracepoints.o \
 132
 133 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
 134
 135 msm-display-$(CONFIG_DEBUG_FS) += \
 136         dp/dp_debug.o
 137
 138 msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
 139         dp/dp_catalog.o \
 140         dp/dp_ctrl.o \
 141         dp/dp_display.o \
 142         dp/dp_drm.o \
 143         dp/dp_link.o \
 144         dp/dp_panel.o \
 145         dp/dp_audio.o \
 146         dp/dp_utils.o
 147
 148 msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
 149
 150 msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
 151                         dsi/dsi_cfg.o \
 152                         dsi/dsi_host.o \
 153                         dsi/dsi_manager.o \
 154                         dsi/phy/dsi_phy.o
 155
 156 msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
 157 msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
 158 msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
 159 msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
 160 msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
 161 msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o
 162
 163 msm-y += $(adreno-y) $(msm-display-y)
 164
 165 obj-$(CONFIG_DRM_MSM)   += msm.o
 166
 167 ifeq (y,$(CONFIG_DRM_MSM_VALIDATE_XML))
 168         headergen-opts += --validate
 169 else
 170         headergen-opts += --no-validate
 171 endif
 172
 173 quiet_cmd_headergen = GENHDR  $@
 174       cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(src)/registers/gen_header.py \
 175                       $(headergen-opts) --rnn $(src)/registers --xml $< c-defines > $@
 176
 177 $(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \
 178                 $(src)/registers/adreno/adreno_common.xml \
 179                 $(src)/registers/adreno/adreno_pm4.xml \
 180                 $(src)/registers/freedreno_copyright.xml \
 181                 $(src)/registers/gen_header.py \
 182                 $(src)/registers/rules-fd.xsd \
 183                 FORCE
 184         $(call if_changed,headergen)
 185
 186 $(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \
 187                 $(src)/registers/freedreno_copyright.xml \
 188                 $(src)/registers/gen_header.py \
 189                 $(src)/registers/rules-fd.xsd \
 190                 FORCE
 191         $(call if_changed,headergen)
 192
 193 ADRENO_HEADERS = \
 194         generated/a2xx.xml.h \
 195         generated/a3xx.xml.h \
 196         generated/a4xx.xml.h \
 197         generated/a5xx.xml.h \
 198         generated/a6xx.xml.h \
 199         generated/a6xx_gmu.xml.h \
 200         generated/adreno_common.xml.h \
 201         generated/adreno_pm4.xml.h \
 202
 203 DISPLAY_HEADERS = \
 204         generated/dsi_phy_7nm.xml.h \
 205         generated/dsi_phy_10nm.xml.h \
 206         generated/dsi_phy_14nm.xml.h \
 207         generated/dsi_phy_20nm.xml.h \
 208         generated/dsi_phy_28nm_8960.xml.h \
 209         generated/dsi_phy_28nm.xml.h \
 210         generated/dsi.xml.h \
 211         generated/hdmi.xml.h \
 212         generated/mdp4.xml.h \
 213         generated/mdp5.xml.h \
 214         generated/mdp_common.xml.h \
 215         generated/mdss.xml.h \
 216         generated/sfpb.xml.h
 217
 218 $(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS))
 219 $(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS))
 220
 221 targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS)