[linux.git] / drivers / ata / pata_ali.c

/*
 * pata_ali.c 	- ALI 15x3 PATA for new ATA layer
 *			  (C) 2005 Red Hat Inc
 *			  Alan Cox <[email protected]>
 *
 * based in part upon
 * linux/drivers/ide/pci/alim15x3.c		Version 0.17	2003/01/02
 *
 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
 *  Copyright (C) 1999-2000 CJ, [email protected], Maintainer
 *
 *  Copyright (C) 1998-2000 Andre Hedrick ([email protected])
 *  May be copied or modified under the terms of the GNU General Public License
 *  Copyright (C) 2002 Alan Cox <[email protected]>
 *  ALi (now ULi M5228) support by Clear Zhang <[email protected]>
 *
 *  Documentation
 *	Chipset documentation available under NDA only
 *
 *  TODO/CHECK
 *	Cannot have ATAPI on both master & slave for rev < c2 (???) but
 *	otherwise should do atapi DMA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/dmi.h>

#define DRV_NAME "pata_ali"
#define DRV_VERSION "0.7.5"

/*
 *	Cable special cases
 */

static const struct dmi_system_id cable_dmi_table[] = {
	{
		.ident = "HP Pavilion N5430",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
		},
	},
	{
		.ident = "Toshiba Satelite S1800-814",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
			DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
		},
	},
	{ }
};

static int ali_cable_override(struct pci_dev *pdev)
{
	/* Fujitsu P2000 */
	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	   	return 1;
	/* Systems by DMI */
	if (dmi_check_system(cable_dmi_table))
		return 1;
	return 0;
}

/**
 *	ali_c2_cable_detect	-	cable detection
 *	@ap: ATA port
 *
 *	Perform cable detection for C2 and later revisions
 */

static int ali_c2_cable_detect(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u8 ata66;

	/* Certain laptops use short but suitable cables and don't
	   implement the detect logic */

	if (ali_cable_override(pdev))
		return ATA_CBL_PATA40_SHORT;

	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	   Bit set for 40 pin */
	pci_read_config_byte(pdev, 0x4A, &ata66);
	if (ata66 & (1 << ap->port_no))
		return ATA_CBL_PATA40;
	else
		return ATA_CBL_PATA80;
}

/**
 *	ali_20_filter		-	filter for earlier ALI DMA
 *	@ap: ALi ATA port
 *	@adev: attached device
 *
 *	Ensure that we do not do DMA on CD devices. We may be able to
 *	fix that later on. Also ensure we do not do UDMA on WDC drives
 */

static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
{
	char model_num[ATA_ID_PROD_LEN + 1];
	/* No DMA on anything but a disk for now */
	if (adev->class != ATA_DEV_ATA)
		mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
	if (strstr(model_num, "WDC"))
		return mask &= ~ATA_MASK_UDMA;
	return ata_pci_default_filter(adev, mask);
}

/**
 *	ali_fifo_control	-	FIFO manager
 *	@ap: ALi channel to control
 *	@adev: device for FIFO control
 *	@on: 0 for off 1 for on
 *
 *	Enable or disable the FIFO on a given device. Because of the way the
 *	ALi FIFO works it provides a boost on ATA disk but can be confused by
 *	ATAPI and we must therefore manage it.
 */

static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int pio_fifo = 0x54 + ap->port_no;
	u8 fifo;
	int shift = 4 * adev->devno;

	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	   0x00. Not all the docs agree but the behaviour we now use is the
	   one stated in the BIOS Programming Guide */

	pci_read_config_byte(pdev, pio_fifo, &fifo);
	fifo &= ~(0x0F << shift);
	if (on)
		fifo |= (on << shift);
	pci_write_config_byte(pdev, pio_fifo, fifo);
}

/**
 *	ali_program_modes	-	load mode registers
 *	@ap: ALi channel to load
 *	@adev: Device the timing is for
 *	@cmd: Command timing
 *	@data: Data timing
 *	@ultra: UDMA timing or zero for off
 *
 *	Loads the timing registers for cmd/data and disable UDMA if
 *	ultra is zero. If ultra is set then load and enable the UDMA
 *	timing but do not touch the command/data timing.
 */

static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int cas = 0x58 + 4 * ap->port_no;	/* Command timing */
	int cbt = 0x59 + 4 * ap->port_no;	/* Command timing */
	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	int udmat = 0x56 + ap->port_no;	/* UDMA timing */
	int shift = 4 * adev->devno;
	u8 udma;

	if (t != NULL) {
		t->setup = FIT(t->setup, 1, 8) & 7;
		t->act8b = FIT(t->act8b, 1, 8) & 7;
		t->rec8b = FIT(t->rec8b, 1, 16) & 15;
		t->active = FIT(t->active, 1, 8) & 7;
		t->recover = FIT(t->recover, 1, 16) & 15;

		pci_write_config_byte(pdev, cas, t->setup);
		pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
		pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
	}

	/* Set up the UDMA enable */
	pci_read_config_byte(pdev, udmat, &udma);
	udma &= ~(0x0F << shift);
	udma |= ultra << shift;
	pci_write_config_byte(pdev, udmat, udma);
}

/**
 *	ali_set_piomode	-	set initial PIO mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	Program the ALi registers for PIO mode. FIXME: add timings for
 *	PIO5.
 */

static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */

	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
	if (pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		if (pair->dma_mode) {
			ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		}
	}

	/* PIO FIFO is only permitted on ATA disk */
	if (adev->class != ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x00);
	ali_program_modes(ap, adev, &t, 0);
	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x05);

}

/**
 *	ali_set_dmamode	-	set initial DMA mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	FIXME: MWDMA timings
 */

static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);


	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x08);

	if (adev->dma_mode >= XFER_UDMA_0) {
		ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
		if (adev->dma_mode >= XFER_UDMA_3) {
			u8 reg4b;
			pci_read_config_byte(pdev, 0x4B, &reg4b);
			reg4b |= 1;
			pci_write_config_byte(pdev, 0x4B, reg4b);
		}
	} else {
		ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
		if (pair) {
			struct ata_timing p;
			ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			if (pair->dma_mode) {
				ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
				ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			}
		}
		ali_program_modes(ap, adev, &t, 0);
	}
}

/**
 *	ali_lock_sectors	-	Keep older devices to 255 sector mode
 *	@adev: Device
 *
 *	Called during the bus probe for each device that is found. We use
 *	this call to lock the sector count of the device to 255 or less on
 *	older ALi controllers. If we didn't do this then large I/O's would
 *	require LBA48 commands which the older ALi requires are issued by
 *	slower PIO methods
 */

static void ali_lock_sectors(struct ata_device *adev)
{
	adev->max_sectors = 255;
}

static struct scsi_host_template ali_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
};

/*
 *	Port operations for PIO only ALi
 */

static struct ata_port_operations ali_early_port_ops = {
	.set_piomode	= ali_set_piomode,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};

/*
 *	Port operations for DMA capable ALi without cable
 *	detect
 */
static struct ata_port_operations ali_20_port_ops = {
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ali_20_filter,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect
 */
static struct ata_port_operations ali_c2_port_ops = {
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ali_c2_cable_detect,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect and LBA48
 */
static struct ata_port_operations ali_c5_port_ops = {
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ali_c2_cable_detect,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};


/**
 *	ali_init_chipset	-	chip setup function
 *	@pdev: PCI device of ATA controller
 *
 *	Perform the setup on the device that must be done both at boot
 *	and at resume time.
 */

static void ali_init_chipset(struct pci_dev *pdev)
{
	u8 tmp;
	struct pci_dev *north, *isa_bridge;

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (pdev->revision >= 0x20 && pdev->revision < 0xC2) {
		/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		/* Clear CD-ROM DMA write bit */
		tmp &= 0x7F;
		pci_write_config_byte(pdev, 0x4B, tmp);
	} else if (pdev->revision >= 0xC2) {
		/* Enable cable detection logic */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
	}
	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);

	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
		/* Configure the ALi bridge logic. For non ALi rely on BIOS.
		   Set the south bridge enable bit */
		pci_read_config_byte(isa_bridge, 0x79, &tmp);
		if (pdev->revision == 0xC2)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
		else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
	}
	if (pdev->revision >= 0x20) {
		/*
		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
		 * via 0x54/55.
		 */
		pci_read_config_byte(pdev, 0x53, &tmp);
		if (pdev->revision <= 0x20)
			tmp &= ~0x02;
		if (pdev->revision >= 0xc7)
			tmp |= 0x03;
		else
			tmp |= 0x01;	/* CD_ROM enable for DMA */
		pci_write_config_byte(pdev, 0x53, tmp);
	}
	pci_dev_put(isa_bridge);
	pci_dev_put(north);
	ata_pci_clear_simplex(pdev);
}
/**
 *	ali_init_one		-	discovery callback
 *	@pdev: PCI device ID
 *	@id: PCI table info
 *
 *	An ALi IDE interface has been discovered. Figure out what revision
 *	and perform configuration work before handing it to the ATA layer
 */

static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static const struct ata_port_info info_early = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = 0x1f,
		.port_ops = &ali_early_port_ops
	};
	/* Revision 0x20 added DMA */
	static const struct ata_port_info info_20 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0x20 with support logic added UDMA */
	static const struct ata_port_info info_20_udma = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x07,	/* UDMA33 */
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0xC2 adds UDMA66 */
	static const struct ata_port_info info_c2 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = ATA_UDMA4,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC3 is UDMA66 for now */
	static const struct ata_port_info info_c3 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = ATA_UDMA4,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC4 is UDMA100 */
	static const struct ata_port_info info_c4 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = ATA_UDMA5,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
	static const struct ata_port_info info_c5 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = ATA_UDMA6,
		.port_ops = &ali_c5_port_ops
	};

	const struct ata_port_info *ppi[] = { NULL, NULL };
	u8 tmp;
	struct pci_dev *isa_bridge;

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (pdev->revision < 0x20) {
		ppi[0] = &info_early;
	} else if (pdev->revision < 0xC2) {
        	ppi[0] = &info_20;
	} else if (pdev->revision == 0xC2) {
        	ppi[0] = &info_c2;
	} else if (pdev->revision == 0xC3) {
        	ppi[0] = &info_c3;
	} else if (pdev->revision == 0xC4) {
        	ppi[0] = &info_c4;
	} else
        	ppi[0] = &info_c5;

	ali_init_chipset(pdev);

	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
		/* Are we paired with a UDMA capable chip */
		pci_read_config_byte(isa_bridge, 0x5E, &tmp);
		if ((tmp & 0x1E) == 0x12)
	        	ppi[0] = &info_20_udma;
		pci_dev_put(isa_bridge);
	}
	return ata_pci_init_one(pdev, ppi);
}

#ifdef CONFIG_PM
static int ali_reinit_one(struct pci_dev *pdev)
{
	ali_init_chipset(pdev);
	return ata_pci_device_resume(pdev);
}
#endif

static const struct pci_device_id ali[] = {
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },

	{ },
};

static struct pci_driver ali_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= ali,
	.probe 		= ali_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= ali_reinit_one,
#endif
};

static int __init ali_init(void)
{
	return pci_register_driver(&ali_pci_driver);
}


static void __exit ali_exit(void)
{
	pci_unregister_driver(&ali_pci_driver);
}


MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for ALi PATA");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, ali);
MODULE_VERSION(DRV_VERSION);

module_init(ali_init);
module_exit(ali_exit);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_ali.c - ALI 15x3 PATA for new ATA layer
	3	* (C) 2005 Red Hat Inc
	4	* Alan Cox <[email protected]>
	5	*
	6	* based in part upon
	7	* linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
	8	*
	9	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
	10	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
	11	* Copyright (C) 1999-2000 CJ, [email protected], Maintainer
	12	*
	13	* Copyright (C) 1998-2000 Andre Hedrick ([email protected])
	14	* May be copied or modified under the terms of the GNU General Public License
	15	* Copyright (C) 2002 Alan Cox <[email protected]>
	16	* ALi (now ULi M5228) support by Clear Zhang <[email protected]>
	17	*
	18	* Documentation
	19	* Chipset documentation available under NDA only
	20	*
	21	* TODO/CHECK
	22	* Cannot have ATAPI on both master & slave for rev < c2 (???) but
	23	* otherwise should do atapi DMA.
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/pci.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
	31	#include <linux/delay.h>
	32	#include <scsi/scsi_host.h>
	33	#include <linux/libata.h>
	34	#include <linux/dmi.h>
	35
	36	#define DRV_NAME "pata_ali"
2a3103ce	37	#define DRV_VERSION "0.7.5"
669a5db4 JG	38
	39	/*
	40	* Cable special cases
	41	*/
	42
1855256c	43	static const struct dmi_system_id cable_dmi_table[] = {
669a5db4 JG	44	{
	45	.ident = "HP Pavilion N5430",
	46	.matches = {
	47	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
5c8d5201	48	DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
669a5db4 JG	49	},
669a5db4 JG	50	},
03e6f489 DE	51	{
	52	.ident = "Toshiba Satelite S1800-814",
	53	.matches = {
	54	DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
	55	DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
	56	},
	57	},
669a5db4 JG	58	{ }
	59	};
	60
	61	static int ali_cable_override(struct pci_dev *pdev)
	62	{
	63	/* Fujitsu P2000 */
	64	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	65	return 1;
	66	/* Systems by DMI */
	67	if (dmi_check_system(cable_dmi_table))
	68	return 1;
	69	return 0;
	70	}
	71
	72	/**
	73	* ali_c2_cable_detect - cable detection
	74	* @ap: ATA port
	75	*
	76	* Perform cable detection for C2 and later revisions
	77	*/
	78
	79	static int ali_c2_cable_detect(struct ata_port *ap)
	80	{
	81	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	82	u8 ata66;
	83
	84	/* Certain laptops use short but suitable cables and don't
	85	implement the detect logic */
	86
	87	if (ali_cable_override(pdev))
fc085150	88	return ATA_CBL_PATA40_SHORT;
669a5db4 JG	89
	90	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	91	Bit set for 40 pin */
	92	pci_read_config_byte(pdev, 0x4A, &ata66);
	93	if (ata66 & (1 << ap->port_no))
	94	return ATA_CBL_PATA40;
	95	else
	96	return ATA_CBL_PATA80;
	97	}
	98
669a5db4 JG	99	/**
	100	* ali_20_filter - filter for earlier ALI DMA
	101	* @ap: ALi ATA port
	102	* @adev: attached device
	103	*
	104	* Ensure that we do not do DMA on CD devices. We may be able to
	105	* fix that later on. Also ensure we do not do UDMA on WDC drives
	106	*/
	107
a76b62ca	108	static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
669a5db4	109	{
8bfa79fc	110	char model_num[ATA_ID_PROD_LEN + 1];
669a5db4 JG	111	/* No DMA on anything but a disk for now */
	112	if (adev->class != ATA_DEV_ATA)
	113	mask &= ~(ATA_MASK_MWDMA \| ATA_MASK_UDMA);
8bfa79fc	114	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
669a5db4 JG	115	if (strstr(model_num, "WDC"))
669a5db4 JG	116	return mask &= ~ATA_MASK_UDMA;
a76b62ca	117	return ata_pci_default_filter(adev, mask);
669a5db4 JG	118	}
	119
	120	/**
	121	* ali_fifo_control - FIFO manager
	122	* @ap: ALi channel to control
	123	* @adev: device for FIFO control
	124	* @on: 0 for off 1 for on
	125	*
	126	* Enable or disable the FIFO on a given device. Because of the way the
	127	* ALi FIFO works it provides a boost on ATA disk but can be confused by
	128	* ATAPI and we must therefore manage it.
	129	*/
	130
	131	static void ali_fifo_control(struct ata_port ap, struct ata_device adev, int on)
	132	{
	133	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	134	int pio_fifo = 0x54 + ap->port_no;
	135	u8 fifo;
	136	int shift = 4 * adev->devno;
	137
	138	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	139	0x00. Not all the docs agree but the behaviour we now use is the
	140	one stated in the BIOS Programming Guide */
85cd7251	141
669a5db4 JG	142	pci_read_config_byte(pdev, pio_fifo, &fifo);
	143	fifo &= ~(0x0F << shift);
	144	if (on)
	145	fifo \|= (on << shift);
	146	pci_write_config_byte(pdev, pio_fifo, fifo);
	147	}
	148
	149	/**
	150	* ali_program_modes - load mode registers
	151	* @ap: ALi channel to load
	152	* @adev: Device the timing is for
	153	* @cmd: Command timing
	154	* @data: Data timing
	155	* @ultra: UDMA timing or zero for off
	156	*
	157	* Loads the timing registers for cmd/data and disable UDMA if
	158	* ultra is zero. If ultra is set then load and enable the UDMA
	159	* timing but do not touch the command/data timing.
	160	*/
	161
	162	static void ali_program_modes(struct ata_port ap, struct ata_device adev, struct ata_timing *t, u8 ultra)
	163	{
	164	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	165	int cas = 0x58 + 4 * ap->port_no; /* Command timing */
	166	int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
	167	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	168	int udmat = 0x56 + ap->port_no; /* UDMA timing */
	169	int shift = 4 * adev->devno;
	170	u8 udma;
	171
	172	if (t != NULL) {
	173	t->setup = FIT(t->setup, 1, 8) & 7;
	174	t->act8b = FIT(t->act8b, 1, 8) & 7;
	175	t->rec8b = FIT(t->rec8b, 1, 16) & 15;
	176	t->active = FIT(t->active, 1, 8) & 7;
	177	t->recover = FIT(t->recover, 1, 16) & 15;
	178
	179	pci_write_config_byte(pdev, cas, t->setup);
	180	pci_write_config_byte(pdev, cbt, (t->act8b << 4) \| t->rec8b);
	181	pci_write_config_byte(pdev, drwt, (t->active << 4) \| t->recover);
	182	}
	183
	184	/* Set up the UDMA enable */
	185	pci_read_config_byte(pdev, udmat, &udma);
	186	udma &= ~(0x0F << shift);
	187	udma \|= ultra << shift;
	188	pci_write_config_byte(pdev, udmat, udma);
	189	}
	190
	191	/**
	192	* ali_set_piomode - set initial PIO mode data
	193	* @ap: ATA interface
	194	* @adev: ATA device
	195	*
	196	* Program the ALi registers for PIO mode. FIXME: add timings for
	197	* PIO5.
	198	*/
	199
	200	static void ali_set_piomode(struct ata_port ap, struct ata_device adev)
	201	{
	202	struct ata_device *pair = ata_dev_pair(adev);
	203	struct ata_timing t;
	204	unsigned long T = 1000000000 / 33333; /* PCI clock based */
	205
206	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
207	if (pair) {
208	struct ata_timing p;
209	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
210	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
211	if (pair->dma_mode) {
212	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
213	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
214	}
215	}
216
217	/* PIO FIFO is only permitted on ATA disk */
218	if (adev->class != ATA_DEV_ATA)
219	ali_fifo_control(ap, adev, 0x00);
220	ali_program_modes(ap, adev, &t, 0);
221	if (adev->class == ATA_DEV_ATA)
222	ali_fifo_control(ap, adev, 0x05);
223
224	}
225
226	/**
227	* ali_set_dmamode - set initial DMA mode data
228	* @ap: ATA interface
229	* @adev: ATA device
230	*
231	* FIXME: MWDMA timings
232	*/
233
234	static void ali_set_dmamode(struct ata_port ap, struct ata_device adev)
235	{
236	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
237	struct ata_device *pair = ata_dev_pair(adev);
238	struct ata_timing t;
239	unsigned long T = 1000000000 / 33333; /* PCI clock based */
240	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
241
242
243	if (adev->class == ATA_DEV_ATA)
244	ali_fifo_control(ap, adev, 0x08);
245
246	if (adev->dma_mode >= XFER_UDMA_0) {
247	ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
248	if (adev->dma_mode >= XFER_UDMA_3) {
249	u8 reg4b;
250	pci_read_config_byte(pdev, 0x4B, &reg4b);
251	reg4b \|= 1;
252	pci_write_config_byte(pdev, 0x4B, reg4b);
253	}
254	} else {
255	ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
256	if (pair) {
257	struct ata_timing p;
258	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
259	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
260	if (pair->dma_mode) {
261	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
262	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
263	}
264	}
265	ali_program_modes(ap, adev, &t, 0);
266	}
267	}
268
269	/**
270	* ali_lock_sectors - Keep older devices to 255 sector mode
669a5db4 JG	271	* @adev: Device
	272	*
	273	* Called during the bus probe for each device that is found. We use
	274	* this call to lock the sector count of the device to 255 or less on
	275	* older ALi controllers. If we didn't do this then large I/O's would
	276	* require LBA48 commands which the older ALi requires are issued by
	277	* slower PIO methods
	278	*/
	279
cd0d3bbc	280	static void ali_lock_sectors(struct ata_device *adev)
669a5db4 JG	281	{
	282	adev->max_sectors = 255;
	283	}
	284
	285	static struct scsi_host_template ali_sht = {
	286	.module = THIS_MODULE,
	287	.name = DRV_NAME,
	288	.ioctl = ata_scsi_ioctl,
	289	.queuecommand = ata_scsi_queuecmd,
	290	.can_queue = ATA_DEF_QUEUE,
	291	.this_id = ATA_SHT_THIS_ID,
	292	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	293	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	294	.emulated = ATA_SHT_EMULATED,
	295	.use_clustering = ATA_SHT_USE_CLUSTERING,
	296	.proc_name = DRV_NAME,
	297	.dma_boundary = ATA_DMA_BOUNDARY,
	298	.slave_configure = ata_scsi_slave_config,
afdfe899	299	.slave_destroy = ata_scsi_slave_destroy,
669a5db4 JG	300	.bios_param = ata_std_bios_param,
	301	};
	302
	303	/*
	304	* Port operations for PIO only ALi
	305	*/
	306
	307	static struct ata_port_operations ali_early_port_ops = {
669a5db4 JG	308	.set_piomode = ali_set_piomode,
	309	.tf_load = ata_tf_load,
	310	.tf_read = ata_tf_read,
	311	.check_status = ata_check_status,
	312	.exec_command = ata_exec_command,
	313	.dev_select = ata_std_dev_select,
	314
	315	.freeze = ata_bmdma_freeze,
	316	.thaw = ata_bmdma_thaw,
b723d144	317	.error_handler = ata_bmdma_error_handler,
669a5db4	318	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	319	.cable_detect = ata_cable_40wire,
669a5db4 JG	320
	321	.qc_prep = ata_qc_prep,
	322	.qc_issue = ata_qc_issue_prot,
bda30288	323
0d5ff566	324	.data_xfer = ata_data_xfer,
669a5db4 JG	325
	326	.irq_handler = ata_interrupt,
	327	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	328	.irq_on = ata_irq_on,
669a5db4	329
81ad1837	330	.port_start = ata_sff_port_start,
669a5db4 JG	331	};
	332
	333	/*
	334	* Port operations for DMA capable ALi without cable
	335	* detect
	336	*/
	337	static struct ata_port_operations ali_20_port_ops = {
669a5db4 JG	338	.set_piomode = ali_set_piomode,
	339	.set_dmamode = ali_set_dmamode,
	340	.mode_filter = ali_20_filter,
	341
	342	.tf_load = ata_tf_load,
	343	.tf_read = ata_tf_read,
	344	.check_status = ata_check_status,
	345	.exec_command = ata_exec_command,
	346	.dev_select = ata_std_dev_select,
	347	.dev_config = ali_lock_sectors,
	348
	349	.freeze = ata_bmdma_freeze,
	350	.thaw = ata_bmdma_thaw,
b723d144	351	.error_handler = ata_bmdma_error_handler,
669a5db4	352	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	353	.cable_detect = ata_cable_40wire,
669a5db4 JG	354
	355	.bmdma_setup = ata_bmdma_setup,
	356	.bmdma_start = ata_bmdma_start,
	357	.bmdma_stop = ata_bmdma_stop,
	358	.bmdma_status = ata_bmdma_status,
	359
	360	.qc_prep = ata_qc_prep,
	361	.qc_issue = ata_qc_issue_prot,
bda30288	362
0d5ff566	363	.data_xfer = ata_data_xfer,
669a5db4 JG	364
	365	.irq_handler = ata_interrupt,
	366	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	367	.irq_on = ata_irq_on,
669a5db4	368
81ad1837	369	.port_start = ata_sff_port_start,
669a5db4 JG	370	};
	371
	372	/*
	373	* Port operations for DMA capable ALi with cable detect
	374	*/
	375	static struct ata_port_operations ali_c2_port_ops = {
669a5db4 JG	376	.set_piomode = ali_set_piomode,
	377	.set_dmamode = ali_set_dmamode,
	378	.mode_filter = ata_pci_default_filter,
	379	.tf_load = ata_tf_load,
	380	.tf_read = ata_tf_read,
	381	.check_status = ata_check_status,
	382	.exec_command = ata_exec_command,
	383	.dev_select = ata_std_dev_select,
	384	.dev_config = ali_lock_sectors,
	385
	386	.freeze = ata_bmdma_freeze,
	387	.thaw = ata_bmdma_thaw,
b723d144	388	.error_handler = ata_bmdma_error_handler,
669a5db4	389	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	390	.cable_detect = ali_c2_cable_detect,
669a5db4 JG	391
	392	.bmdma_setup = ata_bmdma_setup,
	393	.bmdma_start = ata_bmdma_start,
	394	.bmdma_stop = ata_bmdma_stop,
	395	.bmdma_status = ata_bmdma_status,
	396
	397	.qc_prep = ata_qc_prep,
	398	.qc_issue = ata_qc_issue_prot,
bda30288	399
0d5ff566	400	.data_xfer = ata_data_xfer,
669a5db4 JG	401
	402	.irq_handler = ata_interrupt,
	403	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	404	.irq_on = ata_irq_on,
669a5db4	405
81ad1837	406	.port_start = ata_sff_port_start,
669a5db4 JG	407	};
	408
	409	/*
	410	* Port operations for DMA capable ALi with cable detect and LBA48
	411	*/
	412	static struct ata_port_operations ali_c5_port_ops = {
669a5db4 JG	413	.set_piomode = ali_set_piomode,
	414	.set_dmamode = ali_set_dmamode,
	415	.mode_filter = ata_pci_default_filter,
	416	.tf_load = ata_tf_load,
	417	.tf_read = ata_tf_read,
	418	.check_status = ata_check_status,
	419	.exec_command = ata_exec_command,
	420	.dev_select = ata_std_dev_select,
	421
	422	.freeze = ata_bmdma_freeze,
	423	.thaw = ata_bmdma_thaw,
b723d144	424	.error_handler = ata_bmdma_error_handler,
669a5db4	425	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	426	.cable_detect = ali_c2_cable_detect,
669a5db4 JG	427
	428	.bmdma_setup = ata_bmdma_setup,
	429	.bmdma_start = ata_bmdma_start,
	430	.bmdma_stop = ata_bmdma_stop,
	431	.bmdma_status = ata_bmdma_status,
	432
	433	.qc_prep = ata_qc_prep,
	434	.qc_issue = ata_qc_issue_prot,
bda30288	435
0d5ff566	436	.data_xfer = ata_data_xfer,
669a5db4 JG	437
	438	.irq_handler = ata_interrupt,
	439	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	440	.irq_on = ata_irq_on,
669a5db4	441
81ad1837	442	.port_start = ata_sff_port_start,
669a5db4 JG	443	};
669a5db4 JG	444
34d8dfb1 AC	445
	446	/**
	447	* ali_init_chipset - chip setup function
	448	* @pdev: PCI device of ATA controller
	449	*
	450	* Perform the setup on the device that must be done both at boot
	451	* and at resume time.
	452	*/
f20b16ff	453
34d8dfb1 AC	454	static void ali_init_chipset(struct pci_dev *pdev)
34d8dfb1 AC	455	{
44c10138	456	u8 tmp;
34d8dfb1 AC	457	struct pci_dev north, isa_bridge;
34d8dfb1 AC	458
34d8dfb1 AC	459	/*
	460	* The chipset revision selects the driver operations and
	461	* mode data.
	462	*/
	463
44c10138	464	if (pdev->revision >= 0x20 && pdev->revision < 0xC2) {
34d8dfb1 AC	465	/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
	466	pci_read_config_byte(pdev, 0x4B, &tmp);
	467	/* Clear CD-ROM DMA write bit */
	468	tmp &= 0x7F;
	469	pci_write_config_byte(pdev, 0x4B, tmp);
44c10138	470	} else if (pdev->revision >= 0xC2) {
34d8dfb1 AC	471	/* Enable cable detection logic */
	472	pci_read_config_byte(pdev, 0x4B, &tmp);
	473	pci_write_config_byte(pdev, 0x4B, tmp \| 0x08);
	474	}
8e42a5a2	475	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
34d8dfb1 AC	476	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	477
	478	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
	479	/* Configure the ALi bridge logic. For non ALi rely on BIOS.
	480	Set the south bridge enable bit */
	481	pci_read_config_byte(isa_bridge, 0x79, &tmp);
44c10138	482	if (pdev->revision == 0xC2)
34d8dfb1	483	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x04);
44c10138	484	else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
34d8dfb1 AC	485	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x02);
34d8dfb1 AC	486	}
44c10138	487	if (pdev->revision >= 0x20) {
34d8dfb1 AC	488	/*
	489	* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
	490	* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
	491	* via 0x54/55.
	492	*/
	493	pci_read_config_byte(pdev, 0x53, &tmp);
44c10138	494	if (pdev->revision <= 0x20)
34d8dfb1	495	tmp &= ~0x02;
44c10138	496	if (pdev->revision >= 0xc7)
34d8dfb1 AC	497	tmp \|= 0x03;
	498	else
	499	tmp \|= 0x01; /* CD_ROM enable for DMA */
	500	pci_write_config_byte(pdev, 0x53, tmp);
	501	}
	502	pci_dev_put(isa_bridge);
	503	pci_dev_put(north);
	504	ata_pci_clear_simplex(pdev);
	505	}
669a5db4 JG	506	/**
	507	* ali_init_one - discovery callback
	508	* @pdev: PCI device ID
	509	* @id: PCI table info
	510	*
	511	* An ALi IDE interface has been discovered. Figure out what revision
	512	* and perform configuration work before handing it to the ATA layer
	513	*/
	514
	515	static int ali_init_one(struct pci_dev pdev, const struct pci_device_id id)
	516	{
1626aeb8	517	static const struct ata_port_info info_early = {
669a5db4	518	.sht = &ali_sht,
1d2808fd	519	.flags = ATA_FLAG_SLAVE_POSS,
669a5db4 JG	520	.pio_mask = 0x1f,
	521	.port_ops = &ali_early_port_ops
	522	};
	523	/* Revision 0x20 added DMA */
1626aeb8	524	static const struct ata_port_info info_20 = {
669a5db4	525	.sht = &ali_sht,
1d2808fd	526	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_PIO_LBA48,
669a5db4 JG	527	.pio_mask = 0x1f,
	528	.mwdma_mask = 0x07,
	529	.port_ops = &ali_20_port_ops
	530	};
	531	/* Revision 0x20 with support logic added UDMA */
1626aeb8	532	static const struct ata_port_info info_20_udma = {
669a5db4	533	.sht = &ali_sht,
1d2808fd	534	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_PIO_LBA48,
669a5db4	535	.pio_mask = 0x1f,
85cd7251	536	.mwdma_mask = 0x07,
669a5db4 JG	537	.udma_mask = 0x07, /* UDMA33 */
	538	.port_ops = &ali_20_port_ops
	539	};
	540	/* Revision 0xC2 adds UDMA66 */
1626aeb8	541	static const struct ata_port_info info_c2 = {
669a5db4	542	.sht = &ali_sht,
1d2808fd	543	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_PIO_LBA48,
669a5db4 JG	544	.pio_mask = 0x1f,
669a5db4 JG	545	.mwdma_mask = 0x07,
bf6263a8	546	.udma_mask = ATA_UDMA4,
669a5db4 JG	547	.port_ops = &ali_c2_port_ops
669a5db4 JG	548	};
ee581502	549	/* Revision 0xC3 is UDMA66 for now */
1626aeb8	550	static const struct ata_port_info info_c3 = {
669a5db4	551	.sht = &ali_sht,
1d2808fd	552	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_PIO_LBA48,
669a5db4 JG	553	.pio_mask = 0x1f,
669a5db4 JG	554	.mwdma_mask = 0x07,
bf6263a8	555	.udma_mask = ATA_UDMA4,
669a5db4 JG	556	.port_ops = &ali_c2_port_ops
669a5db4 JG	557	};
ee581502	558	/* Revision 0xC4 is UDMA100 */
1626aeb8	559	static const struct ata_port_info info_c4 = {
669a5db4	560	.sht = &ali_sht,
1d2808fd	561	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_PIO_LBA48,
669a5db4 JG	562	.pio_mask = 0x1f,
669a5db4 JG	563	.mwdma_mask = 0x07,
bf6263a8	564	.udma_mask = ATA_UDMA5,
669a5db4 JG	565	.port_ops = &ali_c2_port_ops
	566	};
	567	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
1626aeb8	568	static const struct ata_port_info info_c5 = {
669a5db4	569	.sht = &ali_sht,
1d2808fd	570	.flags = ATA_FLAG_SLAVE_POSS,
669a5db4 JG	571	.pio_mask = 0x1f,
669a5db4 JG	572	.mwdma_mask = 0x07,
bf6263a8	573	.udma_mask = ATA_UDMA6,
669a5db4 JG	574	.port_ops = &ali_c5_port_ops
	575	};
	576
1626aeb8	577	const struct ata_port_info *ppi[] = { NULL, NULL };
44c10138	578	u8 tmp;
34d8dfb1	579	struct pci_dev *isa_bridge;
669a5db4	580
669a5db4 JG	581	/*
	582	* The chipset revision selects the driver operations and
	583	* mode data.
	584	*/
	585
44c10138	586	if (pdev->revision < 0x20) {
1626aeb8	587	ppi[0] = &info_early;
44c10138	588	} else if (pdev->revision < 0xC2) {
1626aeb8	589	ppi[0] = &info_20;
44c10138	590	} else if (pdev->revision == 0xC2) {
1626aeb8	591	ppi[0] = &info_c2;
44c10138	592	} else if (pdev->revision == 0xC3) {
1626aeb8	593	ppi[0] = &info_c3;
44c10138	594	} else if (pdev->revision == 0xC4) {
1626aeb8	595	ppi[0] = &info_c4;
669a5db4	596	} else
1626aeb8	597	ppi[0] = &info_c5;
669a5db4	598
34d8dfb1	599	ali_init_chipset(pdev);
f20b16ff	600
669a5db4	601	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
44c10138	602	if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
34d8dfb1 AC	603	/* Are we paired with a UDMA capable chip */
	604	pci_read_config_byte(isa_bridge, 0x5E, &tmp);
	605	if ((tmp & 0x1E) == 0x12)
1626aeb8	606	ppi[0] = &info_20_udma;
34d8dfb1	607	pci_dev_put(isa_bridge);
669a5db4	608	}
1626aeb8	609	return ata_pci_init_one(pdev, ppi);
669a5db4 JG	610	}
669a5db4 JG	611
438ac6d5	612	#ifdef CONFIG_PM
34d8dfb1 AC	613	static int ali_reinit_one(struct pci_dev *pdev)
	614	{
	615	ali_init_chipset(pdev);
	616	return ata_pci_device_resume(pdev);
	617	}
438ac6d5	618	#endif
34d8dfb1	619
2d2744fc JG	620	static const struct pci_device_id ali[] = {
	621	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	622	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
	623
	624	{ },
669a5db4 JG	625	};
	626
	627	static struct pci_driver ali_pci_driver = {
	628	.name = DRV_NAME,
	629	.id_table = ali,
	630	.probe = ali_init_one,
34d8dfb1	631	.remove = ata_pci_remove_one,
438ac6d5	632	#ifdef CONFIG_PM
34d8dfb1 AC	633	.suspend = ata_pci_device_suspend,
34d8dfb1 AC	634	.resume = ali_reinit_one,
438ac6d5	635	#endif
669a5db4 JG	636	};
	637
	638	static int __init ali_init(void)
	639	{
	640	return pci_register_driver(&ali_pci_driver);
	641	}
	642
	643
	644	static void __exit ali_exit(void)
	645	{
	646	pci_unregister_driver(&ali_pci_driver);
	647	}
	648
	649
	650	MODULE_AUTHOR("Alan Cox");
	651	MODULE_DESCRIPTION("low-level driver for ALi PATA");
	652	MODULE_LICENSE("GPL");
	653	MODULE_DEVICE_TABLE(pci, ali);
	654	MODULE_VERSION(DRV_VERSION);
	655
	656	module_init(ali_init);
	657	module_exit(ali_exit);