[linux.git] / drivers / ata / pata_ali.c

/*
 * pata_ali.c 	- ALI 15x3 PATA for new ATA layer
 *			  (C) 2005 Red Hat Inc
 *			  Alan Cox <[email protected]>
 *
 * based in part upon
 * linux/drivers/ide/pci/alim15x3.c		Version 0.17	2003/01/02
 *
 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
 *  Copyright (C) 1999-2000 CJ, [email protected], Maintainer
 *
 *  Copyright (C) 1998-2000 Andre Hedrick ([email protected])
 *  May be copied or modified under the terms of the GNU General Public License
 *  Copyright (C) 2002 Alan Cox <[email protected]>
 *  ALi (now ULi M5228) support by Clear Zhang <[email protected]>
 *
 *  Documentation
 *	Chipset documentation available under NDA only
 *
 *  TODO/CHECK
 *	Cannot have ATAPI on both master & slave for rev < c2 (???) but
 *	otherwise should do atapi DMA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/dmi.h>

#define DRV_NAME "pata_ali"
#define DRV_VERSION "0.7.4"

/*
 *	Cable special cases
 */

static struct dmi_system_id cable_dmi_table[] = {
	{
		.ident = "HP Pavilion N5430",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
		},
	},
	{ }
};

static int ali_cable_override(struct pci_dev *pdev)
{
	/* Fujitsu P2000 */
	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	   	return 1;
	/* Systems by DMI */
	if (dmi_check_system(cable_dmi_table))
		return 1;
	return 0;
}

/**
 *	ali_c2_cable_detect	-	cable detection
 *	@ap: ATA port
 *
 *	Perform cable detection for C2 and later revisions
 */

static int ali_c2_cable_detect(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u8 ata66;

	/* Certain laptops use short but suitable cables and don't
	   implement the detect logic */

	if (ali_cable_override(pdev))
		return ATA_CBL_PATA40_SHORT;

	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	   Bit set for 40 pin */
	pci_read_config_byte(pdev, 0x4A, &ata66);
	if (ata66 & (1 << ap->port_no))
		return ATA_CBL_PATA40;
	else
		return ATA_CBL_PATA80;
}

/**
 *	ali_20_filter		-	filter for earlier ALI DMA
 *	@ap: ALi ATA port
 *	@adev: attached device
 *
 *	Ensure that we do not do DMA on CD devices. We may be able to
 *	fix that later on. Also ensure we do not do UDMA on WDC drives
 */

static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
{
	char model_num[ATA_ID_PROD_LEN + 1];
	/* No DMA on anything but a disk for now */
	if (adev->class != ATA_DEV_ATA)
		mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
	if (strstr(model_num, "WDC"))
		return mask &= ~ATA_MASK_UDMA;
	return ata_pci_default_filter(adev, mask);
}

/**
 *	ali_fifo_control	-	FIFO manager
 *	@ap: ALi channel to control
 *	@adev: device for FIFO control
 *	@on: 0 for off 1 for on
 *
 *	Enable or disable the FIFO on a given device. Because of the way the
 *	ALi FIFO works it provides a boost on ATA disk but can be confused by
 *	ATAPI and we must therefore manage it.
 */

static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int pio_fifo = 0x54 + ap->port_no;
	u8 fifo;
	int shift = 4 * adev->devno;

	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	   0x00. Not all the docs agree but the behaviour we now use is the
	   one stated in the BIOS Programming Guide */

	pci_read_config_byte(pdev, pio_fifo, &fifo);
	fifo &= ~(0x0F << shift);
	if (on)
		fifo |= (on << shift);
	pci_write_config_byte(pdev, pio_fifo, fifo);
}

/**
 *	ali_program_modes	-	load mode registers
 *	@ap: ALi channel to load
 *	@adev: Device the timing is for
 *	@cmd: Command timing
 *	@data: Data timing
 *	@ultra: UDMA timing or zero for off
 *
 *	Loads the timing registers for cmd/data and disable UDMA if
 *	ultra is zero. If ultra is set then load and enable the UDMA
 *	timing but do not touch the command/data timing.
 */

static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int cas = 0x58 + 4 * ap->port_no;	/* Command timing */
	int cbt = 0x59 + 4 * ap->port_no;	/* Command timing */
	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	int udmat = 0x56 + ap->port_no;	/* UDMA timing */
	int shift = 4 * adev->devno;
	u8 udma;

	if (t != NULL) {
		t->setup = FIT(t->setup, 1, 8) & 7;
		t->act8b = FIT(t->act8b, 1, 8) & 7;
		t->rec8b = FIT(t->rec8b, 1, 16) & 15;
		t->active = FIT(t->active, 1, 8) & 7;
		t->recover = FIT(t->recover, 1, 16) & 15;

		pci_write_config_byte(pdev, cas, t->setup);
		pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
		pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
	}

	/* Set up the UDMA enable */
	pci_read_config_byte(pdev, udmat, &udma);
	udma &= ~(0x0F << shift);
	udma |= ultra << shift;
	pci_write_config_byte(pdev, udmat, udma);
}

/**
 *	ali_set_piomode	-	set initial PIO mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	Program the ALi registers for PIO mode. FIXME: add timings for
 *	PIO5.
 */

static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */

	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
	if (pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		if (pair->dma_mode) {
			ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		}
	}

	/* PIO FIFO is only permitted on ATA disk */
	if (adev->class != ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x00);
	ali_program_modes(ap, adev, &t, 0);
	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x05);

}

/**
 *	ali_set_dmamode	-	set initial DMA mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	FIXME: MWDMA timings
 */

static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);


	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x08);

	if (adev->dma_mode >= XFER_UDMA_0) {
		ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
		if (adev->dma_mode >= XFER_UDMA_3) {
			u8 reg4b;
			pci_read_config_byte(pdev, 0x4B, &reg4b);
			reg4b |= 1;
			pci_write_config_byte(pdev, 0x4B, reg4b);
		}
	} else {
		ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
		if (pair) {
			struct ata_timing p;
			ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			if (pair->dma_mode) {
				ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
				ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			}
		}
		ali_program_modes(ap, adev, &t, 0);
	}
}

/**
 *	ali_lock_sectors	-	Keep older devices to 255 sector mode
 *	@adev: Device
 *
 *	Called during the bus probe for each device that is found. We use
 *	this call to lock the sector count of the device to 255 or less on
 *	older ALi controllers. If we didn't do this then large I/O's would
 *	require LBA48 commands which the older ALi requires are issued by
 *	slower PIO methods
 */

static void ali_lock_sectors(struct ata_device *adev)
{
	adev->max_sectors = 255;
}

static struct scsi_host_template ali_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
};

/*
 *	Port operations for PIO only ALi
 */

static struct ata_port_operations ali_early_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi without cable
 *	detect
 */
static struct ata_port_operations ali_20_port_ops = {
	.port_disable	= ata_port_disable,

	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ali_20_filter,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect
 */
static struct ata_port_operations ali_c2_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ali_c2_cable_detect,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect and LBA48
 */
static struct ata_port_operations ali_c5_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ali_c2_cable_detect,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= ata_port_start,
};


/**
 *	ali_init_chipset	-	chip setup function
 *	@pdev: PCI device of ATA controller
 *
 *	Perform the setup on the device that must be done both at boot
 *	and at resume time.
 */

static void ali_init_chipset(struct pci_dev *pdev)
{
	u8 rev, tmp;
	struct pci_dev *north, *isa_bridge;

	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (rev >= 0x20 && rev < 0xC2) {
		/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		/* Clear CD-ROM DMA write bit */
		tmp &= 0x7F;
		pci_write_config_byte(pdev, 0x4B, tmp);
	} else if (rev >= 0xC2) {
		/* Enable cable detection logic */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
	}
	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);

	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
		/* Configure the ALi bridge logic. For non ALi rely on BIOS.
		   Set the south bridge enable bit */
		pci_read_config_byte(isa_bridge, 0x79, &tmp);
		if (rev == 0xC2)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
		else if (rev > 0xC2 && rev < 0xC5)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
	}
	if (rev >= 0x20) {
		/*
		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
		 * via 0x54/55.
		 */
		pci_read_config_byte(pdev, 0x53, &tmp);
		if (rev <= 0x20)
			tmp &= ~0x02;
		if (rev >= 0xc7)
			tmp |= 0x03;
		else
			tmp |= 0x01;	/* CD_ROM enable for DMA */
		pci_write_config_byte(pdev, 0x53, tmp);
	}
	pci_dev_put(isa_bridge);
	pci_dev_put(north);
	ata_pci_clear_simplex(pdev);
}
/**
 *	ali_init_one		-	discovery callback
 *	@pdev: PCI device ID
 *	@id: PCI table info
 *
 *	An ALi IDE interface has been discovered. Figure out what revision
 *	and perform configuration work before handing it to the ATA layer
 */

static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static const struct ata_port_info info_early = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.port_ops = &ali_early_port_ops
	};
	/* Revision 0x20 added DMA */
	static const struct ata_port_info info_20 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0x20 with support logic added UDMA */
	static const struct ata_port_info info_20_udma = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x07,	/* UDMA33 */
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0xC2 adds UDMA66 */
	static const struct ata_port_info info_c2 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x1f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC3 is UDMA100 */
	static const struct ata_port_info info_c3 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x3f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC4 is UDMA133 */
	static const struct ata_port_info info_c4 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x7f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
	static const struct ata_port_info info_c5 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x7f,
		.port_ops = &ali_c5_port_ops
	};

	const struct ata_port_info *ppi[] = { NULL, NULL };
	u8 rev, tmp;
	struct pci_dev *isa_bridge;

	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (rev < 0x20) {
		ppi[0] = &info_early;
	} else if (rev < 0xC2) {
        	ppi[0] = &info_20;
	} else if (rev == 0xC2) {
        	ppi[0] = &info_c2;
	} else if (rev == 0xC3) {
        	ppi[0] = &info_c3;
	} else if (rev == 0xC4) {
        	ppi[0] = &info_c4;
	} else
        	ppi[0] = &info_c5;

	ali_init_chipset(pdev);

	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
		/* Are we paired with a UDMA capable chip */
		pci_read_config_byte(isa_bridge, 0x5E, &tmp);
		if ((tmp & 0x1E) == 0x12)
	        	ppi[0] = &info_20_udma;
		pci_dev_put(isa_bridge);
	}
	return ata_pci_init_one(pdev, ppi);
}

#ifdef CONFIG_PM
static int ali_reinit_one(struct pci_dev *pdev)
{
	ali_init_chipset(pdev);
	return ata_pci_device_resume(pdev);
}
#endif

static const struct pci_device_id ali[] = {
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },

	{ },
};

static struct pci_driver ali_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= ali,
	.probe 		= ali_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= ali_reinit_one,
#endif
};

static int __init ali_init(void)
{
	return pci_register_driver(&ali_pci_driver);
}


static void __exit ali_exit(void)
{
	pci_unregister_driver(&ali_pci_driver);
}


MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for ALi PATA");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, ali);
MODULE_VERSION(DRV_VERSION);

module_init(ali_init);
module_exit(ali_exit);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_ali.c - ALI 15x3 PATA for new ATA layer
	3	* (C) 2005 Red Hat Inc
	4	* Alan Cox <[email protected]>
	5	*
	6	* based in part upon
	7	* linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
	8	*
	9	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
	10	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
	11	* Copyright (C) 1999-2000 CJ, [email protected], Maintainer
	12	*
	13	* Copyright (C) 1998-2000 Andre Hedrick ([email protected])
	14	* May be copied or modified under the terms of the GNU General Public License
	15	* Copyright (C) 2002 Alan Cox <[email protected]>
	16	* ALi (now ULi M5228) support by Clear Zhang <[email protected]>
	17	*
	18	* Documentation
	19	* Chipset documentation available under NDA only
	20	*
	21	* TODO/CHECK
	22	* Cannot have ATAPI on both master & slave for rev < c2 (???) but
	23	* otherwise should do atapi DMA.
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/pci.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
	31	#include <linux/delay.h>
	32	#include <scsi/scsi_host.h>
	33	#include <linux/libata.h>
	34	#include <linux/dmi.h>
	35
	36	#define DRV_NAME "pata_ali"
b723d144	37	#define DRV_VERSION "0.7.4"
669a5db4 JG	38
	39	/*
	40	* Cable special cases
	41	*/
	42
	43	static struct dmi_system_id cable_dmi_table[] = {
	44	{
	45	.ident = "HP Pavilion N5430",
	46	.matches = {
	47	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
	48	DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
	49	},
	50	},
	51	{ }
	52	};
	53
	54	static int ali_cable_override(struct pci_dev *pdev)
	55	{
	56	/* Fujitsu P2000 */
	57	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	58	return 1;
	59	/* Systems by DMI */
	60	if (dmi_check_system(cable_dmi_table))
	61	return 1;
	62	return 0;
	63	}
	64
	65	/**
	66	* ali_c2_cable_detect - cable detection
	67	* @ap: ATA port
	68	*
	69	* Perform cable detection for C2 and later revisions
	70	*/
	71
	72	static int ali_c2_cable_detect(struct ata_port *ap)
	73	{
	74	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	75	u8 ata66;
	76
	77	/* Certain laptops use short but suitable cables and don't
	78	implement the detect logic */
	79
	80	if (ali_cable_override(pdev))
fc085150	81	return ATA_CBL_PATA40_SHORT;
669a5db4 JG	82
	83	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	84	Bit set for 40 pin */
	85	pci_read_config_byte(pdev, 0x4A, &ata66);
	86	if (ata66 & (1 << ap->port_no))
	87	return ATA_CBL_PATA40;
	88	else
	89	return ATA_CBL_PATA80;
	90	}
	91
669a5db4 JG	92	/**
	93	* ali_20_filter - filter for earlier ALI DMA
	94	* @ap: ALi ATA port
	95	* @adev: attached device
	96	*
	97	* Ensure that we do not do DMA on CD devices. We may be able to
	98	* fix that later on. Also ensure we do not do UDMA on WDC drives
	99	*/
	100
a76b62ca	101	static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
669a5db4	102	{
8bfa79fc	103	char model_num[ATA_ID_PROD_LEN + 1];
669a5db4 JG	104	/* No DMA on anything but a disk for now */
	105	if (adev->class != ATA_DEV_ATA)
	106	mask &= ~(ATA_MASK_MWDMA \| ATA_MASK_UDMA);
8bfa79fc	107	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
669a5db4 JG	108	if (strstr(model_num, "WDC"))
669a5db4 JG	109	return mask &= ~ATA_MASK_UDMA;
a76b62ca	110	return ata_pci_default_filter(adev, mask);
669a5db4 JG	111	}
	112
	113	/**
	114	* ali_fifo_control - FIFO manager
	115	* @ap: ALi channel to control
	116	* @adev: device for FIFO control
	117	* @on: 0 for off 1 for on
	118	*
	119	* Enable or disable the FIFO on a given device. Because of the way the
	120	* ALi FIFO works it provides a boost on ATA disk but can be confused by
	121	* ATAPI and we must therefore manage it.
	122	*/
	123
	124	static void ali_fifo_control(struct ata_port ap, struct ata_device adev, int on)
	125	{
	126	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	127	int pio_fifo = 0x54 + ap->port_no;
	128	u8 fifo;
	129	int shift = 4 * adev->devno;
	130
	131	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	132	0x00. Not all the docs agree but the behaviour we now use is the
	133	one stated in the BIOS Programming Guide */
85cd7251	134
669a5db4 JG	135	pci_read_config_byte(pdev, pio_fifo, &fifo);
	136	fifo &= ~(0x0F << shift);
	137	if (on)
	138	fifo \|= (on << shift);
	139	pci_write_config_byte(pdev, pio_fifo, fifo);
	140	}
	141
	142	/**
	143	* ali_program_modes - load mode registers
	144	* @ap: ALi channel to load
	145	* @adev: Device the timing is for
	146	* @cmd: Command timing
	147	* @data: Data timing
	148	* @ultra: UDMA timing or zero for off
	149	*
	150	* Loads the timing registers for cmd/data and disable UDMA if
	151	* ultra is zero. If ultra is set then load and enable the UDMA
	152	* timing but do not touch the command/data timing.
	153	*/
	154
	155	static void ali_program_modes(struct ata_port ap, struct ata_device adev, struct ata_timing *t, u8 ultra)
	156	{
	157	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	158	int cas = 0x58 + 4 * ap->port_no; /* Command timing */
	159	int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
	160	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	161	int udmat = 0x56 + ap->port_no; /* UDMA timing */
	162	int shift = 4 * adev->devno;
	163	u8 udma;
	164
	165	if (t != NULL) {
	166	t->setup = FIT(t->setup, 1, 8) & 7;
	167	t->act8b = FIT(t->act8b, 1, 8) & 7;
	168	t->rec8b = FIT(t->rec8b, 1, 16) & 15;
	169	t->active = FIT(t->active, 1, 8) & 7;
	170	t->recover = FIT(t->recover, 1, 16) & 15;
	171
	172	pci_write_config_byte(pdev, cas, t->setup);
	173	pci_write_config_byte(pdev, cbt, (t->act8b << 4) \| t->rec8b);
	174	pci_write_config_byte(pdev, drwt, (t->active << 4) \| t->recover);
	175	}
	176
	177	/* Set up the UDMA enable */
	178	pci_read_config_byte(pdev, udmat, &udma);
	179	udma &= ~(0x0F << shift);
	180	udma \|= ultra << shift;
	181	pci_write_config_byte(pdev, udmat, udma);
	182	}
	183
	184	/**
	185	* ali_set_piomode - set initial PIO mode data
	186	* @ap: ATA interface
	187	* @adev: ATA device
	188	*
	189	* Program the ALi registers for PIO mode. FIXME: add timings for
	190	* PIO5.
	191	*/
	192
	193	static void ali_set_piomode(struct ata_port ap, struct ata_device adev)
	194	{
	195	struct ata_device *pair = ata_dev_pair(adev);
	196	struct ata_timing t;
	197	unsigned long T = 1000000000 / 33333; /* PCI clock based */
	198
199	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
200	if (pair) {
201	struct ata_timing p;
202	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
203	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
204	if (pair->dma_mode) {
205	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
206	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
207	}
208	}
209
210	/* PIO FIFO is only permitted on ATA disk */
211	if (adev->class != ATA_DEV_ATA)
212	ali_fifo_control(ap, adev, 0x00);
213	ali_program_modes(ap, adev, &t, 0);
214	if (adev->class == ATA_DEV_ATA)
215	ali_fifo_control(ap, adev, 0x05);
216
217	}
218
219	/**
220	* ali_set_dmamode - set initial DMA mode data
221	* @ap: ATA interface
222	* @adev: ATA device
223	*
224	* FIXME: MWDMA timings
225	*/
226
227	static void ali_set_dmamode(struct ata_port ap, struct ata_device adev)
228	{
229	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
230	struct ata_device *pair = ata_dev_pair(adev);
231	struct ata_timing t;
232	unsigned long T = 1000000000 / 33333; /* PCI clock based */
233	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
234
235
236	if (adev->class == ATA_DEV_ATA)
237	ali_fifo_control(ap, adev, 0x08);
238
239	if (adev->dma_mode >= XFER_UDMA_0) {
240	ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
241	if (adev->dma_mode >= XFER_UDMA_3) {
242	u8 reg4b;
243	pci_read_config_byte(pdev, 0x4B, &reg4b);
244	reg4b \|= 1;
245	pci_write_config_byte(pdev, 0x4B, reg4b);
246	}
247	} else {
248	ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
249	if (pair) {
250	struct ata_timing p;
251	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
252	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
253	if (pair->dma_mode) {
254	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
255	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
256	}
257	}
258	ali_program_modes(ap, adev, &t, 0);
259	}
260	}
261
262	/**
263	* ali_lock_sectors - Keep older devices to 255 sector mode
669a5db4 JG	264	* @adev: Device
	265	*
	266	* Called during the bus probe for each device that is found. We use
	267	* this call to lock the sector count of the device to 255 or less on
	268	* older ALi controllers. If we didn't do this then large I/O's would
	269	* require LBA48 commands which the older ALi requires are issued by
	270	* slower PIO methods
	271	*/
	272
cd0d3bbc	273	static void ali_lock_sectors(struct ata_device *adev)
669a5db4 JG	274	{
	275	adev->max_sectors = 255;
	276	}
	277
	278	static struct scsi_host_template ali_sht = {
	279	.module = THIS_MODULE,
	280	.name = DRV_NAME,
	281	.ioctl = ata_scsi_ioctl,
	282	.queuecommand = ata_scsi_queuecmd,
	283	.can_queue = ATA_DEF_QUEUE,
	284	.this_id = ATA_SHT_THIS_ID,
	285	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	286	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	287	.emulated = ATA_SHT_EMULATED,
	288	.use_clustering = ATA_SHT_USE_CLUSTERING,
	289	.proc_name = DRV_NAME,
	290	.dma_boundary = ATA_DMA_BOUNDARY,
	291	.slave_configure = ata_scsi_slave_config,
afdfe899	292	.slave_destroy = ata_scsi_slave_destroy,
669a5db4 JG	293	.bios_param = ata_std_bios_param,
	294	};
	295
	296	/*
	297	* Port operations for PIO only ALi
	298	*/
	299
	300	static struct ata_port_operations ali_early_port_ops = {
	301	.port_disable = ata_port_disable,
	302	.set_piomode = ali_set_piomode,
	303	.tf_load = ata_tf_load,
	304	.tf_read = ata_tf_read,
	305	.check_status = ata_check_status,
	306	.exec_command = ata_exec_command,
	307	.dev_select = ata_std_dev_select,
	308
	309	.freeze = ata_bmdma_freeze,
	310	.thaw = ata_bmdma_thaw,
b723d144	311	.error_handler = ata_bmdma_error_handler,
669a5db4	312	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	313	.cable_detect = ata_cable_40wire,
669a5db4 JG	314
	315	.qc_prep = ata_qc_prep,
	316	.qc_issue = ata_qc_issue_prot,
bda30288	317
0d5ff566	318	.data_xfer = ata_data_xfer,
669a5db4 JG	319
	320	.irq_handler = ata_interrupt,
	321	.irq_clear = ata_bmdma_irq_clear,
246ce3b6 AI	322	.irq_on = ata_irq_on,
246ce3b6 AI	323	.irq_ack = ata_irq_ack,
669a5db4 JG	324
669a5db4 JG	325	.port_start = ata_port_start,
669a5db4 JG	326	};
	327
	328	/*
	329	* Port operations for DMA capable ALi without cable
	330	* detect
	331	*/
	332	static struct ata_port_operations ali_20_port_ops = {
	333	.port_disable = ata_port_disable,
	334
	335	.set_piomode = ali_set_piomode,
	336	.set_dmamode = ali_set_dmamode,
	337	.mode_filter = ali_20_filter,
	338
	339	.tf_load = ata_tf_load,
	340	.tf_read = ata_tf_read,
	341	.check_status = ata_check_status,
	342	.exec_command = ata_exec_command,
	343	.dev_select = ata_std_dev_select,
	344	.dev_config = ali_lock_sectors,
	345
	346	.freeze = ata_bmdma_freeze,
	347	.thaw = ata_bmdma_thaw,
b723d144	348	.error_handler = ata_bmdma_error_handler,
669a5db4	349	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	350	.cable_detect = ata_cable_40wire,
669a5db4 JG	351
	352	.bmdma_setup = ata_bmdma_setup,
	353	.bmdma_start = ata_bmdma_start,
	354	.bmdma_stop = ata_bmdma_stop,
	355	.bmdma_status = ata_bmdma_status,
	356
	357	.qc_prep = ata_qc_prep,
	358	.qc_issue = ata_qc_issue_prot,
bda30288	359
0d5ff566	360	.data_xfer = ata_data_xfer,
669a5db4 JG	361
	362	.irq_handler = ata_interrupt,
	363	.irq_clear = ata_bmdma_irq_clear,
246ce3b6 AI	364	.irq_on = ata_irq_on,
246ce3b6 AI	365	.irq_ack = ata_irq_ack,
669a5db4 JG	366
669a5db4 JG	367	.port_start = ata_port_start,
669a5db4 JG	368	};
	369
	370	/*
	371	* Port operations for DMA capable ALi with cable detect
	372	*/
	373	static struct ata_port_operations ali_c2_port_ops = {
	374	.port_disable = ata_port_disable,
	375	.set_piomode = ali_set_piomode,
	376	.set_dmamode = ali_set_dmamode,
	377	.mode_filter = ata_pci_default_filter,
	378	.tf_load = ata_tf_load,
	379	.tf_read = ata_tf_read,
	380	.check_status = ata_check_status,
	381	.exec_command = ata_exec_command,
	382	.dev_select = ata_std_dev_select,
	383	.dev_config = ali_lock_sectors,
	384
	385	.freeze = ata_bmdma_freeze,
	386	.thaw = ata_bmdma_thaw,
b723d144	387	.error_handler = ata_bmdma_error_handler,
669a5db4	388	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	389	.cable_detect = ali_c2_cable_detect,
669a5db4 JG	390
	391	.bmdma_setup = ata_bmdma_setup,
	392	.bmdma_start = ata_bmdma_start,
	393	.bmdma_stop = ata_bmdma_stop,
	394	.bmdma_status = ata_bmdma_status,
	395
	396	.qc_prep = ata_qc_prep,
	397	.qc_issue = ata_qc_issue_prot,
bda30288	398
0d5ff566	399	.data_xfer = ata_data_xfer,
669a5db4 JG	400
	401	.irq_handler = ata_interrupt,
	402	.irq_clear = ata_bmdma_irq_clear,
246ce3b6 AI	403	.irq_on = ata_irq_on,
246ce3b6 AI	404	.irq_ack = ata_irq_ack,
669a5db4 JG	405
669a5db4 JG	406	.port_start = ata_port_start,
669a5db4 JG	407	};
	408
	409	/*
	410	* Port operations for DMA capable ALi with cable detect and LBA48
	411	*/
	412	static struct ata_port_operations ali_c5_port_ops = {
	413	.port_disable = ata_port_disable,
	414	.set_piomode = ali_set_piomode,
	415	.set_dmamode = ali_set_dmamode,
	416	.mode_filter = ata_pci_default_filter,
	417	.tf_load = ata_tf_load,
	418	.tf_read = ata_tf_read,
	419	.check_status = ata_check_status,
	420	.exec_command = ata_exec_command,
	421	.dev_select = ata_std_dev_select,
	422
	423	.freeze = ata_bmdma_freeze,
	424	.thaw = ata_bmdma_thaw,
b723d144	425	.error_handler = ata_bmdma_error_handler,
669a5db4	426	.post_internal_cmd = ata_bmdma_post_internal_cmd,
b723d144	427	.cable_detect = ali_c2_cable_detect,
669a5db4 JG	428
	429	.bmdma_setup = ata_bmdma_setup,
	430	.bmdma_start = ata_bmdma_start,
	431	.bmdma_stop = ata_bmdma_stop,
	432	.bmdma_status = ata_bmdma_status,
	433
	434	.qc_prep = ata_qc_prep,
	435	.qc_issue = ata_qc_issue_prot,
bda30288	436
0d5ff566	437	.data_xfer = ata_data_xfer,
669a5db4 JG	438
	439	.irq_handler = ata_interrupt,
	440	.irq_clear = ata_bmdma_irq_clear,
246ce3b6 AI	441	.irq_on = ata_irq_on,
246ce3b6 AI	442	.irq_ack = ata_irq_ack,
669a5db4 JG	443
669a5db4 JG	444	.port_start = ata_port_start,
669a5db4 JG	445	};
669a5db4 JG	446
34d8dfb1 AC	447
	448	/**
	449	* ali_init_chipset - chip setup function
	450	* @pdev: PCI device of ATA controller
	451	*
	452	* Perform the setup on the device that must be done both at boot
	453	* and at resume time.
	454	*/
f20b16ff	455
34d8dfb1 AC	456	static void ali_init_chipset(struct pci_dev *pdev)
	457	{
	458	u8 rev, tmp;
	459	struct pci_dev north, isa_bridge;
	460
	461	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
	462
	463	/*
	464	* The chipset revision selects the driver operations and
	465	* mode data.
	466	*/
	467
	468	if (rev >= 0x20 && rev < 0xC2) {
	469	/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
	470	pci_read_config_byte(pdev, 0x4B, &tmp);
	471	/* Clear CD-ROM DMA write bit */
	472	tmp &= 0x7F;
	473	pci_write_config_byte(pdev, 0x4B, tmp);
	474	} else if (rev >= 0xC2) {
	475	/* Enable cable detection logic */
	476	pci_read_config_byte(pdev, 0x4B, &tmp);
	477	pci_write_config_byte(pdev, 0x4B, tmp \| 0x08);
	478	}
8e42a5a2	479	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
34d8dfb1 AC	480	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	481
	482	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
	483	/* Configure the ALi bridge logic. For non ALi rely on BIOS.
	484	Set the south bridge enable bit */
	485	pci_read_config_byte(isa_bridge, 0x79, &tmp);
	486	if (rev == 0xC2)
	487	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x04);
8e42a5a2	488	else if (rev > 0xC2 && rev < 0xC5)
34d8dfb1 AC	489	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x02);
	490	}
	491	if (rev >= 0x20) {
	492	/*
	493	* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
	494	* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
	495	* via 0x54/55.
	496	*/
	497	pci_read_config_byte(pdev, 0x53, &tmp);
	498	if (rev <= 0x20)
	499	tmp &= ~0x02;
	500	if (rev >= 0xc7)
	501	tmp \|= 0x03;
	502	else
	503	tmp \|= 0x01; /* CD_ROM enable for DMA */
	504	pci_write_config_byte(pdev, 0x53, tmp);
	505	}
	506	pci_dev_put(isa_bridge);
	507	pci_dev_put(north);
	508	ata_pci_clear_simplex(pdev);
	509	}
669a5db4 JG	510	/**
	511	* ali_init_one - discovery callback
	512	* @pdev: PCI device ID
	513	* @id: PCI table info
	514	*
	515	* An ALi IDE interface has been discovered. Figure out what revision
	516	* and perform configuration work before handing it to the ATA layer
	517	*/
	518
	519	static int ali_init_one(struct pci_dev pdev, const struct pci_device_id id)
	520	{
1626aeb8	521	static const struct ata_port_info info_early = {
669a5db4 JG	522	.sht = &ali_sht,
	523	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	524	.pio_mask = 0x1f,
	525	.port_ops = &ali_early_port_ops
	526	};
	527	/* Revision 0x20 added DMA */
1626aeb8	528	static const struct ata_port_info info_20 = {
669a5db4 JG	529	.sht = &ali_sht,
	530	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	531	.pio_mask = 0x1f,
	532	.mwdma_mask = 0x07,
	533	.port_ops = &ali_20_port_ops
	534	};
	535	/* Revision 0x20 with support logic added UDMA */
1626aeb8	536	static const struct ata_port_info info_20_udma = {
669a5db4 JG	537	.sht = &ali_sht,
	538	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	539	.pio_mask = 0x1f,
85cd7251	540	.mwdma_mask = 0x07,
669a5db4 JG	541	.udma_mask = 0x07, /* UDMA33 */
	542	.port_ops = &ali_20_port_ops
	543	};
	544	/* Revision 0xC2 adds UDMA66 */
1626aeb8	545	static const struct ata_port_info info_c2 = {
669a5db4 JG	546	.sht = &ali_sht,
	547	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	548	.pio_mask = 0x1f,
	549	.mwdma_mask = 0x07,
	550	.udma_mask = 0x1f,
	551	.port_ops = &ali_c2_port_ops
	552	};
	553	/* Revision 0xC3 is UDMA100 */
1626aeb8	554	static const struct ata_port_info info_c3 = {
669a5db4 JG	555	.sht = &ali_sht,
	556	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	557	.pio_mask = 0x1f,
	558	.mwdma_mask = 0x07,
	559	.udma_mask = 0x3f,
	560	.port_ops = &ali_c2_port_ops
	561	};
	562	/* Revision 0xC4 is UDMA133 */
1626aeb8	563	static const struct ata_port_info info_c4 = {
669a5db4 JG	564	.sht = &ali_sht,
	565	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	566	.pio_mask = 0x1f,
	567	.mwdma_mask = 0x07,
	568	.udma_mask = 0x7f,
	569	.port_ops = &ali_c2_port_ops
	570	};
	571	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
1626aeb8	572	static const struct ata_port_info info_c5 = {
669a5db4 JG	573	.sht = &ali_sht,
	574	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	575	.pio_mask = 0x1f,
	576	.mwdma_mask = 0x07,
	577	.udma_mask = 0x7f,
	578	.port_ops = &ali_c5_port_ops
	579	};
	580
1626aeb8	581	const struct ata_port_info *ppi[] = { NULL, NULL };
669a5db4	582	u8 rev, tmp;
34d8dfb1	583	struct pci_dev *isa_bridge;
669a5db4 JG	584
	585	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
	586
	587	/*
	588	* The chipset revision selects the driver operations and
	589	* mode data.
	590	*/
	591
	592	if (rev < 0x20) {
1626aeb8	593	ppi[0] = &info_early;
669a5db4	594	} else if (rev < 0xC2) {
1626aeb8	595	ppi[0] = &info_20;
669a5db4	596	} else if (rev == 0xC2) {
1626aeb8	597	ppi[0] = &info_c2;
669a5db4	598	} else if (rev == 0xC3) {
1626aeb8	599	ppi[0] = &info_c3;
669a5db4	600	} else if (rev == 0xC4) {
1626aeb8	601	ppi[0] = &info_c4;
669a5db4	602	} else
1626aeb8	603	ppi[0] = &info_c5;
669a5db4	604
34d8dfb1	605	ali_init_chipset(pdev);
f20b16ff	606
669a5db4	607	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
34d8dfb1 AC	608	if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
	609	/* Are we paired with a UDMA capable chip */
	610	pci_read_config_byte(isa_bridge, 0x5E, &tmp);
	611	if ((tmp & 0x1E) == 0x12)
1626aeb8	612	ppi[0] = &info_20_udma;
34d8dfb1	613	pci_dev_put(isa_bridge);
669a5db4	614	}
1626aeb8	615	return ata_pci_init_one(pdev, ppi);
669a5db4 JG	616	}
669a5db4 JG	617
438ac6d5	618	#ifdef CONFIG_PM
34d8dfb1 AC	619	static int ali_reinit_one(struct pci_dev *pdev)
	620	{
	621	ali_init_chipset(pdev);
	622	return ata_pci_device_resume(pdev);
	623	}
438ac6d5	624	#endif
34d8dfb1	625
2d2744fc JG	626	static const struct pci_device_id ali[] = {
	627	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	628	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
	629
	630	{ },
669a5db4 JG	631	};
	632
	633	static struct pci_driver ali_pci_driver = {
	634	.name = DRV_NAME,
	635	.id_table = ali,
	636	.probe = ali_init_one,
34d8dfb1	637	.remove = ata_pci_remove_one,
438ac6d5	638	#ifdef CONFIG_PM
34d8dfb1 AC	639	.suspend = ata_pci_device_suspend,
34d8dfb1 AC	640	.resume = ali_reinit_one,
438ac6d5	641	#endif
669a5db4 JG	642	};
	643
	644	static int __init ali_init(void)
	645	{
	646	return pci_register_driver(&ali_pci_driver);
	647	}
	648
	649
	650	static void __exit ali_exit(void)
	651	{
	652	pci_unregister_driver(&ali_pci_driver);
	653	}
	654
	655
	656	MODULE_AUTHOR("Alan Cox");
	657	MODULE_DESCRIPTION("low-level driver for ALi PATA");
	658	MODULE_LICENSE("GPL");
	659	MODULE_DEVICE_TABLE(pci, ali);
	660	MODULE_VERSION(DRV_VERSION);
	661
	662	module_init(ali_init);
	663	module_exit(ali_exit);