]>
Commit | Line | Data |
---|---|---|
669a5db4 JG |
1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer | |
3 | * (C) 2005 Red Hat Inc | |
4 | * Alan Cox <[email protected]> | |
5 | * | |
6 | * based in part upon | |
7 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 | |
8 | * | |
9 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer | |
10 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
11 | * Copyright (C) 1999-2000 CJ, [email protected], Maintainer | |
12 | * | |
13 | * Copyright (C) 1998-2000 Andre Hedrick ([email protected]) | |
14 | * May be copied or modified under the terms of the GNU General Public License | |
15 | * Copyright (C) 2002 Alan Cox <[email protected]> | |
16 | * ALi (now ULi M5228) support by Clear Zhang <[email protected]> | |
17 | * | |
18 | * Documentation | |
19 | * Chipset documentation available under NDA only | |
20 | * | |
21 | * TODO/CHECK | |
22 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but | |
23 | * otherwise should do atapi DMA. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/blkdev.h> | |
31 | #include <linux/delay.h> | |
32 | #include <scsi/scsi_host.h> | |
33 | #include <linux/libata.h> | |
34 | #include <linux/dmi.h> | |
35 | ||
36 | #define DRV_NAME "pata_ali" | |
37 | #define DRV_VERSION "0.6.5" | |
38 | ||
39 | /* | |
40 | * Cable special cases | |
41 | */ | |
42 | ||
43 | static struct dmi_system_id cable_dmi_table[] = { | |
44 | { | |
45 | .ident = "HP Pavilion N5430", | |
46 | .matches = { | |
47 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
48 | DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"), | |
49 | }, | |
50 | }, | |
51 | { } | |
52 | }; | |
53 | ||
54 | static int ali_cable_override(struct pci_dev *pdev) | |
55 | { | |
56 | /* Fujitsu P2000 */ | |
57 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) | |
58 | return 1; | |
59 | /* Systems by DMI */ | |
60 | if (dmi_check_system(cable_dmi_table)) | |
61 | return 1; | |
62 | return 0; | |
63 | } | |
64 | ||
65 | /** | |
66 | * ali_c2_cable_detect - cable detection | |
67 | * @ap: ATA port | |
68 | * | |
69 | * Perform cable detection for C2 and later revisions | |
70 | */ | |
71 | ||
72 | static int ali_c2_cable_detect(struct ata_port *ap) | |
73 | { | |
74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
75 | u8 ata66; | |
76 | ||
77 | /* Certain laptops use short but suitable cables and don't | |
78 | implement the detect logic */ | |
79 | ||
80 | if (ali_cable_override(pdev)) | |
81 | return ATA_CBL_PATA80; | |
82 | ||
83 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary | |
84 | Bit set for 40 pin */ | |
85 | pci_read_config_byte(pdev, 0x4A, &ata66); | |
86 | if (ata66 & (1 << ap->port_no)) | |
87 | return ATA_CBL_PATA40; | |
88 | else | |
89 | return ATA_CBL_PATA80; | |
90 | } | |
91 | ||
92 | /** | |
93 | * ali_early_error_handler - reset for eary chip | |
94 | * @ap: ATA port | |
95 | * | |
96 | * Handle the reset callback for the later chips with cable detect | |
97 | */ | |
98 | ||
99 | static int ali_c2_pre_reset(struct ata_port *ap) | |
100 | { | |
101 | ap->cbl = ali_c2_cable_detect(ap); | |
102 | return ata_std_prereset(ap); | |
103 | } | |
104 | ||
105 | static void ali_c2_error_handler(struct ata_port *ap) | |
106 | { | |
107 | ata_bmdma_drive_eh(ap, ali_c2_pre_reset, | |
108 | ata_std_softreset, NULL, | |
109 | ata_std_postreset); | |
110 | } | |
111 | ||
112 | /** | |
113 | * ali_early_cable_detect - cable detection | |
114 | * @ap: ATA port | |
115 | * | |
116 | * Perform cable detection for older chipsets. This turns out to be | |
117 | * rather easy to implement | |
118 | */ | |
119 | ||
120 | static int ali_early_cable_detect(struct ata_port *ap) | |
121 | { | |
122 | return ATA_CBL_PATA40; | |
123 | } | |
124 | ||
125 | /** | |
126 | * ali_early_probe_init - reset for early chip | |
127 | * @ap: ATA port | |
128 | * | |
129 | * Handle the reset callback for the early (pre cable detect) chips. | |
130 | */ | |
131 | ||
132 | static int ali_early_pre_reset(struct ata_port *ap) | |
133 | { | |
134 | ap->cbl = ali_early_cable_detect(ap); | |
135 | return ata_std_prereset(ap); | |
136 | } | |
137 | ||
138 | static void ali_early_error_handler(struct ata_port *ap) | |
139 | { | |
140 | return ata_bmdma_drive_eh(ap, ali_early_pre_reset, | |
141 | ata_std_softreset, NULL, | |
142 | ata_std_postreset); | |
143 | } | |
144 | ||
145 | /** | |
146 | * ali_20_filter - filter for earlier ALI DMA | |
147 | * @ap: ALi ATA port | |
148 | * @adev: attached device | |
149 | * | |
150 | * Ensure that we do not do DMA on CD devices. We may be able to | |
151 | * fix that later on. Also ensure we do not do UDMA on WDC drives | |
152 | */ | |
153 | ||
154 | static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) | |
155 | { | |
156 | char model_num[40]; | |
157 | /* No DMA on anything but a disk for now */ | |
158 | if (adev->class != ATA_DEV_ATA) | |
159 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
160 | ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); | |
161 | if (strstr(model_num, "WDC")) | |
162 | return mask &= ~ATA_MASK_UDMA; | |
163 | return ata_pci_default_filter(ap, adev, mask); | |
164 | } | |
165 | ||
166 | /** | |
167 | * ali_fifo_control - FIFO manager | |
168 | * @ap: ALi channel to control | |
169 | * @adev: device for FIFO control | |
170 | * @on: 0 for off 1 for on | |
171 | * | |
172 | * Enable or disable the FIFO on a given device. Because of the way the | |
173 | * ALi FIFO works it provides a boost on ATA disk but can be confused by | |
174 | * ATAPI and we must therefore manage it. | |
175 | */ | |
176 | ||
177 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) | |
178 | { | |
179 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
180 | int pio_fifo = 0x54 + ap->port_no; | |
181 | u8 fifo; | |
182 | int shift = 4 * adev->devno; | |
183 | ||
184 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | |
185 | 0x00. Not all the docs agree but the behaviour we now use is the | |
186 | one stated in the BIOS Programming Guide */ | |
187 | ||
188 | pci_read_config_byte(pdev, pio_fifo, &fifo); | |
189 | fifo &= ~(0x0F << shift); | |
190 | if (on) | |
191 | fifo |= (on << shift); | |
192 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
193 | } | |
194 | ||
195 | /** | |
196 | * ali_program_modes - load mode registers | |
197 | * @ap: ALi channel to load | |
198 | * @adev: Device the timing is for | |
199 | * @cmd: Command timing | |
200 | * @data: Data timing | |
201 | * @ultra: UDMA timing or zero for off | |
202 | * | |
203 | * Loads the timing registers for cmd/data and disable UDMA if | |
204 | * ultra is zero. If ultra is set then load and enable the UDMA | |
205 | * timing but do not touch the command/data timing. | |
206 | */ | |
207 | ||
208 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) | |
209 | { | |
210 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
211 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ | |
212 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ | |
213 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ | |
214 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ | |
215 | int shift = 4 * adev->devno; | |
216 | u8 udma; | |
217 | ||
218 | if (t != NULL) { | |
219 | t->setup = FIT(t->setup, 1, 8) & 7; | |
220 | t->act8b = FIT(t->act8b, 1, 8) & 7; | |
221 | t->rec8b = FIT(t->rec8b, 1, 16) & 15; | |
222 | t->active = FIT(t->active, 1, 8) & 7; | |
223 | t->recover = FIT(t->recover, 1, 16) & 15; | |
224 | ||
225 | pci_write_config_byte(pdev, cas, t->setup); | |
226 | pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); | |
227 | pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); | |
228 | } | |
229 | ||
230 | /* Set up the UDMA enable */ | |
231 | pci_read_config_byte(pdev, udmat, &udma); | |
232 | udma &= ~(0x0F << shift); | |
233 | udma |= ultra << shift; | |
234 | pci_write_config_byte(pdev, udmat, udma); | |
235 | } | |
236 | ||
237 | /** | |
238 | * ali_set_piomode - set initial PIO mode data | |
239 | * @ap: ATA interface | |
240 | * @adev: ATA device | |
241 | * | |
242 | * Program the ALi registers for PIO mode. FIXME: add timings for | |
243 | * PIO5. | |
244 | */ | |
245 | ||
246 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
247 | { | |
248 | struct ata_device *pair = ata_dev_pair(adev); | |
249 | struct ata_timing t; | |
250 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
251 | ||
252 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); | |
253 | if (pair) { | |
254 | struct ata_timing p; | |
255 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
256 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
257 | if (pair->dma_mode) { | |
258 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
259 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
260 | } | |
261 | } | |
262 | ||
263 | /* PIO FIFO is only permitted on ATA disk */ | |
264 | if (adev->class != ATA_DEV_ATA) | |
265 | ali_fifo_control(ap, adev, 0x00); | |
266 | ali_program_modes(ap, adev, &t, 0); | |
267 | if (adev->class == ATA_DEV_ATA) | |
268 | ali_fifo_control(ap, adev, 0x05); | |
269 | ||
270 | } | |
271 | ||
272 | /** | |
273 | * ali_set_dmamode - set initial DMA mode data | |
274 | * @ap: ATA interface | |
275 | * @adev: ATA device | |
276 | * | |
277 | * FIXME: MWDMA timings | |
278 | */ | |
279 | ||
280 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
281 | { | |
282 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; | |
283 | struct ata_device *pair = ata_dev_pair(adev); | |
284 | struct ata_timing t; | |
285 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
286 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
287 | ||
288 | ||
289 | if (adev->class == ATA_DEV_ATA) | |
290 | ali_fifo_control(ap, adev, 0x08); | |
291 | ||
292 | if (adev->dma_mode >= XFER_UDMA_0) { | |
293 | ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); | |
294 | if (adev->dma_mode >= XFER_UDMA_3) { | |
295 | u8 reg4b; | |
296 | pci_read_config_byte(pdev, 0x4B, ®4b); | |
297 | reg4b |= 1; | |
298 | pci_write_config_byte(pdev, 0x4B, reg4b); | |
299 | } | |
300 | } else { | |
301 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); | |
302 | if (pair) { | |
303 | struct ata_timing p; | |
304 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
305 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
306 | if (pair->dma_mode) { | |
307 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
308 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
309 | } | |
310 | } | |
311 | ali_program_modes(ap, adev, &t, 0); | |
312 | } | |
313 | } | |
314 | ||
315 | /** | |
316 | * ali_lock_sectors - Keep older devices to 255 sector mode | |
317 | * @ap: ATA port | |
318 | * @adev: Device | |
319 | * | |
320 | * Called during the bus probe for each device that is found. We use | |
321 | * this call to lock the sector count of the device to 255 or less on | |
322 | * older ALi controllers. If we didn't do this then large I/O's would | |
323 | * require LBA48 commands which the older ALi requires are issued by | |
324 | * slower PIO methods | |
325 | */ | |
326 | ||
327 | static void ali_lock_sectors(struct ata_port *ap, struct ata_device *adev) | |
328 | { | |
329 | adev->max_sectors = 255; | |
330 | } | |
331 | ||
332 | static struct scsi_host_template ali_sht = { | |
333 | .module = THIS_MODULE, | |
334 | .name = DRV_NAME, | |
335 | .ioctl = ata_scsi_ioctl, | |
336 | .queuecommand = ata_scsi_queuecmd, | |
337 | .can_queue = ATA_DEF_QUEUE, | |
338 | .this_id = ATA_SHT_THIS_ID, | |
339 | .sg_tablesize = LIBATA_MAX_PRD, | |
340 | /* Keep LBA28 counts so large I/O's don't turn LBA48 and PIO | |
341 | with older controllers. Not locked so will grow on C5 or later */ | |
342 | .max_sectors = 255, | |
343 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | |
344 | .emulated = ATA_SHT_EMULATED, | |
345 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
346 | .proc_name = DRV_NAME, | |
347 | .dma_boundary = ATA_DMA_BOUNDARY, | |
348 | .slave_configure = ata_scsi_slave_config, | |
349 | .bios_param = ata_std_bios_param, | |
350 | }; | |
351 | ||
352 | /* | |
353 | * Port operations for PIO only ALi | |
354 | */ | |
355 | ||
356 | static struct ata_port_operations ali_early_port_ops = { | |
357 | .port_disable = ata_port_disable, | |
358 | .set_piomode = ali_set_piomode, | |
359 | .tf_load = ata_tf_load, | |
360 | .tf_read = ata_tf_read, | |
361 | .check_status = ata_check_status, | |
362 | .exec_command = ata_exec_command, | |
363 | .dev_select = ata_std_dev_select, | |
364 | ||
365 | .freeze = ata_bmdma_freeze, | |
366 | .thaw = ata_bmdma_thaw, | |
367 | .error_handler = ali_early_error_handler, | |
368 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
369 | ||
370 | .qc_prep = ata_qc_prep, | |
371 | .qc_issue = ata_qc_issue_prot, | |
372 | .eng_timeout = ata_eng_timeout, | |
373 | .data_xfer = ata_pio_data_xfer, | |
374 | ||
375 | .irq_handler = ata_interrupt, | |
376 | .irq_clear = ata_bmdma_irq_clear, | |
377 | ||
378 | .port_start = ata_port_start, | |
379 | .port_stop = ata_port_stop, | |
380 | .host_stop = ata_host_stop | |
381 | }; | |
382 | ||
383 | /* | |
384 | * Port operations for DMA capable ALi without cable | |
385 | * detect | |
386 | */ | |
387 | static struct ata_port_operations ali_20_port_ops = { | |
388 | .port_disable = ata_port_disable, | |
389 | ||
390 | .set_piomode = ali_set_piomode, | |
391 | .set_dmamode = ali_set_dmamode, | |
392 | .mode_filter = ali_20_filter, | |
393 | ||
394 | .tf_load = ata_tf_load, | |
395 | .tf_read = ata_tf_read, | |
396 | .check_status = ata_check_status, | |
397 | .exec_command = ata_exec_command, | |
398 | .dev_select = ata_std_dev_select, | |
399 | .dev_config = ali_lock_sectors, | |
400 | ||
401 | .freeze = ata_bmdma_freeze, | |
402 | .thaw = ata_bmdma_thaw, | |
403 | .error_handler = ali_early_error_handler, | |
404 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
405 | ||
406 | .bmdma_setup = ata_bmdma_setup, | |
407 | .bmdma_start = ata_bmdma_start, | |
408 | .bmdma_stop = ata_bmdma_stop, | |
409 | .bmdma_status = ata_bmdma_status, | |
410 | ||
411 | .qc_prep = ata_qc_prep, | |
412 | .qc_issue = ata_qc_issue_prot, | |
413 | .eng_timeout = ata_eng_timeout, | |
414 | .data_xfer = ata_pio_data_xfer, | |
415 | ||
416 | .irq_handler = ata_interrupt, | |
417 | .irq_clear = ata_bmdma_irq_clear, | |
418 | ||
419 | .port_start = ata_port_start, | |
420 | .port_stop = ata_port_stop, | |
421 | .host_stop = ata_host_stop | |
422 | }; | |
423 | ||
424 | /* | |
425 | * Port operations for DMA capable ALi with cable detect | |
426 | */ | |
427 | static struct ata_port_operations ali_c2_port_ops = { | |
428 | .port_disable = ata_port_disable, | |
429 | .set_piomode = ali_set_piomode, | |
430 | .set_dmamode = ali_set_dmamode, | |
431 | .mode_filter = ata_pci_default_filter, | |
432 | .tf_load = ata_tf_load, | |
433 | .tf_read = ata_tf_read, | |
434 | .check_status = ata_check_status, | |
435 | .exec_command = ata_exec_command, | |
436 | .dev_select = ata_std_dev_select, | |
437 | .dev_config = ali_lock_sectors, | |
438 | ||
439 | .freeze = ata_bmdma_freeze, | |
440 | .thaw = ata_bmdma_thaw, | |
441 | .error_handler = ali_c2_error_handler, | |
442 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
443 | ||
444 | .bmdma_setup = ata_bmdma_setup, | |
445 | .bmdma_start = ata_bmdma_start, | |
446 | .bmdma_stop = ata_bmdma_stop, | |
447 | .bmdma_status = ata_bmdma_status, | |
448 | ||
449 | .qc_prep = ata_qc_prep, | |
450 | .qc_issue = ata_qc_issue_prot, | |
451 | .eng_timeout = ata_eng_timeout, | |
452 | .data_xfer = ata_pio_data_xfer, | |
453 | ||
454 | .irq_handler = ata_interrupt, | |
455 | .irq_clear = ata_bmdma_irq_clear, | |
456 | ||
457 | .port_start = ata_port_start, | |
458 | .port_stop = ata_port_stop, | |
459 | .host_stop = ata_host_stop | |
460 | }; | |
461 | ||
462 | /* | |
463 | * Port operations for DMA capable ALi with cable detect and LBA48 | |
464 | */ | |
465 | static struct ata_port_operations ali_c5_port_ops = { | |
466 | .port_disable = ata_port_disable, | |
467 | .set_piomode = ali_set_piomode, | |
468 | .set_dmamode = ali_set_dmamode, | |
469 | .mode_filter = ata_pci_default_filter, | |
470 | .tf_load = ata_tf_load, | |
471 | .tf_read = ata_tf_read, | |
472 | .check_status = ata_check_status, | |
473 | .exec_command = ata_exec_command, | |
474 | .dev_select = ata_std_dev_select, | |
475 | ||
476 | .freeze = ata_bmdma_freeze, | |
477 | .thaw = ata_bmdma_thaw, | |
478 | .error_handler = ali_c2_error_handler, | |
479 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
480 | ||
481 | .bmdma_setup = ata_bmdma_setup, | |
482 | .bmdma_start = ata_bmdma_start, | |
483 | .bmdma_stop = ata_bmdma_stop, | |
484 | .bmdma_status = ata_bmdma_status, | |
485 | ||
486 | .qc_prep = ata_qc_prep, | |
487 | .qc_issue = ata_qc_issue_prot, | |
488 | .eng_timeout = ata_eng_timeout, | |
489 | .data_xfer = ata_pio_data_xfer, | |
490 | ||
491 | .irq_handler = ata_interrupt, | |
492 | .irq_clear = ata_bmdma_irq_clear, | |
493 | ||
494 | .port_start = ata_port_start, | |
495 | .port_stop = ata_port_stop, | |
496 | .host_stop = ata_host_stop | |
497 | }; | |
498 | ||
499 | /** | |
500 | * ali_init_one - discovery callback | |
501 | * @pdev: PCI device ID | |
502 | * @id: PCI table info | |
503 | * | |
504 | * An ALi IDE interface has been discovered. Figure out what revision | |
505 | * and perform configuration work before handing it to the ATA layer | |
506 | */ | |
507 | ||
508 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
509 | { | |
510 | static struct ata_port_info info_early = { | |
511 | .sht = &ali_sht, | |
512 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
513 | .pio_mask = 0x1f, | |
514 | .port_ops = &ali_early_port_ops | |
515 | }; | |
516 | /* Revision 0x20 added DMA */ | |
517 | static struct ata_port_info info_20 = { | |
518 | .sht = &ali_sht, | |
519 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
520 | .pio_mask = 0x1f, | |
521 | .mwdma_mask = 0x07, | |
522 | .port_ops = &ali_20_port_ops | |
523 | }; | |
524 | /* Revision 0x20 with support logic added UDMA */ | |
525 | static struct ata_port_info info_20_udma = { | |
526 | .sht = &ali_sht, | |
527 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
528 | .pio_mask = 0x1f, | |
529 | .mwdma_mask = 0x07, | |
530 | .udma_mask = 0x07, /* UDMA33 */ | |
531 | .port_ops = &ali_20_port_ops | |
532 | }; | |
533 | /* Revision 0xC2 adds UDMA66 */ | |
534 | static struct ata_port_info info_c2 = { | |
535 | .sht = &ali_sht, | |
536 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
537 | .pio_mask = 0x1f, | |
538 | .mwdma_mask = 0x07, | |
539 | .udma_mask = 0x1f, | |
540 | .port_ops = &ali_c2_port_ops | |
541 | }; | |
542 | /* Revision 0xC3 is UDMA100 */ | |
543 | static struct ata_port_info info_c3 = { | |
544 | .sht = &ali_sht, | |
545 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
546 | .pio_mask = 0x1f, | |
547 | .mwdma_mask = 0x07, | |
548 | .udma_mask = 0x3f, | |
549 | .port_ops = &ali_c2_port_ops | |
550 | }; | |
551 | /* Revision 0xC4 is UDMA133 */ | |
552 | static struct ata_port_info info_c4 = { | |
553 | .sht = &ali_sht, | |
554 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
555 | .pio_mask = 0x1f, | |
556 | .mwdma_mask = 0x07, | |
557 | .udma_mask = 0x7f, | |
558 | .port_ops = &ali_c2_port_ops | |
559 | }; | |
560 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ | |
561 | static struct ata_port_info info_c5 = { | |
562 | .sht = &ali_sht, | |
563 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
564 | .pio_mask = 0x1f, | |
565 | .mwdma_mask = 0x07, | |
566 | .udma_mask = 0x7f, | |
567 | .port_ops = &ali_c5_port_ops | |
568 | }; | |
569 | ||
570 | static struct ata_port_info *port_info[2]; | |
571 | u8 rev, tmp; | |
572 | struct pci_dev *north, *isa_bridge; | |
573 | ||
574 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | |
575 | ||
576 | /* | |
577 | * The chipset revision selects the driver operations and | |
578 | * mode data. | |
579 | */ | |
580 | ||
581 | if (rev < 0x20) { | |
582 | port_info[0] = port_info[1] = &info_early; | |
583 | } else if (rev < 0xC2) { | |
584 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ | |
585 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
586 | /* Clear CD-ROM DMA write bit */ | |
587 | tmp &= 0x7F; | |
588 | pci_write_config_byte(pdev, 0x4B, tmp); | |
589 | port_info[0] = port_info[1] = &info_20; | |
590 | } else if (rev == 0xC2) { | |
591 | port_info[0] = port_info[1] = &info_c2; | |
592 | } else if (rev == 0xC3) { | |
593 | port_info[0] = port_info[1] = &info_c3; | |
594 | } else if (rev == 0xC4) { | |
595 | port_info[0] = port_info[1] = &info_c4; | |
596 | } else | |
597 | port_info[0] = port_info[1] = &info_c5; | |
598 | ||
599 | if (rev >= 0xC2) { | |
600 | /* Enable cable detection logic */ | |
601 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
602 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | |
603 | } | |
604 | ||
605 | north = pci_get_slot(pdev->bus, PCI_DEVFN(0,0)); | |
606 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); | |
607 | ||
608 | if (north && north->vendor == PCI_VENDOR_ID_AL) { | |
609 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. | |
610 | Set the south bridge enable bit */ | |
611 | pci_read_config_byte(isa_bridge, 0x79, &tmp); | |
612 | if (rev == 0xC2) | |
613 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); | |
614 | else if (rev > 0xC2) | |
615 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); | |
616 | } | |
617 | ||
618 | if (rev >= 0x20) { | |
619 | if (rev < 0xC2) { | |
620 | /* Are we paired with a UDMA capable chip */ | |
621 | pci_read_config_byte(isa_bridge, 0x5E, &tmp); | |
622 | if ((tmp & 0x1E) == 0x12) | |
623 | port_info[0] = port_info[1] = &info_20_udma; | |
624 | } | |
625 | /* | |
626 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | |
627 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | |
628 | * via 0x54/55. | |
629 | */ | |
630 | pci_read_config_byte(pdev, 0x53, &tmp); | |
631 | if (rev <= 0x20) | |
632 | tmp &= ~0x02; | |
633 | if (rev == 0xc7) | |
634 | tmp |= 0x03; | |
635 | else | |
636 | tmp |= 0x01; /* CD_ROM enable for DMA */ | |
637 | pci_write_config_byte(pdev, 0x53, tmp); | |
638 | } | |
639 | ||
640 | pci_dev_put(isa_bridge); | |
641 | pci_dev_put(north); | |
642 | ||
643 | ata_pci_clear_simplex(pdev); | |
644 | return ata_pci_init_one(pdev, port_info, 2); | |
645 | } | |
646 | ||
647 | static struct pci_device_id ali[] = { | |
648 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5228), }, | |
649 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229), }, | |
650 | { 0, }, | |
651 | }; | |
652 | ||
653 | static struct pci_driver ali_pci_driver = { | |
654 | .name = DRV_NAME, | |
655 | .id_table = ali, | |
656 | .probe = ali_init_one, | |
657 | .remove = ata_pci_remove_one | |
658 | }; | |
659 | ||
660 | static int __init ali_init(void) | |
661 | { | |
662 | return pci_register_driver(&ali_pci_driver); | |
663 | } | |
664 | ||
665 | ||
666 | static void __exit ali_exit(void) | |
667 | { | |
668 | pci_unregister_driver(&ali_pci_driver); | |
669 | } | |
670 | ||
671 | ||
672 | MODULE_AUTHOR("Alan Cox"); | |
673 | MODULE_DESCRIPTION("low-level driver for ALi PATA"); | |
674 | MODULE_LICENSE("GPL"); | |
675 | MODULE_DEVICE_TABLE(pci, ali); | |
676 | MODULE_VERSION(DRV_VERSION); | |
677 | ||
678 | module_init(ali_init); | |
679 | module_exit(ali_exit); |