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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
8678180e | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996 |
07aa9fdc | 3 | Free Software Foundation, Inc. |
41abdfbd JG |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
6c9638b4 | 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
41abdfbd | 20 | |
41abdfbd | 21 | #include "defs.h" |
41abdfbd JG |
22 | #include "frame.h" |
23 | #include "inferior.h" | |
24 | #include "symtab.h" | |
25 | #include "target.h" | |
030fb5cb | 26 | #include "gdbcore.h" |
65eaea27 JL |
27 | #include "symfile.h" |
28 | #include "objfiles.h" | |
2aefe6e4 JK |
29 | #include "xcoffsolib.h" |
30 | ||
d6434f39 JG |
31 | extern struct obstack frame_cache_obstack; |
32 | ||
41abdfbd | 33 | extern int errno; |
41abdfbd JG |
34 | |
35 | /* Nonzero if we just simulated a single step break. */ | |
36 | int one_stepped; | |
37 | ||
41abdfbd JG |
38 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
39 | ||
40 | static struct sstep_breaks { | |
030fb5cb JK |
41 | /* Address, or 0 if this is not in use. */ |
42 | CORE_ADDR address; | |
43 | /* Shadow contents. */ | |
44 | char data[4]; | |
41abdfbd JG |
45 | } stepBreaks[2]; |
46 | ||
ecf4059f JG |
47 | /* Static function prototypes */ |
48 | ||
cd8a3d84 | 49 | static CORE_ADDR find_toc_address PARAMS ((CORE_ADDR pc)); |
ecf4059f | 50 | |
cd8a3d84 SS |
51 | static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, |
52 | CORE_ADDR safety)); | |
ecf4059f | 53 | |
cd8a3d84 SS |
54 | static void frame_get_cache_fsr PARAMS ((struct frame_info *fi, |
55 | struct rs6000_framedata *fdatap)); | |
56 | ||
57 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ | |
41abdfbd | 58 | |
ecf4059f | 59 | static CORE_ADDR |
41abdfbd | 60 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
61 | int opcode; |
62 | int instr; | |
63 | CORE_ADDR pc; | |
64 | CORE_ADDR safety; | |
41abdfbd JG |
65 | { |
66 | register long offset; | |
ecf4059f | 67 | CORE_ADDR dest; |
41abdfbd JG |
68 | int immediate; |
69 | int absolute; | |
70 | int ext_op; | |
71 | ||
72 | absolute = (int) ((instr >> 1) & 1); | |
73 | ||
74 | switch (opcode) { | |
75 | case 18 : | |
ecf4059f | 76 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
dc59e982 MM |
77 | if (absolute) |
78 | dest = immediate; | |
79 | else | |
80 | dest = pc + immediate; | |
81 | break; | |
41abdfbd JG |
82 | |
83 | case 16 : | |
dc59e982 | 84 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ |
41abdfbd JG |
85 | if (absolute) |
86 | dest = immediate; | |
87 | else | |
88 | dest = pc + immediate; | |
89 | break; | |
90 | ||
91 | case 19 : | |
92 | ext_op = (instr>>1) & 0x3ff; | |
93 | ||
94 | if (ext_op == 16) /* br conditional register */ | |
95 | dest = read_register (LR_REGNUM) & ~3; | |
96 | ||
97 | else if (ext_op == 528) /* br cond to count reg */ | |
9aa31e91 JK |
98 | { |
99 | dest = read_register (CTR_REGNUM) & ~3; | |
100 | ||
101 | /* If we are about to execute a system call, dest is something | |
102 | like 0x22fc or 0x3b00. Upon completion the system call | |
103 | will return to the address in the link register. */ | |
104 | if (dest < TEXT_SEGMENT_BASE) | |
105 | dest = read_register (LR_REGNUM) & ~3; | |
106 | } | |
41abdfbd JG |
107 | else return -1; |
108 | break; | |
109 | ||
110 | default: return -1; | |
111 | } | |
818de002 | 112 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
113 | } |
114 | ||
115 | ||
116 | ||
117 | /* AIX does not support PT_STEP. Simulate it. */ | |
118 | ||
997cc2c0 | 119 | void |
41abdfbd | 120 | single_step (signal) |
997cc2c0 | 121 | int signal; |
41abdfbd JG |
122 | { |
123 | #define INSNLEN(OPCODE) 4 | |
124 | ||
5c172b4b MM |
125 | static char le_breakp[] = LITTLE_BREAKPOINT; |
126 | static char be_breakp[] = BIG_BREAKPOINT; | |
127 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
030fb5cb JK |
128 | int ii, insn; |
129 | CORE_ADDR loc; | |
130 | CORE_ADDR breaks[2]; | |
131 | int opcode; | |
41abdfbd JG |
132 | |
133 | if (!one_stepped) { | |
41abdfbd JG |
134 | loc = read_pc (); |
135 | ||
b112f2ae | 136 | insn = read_memory_integer (loc, 4); |
41abdfbd JG |
137 | |
138 | breaks[0] = loc + INSNLEN(insn); | |
139 | opcode = insn >> 26; | |
140 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
141 | ||
818de002 PB |
142 | /* Don't put two breakpoints on the same address. */ |
143 | if (breaks[1] == breaks[0]) | |
144 | breaks[1] = -1; | |
145 | ||
030fb5cb | 146 | stepBreaks[1].address = 0; |
41abdfbd JG |
147 | |
148 | for (ii=0; ii < 2; ++ii) { | |
149 | ||
150 | /* ignore invalid breakpoint. */ | |
151 | if ( breaks[ii] == -1) | |
152 | continue; | |
153 | ||
030fb5cb | 154 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 155 | |
030fb5cb | 156 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
157 | stepBreaks[ii].address = breaks[ii]; |
158 | } | |
159 | ||
160 | one_stepped = 1; | |
997cc2c0 | 161 | } else { |
41abdfbd JG |
162 | |
163 | /* remove step breakpoints. */ | |
164 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 165 | if (stepBreaks[ii].address != 0) |
41abdfbd | 166 | write_memory |
030fb5cb | 167 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
168 | |
169 | one_stepped = 0; | |
170 | } | |
997cc2c0 | 171 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 172 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 173 | } |
41abdfbd JG |
174 | |
175 | ||
068c9fd6 MM |
176 | /* return pc value after skipping a function prologue and also return |
177 | information about a function frame. | |
41abdfbd | 178 | |
068c9fd6 MM |
179 | in struct rs6000_frameinfo fdata: |
180 | - frameless is TRUE, if function does not have a frame. | |
181 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
182 | - offset is the number of bytes used in the frame to save registers. | |
183 | - saved_gpr is the number of the first saved gpr. | |
184 | - saved_fpr is the number of the first saved fpr. | |
185 | - alloca_reg is the number of the register used for alloca() handling. | |
186 | Otherwise -1. | |
187 | - gpr_offset is the offset of the saved gprs | |
188 | - fpr_offset is the offset of the saved fprs | |
189 | - lr_offset is the offset of the saved lr | |
190 | - cr_offset is the offset of the saved cr | |
191 | */ | |
192 | ||
193 | #define SIGNED_SHORT(x) \ | |
194 | ((sizeof (short) == 2) \ | |
195 | ? ((int)(short)(x)) \ | |
196 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
197 | ||
198 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
199 | ||
200 | CORE_ADDR | |
201 | skip_prologue (pc, fdata) | |
202 | CORE_ADDR pc; | |
203 | struct rs6000_framedata *fdata; | |
41abdfbd | 204 | { |
068c9fd6 | 205 | CORE_ADDR orig_pc = pc; |
34df79fc | 206 | char buf[4]; |
34df79fc | 207 | unsigned long op; |
4b4c6c96 | 208 | long offset = 0; |
068c9fd6 MM |
209 | int lr_reg = 0; |
210 | int cr_reg = 0; | |
211 | int reg; | |
4b4c6c96 | 212 | int framep = 0; |
65eaea27 | 213 | int minimal_toc_loaded = 0; |
068c9fd6 MM |
214 | static struct rs6000_framedata zero_frame; |
215 | ||
216 | *fdata = zero_frame; | |
217 | fdata->saved_gpr = -1; | |
218 | fdata->saved_fpr = -1; | |
219 | fdata->alloca_reg = -1; | |
220 | fdata->frameless = 1; | |
221 | fdata->nosavedpc = 1; | |
41abdfbd | 222 | |
34df79fc | 223 | if (target_read_memory (pc, buf, 4)) |
41abdfbd | 224 | return pc; /* Can't access it -- assume no prologue. */ |
41abdfbd JG |
225 | |
226 | /* Assume that subsequent fetches can fail with low probability. */ | |
068c9fd6 MM |
227 | pc -= 4; |
228 | for (;;) | |
229 | { | |
230 | pc += 4; | |
231 | op = read_memory_integer (pc, 4); | |
41abdfbd | 232 | |
068c9fd6 MM |
233 | if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ |
234 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
235 | continue; | |
236 | ||
237 | } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */ | |
238 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
239 | continue; | |
240 | ||
241 | } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
242 | reg = GET_SRC_REG (op); | |
243 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) { | |
244 | fdata->saved_fpr = reg; | |
4b4c6c96 | 245 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
246 | } |
247 | continue; | |
248 | ||
249 | } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
250 | ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */ | |
251 | (op & 0x03e00000) >= 0x01a00000)) { | |
252 | ||
253 | reg = GET_SRC_REG (op); | |
254 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) { | |
255 | fdata->saved_gpr = reg; | |
4b4c6c96 | 256 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
257 | } |
258 | continue; | |
259 | ||
260 | } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */ | |
261 | fdata->offset = (op & 0x0000ffff) << 16; | |
65eaea27 | 262 | fdata->frameless = 0; |
068c9fd6 MM |
263 | continue; |
264 | ||
265 | } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */ | |
266 | fdata->offset |= (op & 0x0000ffff); | |
65eaea27 | 267 | fdata->frameless = 0; |
068c9fd6 MM |
268 | continue; |
269 | ||
270 | } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */ | |
4b4c6c96 | 271 | fdata->lr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
272 | fdata->nosavedpc = 0; |
273 | lr_reg = 0; | |
274 | continue; | |
275 | ||
276 | } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */ | |
4b4c6c96 | 277 | fdata->cr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
278 | cr_reg = 0; |
279 | continue; | |
280 | ||
4b4c6c96 MM |
281 | } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */ |
282 | continue; | |
283 | ||
65eaea27 JL |
284 | } else if (op == 0x48000004) { /* b .+4 (xlc) */ |
285 | break; | |
286 | ||
4b4c6c96 MM |
287 | } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */ |
288 | op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */ | |
289 | lr_reg == 0x901e0000) { | |
290 | continue; | |
291 | ||
292 | } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */ | |
293 | (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */ | |
294 | continue; | |
295 | ||
068c9fd6 | 296 | } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ |
965dde97 | 297 | |
65eaea27 | 298 | fdata->frameless = 0; |
965dde97 PS |
299 | /* Don't skip over the subroutine call if it is not within the first |
300 | three instructions of the prologue. */ | |
301 | if ((pc - orig_pc) > 8) | |
302 | break; | |
303 | ||
068c9fd6 MM |
304 | op = read_memory_integer (pc+4, 4); |
305 | ||
306 | /* At this point, make sure this is not a trampoline function | |
307 | (a function that simply calls another functions, and nothing else). | |
308 | If the next is not a nop, this branch was part of the function | |
309 | prologue. */ | |
310 | ||
311 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
965dde97 | 312 | break; /* don't skip over this branch */ |
068c9fd6 MM |
313 | |
314 | continue; | |
315 | ||
4b4c6c96 | 316 | /* update stack pointer */ |
068c9fd6 | 317 | } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */ |
65eaea27 | 318 | fdata->frameless = 0; |
4b4c6c96 MM |
319 | fdata->offset = SIGNED_SHORT (op); |
320 | offset = fdata->offset; | |
321 | continue; | |
1eeba686 | 322 | |
068c9fd6 | 323 | } else if (op == 0x7c21016e) { /* stwux 1,1,0 */ |
65eaea27 | 324 | fdata->frameless = 0; |
4b4c6c96 MM |
325 | offset = fdata->offset; |
326 | continue; | |
41abdfbd | 327 | |
4b4c6c96 | 328 | /* Load up minimal toc pointer */ |
65eaea27 JL |
329 | } else if ((op >> 22) == 0x20f |
330 | && ! minimal_toc_loaded) { /* l r31,... or l r30,... */ | |
331 | minimal_toc_loaded = 1; | |
4b4c6c96 | 332 | continue; |
cdb1cc92 | 333 | |
4b4c6c96 MM |
334 | /* store parameters in stack */ |
335 | } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
336 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
337 | (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */ | |
338 | continue; | |
e137e850 | 339 | |
4b4c6c96 MM |
340 | /* store parameters in stack via frame pointer */ |
341 | } else if (framep && | |
342 | (op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
343 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
344 | (op & 0xfc1f0000) == 0xfc1f0000) { /* frsp, fp?,NUM(r1) */ | |
345 | continue; | |
e137e850 | 346 | |
4b4c6c96 MM |
347 | /* Set up frame pointer */ |
348 | } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
349 | || op == 0x7c3f0b78) { /* mr r31, r1 */ | |
65eaea27 | 350 | fdata->frameless = 0; |
4b4c6c96 | 351 | framep = 1; |
965dde97 | 352 | fdata->alloca_reg = 31; |
4b4c6c96 | 353 | continue; |
41abdfbd | 354 | |
65eaea27 JL |
355 | /* Another way to set up the frame pointer. */ |
356 | } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */ | |
357 | fdata->frameless = 0; | |
358 | framep = 1; | |
359 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
360 | continue; | |
361 | ||
4b4c6c96 MM |
362 | } else { |
363 | break; | |
364 | } | |
41abdfbd | 365 | } |
068c9fd6 | 366 | |
507e4004 PB |
367 | #if 0 |
368 | /* I have problems with skipping over __main() that I need to address | |
369 | * sometime. Previously, I used to use misc_function_vector which | |
370 | * didn't work as well as I wanted to be. -MGO */ | |
371 | ||
372 | /* If the first thing after skipping a prolog is a branch to a function, | |
373 | this might be a call to an initializer in main(), introduced by gcc2. | |
374 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
375 | work before calling a function right after a prologue, thus we can | |
376 | single out such gcc2 behaviour. */ | |
377 | ||
378 | ||
379 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
380 | op = read_memory_integer (pc+4, 4); | |
381 | ||
382 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
383 | ||
384 | /* check and see if we are in main. If so, skip over this initializer | |
385 | function as well. */ | |
386 | ||
387 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 388 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
389 | return pc + 8; |
390 | } | |
391 | } | |
392 | #endif /* 0 */ | |
393 | ||
4b4c6c96 | 394 | fdata->offset = - fdata->offset; |
41abdfbd JG |
395 | return pc; |
396 | } | |
397 | ||
818de002 | 398 | |
41abdfbd JG |
399 | /************************************************************************* |
400 | Support for creating pushind a dummy frame into the stack, and popping | |
401 | frames, etc. | |
402 | *************************************************************************/ | |
403 | ||
818de002 PB |
404 | /* The total size of dummy frame is 436, which is; |
405 | ||
406 | 32 gpr's - 128 bytes | |
407 | 32 fpr's - 256 " | |
408 | 7 the rest - 28 " | |
409 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
410 | for the link area might not be necessary, since it will be taken | |
411 | care of by push_arguments(). */ | |
412 | ||
413 | #define DUMMY_FRAME_SIZE 436 | |
414 | ||
41abdfbd JG |
415 | #define DUMMY_FRAME_ADDR_SIZE 10 |
416 | ||
417 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 418 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
419 | |
420 | static int dummy_frame_count = 0; | |
421 | static int dummy_frame_size = 0; | |
422 | static CORE_ADDR *dummy_frame_addr = 0; | |
423 | ||
424 | extern int stop_stack_dummy; | |
425 | ||
426 | /* push a dummy frame into stack, save all register. Currently we are saving | |
427 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
428 | ||
ecf4059f | 429 | void |
41abdfbd JG |
430 | push_dummy_frame () |
431 | { | |
359a097f JK |
432 | /* stack pointer. */ |
433 | CORE_ADDR sp; | |
b112f2ae JK |
434 | /* Same thing, target byte order. */ |
435 | char sp_targ[4]; | |
359a097f JK |
436 | |
437 | /* link register. */ | |
438 | CORE_ADDR pc; | |
439 | /* Same thing, target byte order. */ | |
440 | char pc_targ[4]; | |
441 | ||
3a4f9786 MT |
442 | /* Needed to figure out where to save the dummy link area. |
443 | FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */ | |
444 | struct rs6000_framedata fdata; | |
445 | ||
41abdfbd JG |
446 | int ii; |
447 | ||
5f1c39ef | 448 | target_fetch_registers (-1); |
6c6afbb9 | 449 | |
41abdfbd JG |
450 | if (dummy_frame_count >= dummy_frame_size) { |
451 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
452 | if (dummy_frame_addr) | |
453 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
454 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
455 | else | |
456 | dummy_frame_addr = (CORE_ADDR*) | |
457 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
458 | } | |
459 | ||
460 | sp = read_register(SP_REGNUM); | |
359a097f | 461 | pc = read_register(PC_REGNUM); |
5816555b | 462 | store_address (pc_targ, 4, pc); |
41abdfbd | 463 | |
3a4f9786 MT |
464 | (void) skip_prologue (get_pc_function_start (pc) + FUNCTION_START_OFFSET, &fdata); |
465 | ||
41abdfbd JG |
466 | dummy_frame_addr [dummy_frame_count++] = sp; |
467 | ||
468 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 469 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
470 | uses that area for IPC purposes when executing ptrace(2) calls. So |
471 | before writing register values into the new frame, decrement and update | |
472 | %sp first in order to secure your frame. */ | |
473 | ||
3a4f9786 MT |
474 | /* FIXME: We don't check if the stack really has this much space. |
475 | This is a problem on the ppc simulator (which only grants one page | |
476 | (4096 bytes) by default. */ | |
477 | ||
818de002 | 478 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 479 | |
41abdfbd JG |
480 | /* gdb relies on the state of current_frame. We'd better update it, |
481 | otherwise things like do_registers_info() wouldn't work properly! */ | |
482 | ||
483 | flush_cached_frames (); | |
41abdfbd JG |
484 | |
485 | /* save program counter in link register's space. */ | |
4f8710e6 PS |
486 | write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE), |
487 | pc_targ, 4); | |
41abdfbd | 488 | |
6c6afbb9 | 489 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
490 | |
491 | /* fpr's, f0..f31 */ | |
492 | for (ii = 0; ii < 32; ++ii) | |
493 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
494 | ||
495 | /* gpr's r0..r31 */ | |
496 | for (ii=1; ii <=32; ++ii) | |
497 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
498 | ||
818de002 PB |
499 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
500 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
501 | ||
502 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
503 | write_memory (sp-384-(ii*4), | |
504 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
505 | } | |
506 | ||
507 | /* Save sp or so called back chain right here. */ | |
b112f2ae JK |
508 | store_address (sp_targ, 4, sp); |
509 | write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4); | |
818de002 | 510 | sp -= DUMMY_FRAME_SIZE; |
41abdfbd JG |
511 | |
512 | /* And finally, this is the back chain. */ | |
359a097f | 513 | write_memory (sp+8, pc_targ, 4); |
41abdfbd JG |
514 | } |
515 | ||
516 | ||
517 | /* Pop a dummy frame. | |
518 | ||
519 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
520 | is usually done before user calls a function explicitly. | |
521 | ||
818de002 PB |
522 | After a dummy frame is pushed, some instructions are copied into stack, |
523 | and stack pointer is decremented even more. Since we don't have a frame | |
524 | pointer to get back to the parent frame of the dummy, we start having | |
525 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
526 | addresses of dummy frames as such. When poping happens and when we | |
527 | detect that was a dummy frame, we pop it back to its parent by using | |
528 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
529 | |
530 | FIXME: This whole concept is broken. You should be able to detect | |
531 | a dummy stack frame *on the user's stack itself*. When you do, | |
532 | then you know the format of that stack frame -- including its | |
533 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 534 | GDB process that keeps track of these dummy frames! -- [email protected] Aug92 |
41abdfbd JG |
535 | */ |
536 | ||
537 | pop_dummy_frame () | |
538 | { | |
539 | CORE_ADDR sp, pc; | |
540 | int ii; | |
541 | sp = dummy_frame_addr [--dummy_frame_count]; | |
542 | ||
543 | /* restore all fpr's. */ | |
544 | for (ii = 1; ii <= 32; ++ii) | |
545 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
546 | ||
547 | /* restore all gpr's */ | |
548 | for (ii=1; ii <= 32; ++ii) { | |
549 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
550 | } | |
551 | ||
818de002 PB |
552 | /* restore the rest of the registers. */ |
553 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
554 | read_memory (sp-384-(ii*4), | |
555 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
556 | ||
557 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
3a4f9786 | 558 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); |
41abdfbd JG |
559 | |
560 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
561 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
562 | one we should restore. Change it with the one we need. */ | |
563 | ||
564 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
565 | ||
566 | /* Now we can restore all registers. */ | |
567 | ||
5f1c39ef | 568 | target_store_registers (-1); |
41abdfbd JG |
569 | pc = read_pc (); |
570 | flush_cached_frames (); | |
41abdfbd JG |
571 | } |
572 | ||
573 | ||
574 | /* pop the innermost frame, go back to the caller. */ | |
575 | ||
ecf4059f | 576 | void |
41abdfbd JG |
577 | pop_frame () |
578 | { | |
359a097f | 579 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
63641491 | 580 | struct rs6000_framedata fdata; |
669caa9c | 581 | struct frame_info *frame = get_current_frame (); |
41abdfbd | 582 | int addr, ii; |
41abdfbd JG |
583 | |
584 | pc = read_pc (); | |
669caa9c | 585 | sp = FRAME_FP (frame); |
41abdfbd JG |
586 | |
587 | if (stop_stack_dummy && dummy_frame_count) { | |
588 | pop_dummy_frame (); | |
589 | return; | |
590 | } | |
591 | ||
07aa9fdc PS |
592 | /* Make sure that all registers are valid. */ |
593 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
594 | ||
41abdfbd JG |
595 | /* figure out previous %pc value. If the function is frameless, it is |
596 | still in the link register, otherwise walk the frames and retrieve the | |
597 | saved %pc value in the previous frame. */ | |
598 | ||
34a1a3bf | 599 | addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET; |
068c9fd6 | 600 | (void) skip_prologue (addr, &fdata); |
41abdfbd | 601 | |
6c6afbb9 | 602 | if (fdata.frameless) |
07aa9fdc PS |
603 | prev_sp = sp; |
604 | else | |
605 | prev_sp = read_memory_integer (sp, 4); | |
068c9fd6 | 606 | if (fdata.lr_offset == 0) |
41abdfbd JG |
607 | lr = read_register (LR_REGNUM); |
608 | else | |
068c9fd6 | 609 | lr = read_memory_integer (prev_sp + fdata.lr_offset, 4); |
41abdfbd JG |
610 | |
611 | /* reset %pc value. */ | |
612 | write_register (PC_REGNUM, lr); | |
613 | ||
614 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 615 | addr = prev_sp - fdata.offset; |
41abdfbd | 616 | |
6c6afbb9 | 617 | if (fdata.saved_gpr != -1) |
669caa9c | 618 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { |
41abdfbd | 619 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 620 | addr += 4; |
41abdfbd JG |
621 | } |
622 | ||
6c6afbb9 | 623 | if (fdata.saved_fpr != -1) |
669caa9c | 624 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { |
41abdfbd JG |
625 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
626 | addr += 8; | |
627 | } | |
628 | ||
629 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 630 | target_store_registers (-1); |
41abdfbd | 631 | flush_cached_frames (); |
41abdfbd JG |
632 | } |
633 | ||
41abdfbd JG |
634 | /* fixup the call sequence of a dummy function, with the real function address. |
635 | its argumets will be passed by gdb. */ | |
636 | ||
ecf4059f | 637 | void |
cd8a3d84 SS |
638 | fix_call_dummy (dummyname, pc, fun, nargs, type) |
639 | char *dummyname; | |
640 | CORE_ADDR pc; | |
641 | CORE_ADDR fun; | |
642 | int nargs; /* not used */ | |
643 | int type; /* not used */ | |
41abdfbd JG |
644 | { |
645 | #define TOC_ADDR_OFFSET 20 | |
646 | #define TARGET_ADDR_OFFSET 28 | |
647 | ||
648 | int ii; | |
ecf4059f JG |
649 | CORE_ADDR target_addr; |
650 | CORE_ADDR tocvalue; | |
41abdfbd JG |
651 | |
652 | target_addr = fun; | |
653 | tocvalue = find_toc_address (target_addr); | |
654 | ||
655 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
656 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
657 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
658 | ||
659 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
660 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
661 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
662 | ||
663 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
664 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
665 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
666 | ||
667 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
668 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
669 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
670 | } | |
671 | ||
cd8a3d84 SS |
672 | /* Pass the arguments in either registers, or in the stack. In RS6000, |
673 | the first eight words of the argument list (that might be less than | |
674 | eight parameters if some parameters occupy more than one word) are | |
675 | passed in r3..r11 registers. float and double parameters are | |
676 | passed in fpr's, in addition to that. Rest of the parameters if any | |
677 | are passed in user stack. There might be cases in which half of the | |
678 | parameter is copied into registers, the other half is pushed into | |
41abdfbd JG |
679 | stack. |
680 | ||
681 | If the function is returning a structure, then the return address is passed | |
682 | in r3, then the first 7 words of the parametes can be passed in registers, | |
683 | starting from r4. */ | |
684 | ||
685 | CORE_ADDR | |
686 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
cd8a3d84 SS |
687 | int nargs; |
688 | value_ptr *args; | |
689 | CORE_ADDR sp; | |
690 | int struct_return; | |
691 | CORE_ADDR struct_addr; | |
41abdfbd JG |
692 | { |
693 | int ii, len; | |
694 | int argno; /* current argument number */ | |
695 | int argbytes; /* current argument byte */ | |
696 | char tmp_buffer [50]; | |
41abdfbd | 697 | int f_argno = 0; /* current floating point argno */ |
940d5967 PB |
698 | value_ptr arg; |
699 | struct type *type; | |
41abdfbd JG |
700 | |
701 | CORE_ADDR saved_sp, pc; | |
702 | ||
703 | if ( dummy_frame_count <= 0) | |
199b2450 | 704 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
41abdfbd JG |
705 | |
706 | /* The first eight words of ther arguments are passed in registers. Copy | |
707 | them appropriately. | |
708 | ||
709 | If the function is returning a `struct', then the first word (which | |
710 | will be passed in r3) is used for struct return address. In that | |
711 | case we should advance one word and start from r4 register to copy | |
712 | parameters. */ | |
713 | ||
714 | ii = struct_return ? 1 : 0; | |
715 | ||
716 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
717 | ||
5222ca60 | 718 | arg = args[argno]; |
59c84318 | 719 | type = check_typedef (VALUE_TYPE (arg)); |
940d5967 | 720 | len = TYPE_LENGTH (type); |
41abdfbd | 721 | |
940d5967 | 722 | if (TYPE_CODE (type) == TYPE_CODE_FLT) { |
41abdfbd JG |
723 | |
724 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
725 | There are 13 fpr's reserved for passing parameters. At this point | |
726 | there is no way we would run out of them. */ | |
727 | ||
728 | if (len > 8) | |
199b2450 | 729 | printf_unfiltered ( |
41abdfbd JG |
730 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
731 | ||
ade40d31 RP |
732 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
733 | len); | |
41abdfbd JG |
734 | ++f_argno; |
735 | } | |
736 | ||
737 | if (len > 4) { | |
738 | ||
739 | /* Argument takes more than one register. */ | |
740 | while (argbytes < len) { | |
741 | ||
742 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 RP |
743 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
744 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
41abdfbd JG |
745 | (len - argbytes) > 4 ? 4 : len - argbytes); |
746 | ++ii, argbytes += 4; | |
747 | ||
748 | if (ii >= 8) | |
749 | goto ran_out_of_registers_for_arguments; | |
750 | } | |
751 | argbytes = 0; | |
752 | --ii; | |
753 | } | |
754 | else { /* Argument can fit in one register. No problem. */ | |
755 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 | 756 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
41abdfbd JG |
757 | } |
758 | ++argno; | |
759 | } | |
760 | ||
761 | ran_out_of_registers_for_arguments: | |
762 | ||
763 | /* location for 8 parameters are always reserved. */ | |
764 | sp -= 4 * 8; | |
765 | ||
766 | /* another six words for back chain, TOC register, link register, etc. */ | |
767 | sp -= 24; | |
768 | ||
769 | /* if there are more arguments, allocate space for them in | |
770 | the stack, then push them starting from the ninth one. */ | |
771 | ||
772 | if ((argno < nargs) || argbytes) { | |
773 | int space = 0, jj; | |
41abdfbd JG |
774 | |
775 | if (argbytes) { | |
776 | space += ((len - argbytes + 3) & -4); | |
777 | jj = argno + 1; | |
778 | } | |
779 | else | |
780 | jj = argno; | |
781 | ||
782 | for (; jj < nargs; ++jj) { | |
940d5967 | 783 | value_ptr val = args[jj]; |
41abdfbd JG |
784 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
785 | } | |
786 | ||
787 | /* add location required for the rest of the parameters */ | |
788 | space = (space + 7) & -8; | |
789 | sp -= space; | |
790 | ||
791 | /* This is another instance we need to be concerned about securing our | |
792 | stack space. If we write anything underneath %sp (r1), we might conflict | |
793 | with the kernel who thinks he is free to use this area. So, update %sp | |
794 | first before doing anything else. */ | |
795 | ||
796 | write_register (SP_REGNUM, sp); | |
797 | ||
41abdfbd JG |
798 | /* if the last argument copied into the registers didn't fit there |
799 | completely, push the rest of it into stack. */ | |
800 | ||
801 | if (argbytes) { | |
802 | write_memory ( | |
803 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
804 | ++argno; | |
805 | ii += ((len - argbytes + 3) & -4) / 4; | |
806 | } | |
807 | ||
808 | /* push the rest of the arguments into stack. */ | |
809 | for (; argno < nargs; ++argno) { | |
810 | ||
5222ca60 | 811 | arg = args[argno]; |
940d5967 PB |
812 | type = check_typedef (VALUE_TYPE (arg)); |
813 | len = TYPE_LENGTH (type); | |
41abdfbd JG |
814 | |
815 | ||
816 | /* float types should be passed in fpr's, as well as in the stack. */ | |
940d5967 | 817 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) { |
41abdfbd JG |
818 | |
819 | if (len > 8) | |
199b2450 | 820 | printf_unfiltered ( |
41abdfbd JG |
821 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
822 | ||
ade40d31 RP |
823 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
824 | len); | |
41abdfbd JG |
825 | ++f_argno; |
826 | } | |
827 | ||
359a097f | 828 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
41abdfbd JG |
829 | ii += ((len + 3) & -4) / 4; |
830 | } | |
831 | } | |
6c6afbb9 | 832 | else |
41abdfbd JG |
833 | /* Secure stack areas first, before doing anything else. */ |
834 | write_register (SP_REGNUM, sp); | |
835 | ||
41abdfbd JG |
836 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
837 | read_memory (saved_sp, tmp_buffer, 24); | |
838 | write_memory (sp, tmp_buffer, 24); | |
839 | ||
b112f2ae JK |
840 | /* set back chain properly */ |
841 | store_address (tmp_buffer, 4, saved_sp); | |
842 | write_memory (sp, tmp_buffer, 4); | |
41abdfbd | 843 | |
5f1c39ef | 844 | target_store_registers (-1); |
41abdfbd JG |
845 | return sp; |
846 | } | |
847 | ||
848 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
849 | value into `valbuf' */ | |
850 | ||
ecf4059f | 851 | void |
41abdfbd | 852 | extract_return_value (valtype, regbuf, valbuf) |
cd8a3d84 SS |
853 | struct type *valtype; |
854 | char regbuf[REGISTER_BYTES]; | |
855 | char *valbuf; | |
41abdfbd | 856 | { |
07781ac0 | 857 | int offset = 0; |
41abdfbd JG |
858 | |
859 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
860 | ||
861 | double dd; float ff; | |
862 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
863 | We need to truncate the return value into float size (4 byte) if | |
864 | necessary. */ | |
865 | ||
866 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
ade40d31 | 867 | memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
41abdfbd JG |
868 | TYPE_LENGTH (valtype)); |
869 | else { /* float */ | |
ade40d31 | 870 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
41abdfbd | 871 | ff = (float)dd; |
ade40d31 | 872 | memcpy (valbuf, &ff, sizeof(float)); |
41abdfbd JG |
873 | } |
874 | } | |
07781ac0 | 875 | else { |
41abdfbd | 876 | /* return value is copied starting from r3. */ |
07781ac0 PS |
877 | if (TARGET_BYTE_ORDER == BIG_ENDIAN |
878 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
879 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
880 | ||
881 | memcpy (valbuf, regbuf + REGISTER_BYTE (3) + offset, | |
882 | TYPE_LENGTH (valtype)); | |
883 | } | |
41abdfbd JG |
884 | } |
885 | ||
886 | ||
ecf4059f JG |
887 | /* keep structure return address in this variable. |
888 | FIXME: This is a horrid kludge which should not be allowed to continue | |
889 | living. This only allows a single nested call to a structure-returning | |
890 | function. Come on, guys! -- [email protected], Aug 92 */ | |
41abdfbd JG |
891 | |
892 | CORE_ADDR rs6000_struct_return_address; | |
893 | ||
894 | ||
c2e4669f JG |
895 | /* Indirect function calls use a piece of trampoline code to do context |
896 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
897 | its first instruction (as when we have single-stepped to here). | |
07aa9fdc PS |
898 | Also skip shared library trampoline code (which is different from |
899 | indirect function call trampolines). | |
c2e4669f JG |
900 | Result is desired PC to step until, or NULL if we are not in |
901 | trampoline code. */ | |
41abdfbd | 902 | |
ecf4059f | 903 | CORE_ADDR |
41abdfbd | 904 | skip_trampoline_code (pc) |
cd8a3d84 | 905 | CORE_ADDR pc; |
41abdfbd JG |
906 | { |
907 | register unsigned int ii, op; | |
07aa9fdc | 908 | CORE_ADDR solib_target_pc; |
41abdfbd JG |
909 | |
910 | static unsigned trampoline_code[] = { | |
911 | 0x800b0000, /* l r0,0x0(r11) */ | |
912 | 0x90410014, /* st r2,0x14(r1) */ | |
913 | 0x7c0903a6, /* mtctr r0 */ | |
914 | 0x804b0004, /* l r2,0x4(r11) */ | |
915 | 0x816b0008, /* l r11,0x8(r11) */ | |
916 | 0x4e800420, /* bctr */ | |
917 | 0x4e800020, /* br */ | |
918 | 0 | |
919 | }; | |
920 | ||
07aa9fdc PS |
921 | /* If pc is in a shared library trampoline, return its target. */ |
922 | solib_target_pc = find_solib_trampoline_target (pc); | |
923 | if (solib_target_pc) | |
924 | return solib_target_pc; | |
925 | ||
41abdfbd JG |
926 | for (ii=0; trampoline_code[ii]; ++ii) { |
927 | op = read_memory_integer (pc + (ii*4), 4); | |
928 | if (op != trampoline_code [ii]) | |
359a097f | 929 | return 0; |
41abdfbd JG |
930 | } |
931 | ii = read_register (11); /* r11 holds destination addr */ | |
932 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
933 | return pc; | |
934 | } | |
935 | ||
068c9fd6 | 936 | /* Determines whether the function FI has a frame on the stack or not. */ |
cd8a3d84 | 937 | |
ecf4059f | 938 | int |
068c9fd6 MM |
939 | frameless_function_invocation (fi) |
940 | struct frame_info *fi; | |
ecf4059f JG |
941 | { |
942 | CORE_ADDR func_start; | |
63641491 | 943 | struct rs6000_framedata fdata; |
ecf4059f | 944 | |
b0e932ad JK |
945 | if (fi->next != NULL) |
946 | /* Don't even think about framelessness except on the innermost frame. */ | |
3f528883 JK |
947 | /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if |
948 | a signal happens while executing in a frameless function). */ | |
b0e932ad JK |
949 | return 0; |
950 | ||
ecf4059f JG |
951 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
952 | ||
953 | /* If we failed to find the start of the function, it is a mistake | |
954 | to inspect the instructions. */ | |
955 | ||
956 | if (!func_start) | |
957 | return 0; | |
958 | ||
068c9fd6 MM |
959 | (void) skip_prologue (func_start, &fdata); |
960 | return fdata.frameless; | |
ecf4059f JG |
961 | } |
962 | ||
068c9fd6 | 963 | /* Return the PC saved in a frame */ |
cd8a3d84 | 964 | |
068c9fd6 MM |
965 | unsigned long |
966 | frame_saved_pc (fi) | |
967 | struct frame_info *fi; | |
968 | { | |
969 | CORE_ADDR func_start; | |
970 | struct rs6000_framedata fdata; | |
971 | int frameless; | |
972 | ||
965dde97 PS |
973 | if (fi->signal_handler_caller) |
974 | return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4); | |
975 | ||
068c9fd6 MM |
976 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
977 | ||
978 | /* If we failed to find the start of the function, it is a mistake | |
979 | to inspect the instructions. */ | |
980 | if (!func_start) | |
981 | return 0; | |
982 | ||
983 | (void) skip_prologue (func_start, &fdata); | |
068c9fd6 | 984 | |
4b4c6c96 MM |
985 | if (fdata.lr_offset == 0 && fi->next != NULL) |
986 | return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, 4); | |
987 | ||
988 | if (fdata.lr_offset == 0) | |
989 | return read_register (LR_REGNUM); | |
990 | ||
068c9fd6 MM |
991 | return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4); |
992 | } | |
ecf4059f JG |
993 | |
994 | /* If saved registers of frame FI are not known yet, read and cache them. | |
63641491 | 995 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, |
ecf4059f JG |
996 | in which case the framedata are read. */ |
997 | ||
998 | static void | |
999 | frame_get_cache_fsr (fi, fdatap) | |
1000 | struct frame_info *fi; | |
63641491 | 1001 | struct rs6000_framedata *fdatap; |
ecf4059f JG |
1002 | { |
1003 | int ii; | |
1004 | CORE_ADDR frame_addr; | |
63641491 | 1005 | struct rs6000_framedata work_fdata; |
ecf4059f JG |
1006 | |
1007 | if (fi->cache_fsr) | |
1008 | return; | |
1009 | ||
1010 | if (fdatap == NULL) { | |
1011 | fdatap = &work_fdata; | |
068c9fd6 | 1012 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); |
ecf4059f JG |
1013 | } |
1014 | ||
1015 | fi->cache_fsr = (struct frame_saved_regs *) | |
1016 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
4ed97c9a | 1017 | memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
ecf4059f JG |
1018 | |
1019 | if (fi->prev && fi->prev->frame) | |
1020 | frame_addr = fi->prev->frame; | |
1021 | else | |
1022 | frame_addr = read_memory_integer (fi->frame, 4); | |
1023 | ||
1024 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
965dde97 | 1025 | All fpr's from saved_fpr to fp31 are saved. */ |
ecf4059f JG |
1026 | |
1027 | if (fdatap->saved_fpr >= 0) { | |
965dde97 PS |
1028 | int fpr_offset = frame_addr + fdatap->fpr_offset; |
1029 | for (ii = fdatap->saved_fpr; ii < 32; ii++) { | |
1030 | fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset; | |
1031 | fpr_offset += 8; | |
1032 | } | |
ecf4059f JG |
1033 | } |
1034 | ||
1035 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
965dde97 | 1036 | All gpr's from saved_gpr to gpr31 are saved. */ |
ecf4059f | 1037 | |
965dde97 PS |
1038 | if (fdatap->saved_gpr >= 0) { |
1039 | int gpr_offset = frame_addr + fdatap->gpr_offset; | |
1040 | for (ii = fdatap->saved_gpr; ii < 32; ii++) { | |
1041 | fi->cache_fsr->regs [ii] = gpr_offset; | |
1042 | gpr_offset += 4; | |
1043 | } | |
1044 | } | |
1045 | ||
1046 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1047 | the CR. */ | |
1048 | if (fdatap->cr_offset != 0) | |
1049 | fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset; | |
1050 | ||
1051 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1052 | the LR. */ | |
1053 | if (fdatap->lr_offset != 0) | |
1054 | fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset; | |
ecf4059f JG |
1055 | } |
1056 | ||
1057 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1058 | was first allocated. For functions calling alloca(), it might be saved in | |
1059 | an alloca register. */ | |
1060 | ||
1061 | CORE_ADDR | |
1062 | frame_initial_stack_address (fi) | |
1063 | struct frame_info *fi; | |
1064 | { | |
1065 | CORE_ADDR tmpaddr; | |
63641491 | 1066 | struct rs6000_framedata fdata; |
ecf4059f JG |
1067 | struct frame_info *callee_fi; |
1068 | ||
1069 | /* if the initial stack pointer (frame address) of this frame is known, | |
1070 | just return it. */ | |
1071 | ||
1072 | if (fi->initial_sp) | |
1073 | return fi->initial_sp; | |
1074 | ||
1075 | /* find out if this function is using an alloca register.. */ | |
1076 | ||
068c9fd6 | 1077 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); |
ecf4059f JG |
1078 | |
1079 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1080 | ||
1081 | if (!fi->cache_fsr) | |
1082 | frame_get_cache_fsr (fi, &fdata); | |
1083 | ||
1084 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1085 | this frame, and it is good enough. */ | |
1086 | ||
1087 | if (fdata.alloca_reg < 0) { | |
1088 | fi->initial_sp = fi->frame; | |
1089 | return fi->initial_sp; | |
1090 | } | |
1091 | ||
1092 | /* This function has an alloca register. If this is the top-most frame | |
1093 | (with the lowest address), the value in alloca register is good. */ | |
1094 | ||
1095 | if (!fi->next) | |
1096 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1097 | ||
1098 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1099 | registers, but there are exceptions (such as when the callee | |
1100 | has no parameters). Find the address in which caller's alloca | |
1101 | register is saved. */ | |
1102 | ||
1103 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1104 | ||
1105 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1106 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1107 | |
1108 | /* this is the address in which alloca register is saved. */ | |
1109 | ||
1110 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1111 | if (tmpaddr) { | |
1112 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1113 | return fi->initial_sp; | |
1114 | } | |
1115 | ||
1116 | /* Go look into deeper levels of the frame chain to see if any one of | |
1117 | the callees has saved alloca register. */ | |
1118 | } | |
1119 | ||
1120 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1121 | then the value in the register is still good. */ | |
1122 | ||
1123 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1124 | } | |
1125 | ||
669caa9c | 1126 | CORE_ADDR |
f3649227 JK |
1127 | rs6000_frame_chain (thisframe) |
1128 | struct frame_info *thisframe; | |
1129 | { | |
669caa9c | 1130 | CORE_ADDR fp; |
f3649227 JK |
1131 | if (inside_entry_file ((thisframe)->pc)) |
1132 | return 0; | |
cee86be3 | 1133 | if (thisframe->signal_handler_caller) |
9ed8604f | 1134 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); |
cee86be3 JK |
1135 | else |
1136 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1137 | ||
f3649227 JK |
1138 | return fp; |
1139 | } | |
ecf4059f JG |
1140 | \f |
1141 | /* Keep an array of load segment information and their TOC table addresses. | |
1142 | This info will be useful when calling a shared library function by hand. */ | |
1143 | ||
1144 | struct loadinfo { | |
1145 | CORE_ADDR textorg, dataorg; | |
1146 | unsigned long toc_offset; | |
1147 | }; | |
1148 | ||
1149 | #define LOADINFOLEN 10 | |
1150 | ||
ecf4059f JG |
1151 | static struct loadinfo *loadinfo = NULL; |
1152 | static int loadinfolen = 0; | |
1153 | static int loadinfotocindex = 0; | |
3c02636b | 1154 | static int loadinfotextindex = 0; |
ecf4059f JG |
1155 | |
1156 | ||
1157 | void | |
1158 | xcoff_init_loadinfo () | |
1159 | { | |
1160 | loadinfotocindex = 0; | |
1161 | loadinfotextindex = 0; | |
1162 | ||
1163 | if (loadinfolen == 0) { | |
1164 | loadinfo = (struct loadinfo *) | |
1165 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1166 | loadinfolen = LOADINFOLEN; | |
1167 | } | |
1168 | } | |
1169 | ||
1170 | ||
1171 | /* FIXME -- this is never called! */ | |
1172 | void | |
1173 | free_loadinfo () | |
1174 | { | |
1175 | if (loadinfo) | |
1176 | free (loadinfo); | |
1177 | loadinfo = NULL; | |
1178 | loadinfolen = 0; | |
1179 | loadinfotocindex = 0; | |
1180 | loadinfotextindex = 0; | |
1181 | } | |
1182 | ||
1183 | /* this is called from xcoffread.c */ | |
1184 | ||
1185 | void | |
07dc1e42 MM |
1186 | xcoff_add_toc_to_loadinfo (tocoff) |
1187 | unsigned long tocoff; | |
ecf4059f JG |
1188 | { |
1189 | while (loadinfotocindex >= loadinfolen) { | |
1190 | loadinfolen += LOADINFOLEN; | |
1191 | loadinfo = (struct loadinfo *) | |
1192 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1193 | } | |
1194 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1195 | } | |
1196 | ||
2aefe6e4 | 1197 | void |
ecf4059f JG |
1198 | add_text_to_loadinfo (textaddr, dataaddr) |
1199 | CORE_ADDR textaddr; | |
1200 | CORE_ADDR dataaddr; | |
1201 | { | |
1202 | while (loadinfotextindex >= loadinfolen) { | |
1203 | loadinfolen += LOADINFOLEN; | |
1204 | loadinfo = (struct loadinfo *) | |
1205 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1206 | } | |
1207 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1208 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1209 | ++loadinfotextindex; | |
1210 | } | |
1211 | ||
1212 | ||
cd8a3d84 SS |
1213 | /* Note that this assumes that the "textorg" and "dataorg" elements of |
1214 | a member of this array are correlated with the "toc_offset" element | |
1215 | of the same member. This is taken care of because the loops which | |
1216 | assign the former (in xcoff_relocate_symtab or xcoff_relocate_core) | |
1217 | and the latter (in scan_xcoff_symtab, via vmap_symtab, in | |
1218 | vmap_ldinfo or xcoff_relocate_core) traverse the same objfiles in | |
1219 | the same order. */ | |
ecf4059f JG |
1220 | |
1221 | static CORE_ADDR | |
1222 | find_toc_address (pc) | |
1223 | CORE_ADDR pc; | |
1224 | { | |
1225 | int ii, toc_entry, tocbase = 0; | |
1226 | ||
65eaea27 | 1227 | toc_entry = -1; |
ecf4059f JG |
1228 | for (ii=0; ii < loadinfotextindex; ++ii) |
1229 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1230 | toc_entry = ii; | |
1231 | tocbase = loadinfo[ii].textorg; | |
1232 | } | |
1233 | ||
65eaea27 JL |
1234 | if (toc_entry == -1) |
1235 | error ("Unable to find TOC entry for pc 0x%x\n", pc); | |
ecf4059f JG |
1236 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; |
1237 | } | |
18b46e7c | 1238 | |
65eaea27 JL |
1239 | /* Return nonzero if ADDR (a function pointer) is in the data space and |
1240 | is therefore a special function pointer. */ | |
1241 | ||
1242 | int | |
1243 | is_magic_function_pointer (addr) | |
1244 | CORE_ADDR addr; | |
1245 | { | |
1246 | struct obj_section *s; | |
1247 | ||
1248 | s = find_pc_section (addr); | |
1249 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
1250 | return 0; | |
1251 | else | |
1252 | return 1; | |
1253 | } | |
1254 | ||
5c172b4b MM |
1255 | #ifdef GDB_TARGET_POWERPC |
1256 | int | |
1257 | gdb_print_insn_powerpc (memaddr, info) | |
1258 | bfd_vma memaddr; | |
1259 | disassemble_info *info; | |
1260 | { | |
1261 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1262 | return print_insn_big_powerpc (memaddr, info); | |
1263 | else | |
1264 | return print_insn_little_powerpc (memaddr, info); | |
1265 | } | |
1266 | #endif | |
1267 | ||
18b46e7c SS |
1268 | void |
1269 | _initialize_rs6000_tdep () | |
1270 | { | |
8678180e | 1271 | #ifndef ELF_OBJECT_FORMAT |
062cb0d3 FF |
1272 | { |
1273 | extern void (*xcoff_add_toc_to_loadinfo_hook) PARAMS ((unsigned long)); | |
8678180e MM |
1274 | extern void (*xcoff_init_loadinfo_hook) PARAMS ((void)); |
1275 | ||
1276 | /* Initialize hook in xcoffread for recording the toc offset value | |
1277 | of a symbol table into the ldinfo structure, for native rs6000 | |
1278 | config. */ | |
062cb0d3 | 1279 | xcoff_add_toc_to_loadinfo_hook = &xcoff_add_toc_to_loadinfo; |
062cb0d3 | 1280 | |
8678180e MM |
1281 | /* Initialize hook in xcoffread for calling xcoff_init_loadinfo in |
1282 | a native rs6000 config. */ | |
062cb0d3 FF |
1283 | xcoff_init_loadinfo_hook = &xcoff_init_loadinfo; |
1284 | } | |
8678180e | 1285 | #endif /* ELF_OBJECT_FORMAT */ |
062cb0d3 | 1286 | |
18b46e7c SS |
1287 | /* FIXME, this should not be decided via ifdef. */ |
1288 | #ifdef GDB_TARGET_POWERPC | |
5c172b4b | 1289 | tm_print_insn = gdb_print_insn_powerpc; |
18b46e7c SS |
1290 | #else |
1291 | tm_print_insn = print_insn_rs6000; | |
1292 | #endif | |
1293 | } |