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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
18b46e7c | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995 |
07aa9fdc | 3 | Free Software Foundation, Inc. |
41abdfbd JG |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
6c9638b4 | 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
41abdfbd | 20 | |
41abdfbd | 21 | #include "defs.h" |
41abdfbd JG |
22 | #include "frame.h" |
23 | #include "inferior.h" | |
24 | #include "symtab.h" | |
25 | #include "target.h" | |
030fb5cb | 26 | #include "gdbcore.h" |
41abdfbd | 27 | |
2aefe6e4 JK |
28 | #include "xcoffsolib.h" |
29 | ||
41abdfbd | 30 | #include <a.out.h> |
d6434f39 JG |
31 | |
32 | extern struct obstack frame_cache_obstack; | |
33 | ||
41abdfbd | 34 | extern int errno; |
41abdfbd JG |
35 | |
36 | /* Nonzero if we just simulated a single step break. */ | |
37 | int one_stepped; | |
38 | ||
41abdfbd JG |
39 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
40 | ||
41 | static struct sstep_breaks { | |
030fb5cb JK |
42 | /* Address, or 0 if this is not in use. */ |
43 | CORE_ADDR address; | |
44 | /* Shadow contents. */ | |
45 | char data[4]; | |
41abdfbd JG |
46 | } stepBreaks[2]; |
47 | ||
ecf4059f JG |
48 | /* Static function prototypes */ |
49 | ||
ecf4059f JG |
50 | static CORE_ADDR |
51 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
52 | ||
53 | static CORE_ADDR | |
54 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
55 | ||
56 | static void | |
57 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
63641491 | 58 | struct rs6000_framedata *fdatap)); |
41abdfbd JG |
59 | |
60 | /* | |
61 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
62 | */ | |
ecf4059f | 63 | static CORE_ADDR |
41abdfbd | 64 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
65 | int opcode; |
66 | int instr; | |
67 | CORE_ADDR pc; | |
68 | CORE_ADDR safety; | |
41abdfbd JG |
69 | { |
70 | register long offset; | |
ecf4059f | 71 | CORE_ADDR dest; |
41abdfbd JG |
72 | int immediate; |
73 | int absolute; | |
74 | int ext_op; | |
75 | ||
76 | absolute = (int) ((instr >> 1) & 1); | |
77 | ||
78 | switch (opcode) { | |
79 | case 18 : | |
ecf4059f | 80 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
dc59e982 MM |
81 | if (absolute) |
82 | dest = immediate; | |
83 | else | |
84 | dest = pc + immediate; | |
85 | break; | |
41abdfbd JG |
86 | |
87 | case 16 : | |
dc59e982 | 88 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ |
41abdfbd JG |
89 | if (absolute) |
90 | dest = immediate; | |
91 | else | |
92 | dest = pc + immediate; | |
93 | break; | |
94 | ||
95 | case 19 : | |
96 | ext_op = (instr>>1) & 0x3ff; | |
97 | ||
98 | if (ext_op == 16) /* br conditional register */ | |
99 | dest = read_register (LR_REGNUM) & ~3; | |
100 | ||
101 | else if (ext_op == 528) /* br cond to count reg */ | |
9aa31e91 JK |
102 | { |
103 | dest = read_register (CTR_REGNUM) & ~3; | |
104 | ||
105 | /* If we are about to execute a system call, dest is something | |
106 | like 0x22fc or 0x3b00. Upon completion the system call | |
107 | will return to the address in the link register. */ | |
108 | if (dest < TEXT_SEGMENT_BASE) | |
109 | dest = read_register (LR_REGNUM) & ~3; | |
110 | } | |
41abdfbd JG |
111 | else return -1; |
112 | break; | |
113 | ||
114 | default: return -1; | |
115 | } | |
818de002 | 116 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
117 | } |
118 | ||
119 | ||
120 | ||
121 | /* AIX does not support PT_STEP. Simulate it. */ | |
122 | ||
997cc2c0 | 123 | void |
41abdfbd | 124 | single_step (signal) |
997cc2c0 | 125 | int signal; |
41abdfbd JG |
126 | { |
127 | #define INSNLEN(OPCODE) 4 | |
128 | ||
5c172b4b MM |
129 | static char le_breakp[] = LITTLE_BREAKPOINT; |
130 | static char be_breakp[] = BIG_BREAKPOINT; | |
131 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
030fb5cb JK |
132 | int ii, insn; |
133 | CORE_ADDR loc; | |
134 | CORE_ADDR breaks[2]; | |
135 | int opcode; | |
41abdfbd JG |
136 | |
137 | if (!one_stepped) { | |
41abdfbd JG |
138 | loc = read_pc (); |
139 | ||
b112f2ae | 140 | insn = read_memory_integer (loc, 4); |
41abdfbd JG |
141 | |
142 | breaks[0] = loc + INSNLEN(insn); | |
143 | opcode = insn >> 26; | |
144 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
145 | ||
818de002 PB |
146 | /* Don't put two breakpoints on the same address. */ |
147 | if (breaks[1] == breaks[0]) | |
148 | breaks[1] = -1; | |
149 | ||
030fb5cb | 150 | stepBreaks[1].address = 0; |
41abdfbd JG |
151 | |
152 | for (ii=0; ii < 2; ++ii) { | |
153 | ||
154 | /* ignore invalid breakpoint. */ | |
155 | if ( breaks[ii] == -1) | |
156 | continue; | |
157 | ||
030fb5cb | 158 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 159 | |
030fb5cb | 160 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
161 | stepBreaks[ii].address = breaks[ii]; |
162 | } | |
163 | ||
164 | one_stepped = 1; | |
997cc2c0 | 165 | } else { |
41abdfbd JG |
166 | |
167 | /* remove step breakpoints. */ | |
168 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 169 | if (stepBreaks[ii].address != 0) |
41abdfbd | 170 | write_memory |
030fb5cb | 171 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
172 | |
173 | one_stepped = 0; | |
174 | } | |
997cc2c0 | 175 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 176 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 177 | } |
41abdfbd JG |
178 | |
179 | ||
068c9fd6 MM |
180 | /* return pc value after skipping a function prologue and also return |
181 | information about a function frame. | |
41abdfbd | 182 | |
068c9fd6 MM |
183 | in struct rs6000_frameinfo fdata: |
184 | - frameless is TRUE, if function does not have a frame. | |
185 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
186 | - offset is the number of bytes used in the frame to save registers. | |
187 | - saved_gpr is the number of the first saved gpr. | |
188 | - saved_fpr is the number of the first saved fpr. | |
189 | - alloca_reg is the number of the register used for alloca() handling. | |
190 | Otherwise -1. | |
191 | - gpr_offset is the offset of the saved gprs | |
192 | - fpr_offset is the offset of the saved fprs | |
193 | - lr_offset is the offset of the saved lr | |
194 | - cr_offset is the offset of the saved cr | |
195 | */ | |
196 | ||
197 | #define SIGNED_SHORT(x) \ | |
198 | ((sizeof (short) == 2) \ | |
199 | ? ((int)(short)(x)) \ | |
200 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
201 | ||
202 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
203 | ||
204 | CORE_ADDR | |
205 | skip_prologue (pc, fdata) | |
206 | CORE_ADDR pc; | |
207 | struct rs6000_framedata *fdata; | |
41abdfbd | 208 | { |
068c9fd6 | 209 | CORE_ADDR orig_pc = pc; |
34df79fc | 210 | char buf[4]; |
34df79fc | 211 | unsigned long op; |
4b4c6c96 | 212 | long offset = 0; |
068c9fd6 MM |
213 | int lr_reg = 0; |
214 | int cr_reg = 0; | |
215 | int reg; | |
4b4c6c96 | 216 | int framep = 0; |
068c9fd6 MM |
217 | static struct rs6000_framedata zero_frame; |
218 | ||
219 | *fdata = zero_frame; | |
220 | fdata->saved_gpr = -1; | |
221 | fdata->saved_fpr = -1; | |
222 | fdata->alloca_reg = -1; | |
223 | fdata->frameless = 1; | |
224 | fdata->nosavedpc = 1; | |
41abdfbd | 225 | |
34df79fc | 226 | if (target_read_memory (pc, buf, 4)) |
41abdfbd | 227 | return pc; /* Can't access it -- assume no prologue. */ |
41abdfbd JG |
228 | |
229 | /* Assume that subsequent fetches can fail with low probability. */ | |
068c9fd6 MM |
230 | pc -= 4; |
231 | for (;;) | |
232 | { | |
233 | pc += 4; | |
234 | op = read_memory_integer (pc, 4); | |
41abdfbd | 235 | |
068c9fd6 MM |
236 | if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ |
237 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
238 | continue; | |
239 | ||
240 | } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */ | |
241 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
242 | continue; | |
243 | ||
244 | } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
245 | reg = GET_SRC_REG (op); | |
246 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) { | |
247 | fdata->saved_fpr = reg; | |
4b4c6c96 | 248 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
249 | } |
250 | continue; | |
251 | ||
252 | } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
253 | ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */ | |
254 | (op & 0x03e00000) >= 0x01a00000)) { | |
255 | ||
256 | reg = GET_SRC_REG (op); | |
257 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) { | |
258 | fdata->saved_gpr = reg; | |
4b4c6c96 | 259 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
260 | } |
261 | continue; | |
262 | ||
263 | } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */ | |
264 | fdata->offset = (op & 0x0000ffff) << 16; | |
265 | continue; | |
266 | ||
267 | } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */ | |
268 | fdata->offset |= (op & 0x0000ffff); | |
269 | continue; | |
270 | ||
271 | } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */ | |
4b4c6c96 | 272 | fdata->lr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
273 | fdata->nosavedpc = 0; |
274 | lr_reg = 0; | |
275 | continue; | |
276 | ||
277 | } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */ | |
4b4c6c96 | 278 | fdata->cr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
279 | cr_reg = 0; |
280 | continue; | |
281 | ||
4b4c6c96 MM |
282 | } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */ |
283 | continue; | |
284 | ||
285 | } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */ | |
286 | op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */ | |
287 | lr_reg == 0x901e0000) { | |
288 | continue; | |
289 | ||
290 | } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */ | |
291 | (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */ | |
292 | continue; | |
293 | ||
068c9fd6 | 294 | } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ |
965dde97 PS |
295 | |
296 | /* Don't skip over the subroutine call if it is not within the first | |
297 | three instructions of the prologue. */ | |
298 | if ((pc - orig_pc) > 8) | |
299 | break; | |
300 | ||
068c9fd6 MM |
301 | op = read_memory_integer (pc+4, 4); |
302 | ||
303 | /* At this point, make sure this is not a trampoline function | |
304 | (a function that simply calls another functions, and nothing else). | |
305 | If the next is not a nop, this branch was part of the function | |
306 | prologue. */ | |
307 | ||
308 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
965dde97 | 309 | break; /* don't skip over this branch */ |
068c9fd6 MM |
310 | |
311 | continue; | |
312 | ||
4b4c6c96 | 313 | /* update stack pointer */ |
068c9fd6 | 314 | } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */ |
4b4c6c96 MM |
315 | fdata->offset = SIGNED_SHORT (op); |
316 | offset = fdata->offset; | |
317 | continue; | |
1eeba686 | 318 | |
068c9fd6 | 319 | } else if (op == 0x7c21016e) { /* stwux 1,1,0 */ |
4b4c6c96 MM |
320 | offset = fdata->offset; |
321 | continue; | |
41abdfbd | 322 | |
4b4c6c96 MM |
323 | /* Load up minimal toc pointer */ |
324 | } else if ((op >> 22) == 0x20f) { /* l r31,... or l r30,... */ | |
325 | continue; | |
cdb1cc92 | 326 | |
4b4c6c96 MM |
327 | /* store parameters in stack */ |
328 | } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
329 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
330 | (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */ | |
331 | continue; | |
e137e850 | 332 | |
4b4c6c96 MM |
333 | /* store parameters in stack via frame pointer */ |
334 | } else if (framep && | |
335 | (op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
336 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
337 | (op & 0xfc1f0000) == 0xfc1f0000) { /* frsp, fp?,NUM(r1) */ | |
338 | continue; | |
e137e850 | 339 | |
4b4c6c96 MM |
340 | /* Set up frame pointer */ |
341 | } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
342 | || op == 0x7c3f0b78) { /* mr r31, r1 */ | |
343 | framep = 1; | |
965dde97 | 344 | fdata->alloca_reg = 31; |
4b4c6c96 | 345 | continue; |
41abdfbd | 346 | |
4b4c6c96 MM |
347 | } else { |
348 | break; | |
349 | } | |
41abdfbd | 350 | } |
068c9fd6 | 351 | |
507e4004 PB |
352 | #if 0 |
353 | /* I have problems with skipping over __main() that I need to address | |
354 | * sometime. Previously, I used to use misc_function_vector which | |
355 | * didn't work as well as I wanted to be. -MGO */ | |
356 | ||
357 | /* If the first thing after skipping a prolog is a branch to a function, | |
358 | this might be a call to an initializer in main(), introduced by gcc2. | |
359 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
360 | work before calling a function right after a prologue, thus we can | |
361 | single out such gcc2 behaviour. */ | |
362 | ||
363 | ||
364 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
365 | op = read_memory_integer (pc+4, 4); | |
366 | ||
367 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
368 | ||
369 | /* check and see if we are in main. If so, skip over this initializer | |
370 | function as well. */ | |
371 | ||
372 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 373 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
374 | return pc + 8; |
375 | } | |
376 | } | |
377 | #endif /* 0 */ | |
378 | ||
068c9fd6 | 379 | fdata->frameless = (pc == orig_pc); |
4b4c6c96 | 380 | fdata->offset = - fdata->offset; |
41abdfbd JG |
381 | return pc; |
382 | } | |
383 | ||
818de002 | 384 | |
41abdfbd JG |
385 | /************************************************************************* |
386 | Support for creating pushind a dummy frame into the stack, and popping | |
387 | frames, etc. | |
388 | *************************************************************************/ | |
389 | ||
818de002 PB |
390 | /* The total size of dummy frame is 436, which is; |
391 | ||
392 | 32 gpr's - 128 bytes | |
393 | 32 fpr's - 256 " | |
394 | 7 the rest - 28 " | |
395 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
396 | for the link area might not be necessary, since it will be taken | |
397 | care of by push_arguments(). */ | |
398 | ||
399 | #define DUMMY_FRAME_SIZE 436 | |
400 | ||
41abdfbd JG |
401 | #define DUMMY_FRAME_ADDR_SIZE 10 |
402 | ||
403 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 404 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
405 | |
406 | static int dummy_frame_count = 0; | |
407 | static int dummy_frame_size = 0; | |
408 | static CORE_ADDR *dummy_frame_addr = 0; | |
409 | ||
410 | extern int stop_stack_dummy; | |
411 | ||
412 | /* push a dummy frame into stack, save all register. Currently we are saving | |
413 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
414 | ||
ecf4059f | 415 | void |
41abdfbd JG |
416 | push_dummy_frame () |
417 | { | |
359a097f JK |
418 | /* stack pointer. */ |
419 | CORE_ADDR sp; | |
b112f2ae JK |
420 | /* Same thing, target byte order. */ |
421 | char sp_targ[4]; | |
359a097f JK |
422 | |
423 | /* link register. */ | |
424 | CORE_ADDR pc; | |
425 | /* Same thing, target byte order. */ | |
426 | char pc_targ[4]; | |
427 | ||
41abdfbd JG |
428 | int ii; |
429 | ||
5f1c39ef | 430 | target_fetch_registers (-1); |
6c6afbb9 | 431 | |
41abdfbd JG |
432 | if (dummy_frame_count >= dummy_frame_size) { |
433 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
434 | if (dummy_frame_addr) | |
435 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
436 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
437 | else | |
438 | dummy_frame_addr = (CORE_ADDR*) | |
439 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
440 | } | |
441 | ||
442 | sp = read_register(SP_REGNUM); | |
359a097f | 443 | pc = read_register(PC_REGNUM); |
5816555b | 444 | store_address (pc_targ, 4, pc); |
41abdfbd JG |
445 | |
446 | dummy_frame_addr [dummy_frame_count++] = sp; | |
447 | ||
448 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 449 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
450 | uses that area for IPC purposes when executing ptrace(2) calls. So |
451 | before writing register values into the new frame, decrement and update | |
452 | %sp first in order to secure your frame. */ | |
453 | ||
818de002 | 454 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 455 | |
41abdfbd JG |
456 | /* gdb relies on the state of current_frame. We'd better update it, |
457 | otherwise things like do_registers_info() wouldn't work properly! */ | |
458 | ||
459 | flush_cached_frames (); | |
41abdfbd JG |
460 | |
461 | /* save program counter in link register's space. */ | |
359a097f | 462 | write_memory (sp+8, pc_targ, 4); |
41abdfbd | 463 | |
6c6afbb9 | 464 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
465 | |
466 | /* fpr's, f0..f31 */ | |
467 | for (ii = 0; ii < 32; ++ii) | |
468 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
469 | ||
470 | /* gpr's r0..r31 */ | |
471 | for (ii=1; ii <=32; ++ii) | |
472 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
473 | ||
818de002 PB |
474 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
475 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
476 | ||
477 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
478 | write_memory (sp-384-(ii*4), | |
479 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
480 | } | |
481 | ||
482 | /* Save sp or so called back chain right here. */ | |
b112f2ae JK |
483 | store_address (sp_targ, 4, sp); |
484 | write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4); | |
818de002 | 485 | sp -= DUMMY_FRAME_SIZE; |
41abdfbd JG |
486 | |
487 | /* And finally, this is the back chain. */ | |
359a097f | 488 | write_memory (sp+8, pc_targ, 4); |
41abdfbd JG |
489 | } |
490 | ||
491 | ||
492 | /* Pop a dummy frame. | |
493 | ||
494 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
495 | is usually done before user calls a function explicitly. | |
496 | ||
818de002 PB |
497 | After a dummy frame is pushed, some instructions are copied into stack, |
498 | and stack pointer is decremented even more. Since we don't have a frame | |
499 | pointer to get back to the parent frame of the dummy, we start having | |
500 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
501 | addresses of dummy frames as such. When poping happens and when we | |
502 | detect that was a dummy frame, we pop it back to its parent by using | |
503 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
504 | |
505 | FIXME: This whole concept is broken. You should be able to detect | |
506 | a dummy stack frame *on the user's stack itself*. When you do, | |
507 | then you know the format of that stack frame -- including its | |
508 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 509 | GDB process that keeps track of these dummy frames! -- [email protected] Aug92 |
41abdfbd JG |
510 | */ |
511 | ||
512 | pop_dummy_frame () | |
513 | { | |
514 | CORE_ADDR sp, pc; | |
515 | int ii; | |
516 | sp = dummy_frame_addr [--dummy_frame_count]; | |
517 | ||
518 | /* restore all fpr's. */ | |
519 | for (ii = 1; ii <= 32; ++ii) | |
520 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
521 | ||
522 | /* restore all gpr's */ | |
523 | for (ii=1; ii <= 32; ++ii) { | |
524 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
525 | } | |
526 | ||
818de002 PB |
527 | /* restore the rest of the registers. */ |
528 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
529 | read_memory (sp-384-(ii*4), | |
530 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
531 | ||
532 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
533 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
534 | |
535 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
536 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
537 | one we should restore. Change it with the one we need. */ | |
538 | ||
539 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
540 | ||
541 | /* Now we can restore all registers. */ | |
542 | ||
5f1c39ef | 543 | target_store_registers (-1); |
41abdfbd JG |
544 | pc = read_pc (); |
545 | flush_cached_frames (); | |
41abdfbd JG |
546 | } |
547 | ||
548 | ||
549 | /* pop the innermost frame, go back to the caller. */ | |
550 | ||
ecf4059f | 551 | void |
41abdfbd JG |
552 | pop_frame () |
553 | { | |
359a097f | 554 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
63641491 | 555 | struct rs6000_framedata fdata; |
669caa9c | 556 | struct frame_info *frame = get_current_frame (); |
41abdfbd | 557 | int addr, ii; |
41abdfbd JG |
558 | |
559 | pc = read_pc (); | |
669caa9c | 560 | sp = FRAME_FP (frame); |
41abdfbd JG |
561 | |
562 | if (stop_stack_dummy && dummy_frame_count) { | |
563 | pop_dummy_frame (); | |
564 | return; | |
565 | } | |
566 | ||
07aa9fdc PS |
567 | /* Make sure that all registers are valid. */ |
568 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
569 | ||
41abdfbd JG |
570 | /* figure out previous %pc value. If the function is frameless, it is |
571 | still in the link register, otherwise walk the frames and retrieve the | |
572 | saved %pc value in the previous frame. */ | |
573 | ||
34a1a3bf | 574 | addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET; |
068c9fd6 | 575 | (void) skip_prologue (addr, &fdata); |
41abdfbd | 576 | |
6c6afbb9 | 577 | if (fdata.frameless) |
07aa9fdc PS |
578 | prev_sp = sp; |
579 | else | |
580 | prev_sp = read_memory_integer (sp, 4); | |
068c9fd6 | 581 | if (fdata.lr_offset == 0) |
41abdfbd JG |
582 | lr = read_register (LR_REGNUM); |
583 | else | |
068c9fd6 | 584 | lr = read_memory_integer (prev_sp + fdata.lr_offset, 4); |
41abdfbd JG |
585 | |
586 | /* reset %pc value. */ | |
587 | write_register (PC_REGNUM, lr); | |
588 | ||
589 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 590 | addr = prev_sp - fdata.offset; |
41abdfbd | 591 | |
6c6afbb9 | 592 | if (fdata.saved_gpr != -1) |
669caa9c | 593 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { |
41abdfbd | 594 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 595 | addr += 4; |
41abdfbd JG |
596 | } |
597 | ||
6c6afbb9 | 598 | if (fdata.saved_fpr != -1) |
669caa9c | 599 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { |
41abdfbd JG |
600 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
601 | addr += 8; | |
602 | } | |
603 | ||
604 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 605 | target_store_registers (-1); |
41abdfbd | 606 | flush_cached_frames (); |
41abdfbd JG |
607 | } |
608 | ||
41abdfbd JG |
609 | /* fixup the call sequence of a dummy function, with the real function address. |
610 | its argumets will be passed by gdb. */ | |
611 | ||
ecf4059f | 612 | void |
41abdfbd JG |
613 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
614 | char *dummyname; | |
ecf4059f JG |
615 | CORE_ADDR pc; |
616 | CORE_ADDR fun; | |
41abdfbd JG |
617 | int nargs; /* not used */ |
618 | int type; /* not used */ | |
41abdfbd JG |
619 | { |
620 | #define TOC_ADDR_OFFSET 20 | |
621 | #define TARGET_ADDR_OFFSET 28 | |
622 | ||
623 | int ii; | |
ecf4059f JG |
624 | CORE_ADDR target_addr; |
625 | CORE_ADDR tocvalue; | |
41abdfbd JG |
626 | |
627 | target_addr = fun; | |
628 | tocvalue = find_toc_address (target_addr); | |
629 | ||
630 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
631 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
632 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
633 | ||
634 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
635 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
636 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
637 | ||
638 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
639 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
640 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
641 | ||
642 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
643 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
644 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
645 | } | |
646 | ||
41abdfbd JG |
647 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first |
648 | eight words of the argument list (that might be less than eight parameters if | |
649 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
650 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
651 | the parameters if any are passed in user stack. There might be cases in which | |
652 | half of the parameter is copied into registers, the other half is pushed into | |
653 | stack. | |
654 | ||
655 | If the function is returning a structure, then the return address is passed | |
656 | in r3, then the first 7 words of the parametes can be passed in registers, | |
657 | starting from r4. */ | |
658 | ||
659 | CORE_ADDR | |
660 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
661 | int nargs; | |
17221e41 | 662 | value_ptr *args; |
41abdfbd JG |
663 | CORE_ADDR sp; |
664 | int struct_return; | |
665 | CORE_ADDR struct_addr; | |
666 | { | |
667 | int ii, len; | |
668 | int argno; /* current argument number */ | |
669 | int argbytes; /* current argument byte */ | |
670 | char tmp_buffer [50]; | |
17221e41 | 671 | value_ptr arg; |
41abdfbd JG |
672 | int f_argno = 0; /* current floating point argno */ |
673 | ||
674 | CORE_ADDR saved_sp, pc; | |
675 | ||
676 | if ( dummy_frame_count <= 0) | |
199b2450 | 677 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
41abdfbd JG |
678 | |
679 | /* The first eight words of ther arguments are passed in registers. Copy | |
680 | them appropriately. | |
681 | ||
682 | If the function is returning a `struct', then the first word (which | |
683 | will be passed in r3) is used for struct return address. In that | |
684 | case we should advance one word and start from r4 register to copy | |
685 | parameters. */ | |
686 | ||
687 | ii = struct_return ? 1 : 0; | |
688 | ||
689 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
690 | ||
5222ca60 | 691 | arg = args[argno]; |
41abdfbd JG |
692 | len = TYPE_LENGTH (VALUE_TYPE (arg)); |
693 | ||
694 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
695 | ||
696 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
697 | There are 13 fpr's reserved for passing parameters. At this point | |
698 | there is no way we would run out of them. */ | |
699 | ||
700 | if (len > 8) | |
199b2450 | 701 | printf_unfiltered ( |
41abdfbd JG |
702 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
703 | ||
ade40d31 RP |
704 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
705 | len); | |
41abdfbd JG |
706 | ++f_argno; |
707 | } | |
708 | ||
709 | if (len > 4) { | |
710 | ||
711 | /* Argument takes more than one register. */ | |
712 | while (argbytes < len) { | |
713 | ||
714 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 RP |
715 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
716 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
41abdfbd JG |
717 | (len - argbytes) > 4 ? 4 : len - argbytes); |
718 | ++ii, argbytes += 4; | |
719 | ||
720 | if (ii >= 8) | |
721 | goto ran_out_of_registers_for_arguments; | |
722 | } | |
723 | argbytes = 0; | |
724 | --ii; | |
725 | } | |
726 | else { /* Argument can fit in one register. No problem. */ | |
727 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 | 728 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
41abdfbd JG |
729 | } |
730 | ++argno; | |
731 | } | |
732 | ||
733 | ran_out_of_registers_for_arguments: | |
734 | ||
735 | /* location for 8 parameters are always reserved. */ | |
736 | sp -= 4 * 8; | |
737 | ||
738 | /* another six words for back chain, TOC register, link register, etc. */ | |
739 | sp -= 24; | |
740 | ||
741 | /* if there are more arguments, allocate space for them in | |
742 | the stack, then push them starting from the ninth one. */ | |
743 | ||
744 | if ((argno < nargs) || argbytes) { | |
745 | int space = 0, jj; | |
17221e41 | 746 | value_ptr val; |
41abdfbd JG |
747 | |
748 | if (argbytes) { | |
749 | space += ((len - argbytes + 3) & -4); | |
750 | jj = argno + 1; | |
751 | } | |
752 | else | |
753 | jj = argno; | |
754 | ||
755 | for (; jj < nargs; ++jj) { | |
5222ca60 | 756 | val = args[jj]; |
41abdfbd JG |
757 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
758 | } | |
759 | ||
760 | /* add location required for the rest of the parameters */ | |
761 | space = (space + 7) & -8; | |
762 | sp -= space; | |
763 | ||
764 | /* This is another instance we need to be concerned about securing our | |
765 | stack space. If we write anything underneath %sp (r1), we might conflict | |
766 | with the kernel who thinks he is free to use this area. So, update %sp | |
767 | first before doing anything else. */ | |
768 | ||
769 | write_register (SP_REGNUM, sp); | |
770 | ||
41abdfbd JG |
771 | /* if the last argument copied into the registers didn't fit there |
772 | completely, push the rest of it into stack. */ | |
773 | ||
774 | if (argbytes) { | |
775 | write_memory ( | |
776 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
777 | ++argno; | |
778 | ii += ((len - argbytes + 3) & -4) / 4; | |
779 | } | |
780 | ||
781 | /* push the rest of the arguments into stack. */ | |
782 | for (; argno < nargs; ++argno) { | |
783 | ||
5222ca60 | 784 | arg = args[argno]; |
41abdfbd JG |
785 | len = TYPE_LENGTH (VALUE_TYPE (arg)); |
786 | ||
787 | ||
788 | /* float types should be passed in fpr's, as well as in the stack. */ | |
789 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
790 | ||
791 | if (len > 8) | |
199b2450 | 792 | printf_unfiltered ( |
41abdfbd JG |
793 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
794 | ||
ade40d31 RP |
795 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
796 | len); | |
41abdfbd JG |
797 | ++f_argno; |
798 | } | |
799 | ||
359a097f | 800 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
41abdfbd JG |
801 | ii += ((len + 3) & -4) / 4; |
802 | } | |
803 | } | |
6c6afbb9 | 804 | else |
41abdfbd JG |
805 | /* Secure stack areas first, before doing anything else. */ |
806 | write_register (SP_REGNUM, sp); | |
807 | ||
41abdfbd JG |
808 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
809 | read_memory (saved_sp, tmp_buffer, 24); | |
810 | write_memory (sp, tmp_buffer, 24); | |
811 | ||
b112f2ae JK |
812 | /* set back chain properly */ |
813 | store_address (tmp_buffer, 4, saved_sp); | |
814 | write_memory (sp, tmp_buffer, 4); | |
41abdfbd | 815 | |
5f1c39ef | 816 | target_store_registers (-1); |
41abdfbd JG |
817 | return sp; |
818 | } | |
819 | ||
820 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
821 | value into `valbuf' */ | |
822 | ||
ecf4059f | 823 | void |
41abdfbd JG |
824 | extract_return_value (valtype, regbuf, valbuf) |
825 | struct type *valtype; | |
826 | char regbuf[REGISTER_BYTES]; | |
827 | char *valbuf; | |
828 | { | |
07781ac0 | 829 | int offset = 0; |
41abdfbd JG |
830 | |
831 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
832 | ||
833 | double dd; float ff; | |
834 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
835 | We need to truncate the return value into float size (4 byte) if | |
836 | necessary. */ | |
837 | ||
838 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
ade40d31 | 839 | memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
41abdfbd JG |
840 | TYPE_LENGTH (valtype)); |
841 | else { /* float */ | |
ade40d31 | 842 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
41abdfbd | 843 | ff = (float)dd; |
ade40d31 | 844 | memcpy (valbuf, &ff, sizeof(float)); |
41abdfbd JG |
845 | } |
846 | } | |
07781ac0 | 847 | else { |
41abdfbd | 848 | /* return value is copied starting from r3. */ |
07781ac0 PS |
849 | if (TARGET_BYTE_ORDER == BIG_ENDIAN |
850 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
851 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
852 | ||
853 | memcpy (valbuf, regbuf + REGISTER_BYTE (3) + offset, | |
854 | TYPE_LENGTH (valtype)); | |
855 | } | |
41abdfbd JG |
856 | } |
857 | ||
858 | ||
ecf4059f JG |
859 | /* keep structure return address in this variable. |
860 | FIXME: This is a horrid kludge which should not be allowed to continue | |
861 | living. This only allows a single nested call to a structure-returning | |
862 | function. Come on, guys! -- [email protected], Aug 92 */ | |
41abdfbd JG |
863 | |
864 | CORE_ADDR rs6000_struct_return_address; | |
865 | ||
866 | ||
c2e4669f JG |
867 | /* Indirect function calls use a piece of trampoline code to do context |
868 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
869 | its first instruction (as when we have single-stepped to here). | |
07aa9fdc PS |
870 | Also skip shared library trampoline code (which is different from |
871 | indirect function call trampolines). | |
c2e4669f JG |
872 | Result is desired PC to step until, or NULL if we are not in |
873 | trampoline code. */ | |
41abdfbd | 874 | |
ecf4059f | 875 | CORE_ADDR |
41abdfbd | 876 | skip_trampoline_code (pc) |
ecf4059f | 877 | CORE_ADDR pc; |
41abdfbd JG |
878 | { |
879 | register unsigned int ii, op; | |
07aa9fdc | 880 | CORE_ADDR solib_target_pc; |
41abdfbd JG |
881 | |
882 | static unsigned trampoline_code[] = { | |
883 | 0x800b0000, /* l r0,0x0(r11) */ | |
884 | 0x90410014, /* st r2,0x14(r1) */ | |
885 | 0x7c0903a6, /* mtctr r0 */ | |
886 | 0x804b0004, /* l r2,0x4(r11) */ | |
887 | 0x816b0008, /* l r11,0x8(r11) */ | |
888 | 0x4e800420, /* bctr */ | |
889 | 0x4e800020, /* br */ | |
890 | 0 | |
891 | }; | |
892 | ||
07aa9fdc PS |
893 | /* If pc is in a shared library trampoline, return its target. */ |
894 | solib_target_pc = find_solib_trampoline_target (pc); | |
895 | if (solib_target_pc) | |
896 | return solib_target_pc; | |
897 | ||
41abdfbd JG |
898 | for (ii=0; trampoline_code[ii]; ++ii) { |
899 | op = read_memory_integer (pc + (ii*4), 4); | |
900 | if (op != trampoline_code [ii]) | |
359a097f | 901 | return 0; |
41abdfbd JG |
902 | } |
903 | ii = read_register (11); /* r11 holds destination addr */ | |
904 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
905 | return pc; | |
906 | } | |
907 | ||
ecf4059f | 908 | |
068c9fd6 | 909 | /* Determines whether the function FI has a frame on the stack or not. */ |
ecf4059f | 910 | int |
068c9fd6 MM |
911 | frameless_function_invocation (fi) |
912 | struct frame_info *fi; | |
ecf4059f JG |
913 | { |
914 | CORE_ADDR func_start; | |
63641491 | 915 | struct rs6000_framedata fdata; |
ecf4059f | 916 | |
b0e932ad JK |
917 | if (fi->next != NULL) |
918 | /* Don't even think about framelessness except on the innermost frame. */ | |
3f528883 JK |
919 | /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if |
920 | a signal happens while executing in a frameless function). */ | |
b0e932ad JK |
921 | return 0; |
922 | ||
ecf4059f JG |
923 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
924 | ||
925 | /* If we failed to find the start of the function, it is a mistake | |
926 | to inspect the instructions. */ | |
927 | ||
928 | if (!func_start) | |
929 | return 0; | |
930 | ||
068c9fd6 MM |
931 | (void) skip_prologue (func_start, &fdata); |
932 | return fdata.frameless; | |
ecf4059f JG |
933 | } |
934 | ||
068c9fd6 MM |
935 | /* Return the PC saved in a frame */ |
936 | unsigned long | |
937 | frame_saved_pc (fi) | |
938 | struct frame_info *fi; | |
939 | { | |
940 | CORE_ADDR func_start; | |
941 | struct rs6000_framedata fdata; | |
942 | int frameless; | |
943 | ||
965dde97 PS |
944 | if (fi->signal_handler_caller) |
945 | return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4); | |
946 | ||
068c9fd6 MM |
947 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
948 | ||
949 | /* If we failed to find the start of the function, it is a mistake | |
950 | to inspect the instructions. */ | |
951 | if (!func_start) | |
952 | return 0; | |
953 | ||
954 | (void) skip_prologue (func_start, &fdata); | |
068c9fd6 | 955 | |
4b4c6c96 MM |
956 | if (fdata.lr_offset == 0 && fi->next != NULL) |
957 | return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, 4); | |
958 | ||
959 | if (fdata.lr_offset == 0) | |
960 | return read_register (LR_REGNUM); | |
961 | ||
068c9fd6 MM |
962 | return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4); |
963 | } | |
ecf4059f JG |
964 | |
965 | /* If saved registers of frame FI are not known yet, read and cache them. | |
63641491 | 966 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, |
ecf4059f JG |
967 | in which case the framedata are read. */ |
968 | ||
969 | static void | |
970 | frame_get_cache_fsr (fi, fdatap) | |
971 | struct frame_info *fi; | |
63641491 | 972 | struct rs6000_framedata *fdatap; |
ecf4059f JG |
973 | { |
974 | int ii; | |
975 | CORE_ADDR frame_addr; | |
63641491 | 976 | struct rs6000_framedata work_fdata; |
ecf4059f JG |
977 | |
978 | if (fi->cache_fsr) | |
979 | return; | |
980 | ||
981 | if (fdatap == NULL) { | |
982 | fdatap = &work_fdata; | |
068c9fd6 | 983 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); |
ecf4059f JG |
984 | } |
985 | ||
986 | fi->cache_fsr = (struct frame_saved_regs *) | |
987 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
4ed97c9a | 988 | memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
ecf4059f JG |
989 | |
990 | if (fi->prev && fi->prev->frame) | |
991 | frame_addr = fi->prev->frame; | |
992 | else | |
993 | frame_addr = read_memory_integer (fi->frame, 4); | |
994 | ||
995 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
965dde97 | 996 | All fpr's from saved_fpr to fp31 are saved. */ |
ecf4059f JG |
997 | |
998 | if (fdatap->saved_fpr >= 0) { | |
965dde97 PS |
999 | int fpr_offset = frame_addr + fdatap->fpr_offset; |
1000 | for (ii = fdatap->saved_fpr; ii < 32; ii++) { | |
1001 | fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset; | |
1002 | fpr_offset += 8; | |
1003 | } | |
ecf4059f JG |
1004 | } |
1005 | ||
1006 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
965dde97 | 1007 | All gpr's from saved_gpr to gpr31 are saved. */ |
ecf4059f | 1008 | |
965dde97 PS |
1009 | if (fdatap->saved_gpr >= 0) { |
1010 | int gpr_offset = frame_addr + fdatap->gpr_offset; | |
1011 | for (ii = fdatap->saved_gpr; ii < 32; ii++) { | |
1012 | fi->cache_fsr->regs [ii] = gpr_offset; | |
1013 | gpr_offset += 4; | |
1014 | } | |
1015 | } | |
1016 | ||
1017 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1018 | the CR. */ | |
1019 | if (fdatap->cr_offset != 0) | |
1020 | fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset; | |
1021 | ||
1022 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1023 | the LR. */ | |
1024 | if (fdatap->lr_offset != 0) | |
1025 | fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset; | |
ecf4059f JG |
1026 | } |
1027 | ||
1028 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1029 | was first allocated. For functions calling alloca(), it might be saved in | |
1030 | an alloca register. */ | |
1031 | ||
1032 | CORE_ADDR | |
1033 | frame_initial_stack_address (fi) | |
1034 | struct frame_info *fi; | |
1035 | { | |
1036 | CORE_ADDR tmpaddr; | |
63641491 | 1037 | struct rs6000_framedata fdata; |
ecf4059f JG |
1038 | struct frame_info *callee_fi; |
1039 | ||
1040 | /* if the initial stack pointer (frame address) of this frame is known, | |
1041 | just return it. */ | |
1042 | ||
1043 | if (fi->initial_sp) | |
1044 | return fi->initial_sp; | |
1045 | ||
1046 | /* find out if this function is using an alloca register.. */ | |
1047 | ||
068c9fd6 | 1048 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); |
ecf4059f JG |
1049 | |
1050 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1051 | ||
1052 | if (!fi->cache_fsr) | |
1053 | frame_get_cache_fsr (fi, &fdata); | |
1054 | ||
1055 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1056 | this frame, and it is good enough. */ | |
1057 | ||
1058 | if (fdata.alloca_reg < 0) { | |
1059 | fi->initial_sp = fi->frame; | |
1060 | return fi->initial_sp; | |
1061 | } | |
1062 | ||
1063 | /* This function has an alloca register. If this is the top-most frame | |
1064 | (with the lowest address), the value in alloca register is good. */ | |
1065 | ||
1066 | if (!fi->next) | |
1067 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1068 | ||
1069 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1070 | registers, but there are exceptions (such as when the callee | |
1071 | has no parameters). Find the address in which caller's alloca | |
1072 | register is saved. */ | |
1073 | ||
1074 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1075 | ||
1076 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1077 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1078 | |
1079 | /* this is the address in which alloca register is saved. */ | |
1080 | ||
1081 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1082 | if (tmpaddr) { | |
1083 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1084 | return fi->initial_sp; | |
1085 | } | |
1086 | ||
1087 | /* Go look into deeper levels of the frame chain to see if any one of | |
1088 | the callees has saved alloca register. */ | |
1089 | } | |
1090 | ||
1091 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1092 | then the value in the register is still good. */ | |
1093 | ||
1094 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1095 | } | |
1096 | ||
669caa9c | 1097 | CORE_ADDR |
f3649227 JK |
1098 | rs6000_frame_chain (thisframe) |
1099 | struct frame_info *thisframe; | |
1100 | { | |
669caa9c | 1101 | CORE_ADDR fp; |
f3649227 JK |
1102 | if (inside_entry_file ((thisframe)->pc)) |
1103 | return 0; | |
cee86be3 | 1104 | if (thisframe->signal_handler_caller) |
9ed8604f | 1105 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); |
cee86be3 JK |
1106 | else |
1107 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1108 | ||
f3649227 JK |
1109 | return fp; |
1110 | } | |
ecf4059f JG |
1111 | \f |
1112 | /* Keep an array of load segment information and their TOC table addresses. | |
1113 | This info will be useful when calling a shared library function by hand. */ | |
1114 | ||
1115 | struct loadinfo { | |
1116 | CORE_ADDR textorg, dataorg; | |
1117 | unsigned long toc_offset; | |
1118 | }; | |
1119 | ||
1120 | #define LOADINFOLEN 10 | |
1121 | ||
ecf4059f JG |
1122 | static struct loadinfo *loadinfo = NULL; |
1123 | static int loadinfolen = 0; | |
1124 | static int loadinfotocindex = 0; | |
3c02636b | 1125 | static int loadinfotextindex = 0; |
ecf4059f JG |
1126 | |
1127 | ||
1128 | void | |
1129 | xcoff_init_loadinfo () | |
1130 | { | |
1131 | loadinfotocindex = 0; | |
1132 | loadinfotextindex = 0; | |
1133 | ||
1134 | if (loadinfolen == 0) { | |
1135 | loadinfo = (struct loadinfo *) | |
1136 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1137 | loadinfolen = LOADINFOLEN; | |
1138 | } | |
1139 | } | |
1140 | ||
1141 | ||
1142 | /* FIXME -- this is never called! */ | |
1143 | void | |
1144 | free_loadinfo () | |
1145 | { | |
1146 | if (loadinfo) | |
1147 | free (loadinfo); | |
1148 | loadinfo = NULL; | |
1149 | loadinfolen = 0; | |
1150 | loadinfotocindex = 0; | |
1151 | loadinfotextindex = 0; | |
1152 | } | |
1153 | ||
1154 | /* this is called from xcoffread.c */ | |
1155 | ||
1156 | void | |
07dc1e42 MM |
1157 | xcoff_add_toc_to_loadinfo (tocoff) |
1158 | unsigned long tocoff; | |
ecf4059f JG |
1159 | { |
1160 | while (loadinfotocindex >= loadinfolen) { | |
1161 | loadinfolen += LOADINFOLEN; | |
1162 | loadinfo = (struct loadinfo *) | |
1163 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1164 | } | |
1165 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1166 | } | |
1167 | ||
2aefe6e4 | 1168 | void |
ecf4059f JG |
1169 | add_text_to_loadinfo (textaddr, dataaddr) |
1170 | CORE_ADDR textaddr; | |
1171 | CORE_ADDR dataaddr; | |
1172 | { | |
1173 | while (loadinfotextindex >= loadinfolen) { | |
1174 | loadinfolen += LOADINFOLEN; | |
1175 | loadinfo = (struct loadinfo *) | |
1176 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1177 | } | |
1178 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1179 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1180 | ++loadinfotextindex; | |
1181 | } | |
1182 | ||
1183 | ||
a367db89 | 1184 | /* Note that this assumes that the "textorg" and "dataorg" elements |
ecf4059f | 1185 | of a member of this array are correlated with the "toc_offset" |
a367db89 JK |
1186 | element of the same member. This is taken care of because the loops |
1187 | which assign the former (in xcoff_relocate_symtab or xcoff_relocate_core) | |
1188 | and the latter (in scan_xcoff_symtab, via vmap_symtab, in vmap_ldinfo | |
1189 | or xcoff_relocate_core) traverse the same objfiles in the same order. */ | |
ecf4059f JG |
1190 | |
1191 | static CORE_ADDR | |
1192 | find_toc_address (pc) | |
1193 | CORE_ADDR pc; | |
1194 | { | |
1195 | int ii, toc_entry, tocbase = 0; | |
1196 | ||
1197 | for (ii=0; ii < loadinfotextindex; ++ii) | |
1198 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1199 | toc_entry = ii; | |
1200 | tocbase = loadinfo[ii].textorg; | |
1201 | } | |
1202 | ||
1203 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; | |
1204 | } | |
18b46e7c | 1205 | |
5c172b4b MM |
1206 | #ifdef GDB_TARGET_POWERPC |
1207 | int | |
1208 | gdb_print_insn_powerpc (memaddr, info) | |
1209 | bfd_vma memaddr; | |
1210 | disassemble_info *info; | |
1211 | { | |
1212 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1213 | return print_insn_big_powerpc (memaddr, info); | |
1214 | else | |
1215 | return print_insn_little_powerpc (memaddr, info); | |
1216 | } | |
1217 | #endif | |
1218 | ||
18b46e7c SS |
1219 | void |
1220 | _initialize_rs6000_tdep () | |
1221 | { | |
1222 | /* FIXME, this should not be decided via ifdef. */ | |
1223 | #ifdef GDB_TARGET_POWERPC | |
5c172b4b | 1224 | tm_print_insn = gdb_print_insn_powerpc; |
18b46e7c SS |
1225 | #else |
1226 | tm_print_insn = print_insn_rs6000; | |
1227 | #endif | |
1228 | } |