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* configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
[binutils.git] / opcodes / ChangeLog
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0218d1e4
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12001-08-10 Andreas Jaeger <[email protected]>
2
3 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
4 to build warnings.
5 * configure: Regenerate.
6
11b37b7b
AM
72001-08-10 Alan Modra <[email protected]>
8
9 * ppc-opc.c: Revert 2001-08-08.
10
badaf34c
AM
112001-08-09 Alan Modra <[email protected]>
12
13 * dis-buf.c (generic_strcat_address): Add missing prototype.
14 #if 0 the functions as it is unused.
15
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AM
162001-08-08 Alan Modra <[email protected]>
17
18 1999-10-25 Torbjorn Granlund <[email protected]>
19 * ppc-opc.c: Include "bfd.h".
20 (powerpc_operands): Add new field for reloc type.
21
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TS
222001-07-21 Thiemo Seufer <[email protected]>
23
24 * mips-dis.c (print_insn_arg): Don't use software integer registers
25 for coprocessor registers.
26 (get_mips_isa): Removed.
27 (is_newabi): New function, checks if NewABI is used.
28 (_print_insn_mips): Get distinction between old ABI and new ABI right.
29
28bab82b
NC
302001-08-01 Christian Groessler <[email protected]>
31
32 * z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to
33 get stderr definition.
34 (internal, gas): Removed warnings.
35 (gas): Create a correct final entry for created array.
36 * z8k-opc.h: Recreated with new z8kgen.
37
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KH
382001-07-28 Kazu Hirata <[email protected]>
39
40 * i386-dis.c: Fix formatting.
41
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AM
422001-07-28 Matthias Kramm <[email protected]>
43
44 * i386-dis.c: Change formatting conventions for architecture
45 i386:intel to better match the format of various intel i386
46 assemblers, like nasm, tasm or masm.
47
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AM
482001-07-24 Alan Modra <[email protected]>
49
50 * Makefile.am: Update dependencies with "make dep-am".
51 * Makefile.in: Regenerate
52
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KH
532001-07-24 Kazu Hirata <[email protected]>
54
55 * alpha-dis.c: Fix formatting.
56 * cris-dis.c: Likewise.
2dcee538
KH
57 * d10v-dis.c: Likewise.
58 * d30v-dis.c: Likewise.
33822a8e
KH
59 * m10300-dis.c: Likewise.
60 * tic54x-dis.c: Likewise.
61
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KH
622001-07-23 Kazu Hirata <[email protected]>
63
ec22bdda
KH
64 * m68k-dis.c: Fix formatting.
65 * pj-dis.c: Likewise.
66 * s390-dis.c: Likewise.
67 * z8k-dis.c: Likewise.
44f2a95d 68
209fd667
CD
692001-07-21 Chris Demetriou <[email protected]>
70
71 * mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
72 into the rest of the surrounding definitions.
73
bcb5558b
AM
742001-07-18 Alan Modra <[email protected]>
75
76 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
77 for lgdt, lidt, sgdt, sidt.
78
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PB
792001-07-13 Philip Blundell <[email protected]>
80
81 * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
82
23969580
JJ
832001-07-12 Jeff Johnston <[email protected]>
84
85 * cgen-asm.in: Include "xregex.h" always to enable the libiberty
86 regex support.
87 (@arch@_cgen_build_insn_regex): New routine from Graydon.
88 (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
89 to verify if it is worth parsing the insn as insn "x". Also update
90 error message when insn is not a recognized format of the insn vs
91 when the insn is completely unrecognized.
92
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FCE
932001-07-11 Frank Ch. Eigler <[email protected]>
94
95 * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
96 bfd_get_bits.
97 * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
98 non-zero CGEN_CPU_DESC->insn_chunk_bitsize.
99
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AJ
1002001-07-09 Andreas Jaeger <[email protected]>, Karsten Keil <[email protected]>
101
102 * i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
103 (OP_J): Use bfd_vma for mask to work properly with 64 bits.
104 (op_address,op_riprel): Use bfd_vma to handle 64 bits.
105
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BE
1062001-07-05 Ben Elliston <[email protected]>
107
108 * Makefile.am (CPUDIR): Define.
109 (stamp-m32r): Update dependencies.
110 (stamp-fr30): Ditto.
111 (stamp-openrisc): Ditto.
112 * Makefile.in: Regenerate.
113
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NC
1142001-07-03 Zoltan Hidvegi <[email protected]>
115
116 * ppc-opc.c: Fix encoding of 'clf' instruction.
117
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GK
1182001-06-30 Geoffrey Keating <[email protected]>
119
120 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.
121
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GK
1222001-06-28 Geoffrey Keating <[email protected]>
123
124 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
125 * cgen-opc.c (cgen_keyword_add): Ignore special first
126 character when building nonalpha_chars field.
127
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BE
1282001-06-24 Ben Elliston <[email protected]>
129
130 * m88k-dis.c: Format to conform to GNU coding standards.
131
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AJ
1322001-06-23 Andreas Jaeger <[email protected]>
133
134 * disassemble.c (disassembler_usage): Add unused attribute.
135
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EC
1362001-06-22 Eric Christopher <[email protected]>
137
138 * mips-opc.c: Move prefx to start of the table.
139
fe1f0130
NC
1402001-06-22 Stacey Sheldon <[email protected]>
141
142 * arc-opc.c (insert_st_syntax): Fix over-optimisation of ST
143 instruction.
144
80febfb6
NC
1452001-06-22 Pauli <[email protected]>
146
147 * m68k-opc.c: Add wdebug instruction.
148
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AH
1492001-06-15 Aldy Hernandez <[email protected]>
150
151 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
152
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GK
1532001-06-14 Geoffrey Keating <[email protected]>
154
155 * cgen-asm.c (cgen_parse_keyword): When looking for the
156 boundaries of a keyword, allow any special characters
157 that are actually in one of the allowed keyword.
158 * cgen-opc.c (cgen_keyword_add): Add any special characters
159 to the nonalpha_chars field.
160
6fc12824
NC
1612001-06-12 Martin Schwidefsky <[email protected]>
162
163 * s390-opc.c: Add lgh instruction.
164 * s390-opc.txt: Likewise.
165
6439fc28
AM
1662001-06-11 Alan Modra <[email protected]>
167
168 * i386-dis.c: Group function prototypes in one place.
169 (FLOATCODE): Redefine as 1.
170 (USE_GROUPS): Redefine as 2.
171 (USE_PREFIX_USER_TABLE): Redefine as 3.
172 (X86_64_SPECIAL): Define as 4.
173 (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2.
174 (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE.
175 (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete.
176 (dis386): New table combining above four tables.
177 (dis386_twobyte_att, dis386_twobyte_intel): Delete.
178 (dis386_twobyte): New table combining above two tables.
179 (x86_64_table): New table to handle x86_64.
180 (X86_64_0): Define.
181 (float_mem_att, float_mem_intel): Delet.
182 (float_mem): New table combining above two tables.
183 (print_insn_i386): Modify for above.
184 (dofloat): Likewise.
185 (putop): Handle '{', '|' and '}' to select alternative mnemonics.
186 Return 0 on success, 1 if no valid alternative.
187 (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax.
188 (putop <case 'T'>): Move to case 'U', and share case 'Q' code.
189 (putop <case 'I'>): Move to case 'T', and share case 'P' code.
190 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
191 if not 64-bit mode.
192 (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode.
193 (OP_I64): If not 64-bit mode, call OP_I.
194 OP_OFF64): If not 64-bit mode, call OP_OFF.
195 (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename
196 'ignore'/'ignored' to 'bytemode'.
197
5dd0794d
AM
1982001-06-10 Alan Modra <[email protected]>
199
200 * configure.in: Sort 'ta' case statement.
201 * configure: Regenerate.
202
203 * i386-dis.c (dis386_att): Add 'H' to conditional branch and
204 loop,jcxz insns.
205 (disx86_64_att): Likewise.
206 (dis386_twobyte_att): Likewise.
207 (print_insn_i386): Don't print branch hints as a prefix.
208 (putop): 'H' macro prints branch hints.
209 (get64): Kill compile warnings.
210
bda22bbf
AO
2112001-06-09 Alexandre Oliva <[email protected]>
212
213 * sh-opc.h (sh_table): Don't use empty initializers.
214
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NC
2152001-06-06 Christian Groessler <[email protected]>
216
217 * z8k-dis.c: Fix formatting.
218 (unpack_instr): Remove unused cases in switch statement. Add
219 safety abort() in default case.
220 (unparse_instr): Add safety abort() in default case.
221
98b32482
NC
2222001-06-06 Peter Jakubek <[email protected]>
223
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AM
224 * m68k-dis.c (print_insn_m68k): Fix typo.
225 * m68k-opc.c (m68k_opcodes): Correct allowed operands for
98b32482
NC
226 mcf (ColdFire) div, rem and moveb instructions.
227
3ffd33cf
AM
2282001-06-06 Alan Modra <[email protected]>
229
230 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
231 (cond_jump_mode, loop_jcxz_mode): Define.
232 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as
233 appropriate, and 'F' suffix to loop insns.
234 (disx86_64_att): Likewise.
235 (dis386_twobyte_att): Likewise.
236 (print_insn_i386): Don't output addr prefix for loop, jcxz insns.
237 Output data size prefix for long conditional jumps. Output cs and
238 ds branch hints.
239 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
240 (OP_J): Don't make PREFIX_DATA used.
241
9ab433aa
AO
2422001-06-04 Alexandre Oliva <[email protected]>
243
244 * sh-opc.h (sh_table): Complete last element entry to avoid
245 compiler warning.
246
d1cf510e
NC
2472001-05-16 Thiemo Seufer <[email protected]>
248
249 * mips-dis.c (mips_isa_type): Add MIPS r12k support.
250
cba24d7d
AM
2512001-05-23 Alan Modra <[email protected]>
252
253 * arc-opc.c: Whitespace changes.
254
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HPN
2552001-05-18 Hans-Peter Nilsson <[email protected]>
256
257 * cris-opc.c (cris_spec_regs): Add missing initializer field for
258 last element.
259
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FCE
2602001-05-15 Frank Ch. Eigler <[email protected]>
261
262 * cgen-dis.in (extract_normal): Complete support for min<base case.
263
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NC
2642001-05-15 Thiemo Seufer <[email protected]>
265
266 * mips-dis.c (INSNLEN): Rename MAXLEN.
267 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
268 (print_insn_arg): Remove $ prefix of register names.
269 (set_mips_isa_type): Remove.
cba24d7d 270 (mips_isa_type): New function.
aa5f19f2
NC
271 (get_mips_isa): New Function.
272 (print_insn_mips): Rename _print_insn_mips.
273 (_print_insn_mips): New function, contains code which was
274 duplicated in print_insn_big_mips and print_insn_little_mips.
275 (print_insn_big_mips): Moved code to _print_insn_mips.
276 (print_insn_little_mips): Likewise.
277 (print_mips16_insn_arg): Remove $ prefix of register names.
278 Print error message before abort.
279
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C
2802001-05-14 J.T. Conklin <[email protected]>
281
282 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
7f32bebc 283 simplified mnemonics used for setting PPC750-specific special
24a7a601
C
284 purpose registers.
285
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L
2862001-05-12 H.J. Lu <[email protected]>
287
288 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
289 `rm'.
290
bcee8eb8
AM
2912001-05-12 Peter Targett <[email protected]>
292
293 * arc-opc.c (arc_reg_names): Correct attribute for lp_count
294 register to r/w. Formatting fixes throughout file.
295
67d6227d
AM
2962001-05-12 Alan Modra <[email protected]>
297
298 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
299 movq operands.
4bba6815
AM
300 (twobyte_has_modrm): Update table.
301 (need_modrm): Give it file scope.
302 (MODRM_CHECK): Define.
303 (dofloat): Use MODRM_CHECK.
304 (OP_E): Likewise.
305 (OP_EM): Likewise.
306 (OP_EX): Likewise.
67d6227d 307
a00ad97d
FCE
3082001-05-07 Frank Ch. Eigler <[email protected]>
309
310 * cgen-dis.in (default_print_insn): Tolerate min<base instructions
311 even at end of a section.
312 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
313 by ignoring precariously-unpacked insn_value in favor of raw buffer.
314
a28d0f3d
AM
3152001-05-03 Thiemo Seufer <[email protected]>
316
317 * disassemble.c (disassembler_usage): Remove unused attribute.
318
52646233
FCE
3192001-05-04 Frank Ch. Eigler <[email protected]>
320
321 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
322
3232001-05-04 Frank Ch. Eigler <[email protected]>
324
325 * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
326 assume incoming buffer already has the base insn loaded. Handle
714b578b 327 smaller-than-base instructions for variable-length case.
52646233 328
992aaec9
AM
3292001-05-04 Alan Modra <[email protected]>
330
331 * i386-dis.c (Ev, Ed): Remove duplicate define.
332 (Gd): Define.
333 (XS): Define.
334 (OP_XS): New function.
335 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
336 movmskp operands.
337 (dis386_twobyte_intel): Likewise.
338 (prefix_user_table): Use MS for maskmovq operand.
339
87e6d782
NC
3402001-04-27 Johan Rydberg <[email protected]>
341
342 * Makefile.am: Add OpenRISC target.
343 * Makefile.in: Regenerated.
344
345 * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
346
347 * configure.in (bfd_openrisc_arch): Add target.
348 * configure: Regenerated.
349
350 * openrisc-asm.c: New file.
351 * openrisc-desc.c: Likewise.
352 * openrisc-desc.h: Likewise.
353 * openrisc-dis.c: Likewise.
354 * openrisc-ibld.c: Likewise.
355 * openrisc-opc.c: Likewise.
356 * openrisc-opc.h: Likewise.
357
6840198f
NC
3582001-04-24 Christian Groessler <[email protected]>
359
360 * z8k-dis.c: add names of control registers (ctrl_names);
361 (seg_length): provides instruction length fixup for segmented
362 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
363 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
364 (unparse_intr): handle CLASS_PR, print addresses without '#'
365 * z8k-opc.h: re-created with new z8kgen
366 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
367 entries for ldctl/ldctlb instruction
368
c2419411
AJ
3692001-04-06 Andreas Jaeger <[email protected]>
370
371 * i386-dis.c: Add ffreep instruction.
372
3eb9799d
AO
3732001-03-30 Alexandre Oliva <[email protected]>
374
375 * ppc-opc.c (insert_mbe): Shift mask initializer as long.
376
0f17484f
AM
3772001-03-24 Alan Modra <[email protected]>
378
379 * i386-dis.c (PREGRP25): Define.
380 (dis386_twobyte_att): Use here in place of "movntq" entry.
381 (dis386_twobyte_intel): Likewise.
382 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
383 (PREGRP26): Define.
384 (dis386_twobyte_att): Use here.
385 (dis386_twobyte_intel): Likewise.
386 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
387 (prefix_user_table <maskmovdqu>): XM operand, not MX.
388 (prefix_user_table): Cosmetic changes to "bad" entries.
389
e93d7199
NC
3902001-03-23 Nick Clifton <[email protected]>
391
392 * mips-opc.c: Remove extraneous whitespace.
393 * mips-dis.c: Remove extraneous whitespace.
394
fca2040b
BE
3952001-03-22 Ben Elliston <[email protected]>
396
397 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
398 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
399 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
400 to allay a compiler warning.
401
87890af0
AM
4022001-03-22 Alan Modra <[email protected]>
403
404 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
405 (dis386_twobyte_intel): Likewise.
406 (twobyte_has_modrm): Set entry for paddq, psubq.
407
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PM
4082001-03-20 Patrick Macdonald <[email protected]>
409
410 * cgen-dis.in (print_insn_@arch@): Add support for target machine
411 determination via CGEN_COMPUTE_MACH.
412 * fr30-desc.c: Regenerate.
413 * fr30-dis.c: Regenerate.
414 * fr30-opc.h: Regenerate.
415 * m32r-desc.c: Regenerate.
416 * m32r-dis.c: Regenerate.
417 * m32r-opc.h: Regenerate.
418 * m32r-opinst.c: Regenerate.
419
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L
4202001-03-20 H.J. Lu <[email protected]>
421
422 * configure.in: Remove the redundent AC_ARG_PROGRAM.
423 * configure: Rebuild.
424
f4bc6bb0
JW
4252001-03-19 Jim Wilson <[email protected]>
426
427 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
428 notestr if larger than xsect.
429 (in_class): Handle format M5.
430 * ia64-asmtab.c: Regnerate.
431
bbe6d95f
AM
4322001-03-19 John David Anglin <[email protected]>
433
434 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
435 has more than one byte left to read.
436
82b66b23
NC
4372001-03-16 Martin Schwidefsky <[email protected]>
438
439 * s390-opc.c: Add new opcodes. Smooth out formatting.
440 * s390-opc.txt: Add new opcodes.
c2419411 441
4f3c3dbb
NC
4422001-03-06 Nick Clifton <[email protected]>
443
444 * arm-dis.c (print_insn_thumb): Compute destination address
445 of BLX(1) instruction by taking bit 1 from PC and not from bit
446 0 of the offset.
447
9d29e1b3
NC
4482001-03-06 Igor Shevlyakov <[email protected]>
449
450 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
451 so command line switches will work.
452
b3466c39
DB
4532001-03-05 Dave Brolley <[email protected]>
454
2edda1bf
DB
455 * fr30-asm.c: Regenerate.
456 * fr30-desc.c: Regenerate.
457 * fr30-desc.h: Regenerate.
458 * fr30-dis.c: Regenerate.
459 * fr30-ibld.c: Regenerate.
460 * fr30-opc.c: Regenerate.
461 * fr30-opc.h: Regenerate.
462 * m32r-asm.c: Regenerate.
463 * m32r-desc.c: Regenerate.
464 * m32r-desc.h: Regenerate.
465 * m32r-dis.c: Regenerate.
466 * m32r-ibld.c: Regenerate.
467 * m32r-opc.c: Regenerate.
468 * m32r-opc.h: Regenerate.
469 * m32r-opinst.c: Regenerate.
b3466c39 470
80a523c2
NC
4712001-02-28 Igor Shevlyakov <[email protected]>
472
473 * m68k-opc.c: fix cpushl according to Motorola. Enable
474 bunch of instructions for Coldfire 5407 and add all new.
475
27b7e12d
AM
4762001-02-27 Alan Modra <[email protected]>
477
478 * configure.in (BFD_VERSION): Do without grep.
479 * configure: Regenerate.
480 * Makefile.am: Run "make dep-am".
481 * Makefile.in: Regenerate.
482
b8e0eda2
L
4832001-02-23 David Mosberger <[email protected]>
484
485 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
486 * ia64-asmtab.c: Regenerate.
487
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JW
4882001-02-21 David Mosberger <[email protected]>
489
490 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
491 separate variants: one for IMM22 and the other for IMM14.
492 * ia64-asmtab.c: Regenerate.
c2419411 493
dd425ada
GM
4942001-02-21 Greg McGary <[email protected]>
495
496 * cgen-opc.c (cgen_get_insn_value): Add missing `return'.
497
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L
4982001-02-20 H.J. Lu <[email protected]>
499
500 * Makefile.am (ia64-ic.tbl): Remove the target.
501 (ia64-raw.tbl): Likewise.
502 (ia64-waw.tbl): Likewise.
503 (ia64-war.tbl): Likewise.
504 (ia64-asmtab.c): Generate it in the source directory.
505 * Makefile.in: Regenerated.
506
e135f41b
NC
5072001-02-18 lars brinkhoff <[email protected]>
508
509 * Makefile.am: Add PDP-11 target.
510 * configure.in: Likewise.
511 * disassemble.c: Likewise.
512 * pdp11-dis.c: New file.
513 * pdp11-opc.c: New file.
514
42dc96ca
JW
5152001-02-14 Jim Wilson <[email protected]>
516
517 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
518 * ia64-asmtab.c: Regenerate.
519
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JH
520Mon Feb 12 17:41:26 CET 2001 Jan Hubicka <[email protected]>
521
522 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
523 instructions.
524 (putop): Handle 'Y'
525
9117d219
NC
5262001-02-11 Maciej W. Rozycki <[email protected]>
527
528 * mips-dis.c (print_insn_arg): Use top four bits of the address of
529 the following instruction not of the jump itself for the jump
530 target.
531 (print_mips16_insn_arg): Likewise.
532
847ee773
MS
5332001-02-11 Michael Sokolov <[email protected]>
534
535 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
536 directory.
537 * Makefile.in: Regenerate.
538
a85d7ed0
NC
5392001-02-09 Schwidefsky <[email protected]>
540
541 * Makefile.am: Add linux target for S/390.
542 * Makefile.in: Likewise.
543 * configure.in: Likewise.
544 * disassemble.c: Likewise.
545 * s390-dis.c: New file.
546 * s390-mkopc.c: New file.
547 * s390-opc.c: New file.
548 * s390-opc.txt: New file.
549
e5943035
JW
5502001-02-05 Jim Wilson <[email protected]>
551
552 * ia64-asmtab.c: Revert 2000-12-16 change.
553
0715dc88
PM
5542001-02-02 Patrick Macdonald <[email protected]>
555
c2419411 556 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88
PM
557 * m32r-desc.h: Regenerate.
558
90530880
JH
559Thu Feb 1 16:29:06 MET 2001 Jan Hubicka <[email protected]>
560
76f227a5 561 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop
90530880
JH
562 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
563
1328dc98
AM
5642001-01-14 Alan Modra <[email protected]>
565
566 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
567
b7ed8fad
NC
5682001-01-13 Nick Clifton <[email protected]>
569
570 * disassemble.c: Remove spurious white space.
571
e2914f48
JH
572Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <[email protected]>
573
574 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
575 templates.
576
0d2bcfaf
NC
5772001-01-11 Peter Targett <[email protected]>
578
579 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
580 * Makefile.am (C_FILES): Add arc-ext.c.
581 (ALL_MACHINES) Add arc-ext.lo.
582 (INCLUDES) Add opcode directory to list.
583 New dependency entry for arc-ext.lo.
584 * disassemble.c (disassembler): Correct call to
585 arc_get_disassembler.
586 * arc-opc.c: New update for ARC, including full base
587 instructions for ARC variants.
588 * arc-dis.h, arc-dis.c: New update for ARC, including
589 extensibility functionality.
590 * arc-ext.h, arc-ext.c: New files for handling extensibility.
591
5922001-01-10 Jan Hubicka <[email protected]>
041bd2e0
JH
593
594 * i386-dis.c (PREGRP15 - PREGRP24): New.
595 (dis386_twobyt): Add SSE2 instructions.
596 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
597 (twobyte_uses_f3_prefix): ... this one.
598 (grps): Add SSE instructions.
599 (prefix_user_table): Add two new slots; add SSE2 instructions.
600 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
601 Handle the REPNZ and Data16 prefixes as well; do proper lookup
602 to prefix_user_table.
603 (OP_E): Accept mfence and lfence as well.
604 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
605 (OP_XMM): Support REX extensions.
606 (OP_EM): Likewise.
607 (OP_EX): Likewise.
608
6a56ec7e
NC
6092001-01-09 Nick Clifton <[email protected]>
610
611 * arm-dis.c (print_insn): Set pc to zero for instructions with
612 a reloc associated with them.
613
4a9f416d
JJ
6142001-01-09 Jeff Johnston <[email protected]>
615
616 * cgen-asm.in (parse_insn_normal): Changed syn to be
617 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
618 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
619 to '\0' to use 0 instead.
620 * cgen-dis.in (print_insn_normal): Ditto.
621 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
622
0d2bcfaf 6232001-01-05 Jan Hubicka <[email protected]>
52b15da3
JH
624
625 * i386-dis.c: Add x86_64 support.
626 (rex): New static variable.
627 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
628 (USED_REX): New macro.
629 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
630 (OP_I64, OP_OFF64, OP_IMREG): New functions.
631 (OP_REG, OP_OFF): Declare.
632 (get64, get32, get32s): New functions.
633 (r??_reg): New constants.
634 (dis386_att): Change templates of instruction implicitly promoted
635 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
636 (grps): Likewise.
637 (dis386_intel): Likewise.
638 (dixx86_64_att): New table based on dis386_att.
639 (dixx86_64_intel): New table based on dis386_intel.
640 (names64, names8rex): New global variable.
641 (names32, names16): Add extended registers.
642 (prefix_user_t): Recognize rex prefixes.
643 (prefix_name): Print REX prefixes nicely.
644 (op_riprel): New global variable.
645 (start_pc): Set type to bfd_vma.
646 (print_insn_i386): Detect the 64bit mode and use proper table;
647 move ckprefix after initializing the buffer; output unused rex prefixes;
648 output information about target of RIP relative addresses.
649 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
650 (print_operand_value): New function.
651 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
652 REX prefix and new modes.
653 (get64, get32s): New.
654 (get32): Return bfd_signed_vma type.
655 (set_op): Initialize the op_riprel.
656 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
657
7e30bc36
FCE
6582001-01-03 Richard Sandiford <[email protected]>
659
660 cgen-dis.in (read_insn): Use bfd_get_bits()
661
aed80dae
FCE
6622001-01-02 Richard Sandiford <[email protected]>
663
664 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
665 (hash_insn_list): Likewise
666 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
667 (extract_1): Use bfd_get_bits().
668 (extract_normal): Apply sign extension to both extraction
669 methods.
670 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
671 (cgen_put_insn_value): Use bfd_put_bits()
672
149fe25e
FCE
6732000-12-28 Frank Ch. Eigler <[email protected]>
674
675 * cgen-asm.in (parse_insn_normal): Print better error message for
676 instructions with missing operands.
677
a6cff3e3
NC
6782000-12-21 Santeri Paavolainen <[email protected]>
679
680 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
681
09919455
NC
6822000-12-16 Nick Clifton <[email protected]>
683
684 * Makefile.in: Regenerate.
685 * aclocal.m4: Regenerate.
686 * config.in: Regenerate.
687 * configure.in: Add spacing.
688 * configure: Regenerate.
689 * ia64-asmtab.c: Regenerate.
690 * po/opcodes.pot: Regenerate.
691
606d55bc
FCE
6922000-12-12 Frank Ch. Eigler <[email protected]>
693
694 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
695 error messages over later parse-time ones.
696
514829c3
JW
6972000-12-12 Jim Wilson <[email protected]>
698
699 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
700 argument.
060d22b0 701 * ia64-gen.c (insert_deplist): Cast sizeof result to int.
514829c3
JW
702 (print_dependency_table): Print NULL if semantics field not set.
703 (insert_opcode_dependencies): Mark cmp parameter as unused.
704 (print_main_table): Use fprintf_vma to print long long fields.
705 (main): Mark argv paramter as unused. Convert to old style definition.
706 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
707 * ia64-asmtab.c: Regnerate.
708
708b8a71
NC
7092000-12-09 Nick Clifton <[email protected]>
710
54faae25
NC
711 * m32r-dis.c (print_insn): Prevent re-read of instruction from
712 wrong address.
713
708b8a71
NC
714 * fr30-dis.c: Regenerate.
715
54faae25
NC
7162000-12-08 Peter Targett <[email protected]>
717
718 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
719 * Makefile.am (C_FILES): Add arc-ext.c.
720 (ALL_MACHINES) Add arc-ext.lo.
721 (INCLUDES) Add opcode directory to list.
722 New dependency entry for arc-ext.lo.
723 * disassemble.c (disassembler): Correct call to
724 arc_get_disassembler.
725 * arc-opc.c: New update for ARC, including full base
726 instructions for ARC variants.
727 * arc-dis.h, arc-dis.c: New update for ARC, including
728 extensibility functionality.
729 * arc-ext.h, arc-ext.c: New files for handling extensibility.
730
08fe7a7e
NC
7312000-12-03 Chris Demetriou [email protected]
732
733 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
734 MOD_HILO, and MOD_LO macros.
735
15305553
NC
736 * mips-opc.c (M1, M2): Delete.
737 (mips_builtin_opcodes): Remove all uses of M1.
738
0808b8a9
NC
739 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
740 instructions take "G" format second operands and use the
741 correct flags.
742 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
743 match.
744 Delete "sel" code operands from mfc1 and mtc1.
745 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
746 for dm[ft]c[023].
c2419411 747
e70f2590
NC
7482000-12-03 Ed Satterthwaite [email protected] and
749 Chris Demetriou [email protected]
750
751 * mips-opc.c (mips_builtin_opcodes): Finish additions
752 for MIPS32 support, and clean up existing entries for
753 aesthetics, consistency with the MIPS32 ISA, and
754 with consistency the rest of the table.
755
b23da31b
NC
7562000-12-01 Nick Clifton <[email protected]>
757
758 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
759 field.
760
4372b673
NC
7612000-12-01 Chris Demetriou <[email protected]>
762
763 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
764 specifiers. Update 'B' for new constant names, and remove
765 'm'.
766 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
767 near the top of the array, so they are disassembled properly.
768 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
769 code for MIPS32. Update "clo" and "clz" to use 'U' operand
770 specifier. Add 'H' format specifier variants for "mfc1,"
771 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
772 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
773 "wait" variant which uses 'J' operand specifier.
c2419411 774
e7af610e
NC
775 * mips-dis.c (set_mips_isa_type): Update to use
776 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
777 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
778 * mips-opc.c (I32): New constant for instructions added in
779 MIPS32.
780 (P4): Delete.
781 (mips_builtin_opcodes) Replace all uses of P4 with I32.
782
84ea6cf2
NC
783 * mips-dis.c (set_mips_isa_type): Add cases for
784 bfd_mach_mips5 and bfd_mach_mips64.
785 * mips-opc.c (I64): New definitions.
786
c6c98b38
NC
787 * mips-dis.c (set_mips_isa_type): Add case for
788 bfd_mach_mips_sb1.
789
caaaf822
HPN
7902000-11-28 Hans-Peter Nilsson <[email protected]>
791
792 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
793 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
794 Initialize variable dc to NULL.
795 (print_insn_shx): Remove unused label d_reg_n.
796
077b8428
NC
7972000-11-24 Nick Clifton <[email protected]>
798
799 * arm-opc.h: Add new opcode formatting parameter 'B'.
800 (arm_opcodes): Add XScale, v5, and v5te instructions.
801 (thumb_opcodes): Add v5t instructions.
802
803 * arm-dis.c (print_insn_arm): Handle new 'B' format
804 parameter.
805 (print_insn_thumb): Decode BLX(1) instruction.
806
657e7cec
CD
8072000-11-21 Chris Demetriou <[email protected]>
808
809 * mips-opc.c: Fix file header comment.
810
b6b0b32c
HPN
8112000-11-14 Hans-Peter Nilsson <[email protected]>
812
813 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
814 print_insn_cris_with_register_prefix.
815
54a4ca2e
AO
8162000-11-11 Alexandre Oliva <[email protected]>
817
818 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
819
025d2eab 8202000-11-07 Matthew Green <[email protected]>
1ffd7d02
DB
821
822 * cgen-dis.in (print_insn): All insns which can fit into insn_value
823 must be loaded there in their entirety.
824
19f7b010
JJ
8252000-10-20 Jakub Jelinek <[email protected]>
826
827 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
828 (compute_arch_mask): Add v8plusb and v9b machines.
829 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
060d22b0 830 * sparc-opc.c: Support for Cheetah instruction set.
19f7b010
JJ
831 (prefetch_table): Add #invalidate.
832
710c2d97
NC
8332000-10-16 Nick Clifton <[email protected]>
834
835 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
836
f40c3ea3
DB
8372000-10-06 Dave Brolley <[email protected]>
838
839 * fr30-desc.h: Regenerate.
840 * m32r-desc.h: Regenerate.
841 * m32r-ibld.c: Regenerate.
842
0d2bcfaf 8432000-10-05 Jim Wilson <[email protected]>
afa680f8
JW
844
845 * ia64-ic.tbl: Update from Intel.
846 * ia64-asmtab.c: Regenerate.
c2419411 847
d1e28e24
KH
8482000-10-04 Kazu Hirata <[email protected]>
849
850 * ia64-gen.c: Convert C++-style comments to C-style comments.
851 * tic54x-dis.c: Likewise.
852
b4db717d 8532000-09-29 Hans-Peter Nilsson <[email protected]>
78966507
HPN
854
855 Changes to add dollar prefix to registers for files where user symbols
856 don't have a leading underscore. Fix formatting.
857 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
858 (format_reg): Add parameter with_reg_prefix. All callers changed.
859 (print_with_operands): Ditto.
860 (print_insn_cris_generic): Renamed from print_insn_cris, add
861 parameter with_reg_prefix.
862 (print_insn_cris_with_register_prefix,
863 print_insn_cris_without_register_prefix, cris_get_disassembler):
864 New.
865 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
866
0d2bcfaf 8672000-09-22 Jim Wilson <[email protected]>
139368c9 868
d48ad4f3
JW
869 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
870 gt, ge, ngt, and nge.
871 * ia64-asmtab.c: Regenerate.
872
139368c9
JW
873 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
874 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
875 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
876 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
877 * ia64-asmtab.c: Regnerate.
878
156c2f8b 8792000-09-13 Anders Norlander <[email protected]>
c2419411
AJ
880
881 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
882 Add mfc0 and mtc0 with sub-selection values.
156c2f8b 883 Add clo and clz opcodes.
c2419411
AJ
884 Add msub and msubu instructions for MIPS32.
885 Add madd/maddu aliases for mad/madu for MIPS32.
886 Support wait, deret, eret, movn, pref for MIPS32.
156c2f8b 887 Support tlbp, tlbr, tlbwi, tlbwr.
c2419411
AJ
888 (P4): New define.
889
890 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
891 (print_insn_arg): Handle 'H' args.
892 (set_mips_isa_type): Recognize 4K.
156c2f8b
NC
893 Use CPU_* defines instead of hardcoded numbers.
894
de827f51
CM
8952000-09-11 Catherine Moore <[email protected]>
896
897 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
898 (d30v_format_tab): Use Rb2 for modinc and moddec.
c2419411 899
ea2aae66 9002000-09-07 Catherine Moore <[email protected]>
c2419411 901
ea2aae66
CM
902 * d30v-opc.c (d30v_format_tab): Use format Ra for
903 modinc and moddec.
904
90f2472a
AO
9052000-09-06 Alexandre Oliva <[email protected]>
906
907 * configure: Rebuilt with new libtool.m4.
908
5b343f5a
NC
9092000-09-05 Nick Clifton <[email protected]>
910
911 * configure: Regenerate.
912 * po/opcodes.pot: Regenerate.
c2419411 913
ac48eca1
AO
9142000-08-31 Alexandre Oliva <[email protected]>
915
916 * acinclude.m4: Include libtool and gettext macros from the
917 top level.
918 * aclocal.m4, configure: Rebuilt.
919
c6d805e0
KH
9202000-08-30 Kazu Hirata <[email protected]>
921
922 * tic80-dis.c: Fix formatting.
923
7d352fc8
KH
9242000-08-29 Kazu Hirata <[email protected]>
925
926 * w65-dis.c: Fix formatting.
927
a47cf567
NC
9282000-08-28 Mark Hatle <[email protected]>
929
930 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
931 (powerpc_opcodes): Add table entries for PPC 405 instructions.
932 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
933 instructions. Added extended mnemonic mftbl as defined in the
934 405GP manual for all PPCs.
935
0d2bcfaf 9362000-08-28 Jim Wilson <[email protected]>
f9365b11
JW
937
938 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
939 call. Change last goto to use failed instead of done.
940
6bb95a0f
DB
9412000-08-28 Dave Brolley <[email protected]>
942
943 * cgen-ibld.in (cgen_put_insn_int_value): New function.
944 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
945 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
946 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
947 * cgen-dis.in (read_insn): New static function.
948 (print_insn): Use read_insn to read the insn into the buffer and set
949 up for disassembly.
950 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
951 in the buffer.
952 * fr30-asm.c: Regenerated.
953 * fr30-desc.c: Regenerated.
060d22b0 954 * fr30-desc.h: Regenerated.
6bb95a0f
DB
955 * fr30-dis.c: Regenerated.
956 * fr30-ibld.c: Regenerated.
957 * fr30-opc.c: Regenerated.
060d22b0 958 * fr30-opc.h: Regenerated.
6bb95a0f
DB
959 * m32r-asm.c: Regenerated.
960 * m32r-desc.c: Regenerated.
060d22b0 961 * m32r-desc.h: Regenerated.
6bb95a0f
DB
962 * m32r-dis.c: Regenerated.
963 * m32r-ibld.c: Regenerated.
964 * m32r-opc.c: Regenerated.
965
bf830eae
KH
9662000-08-28 Kazu Hirata <[email protected]>
967
968 * tic30-dis.c: Fix formatting.
969
69eb4bbf
KH
9702000-08-27 Kazu Hirata <[email protected]>
971
972 * sh-dis.c: Fix formatting.
973
f509565f
GK
9742000-08-24 David Edelsohn <[email protected]>
975
976 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
977
5c90f90d
KH
9782000-08-24 Kazu Hirata <[email protected]>
979
980 * z8k-dis.c: Fix formatting.
981
0d2bcfaf 9822000-08-16 Jim Wilson <[email protected]>
50b81f19
JW
983
984 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
985 break, mov-immediate, nop.
986 * ia64-opc-f.c: Delete fpsub instructions.
987 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
988 address operand. Rewrite using macros to avoid long lines.
989 * ia64-opc.h (POSTINC): Define.
990 * ia64-asmtab.c: Regenerate.
991
0d2bcfaf 9922000-08-15 Jim Wilson <[email protected]>
19ba6717
JW
993
994 * ia64-ic.tbl: Add missing entries.
995
0d2bcfaf 9962000-08-08 Jason Eckhardt <[email protected]>
a5bc3299
JE
997
998 * i860-dis.c (print_br_address): Change third argument from int
999 to long.
1000
0d2bcfaf 10012000-08-07 Richard Henderson <[email protected]>
0228082a
RH
1002
1003 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
1004 for MLI templates. Handle IA64_OPND_TGT64.
1005
a47cf567
NC
10062000-08-04 Ben Elliston <[email protected]>
1007
1008 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
1009 * cgen.sh: Likewise.
1010
0d2bcfaf 10112000-08-02 Jim Wilson <[email protected]>
c2419411 1012
a47cf567
NC
1013 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
1014
463f102c
DC
10152000-07-29 Marek Michalkiewicz <[email protected]>
1016
1017 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
1018 Change return type from void to int. Check the combination
1019 of operands, return 1 if valid. Fix to avoid BUF overflow.
1020 Report undefined combinations of operands in COMMENT.
1021 Report internal errors to stderr. Output the adiw/sbiw
1022 constant operand in both decimal and hex.
1023 (print_insn_avr): Disassemble ldd/std with displacement of 0
1024 as ld/st. Check avr_operand () return value, handle invalid
1025 combinations of operands like unknown opcodes.
1026
6e31aea3
BE
10272000-07-28 Ben Elliston <[email protected]>
1028
1029 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
1030 (run-cgen, stamp-m32r, stamp-fr30): New targets.
1031 * Makefile.in: Regenerate.
1032 * configure.in: Add --enable-cgen-maint option.
1033 * configure: Regenerate.
1034
dc62a253
NC
10352000-07-26 Dave Brolley <[email protected]>
1036
1037 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
1038 (cgen_hw_lookup_by_num): Ditto.
1039 (cgen_operand_lookup_by_name): Ditto.
1040 (print_address): Ditto.
1041 (print_keyword): Ditto.
1042 * cgen-dis.c (hash_insn_array): Mark unused parameters with
1043 ATTRIBUTE_UNUSED.
1044 * cgen-asm.c (hash_insn_array): Mark unused parameters with
1045 ATTRIBUTE_UNUSED.
1046 (cgen_parse_keyword): Ditto.
1047
0d2bcfaf 10482000-07-22 Jason Eckhardt <[email protected]>
cdac37f6
JE
1049
1050 * i860-dis.c: New file.
1051 (print_insn_i860): New function.
1052 (print_br_address): New function.
1053 (sign_extend): New function.
1054 (BITWISE_OP): New macro.
1055 (I860_REG_PREFIX): New macro.
1056 (grnames, frnames, crnames): New structures.
1057
1058 * disassemble.c (ARCH_i860): Define.
1059 (disassembler): Add check for bfd_arch_i860 to set disassemble
1060 function to print_insn_i860.
1061
1062 * Makefile.in (CFILES): Added i860-dis.c.
1063 (ALL_MACHINES): Added i860-dis.lo.
1064 (i860-dis.lo): New dependences.
1065
1066 * configure.in: New bits for bfd_i860_arch.
1067
1068 * configure: Regenerated.
1069
6c95a37f
HPN
10702000-07-20 Hans-Peter Nilsson <[email protected]>
1071
1072 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
1073 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
1074 (cris-dis.lo, cris-opc.lo): New rules.
1075 * Makefile.in: Rebuild.
1076 * configure.in (bfd_cris_arch): New target.
1077 * configure: Rebuild.
1078 * disassemble.c (ARCH_cris): Define.
1079 (disassembler): Support ARCH_cris.
1080 * cris-dis.c, cris-opc.c: New files.
1081 * po/POTFILES.in, po/opcodes.pot: Regenerate.
1082
09ab35c7
JJ
10832000-07-11 Jakub Jelinek <[email protected]>
1084
1085 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
1086 Reported by Bill Clarke <[email protected]>.
1087
0d2bcfaf 10882000-07-09 Geoffrey Keating <[email protected]>
1da5001c
GK
1089
1090 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
1091 Patch by Randall J Fisher <[email protected]>.
1092
6e09abd4
AM
10932000-07-09 Alan Modra <[email protected]>
1094
1095 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
1096 fput_const, extract_3, extract_5_load, extract_5_store,
1097 extract_5r_store, extract_5R_store, extract_10U_store,
1098 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
1099 extract_12, extract_17, extract_22): Prototype.
1100 (print_insn_hppa): Rename inner block opcode -> opc to avoid
1101 shadowing outer block.
1102 (GET_BIT): Define.
1103
90821790 11042000-07-05 DJ Delorie <[email protected]>
302ab118
DD
1105
1106 * MAINTAINERS: new
1107
6eeeb4b4
AO
11082000-07-04 Alexandre Oliva <[email protected]>
1109
1110 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
1111
00d2865b
NC
11122000-07-03 Marek Michalkiewicz <[email protected]>
1113
1114 * avr-dis.c (avr_operand): Change _ () to _() around all strings
1115 marked for translation (exception from the usual coding style).
1116 (print_insn_avr): Initialize insn2 to avoid warnings.
1117
c07ab2ec
NC
11182000-07-03 Kazu Hirata <[email protected]>
1119
1120 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
1121 * h8500-dis.c: Fix formatting.
1122
0bdaf48b
AM
11232000-07-01 Alan Modra <[email protected]>
1124
1125 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
1126 (CLEANFILES): Add DEPA.
1127 * Makefile.in: Regenerate.
1128
7c03c75e
SB
11292000-06-26 Scott Bambrough <[email protected]>
1130
1131 * arm-dis.c (regnames): Add an additional register set to match
1132 the set used by GCC. Make it the default.
1133
1581f8c9
AM
11342000-06-22 Alan Modra <[email protected]>
1135
1136 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
1137 find one.
1138 * Makefile.in: Regenerate.
1139
bbeb2e03
L
11402000-06-20 H.J. Lu <[email protected]>
1141
1142 * Makefile.am: Rebuild dependency.
1143 * Makefile.in: Rebuild.
9b443040
NC
1144
11452000-06-18 Stephane Carrez <[email protected]>
1146
1147 * Makefile.in, configure: regenerate
c2419411 1148 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
9b443040 1149 ARCH_m68hc11.
c2419411 1150 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
9b443040
NC
1151 New functions.
1152 * configure.in: Recognize m68hc12 and m68hc11.
1153 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
c2419411 1154 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
9b443040 1155 and opcode generation for m68hc11 and m68hc12.
bbeb2e03 1156
39c20e8f
ND
11572000-06-16 Nick Duffek <[email protected]>
1158
1159 * disassemble.c (disassembler): Refer to the PowerPC 620 using
1160 bfd_mach_ppc_620 instead of 620.
1161
53d388d1
JL
11622000-06-12 Kazu Hirata <[email protected]>
1163
1164 * h8300-dis.c: Fix formatting.
1165 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
1166 correctly.
1167
0d2bcfaf 11682000-06-09 Denis Chertykov <[email protected]>
8776c5fe
DC
1169
1170 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
1171
0d2bcfaf 11722000-06-07 Denis Chertykov <[email protected]>
bab84c47
DC
1173
1174 * avr-dis.c: completely rewritten.
1175
79540e26 11762000-06-02 Kazu Hirata <[email protected]>
5fec0fc5
NC
1177
1178 * h8300-dis.c: Follow the GNU coding style.
1179 (bfd_h8_disassemble) Fix a typo.
5fec0fc5 1180
3903e627
NC
11812000-06-01 Kazu Hirata <[email protected]>
1182
1183 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
1184 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
1185 correctly. Fix a typo.
1186
0d2bcfaf 11872000-05-31 Nick Clifton <[email protected]>
c0ae4ccc
NC
1188
1189 * opintl.h (_(String)): Explain why dgettext is used instead of
1190 gettext.
1191
0d2bcfaf 11922000-05-30 Nick Clifton <[email protected]>
c1485d85
NC
1193
1194 * opintl.h (gettext, dgettext, dcgettext, textdomain,
1195 bindtextdomain): Replace defines with those from intl/libgettext.h
1196 to quieten gcc warnings.
1197
2114f57b
AM
11982000-05-26 Alan Modra <[email protected]>
1199
1200 * Makefile.am: Update dependencies with "make dep-am"
1201 * Makefile.in: Regenerate.
1202
0d2bcfaf 12032000-05-25 Alexandre Oliva <[email protected]>
d6062282
AO
1204
1205 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
1206 sign-extending operands.
1207
0d2bcfaf 12082000-05-15 Donald Lindsay <[email protected]>
344fc69a
DL
1209
1210 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
1211 except brf's.
1212
0d2bcfaf 12132000-05-21 Nick Clifton <[email protected]>
6c298591
NC
1214
1215 * Makefile.am (LIBIBERTY): Define.
1216
0d2bcfaf 12172000-05-19 Diego Novillo <[email protected]>
fb48caed
DN
1218
1219 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
1220 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
1221 (reg_names): Rename to std_reg_names. Change it to a char **
1222 static variable.
1223 (std_reg_names): New name for reg_names.
1224 (set_mips_isa_type): Set reg_names to point to std_reg_names by
1225 default.
1226
f660ee8b
FCE
12272000-05-16 Frank Ch. Eigler <[email protected]>
1228
1229 * fr30-desc.h: Partially regenerated to account for changed
1230 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
1231 * m32r-desc.h: Ditto.
1232
0d2bcfaf 12332000-05-15 Nick Clifton <[email protected]>
322f2c45
NC
1234
1235 * arm-opc.h: Use upper case for flasg in MSR and MRS
1236 instructions. Allow any bit to be set in the field_mask of
1237 the MSR instruction.
1238
1239 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
1240 field_mask of an MSR instruction.
1241
60fc8cba
NC
12422000-05-11 Thomas de Lellis <[email protected]>
1243
060d22b0 1244 * arm-opc.h: Disassembly of thumb ldsb/ldsh
79540e26
AM
1245 instructions changed to ldrsb/ldrsh.
1246
73da6b6b
AM
12472000-05-11 Ulf Carlsson <[email protected]>
1248
1249 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
1250 target addresses for 'jal' and 'j'.
1251
0d2bcfaf 12522000-05-10 Geoff Keating <[email protected]>
d2f75a6f
GK
1253
1254 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
1255 also available in common mode when powerpc syntax is being used.
1256
821011cc
AM
12572000-05-08 Alan Modra <[email protected]>
1258
1259 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
1260 (dummy_print_address): Ditto.
1261
0d2bcfaf 12622000-05-04 Timothy Wall <[email protected]>
5c84d377
TW
1263
1264 * tic54x-opc.c: New.
1265 * tic54x-dis.c: New.
1266 * disassemble.c (disassembler): Add ARCH_tic54x.
1267 * configure.in: Added tic54x target.
1268 * configure: Ditto.
1269 * Makefile.am: Add tic54x dependencies.
79540e26 1270 * Makefile.in: Ditto.
5c84d377 1271
786e2c0f
C
12722000-05-03 J.T. Conklin <[email protected]>
1273
1274 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
79540e26 1275 vector unit operands.
786e2c0f
C
1276 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
1277 unit instruction formats.
1278 (PPCVEC): New macro, mask for vector instructions.
1279 (powerpc_operands): Add table entries for above operand types.
1280 (powerpc_opcodes): Add table entries for vector instructions.
1281
1282 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
1283 (print_insn_little_powerpc): Likewise.
1284 (print_insn_powerpc): Prepend 'v' when printing vector registers.
1285
0d2bcfaf 12862000-04-24 Clinton Popetz <[email protected]>
a47cf567
NC
1287
1288 * configure.in: Add bfd_powerpc_64_arch.
1289 * disassemble.c (disassembler): Use print_insn_big_powerpc for
1290 64 bit code.
1291
0d2bcfaf 12922000-04-24 Nick Clifton <[email protected]>
a47cf567
NC
1293
1294 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
1295 field.
1296
0d2bcfaf 12972000-04-23 Denis Chertykov <[email protected]>
3c504221
DC
1298
1299 * avr-dis.c (reg_fmul_d): New. Extract destination register from
1300 FMUL instruction.
1301 (reg_fmul_r): New. Extract source register from FMUL instruction.
1302 (reg_muls_d): New. Extract destination register from MULS instruction.
1303 (reg_muls_r): New. Extract source register from MULS instruction.
1304 (reg_movw_d): New. Extract destination register from MOVW instruction.
1305 (reg_movw_r): New. Extract source register from MOVW instruction.
1306 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
1307 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
1308
0d2bcfaf 13092000-04-22 Timothy Wall <[email protected]>
aa170a07
TW
1310
1311 * ia64-gen.c (general): Add an ordered table of primary
1312 opcode names, as well as priority fields to disassembly data
1313 structures to enforce a preferred disassembly format based on the
1314 ordering of the opcode tables.
1315 (load_insn_classes): Show a useful message if IC tables are missing.
1316 (load_depfile): Ditto.
1317 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
1318 distinguish preferred disassembly.
1319 * ia64-opc-f.c: Reorder some insn for preferred disassembly
1320 format. Fix incorrect flag on fma.s/fma.s.s0.
1321 * ia64-opc.c: Scan *all* disassembly matches and use the one with
1322 the highest priority.
1323 * ia64-opc-b.c: Use more abbreviations.
1324 * ia64-asmtab.c: Regenerate.
79540e26 1325
0d2bcfaf 13262000-04-21 Jason Eckhardt <[email protected]>
91b1cc5d
JL
1327
1328 * hppa-dis.c (extract_16): New function.
1329 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
1330 new operand types l,y,&,fe,fE,fx.
1331
0d2bcfaf
NC
13322000-04-21 Richard Henderson <[email protected]>
1333 David Mosberger <[email protected]>
1334 Timothy Wall <[email protected]>
1335 Bob Manson <[email protected]>
1336 Jim Wilson <[email protected]>
800eeca4
JW
1337
1338 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
1339 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
1340 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
1341 ia64-asmtab.c.
1342 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
1343 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
1344 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
1345 * Makefile.in: Rebuild.
1346 * configure Rebuild.
1347 * configure.in (bfd_ia64_arch): New target.
1348 * disassemble.c (ARCH_ia64): Define.
1349 (disassembler): Support ARCH_ia64.
1350 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
1351 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
1352 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
060d22b0 1353 ia64-war.tbl, ia64-waw.tbl: New files.
79540e26 1354
0d2bcfaf 13552000-04-20 Alexandre Oliva <[email protected]>
4d85706b
AO
1356
1357 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
1358 (disassemble): Use them.
1359
0d8dfecf
AM
13602000-04-14 Alan Modra <[email protected]>
1361
1362 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
1363 * Makefile.am: Update dependencies.
1364 * Makefile.in: Regenerate.
1365
13662000-04-14 Michael Sokolov <[email protected]>
1367
1368 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
1369 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
1370 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
1371 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
1372 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
1373 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
1374 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
1375 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
1376 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
1377 ansidecl.h as sysdep.h includes it.
1378
0d2bcfaf 13792000-04-7 Andrew Cagney <[email protected]>
79540e26 1380
a2d91340 1381 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
79540e26 1382 --enable-build-warnings option.
a2d91340
AC
1383 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
1384 * Makefile.in, configure: Re-generate.
1385
0d2bcfaf 13862000-04-05 J"orn Rennecke <[email protected]>
52ccafd0 1387
060d22b0 1388 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
52ccafd0
JR
1389 stc GBR,@-<REG_N> is available for arch_sh1_up.
1390 Group parallel processing insn with identical mnemonics together.
1391 Make three-operand psha / pshl come first.
1392
0d2bcfaf 13932000-04-05 J"orn Rennecke <[email protected]>
015551fc
JR
1394
1395 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
1396 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
1397 (sh_arg_type): Add A_PC.
1398 (sh_table): Update entries using immediates. Add repeat.
1399 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
1400 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
1401
41b49281
AM
14022000-04-04 Alan Modra <[email protected]>
1403
8ad3436c
AM
1404 * po/opcodes.pot: Regenerate.
1405
41b49281
AM
1406 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
1407 (DEP): Quote when passing vars to sub-make. Add warning message
1408 to end.
1409 (DEP1): Rewrite for "gcc -MM".
1410 (CLEANFILES): Add DEP2.
1411 Update dependencies.
1412 * Makefile.in: Regenerate.
1413
b77a133c
AM
14142000-04-03 Denis Chertykov <[email protected]>
1415
1416 * avr-dis.c: Syntax cleanup.
1417 (add0fff): Print the pc relative address as a signed number.
1418 (add03f8): Likewise.
1419
9aaaa291
ILT
14202000-04-01 Ian Lance Taylor <[email protected]>
1421
1422 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
1423 the parameter ATTRIBUTE_UNUSED.
1424 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
1425
0d2bcfaf 14262000-04-01 Alexandre Oliva <[email protected]>
5728a7d7
AO
1427
1428 * m10300-opc.c: SP-based offsets are always unsigned.
1429
67b60d92
NC
14302000-03-29 Thomas de Lellis <[email protected]>
1431
1432 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
1433 [branch always] instead of "undefined".
1434
0d2bcfaf 14352000-03-27 Nick Clifton <[email protected]>
ba23e138
NC
1436
1437 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
1438 short instructions, from end of list of long instructions.
1439
832ddf62
ILT
14402000-03-27 Ian Lance Taylor <[email protected]>
1441
1442 * Makefile.am (CFILES): Add avr-dis.c.
1443 (ALL_MACHINES): Add avr-dis.lo.
1444
adde6300
AM
14452000-03-27 Alan Modra <[email protected]>
1446
1447 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
1448 truncate integers.
1449 (print_insn_avr): Call function via pointer in K&R compatible way.
1450 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
1451 add0fff, add03f8): Convert to old style function declaration and
1452 add prototype.
1453 (avrdis_opcode): Add prototype.
1454
14552000-03-27 Denis Chertykov <[email protected]>
1456
1457 * avr-dis.c: New file. AVR disassembler.
1458 * configure.in (bfd_avr_arch): New architecture support.
1459 * disassemble.c: Likewise.
1460 * configure: Regenerate.
1461
0d2bcfaf 14622000-03-06 J"oern Rennecke <[email protected]>
05102e70
JR
1463
1464 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
1465
0d2bcfaf 14662000-03-02 J"orn Rennecke <[email protected]>
866afedc 1467
79540e26
AM
1468 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
1469 flag to determine if operand is pc-relative.
1470 * d30v-opc.c:
1471 (d30v_format_table):
1472 (REL6S3): Renamed from IMM6S3.
1473 Added flag OPERAND_PCREL.
1474 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
1475 added flag OPERAND_PCREL.
1476 (IMM12S3U): Replaced with REL12S3.
1477 (SHORT_D2, LONG_D): Delay target is pc-relative.
1478 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
1479 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
1480 using the REL* operands.
1481 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
1482 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
1483 LONG_Db, using REL* operands.
1484 (SHORT_U, SHORT_A5S): Removed stray alternatives.
1485 (d30v_opcode_table): Use new *r formats.
866afedc 1486
0d2bcfaf 14872000-02-28 Nick Clifton <[email protected]>
77343c58
NC
1488
1489 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
1490 'signed_overflow_ok_p'.
1491
e56f75e9
ILT
14922000-02-27 Eli Zaretskii <[email protected]>
1493
1494 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
1495 name of the libtool directory.
1496 * Makefile.in: Rebuild.
1497
0d2bcfaf 14982000-02-24 Nick Clifton <[email protected]>
fa7928ca
NC
1499
1500 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
1501 (cgen_clear_signed_overflow_ok): New function.
1502 (cgen_signed_overflow_ok_p): New function.
1503
0d2bcfaf 15042000-02-23 Andrew Haley <[email protected]>
cfcdbe97 1505
79540e26 1506 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
060d22b0 1507 m32r-ibld.c, m32r-opc.h: Rebuild.
cfcdbe97 1508
5b93d8bb
AM
15092000-02-23 Linas Vepstas <[email protected]>
1510
1511 * i370-dis.c, i370-opc.c: New.
1512
1513 * disassemble.c (ARCH_i370): Define.
1514 (disassembler): Handle it.
1515
1516 * Makefile.am: Add support for Linux/IBM 370.
1517 * configure.in: Likewise.
1518
1519 * Makefile.in: Regenerate.
1520 * configure: Likewise.
1521
0d2bcfaf 15222000-02-22 Chandra Chavva <[email protected]>
b669ceb9
CC
1523
1524 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
1525 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
1526 procedure.
1527
0d2bcfaf 15282000-02-22 Andrew Haley <[email protected]>
8027df89
AH
1529
1530 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
1531 force gp32 to zero.
1532 * mips-opc.c (G6): New define.
1533 (mips_builtin_op): Add "move" definition for -gp32.
1534
4db3857a
ILT
15352000-02-22 Ian Lance Taylor <[email protected]>
1536
1537 From Grant Erickson <[email protected]>:
1538 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
1539
f6af82bd
AM
15402000-02-21 Alan Modra <[email protected]>
1541
1542 * dis-buf.c (buffer_read_memory): Change `length' param and all int
1543 vars to unsigned.
1544
0d2bcfaf 15452000-02-17 J"orn Rennecke <[email protected]>
d4845d57
JR
1546
1547 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
1548 (print_insn_ppi): Likewise.
1549 (print_insn_shx): Use info->mach to select appropriate insn set.
1550 Add support for sh-dsp. Remove FD_REG_N support.
1551 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
1552 (sh_arg_type): Likewise. Remove FD_REG_N.
1553 (sh_dsp_reg_nums): New enum.
1554 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
1555 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
1556 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
1557 (arch_sh3_dsp_up): Likewise.
1558 (sh_opcode_info): New field: arch.
1559 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
1560 D_REG_N. Fill in arch field. Add sh-dsp insns.
1561
0d2bcfaf 15622000-02-14 Fernando Nasser <[email protected]>
a7f8487e
FN
1563
1564 * arm-dis.c: Change flavor name from atpcs-special to
1565 special-atpcs to prevent name conflict in gdb.
1566 (get_arm_regname_num_options, set_arm_regname_option,
1567 get_arm_regnames): New functions. API to access the several
1568 flavor of register names. Note: Used by gdb.
1569 (print_insn_thumb): Use the register name entry from the currently
1570 selected flavor for LR and PC.
1571
0d2bcfaf 15722000-02-10 Nick Clifton <[email protected]>
97ee9b94
NC
1573
1574 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
1575 classes.
1576 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
1577 "mulsh.h" instructions.
1578 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
1579 classes.
1580 (print_insn_mcore): Add support for little endian targets.
1581 Add support for MULSH and OPSR classes.
1582
0d2bcfaf 15832000-02-07 Nick Clifton <[email protected]>
a3d9c82d
NC
1584
1585 * arm-dis.c (parse_arm_diassembler_option): Rename again.
1586 Previous delat did not take.
1587
79540e26
AM
15882000-02-03 Timothy Wall <[email protected]>
1589
940b2b78
TW
1590 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
1591 to adjust target address bounds checking and calculate the
1592 appropriate octet offset into data.
79540e26 1593
94470b23
NC
15942000-01-27 Nick Clifton <[email protected]>
1595
6c082ed8
NC
1596 * arm-dis.c: (parse_disassembler_option): Rename to
1597 parse_arm_disassembler_option and allow to be exported.
1598
94470b23
NC
1599 * disassemble.c (disassembler_usage): New function: Print out any
1600 target specific disassembler options.
58efb6c0 1601 Call arm_disassembler_options() if the ARM architecture is being
79540e26 1602 supported.
58efb6c0
NC
1603
1604 * arm-dis.c (NUM_ELEM): Define this macro if not already
1605 defined.
1606 (arm_regname): New struct type for ARM register names.
1607 (arm_toggle_regnames): Delete.
1608 (parse_disassembler_option): Use register name structure.
1609 (print_insn): New function: Combines duplicate code found in
1610 print_insn_big_arm and print_insn_little_arm.
1611 (print_insn_big_arm): Call print_insn.
1612 (print_insn_little_arm): Call print_insn.
1613 (print_arm_disassembler_options): Display list of supported,
1614 ARM specific disassembler options.
79540e26 1615
2f0ca46a
NC
16162000-01-27 Thomas de Lellis <[email protected]>
1617
79540e26 1618 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
2f0ca46a 1619 ARM_STT_16BIT flag as Thumb code symbols.
79540e26
AM
1620
1621 * arm-dis.c (printf_insn_little_arm): Ditto.
2f0ca46a 1622
cb268829
NC
16232000-01-25 Thomas de Lellis <[email protected]>
1624
1625 * arm-dis.c (printf_insn_thumb): Prevent double dumping
79540e26 1626 of raw thumb instructions.
cb268829 1627
0d2bcfaf 16282000-01-20 Nick Clifton <[email protected]>
06b53c1b
NC
1629
1630 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
1631
01c7f630
NC
16322000-01-03 Nick Clifton <[email protected]>
1633
1634 * arm-dis.c (streq): New macro.
1635 (strneq): New macro.
1636 (force_thumb): ew local variable.
1637 (parse_disassembler_option): New function: Parse a single, ARM
1638 specific disassembler command line switch.
1639 (parse_disassembler_option): Call parse_disassembler_option to
1640 parse individual command line switches.
1641 (print_insn_big_arm): Check force_thumb.
1642 (print_insn_little_arm): Check force_thumb.
1643
2f6d2f85 1644For older changes see ChangeLog-9899
252b5132
RH
1645\f
1646Local Variables:
2f6d2f85
NC
1647mode: change-log
1648left-margin: 8
1649fill-column: 74
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RH
1650version-control: never
1651End:
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