* gas/cgen feature

[binutils.git] / opcodes / ChangeLog

2001-01-11  Peter Targett  <[email protected]>

	* configure.in: Add arc-ext.lo for bfd_arc_arch selection.
	* Makefile.am (C_FILES): Add arc-ext.c.
	(ALL_MACHINES) Add arc-ext.lo.
	(INCLUDES) Add opcode directory to list.
	New dependency entry for arc-ext.lo.
	* disassemble.c (disassembler): Correct call to
	arc_get_disassembler.
	* arc-opc.c: New update for ARC, including full base
	instructions for ARC variants.
	* arc-dis.h, arc-dis.c: New update for ARC, including
	extensibility functionality.
	* arc-ext.h, arc-ext.c: New files for handling extensibility.

2001-01-10  Jan Hubicka  <[email protected]>

	* i386-dis.c (PREGRP15 - PREGRP24): New.
	(dis386_twobyt): Add SSE2 instructions.
	(twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
	(twobyte_uses_f3_prefix): ... this one.
	(grps): Add SSE instructions.
	(prefix_user_table): Add two new slots; add SSE2 instructions.
	(print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
	Handle the REPNZ and Data16 prefixes as well; do proper lookup
	to prefix_user_table.
	(OP_E): Accept mfence and lfence as well.
	(OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
	(OP_XMM): Support REX extensions.
	(OP_EM): Likewise.
	(OP_EX): Likewise.

2001-01-09  Nick Clifton  <[email protected]>

	* arm-dis.c (print_insn): Set pc to zero for instructions with
	a reloc associated with them.

2001-01-09  Jeff Johnston  <[email protected]>

	* cgen-asm.in (parse_insn_normal): Changed syn to be
	CGEN_SYNTAX_CHAR_TYPE.  Changed all references to *syn
	as character to use CGEN_SYNTAX_CHAR macro and all comparisons
	to '\0' to use 0 instead.
	* cgen-dis.in (print_insn_normal): Ditto.
	* cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.

2001-01-05  Jan Hubicka  <[email protected]>

	* i386-dis.c: Add x86_64 support.
	(rex): New static variable.
	(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
	(USED_REX): New macro.
	(Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
	(OP_I64, OP_OFF64, OP_IMREG): New functions.
	(OP_REG, OP_OFF): Declare.
	(get64, get32, get32s): New functions.
	(r??_reg): New constants.
	(dis386_att): Change templates of instruction implicitly promoted
	to 64bit; change e?? to RMe?? for unwind RM byte instructions.
	(grps): Likewise.
	(dis386_intel): Likewise.
	(dixx86_64_att): New table based on dis386_att.
	(dixx86_64_intel): New table based on dis386_intel.
	(names64, names8rex): New global variable.
	(names32, names16): Add extended registers.
	(prefix_user_t): Recognize rex prefixes.
	(prefix_name): Print REX prefixes nicely.
	(op_riprel): New global variable.
	(start_pc): Set type to bfd_vma.
	(print_insn_i386): Detect the 64bit mode and use proper table;
	move ckprefix after initializing the buffer; output unused rex prefixes;
	output information about target of RIP relative addresses.
	(putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
	(print_operand_value): New function.
	(OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
	REX prefix and new modes.
	(get64, get32s): New.
	(get32): Return bfd_signed_vma type.
	(set_op): Initialize the op_riprel.
	* disassemble.c (disassembler): Recognize the x86-64 disassembly.

2001-01-03  Richard Sandiford  <[email protected]>

	 cgen-dis.in (read_insn): Use bfd_get_bits()

2001-01-02  Richard Sandiford  <[email protected]>

	* cgen-dis.c (hash_insn_array): Use bfd_put_bits().
	(hash_insn_list): Likewise
	* cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
	(extract_1): Use bfd_get_bits().
	(extract_normal): Apply sign extension to both extraction
	methods.
	* cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
	(cgen_put_insn_value): Use bfd_put_bits()

2000-12-28  Frank Ch. Eigler  <[email protected]>

	* cgen-asm.in (parse_insn_normal): Print better error message for
	instructions with missing operands.

2000-12-21  Santeri Paavolainen <[email protected]>

	* cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.

2000-12-16  Nick Clifton  <[email protected]>

	* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* config.in: Regenerate.
	* configure.in: Add spacing.
	* configure: Regenerate.
	* ia64-asmtab.c: Regenerate.
	* po/opcodes.pot: Regenerate.

2000-12-12  Frank Ch. Eigler  <[email protected]>

	* cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
	error messages over later parse-time ones.

2000-12-12  Jim Wilson  <[email protected]>

	* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
	argument.
	* ia64_gen.c (insert_deplist): Cast sizeof result to int.
	(print_dependency_table): Print NULL if semantics field not set.
	(insert_opcode_dependencies): Mark cmp parameter as unused.
	(print_main_table): Use fprintf_vma to print long long fields.
	(main): Mark argv paramter as unused.  Convert to old style definition.
	* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
	* ia64-asmtab.c: Regnerate.

2000-12-09  Nick Clifton  <[email protected]>

	* m32r-dis.c (print_insn): Prevent re-read of instruction from
	wrong address.

	* fr30-dis.c: Regenerate.

2000-12-08  Peter Targett  <[email protected]>

	* configure.in: Add arc-ext.lo for bfd_arc_arch selection.
	* Makefile.am (C_FILES): Add arc-ext.c.
	(ALL_MACHINES) Add arc-ext.lo.
	(INCLUDES) Add opcode directory to list.
	New dependency entry for arc-ext.lo.
	* disassemble.c (disassembler): Correct call to
	arc_get_disassembler.
	* arc-opc.c: New update for ARC, including full base
	instructions for ARC variants.
	* arc-dis.h, arc-dis.c: New update for ARC, including
	extensibility functionality.
	* arc-ext.h, arc-ext.c: New files for handling extensibility.

2000-12-03  Chris Demetriou   [email protected]

        * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
        MOD_HILO, and MOD_LO macros.

        * mips-opc.c (M1, M2): Delete.
        (mips_builtin_opcodes): Remove all uses of M1.

        * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
        instructions take "G" format second operands and use the
        correct flags.
        There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
	match.
        Delete "sel" code operands from mfc1 and mtc1.
        Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
	for dm[ft]c[023].
	
2000-12-03  Ed Satterthwaite  [email protected]  and
            Chris Demetriou   [email protected]

        * mips-opc.c (mips_builtin_opcodes): Finish additions
        for MIPS32 support, and clean up existing entries for
        aesthetics, consistency with the MIPS32 ISA, and
        with consistency the rest of the table.

2000-12-01  Nick Clifton  <[email protected]>

	* mips16-opc.c (mips16_opcodes): Add initialiser for membership
	field.

2000-12-01  Chris Demetriou <[email protected]>

        mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
        specifiers.  Update 'B' for new constant names, and remove
        'm'.
        mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
        near the top of the array, so they are disassembled properly.
        Enable "ssnop" for MIPS32.  Add "break" variant with 20 bit
        code for MIPS32.  Update "clo" and "clz" to use 'U' operand
        specifier.  Add 'H' format specifier variants for "mfc1,"
        "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32.  Update
        MIPS32 "sdbbp" to use 'B' operand specifier.  Add MIPS32
        "wait" variant which uses 'J' operand specifier.
        
        * mips-dis.c (set_mips_isa_type): Update to use
        CPU_UNKNOWN and ISA_* constants.  Add bfd_mach_mips32 case.
        Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
        * mips-opc.c (I32): New constant for instructions added in
        MIPS32.
        (P4): Delete.
        (mips_builtin_opcodes) Replace all uses of P4 with I32.

        * mips-dis.c (set_mips_isa_type): Add cases for
        bfd_mach_mips5 and bfd_mach_mips64.
        * mips-opc.c (I64): New definitions.

        * mips-dis.c (set_mips_isa_type): Add case for
        bfd_mach_mips_sb1.

2000-11-28  Hans-Peter Nilsson  <[email protected]>

	* sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
	(print_insn_ppi): Make nib1, nib2, nib3 unsigned.
	Initialize variable dc to NULL.
	(print_insn_shx): Remove unused label d_reg_n.

2000-11-24  Nick Clifton  <[email protected]>

	* arm-opc.h: Add new opcode formatting parameter 'B'.
	(arm_opcodes): Add XScale, v5, and v5te	instructions.
	(thumb_opcodes): Add v5t instructions.

	* arm-dis.c (print_insn_arm): Handle new 'B' format
	parameter.
	(print_insn_thumb): Decode BLX(1) instruction.

2000-11-21  Chris Demetriou  <[email protected]>

	* mips-opc.c: Fix file header comment.

2000-11-14  Hans-Peter Nilsson  <[email protected]>

	* cris-dis.c (cris_get_disassembler): If abfd is NULL, return
	print_insn_cris_with_register_prefix.

2000-11-11  Alexandre Oliva  <[email protected]>

	* sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.

2000-11-07  Matthew Green  <[email protected]>

	* cgen-dis.in (print_insn): All insns which can fit into insn_value
	must be loaded there in their entirety.

2000-10-20  Jakub Jelinek  <[email protected]>

	* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
	(compute_arch_mask): Add v8plusb and v9b machines.
	(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
	* opcodes/sparc-opc.c: Support for Cheetah instruction set.
	(prefetch_table): Add #invalidate.

2000-10-16  Nick Clifton  <[email protected]>

	* mcore-dis.c (imsk): Change mask for OC to 0xFE00.

2000-10-06  Dave Brolley  <[email protected]>

	* fr30-desc.h: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-ibld.c: Regenerate.

2000-10-05  Jim Wilson  <[email protected]>

	* ia64-ic.tbl: Update from Intel.
	* ia64-asmtab.c: Regenerate.
	
2000-10-04  Kazu Hirata  <[email protected]>

	* ia64-gen.c: Convert C++-style comments to C-style comments.
	* tic54x-dis.c: Likewise.

2000-09-29  Hans-Peter Nilsson  <[email protected]>

	Changes to add dollar prefix to registers for files where user symbols
	don't have a leading underscore.  Fix formatting.
	* cris-dis.c (REGISTER_PREFIX_CHAR): New.
	(format_reg): Add parameter with_reg_prefix.  All callers changed.
	(print_with_operands): Ditto.
	(print_insn_cris_generic): Renamed from print_insn_cris, add
	parameter with_reg_prefix.
	(print_insn_cris_with_register_prefix,
	print_insn_cris_without_register_prefix, cris_get_disassembler):
	New.
	* disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.

2000-09-22  Jim Wilson  <[email protected]>

	* ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
	gt, ge, ngt, and nge.
	* ia64-asmtab.c: Regenerate.

	* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
	* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
	(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
	* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
	* ia64-asmtab.c: Regnerate.

2000-09-13  Anders Norlander  <[email protected]>
	
 	* mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
 	Add mfc0 and mtc0 with sub-selection values.
	Add clo and clz opcodes.
 	Add msub and msubu instructions for MIPS32.
 	Add madd/maddu aliases for mad/madu for MIPS32.
 	Support wait, deret, eret, movn, pref for MIPS32.
	Support tlbp, tlbr, tlbwi, tlbwr.
 	(P4): New define.
 
 	* mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
 	(print_insn_arg): Handle 'H' args.
 	(set_mips_isa_type): Recognize 4K.
	Use CPU_* defines instead of hardcoded numbers.

2000-09-11  Catherine Moore <[email protected]>

	* d30v-opc.c (d30v_operand_t): New operand type Rb2.
	(d30v_format_tab): Use Rb2 for modinc and moddec.
 
2000-09-07  Catherine Moore  <[email protected]>
 
        * d30v-opc.c (d30v_format_tab): Use format Ra for
        modinc and moddec.

2000-09-06  Alexandre Oliva  <[email protected]>

	* configure: Rebuilt with new libtool.m4.

2000-09-05  Nick Clifton  <[email protected]>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.
	
2000-08-31  Alexandre Oliva  <[email protected]>

	* acinclude.m4: Include libtool and gettext macros from the
	top level.
	* aclocal.m4, configure: Rebuilt.

2000-08-30  Kazu Hirata  <[email protected]>

	* tic80-dis.c: Fix formatting.

2000-08-29  Kazu Hirata  <[email protected]>

	* w65-dis.c: Fix formatting.

2000-08-28  Mark Hatle  <[email protected]>

	* ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
	(powerpc_opcodes): Add table entries for PPC 405 instructions.
	Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
	instructions.  Added extended mnemonic mftbl as defined in the
	405GP manual for all PPCs.

2000-08-28  Jim Wilson  <[email protected]>

	* ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
	call.  Change last goto to use failed instead of done.

2000-08-28  Dave Brolley  <[email protected]>

	* cgen-ibld.in (cgen_put_insn_int_value): New function.
	(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
	(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	* cgen-dis.in (read_insn): New static function.
	(print_insn): Use read_insn to read the insn into the buffer and set
	up for disassembly.
	(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
	in the buffer.
	* fr30-asm.c: Regenerated.
	* fr30-desc.c: Regenerated.
	* fr30-desc.h Regenerated.
	* fr30-dis.c: Regenerated.
	* fr30-ibld.c: Regenerated.
	* fr30-opc.c: Regenerated.
	* fr30-opc.h Regenerated.
	* m32r-asm.c: Regenerated.
	* m32r-desc.c: Regenerated.
	* m32r-desc.h Regenerated.
	* m32r-dis.c: Regenerated.
	* m32r-ibld.c: Regenerated.
	* m32r-opc.c: Regenerated.

2000-08-28  Kazu Hirata  <[email protected]>

	* tic30-dis.c: Fix formatting.

2000-08-27  Kazu Hirata  <[email protected]>

	* sh-dis.c: Fix formatting.

2000-08-24  David Edelsohn  <[email protected]>

	* ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.

2000-08-24  Kazu Hirata  <[email protected]>

	* z8k-dis.c: Fix formatting.

2000-08-16  Jim Wilson  <[email protected]>

	* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds.  Delete
	break, mov-immediate, nop.
	* ia64-opc-f.c: Delete fpsub instructions.
	* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
	address operand.  Rewrite using macros to avoid long lines.
	* ia64-opc.h (POSTINC): Define.
	* ia64-asmtab.c: Regenerate.

2000-08-15  Jim Wilson  <[email protected]>

	* ia64-ic.tbl: Add missing entries.

2000-08-08  Jason Eckhardt  <[email protected]>

	* i860-dis.c (print_br_address): Change third argument from int
	to long.

2000-08-07  Richard Henderson  <[email protected]>

	* ia64-dis.c (print_insn_ia64): Get byte skip count correct
	for MLI templates.  Handle IA64_OPND_TGT64.

2000-08-04  Ben Elliston  <[email protected]>

	* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
	* cgen.sh: Likewise.

2000-08-02  Jim Wilson  <[email protected]>
	
	* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.

2000-07-29  Marek Michalkiewicz  <[email protected]>

	* avr-dis.c (avr_operand): Use PARAMS macro in declaration.
	Change return type from void to int.  Check the combination
	of operands, return 1 if valid.  Fix to avoid BUF overflow.
	Report undefined combinations of operands in COMMENT.
	Report internal errors to stderr.  Output the adiw/sbiw
	constant operand in both decimal and hex.
	(print_insn_avr): Disassemble ldd/std with displacement of 0
	as ld/st.  Check avr_operand () return value, handle invalid
	combinations of operands like unknown opcodes.

2000-07-28  Ben Elliston  <[email protected]>

	* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
	(run-cgen, stamp-m32r, stamp-fr30): New targets.
	* Makefile.in: Regenerate.
	* configure.in: Add --enable-cgen-maint option.
	* configure: Regenerate.

2000-07-26  Dave Brolley  <[email protected]>

	* cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
	(cgen_hw_lookup_by_num): Ditto.
	(cgen_operand_lookup_by_name): Ditto.
	(print_address): Ditto.
	(print_keyword): Ditto.
	* cgen-dis.c (hash_insn_array): Mark unused parameters with
	ATTRIBUTE_UNUSED.
	* cgen-asm.c (hash_insn_array): Mark unused parameters with
	ATTRIBUTE_UNUSED.
	(cgen_parse_keyword): Ditto.

2000-07-22  Jason Eckhardt  <[email protected]>

	* i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* configure.in: New bits for bfd_i860_arch.

	* configure: Regenerated.

2000-07-20  Hans-Peter Nilsson  <[email protected]>

	* Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
	(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
	(cris-dis.lo, cris-opc.lo): New rules.
	* Makefile.in: Rebuild.
	* configure.in (bfd_cris_arch): New target.
	* configure: Rebuild.
	* disassemble.c (ARCH_cris): Define.
	(disassembler): Support ARCH_cris.
	* cris-dis.c, cris-opc.c: New files.
	* po/POTFILES.in, po/opcodes.pot: Regenerate.

2000-07-11  Jakub Jelinek  <[email protected]>

	* sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
	Reported by Bill Clarke <[email protected]>.

2000-07-09  Geoffrey Keating  <[email protected]>

	* ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
	Patch by Randall J Fisher <[email protected]>.

2000-07-09  Alan Modra  <[email protected]>

	* hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
	fput_const, extract_3, extract_5_load, extract_5_store,
	extract_5r_store, extract_5R_store, extract_10U_store,
	extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
	extract_12, extract_17, extract_22): Prototype.
	(print_insn_hppa): Rename inner block opcode -> opc to avoid
	shadowing outer block.
	(GET_BIT): Define.

2000-07-05  DJ Delorie  <[email protected]>

	* MAINTAINERS: new

2000-07-04  Alexandre Oliva  <[email protected]>

	* arm-dis.c (print_insn_arm): Output combinations of PSR flags.

2000-07-03  Marek Michalkiewicz  <[email protected]>

	* avr-dis.c (avr_operand): Change _ () to _() around all strings
	marked for translation (exception from the usual coding style).
	(print_insn_avr): Initialize insn2 to avoid warnings.

2000-07-03  Kazu Hirata  <[email protected]>

	* h8300-dis.c (bfd_h8_disassemble): Improve readability.
	* h8500-dis.c: Fix formatting.

2000-07-01  Alan Modra  <[email protected]>

	* Makefile.am (DEP): Fix 2000-06-22.  grep after running dep.sed
	(CLEANFILES): Add DEPA.
	* Makefile.in: Regenerate.

2000-06-26  Scott Bambrough  <[email protected]>

	* arm-dis.c (regnames): Add an additional register set to match
	the set used by GCC.  Make it the default.

2000-06-22  Alan Modra  <[email protected]>

	* Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
	find one.
	* Makefile.in: Regenerate.

2000-06-20  H.J. Lu  <[email protected]>

	* Makefile.am: Rebuild dependency.
	* Makefile.in: Rebuild.

2000-06-18  Stephane Carrez  <[email protected]>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_m68hc12, 
	ARCH_m68hc11.
	* m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12): 
	New functions.
	* configure.in: Recognize m68hc12 and m68hc11.
	* m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly 
	and opcode generation for m68hc11 and m68hc12.

2000-06-16  Nick Duffek  <[email protected]>

	* disassemble.c (disassembler): Refer to the PowerPC 620 using
	bfd_mach_ppc_620 instead of 620.

2000-06-12  Kazu Hirata  <[email protected]>

	* h8300-dis.c: Fix formatting.
	(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
	correctly.

2000-06-09  Denis Chertykov  <[email protected]>

	* avr-dis.c (avr_operand): Bugfix for jmp/call address.

2000-06-07  Denis Chertykov  <[email protected]>

	* avr-dis.c: completely rewritten.

2000-06-02  Kazu Hirata  <[email protected]>

	* h8300-dis.c: Follow the GNU coding style.
	(bfd_h8_disassemble) Fix a typo.

2000-06-01  Kazu Hirata  <[email protected]>

	* h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
	(bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
	correctly.  Fix a typo.

2000-05-31  Nick Clifton  <[email protected]>

	* opintl.h (_(String)): Explain why dgettext is used instead of
	gettext.

2000-05-30  Nick Clifton  <[email protected]>

	* opintl.h (gettext, dgettext, dcgettext, textdomain,
	bindtextdomain): Replace defines with those from intl/libgettext.h
	to quieten gcc warnings.

2000-05-26  Alan Modra  <[email protected]>

	* Makefile.am: Update dependencies with "make dep-am"
	* Makefile.in: Regenerate.

2000-05-25  Alexandre Oliva  <[email protected]>

	* m10300-dis.c (disassemble): Don't assume 32-bit longs when
	sign-extending operands.

2000-05-15  Donald Lindsay  <[email protected]>

	* d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
	except brf's.

2000-05-21  Nick Clifton  <[email protected]>

	* Makefile.am (LIBIBERTY): Define.

2000-05-19 Diego Novillo <[email protected]>

	* mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
	(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
	(reg_names): Rename to std_reg_names. Change it to a char **
	static variable.
	(std_reg_names): New name for reg_names.
	(set_mips_isa_type): Set reg_names to point to std_reg_names by
	default.

2000-05-16  Frank Ch. Eigler  <[email protected]>

	* fr30-desc.h: Partially regenerated to account for changed
	CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
	* m32r-desc.h: Ditto.

2000-05-15  Nick Clifton  <[email protected]>

	* arm-opc.h: Use upper case for flasg in MSR and MRS
	instructions.  Allow any bit to be set in the field_mask of
	the MSR instruction.

	* arm-dis.c (print_insn_arm): Decode _x and _s bits of the
	field_mask of an MSR instruction.

2000-05-11  Thomas de Lellis  <[email protected]>

	* arm-opc.c: Disassembly of thumb ldsb/ldsh
	instructions changed to ldrsb/ldrsh.

2000-05-11  Ulf Carlsson  <[email protected]>

	* mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
	target addresses for 'jal' and 'j'.

2000-05-10  Geoff Keating  <[email protected]>

	* ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
	also available in common mode when powerpc syntax is being used.

2000-05-08  Alan Modra  <[email protected]>

	* m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
	(dummy_print_address): Ditto.

2000-05-04  Timothy Wall  <[email protected]>

	* tic54x-opc.c: New.
	* tic54x-dis.c: New.
	* disassemble.c (disassembler): Add ARCH_tic54x.
	* configure.in: Added tic54x target.
	* configure: Ditto.
	* Makefile.am: Add tic54x dependencies.
	* Makefile.in: Ditto.

2000-05-03  J.T. Conklin  <[email protected]>

	* ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
	vector unit operands.
	(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
	unit instruction formats.
	(PPCVEC): New macro, mask for vector instructions.
	(powerpc_operands): Add table entries for above operand types.
	(powerpc_opcodes): Add table entries for vector instructions.

	* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Prepend 'v' when printing vector registers.

2000-04-24  Clinton Popetz  <[email protected]>

	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.

2000-04-24  Nick Clifton  <[email protected]>

	* fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
	field.

2000-04-23  Denis Chertykov  <[email protected]>

	* avr-dis.c (reg_fmul_d): New. Extract destination register from
	FMUL instruction.
	(reg_fmul_r): New. Extract source register from FMUL instruction.
	(reg_muls_d): New. Extract destination register from MULS instruction.
	(reg_muls_r): New. Extract source register from MULS instruction.
	(reg_movw_d): New. Extract destination register from MOVW instruction.
	(reg_movw_r): New. Extract source register from MOVW instruction.
	(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
	EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.

2000-04-22  Timothy Wall  <[email protected]>

	* ia64-gen.c (general): Add an ordered table of primary
	opcode names, as well as priority fields to disassembly data
	structures to enforce a preferred disassembly format based on the
	ordering of the opcode tables.
	(load_insn_classes): Show a useful message if IC tables are missing.
	(load_depfile): Ditto.
	* ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
	distinguish preferred disassembly.
	* ia64-opc-f.c: Reorder some insn for preferred disassembly
	format.  Fix incorrect flag on fma.s/fma.s.s0.
	* ia64-opc.c: Scan *all* disassembly matches and use the one with
	the highest priority.
	* ia64-opc-b.c: Use more abbreviations.
	* ia64-asmtab.c: Regenerate.

2000-04-21  Jason Eckhardt  <[email protected]>

	* hppa-dis.c (extract_16): New function.
	(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
	new operand types l,y,&,fe,fE,fx.

2000-04-21  Richard Henderson  <[email protected]>
	    David Mosberger  <[email protected]>
	    Timothy Wall <[email protected]>
	    Bob Manson  <[email protected]>
	    Jim Wilson  <[email protected]>

	* Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
	(CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
	ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
	ia64-asmtab.c.
	(ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
	(ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
	ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
	* Makefile.in: Rebuild.
	* configure Rebuild.
	* configure.in (bfd_ia64_arch): New target.
	* disassemble.c (ARCH_ia64): Define.
	(disassembler): Support ARCH_ia64.
	* ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
	ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
	ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
	ia64-war.tbl, ia64-waw.tbl): New files.

2000-04-20  Alexandre Oliva  <[email protected]>

	* m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
	(disassemble): Use them.

2000-04-14  Alan Modra  <[email protected]>

	* sysdep.h: Include "ansidecl.h" not <ansidecl.h>
	* Makefile.am: Update dependencies.
	* Makefile.in: Regenerate.

2000-04-14  Michael Sokolov  <[email protected]>

	* a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
	avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
	disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
	i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
	m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
	mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
	ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
	tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
	w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h.  Remove
	ansidecl.h as sysdep.h includes it.

2000-04-7  Andrew Cagney  <[email protected]>

	* configure.in (WARN_CFLAGS): Set to -W -Wall by default.  Add
	--enable-build-warnings option.
	* Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
	* Makefile.in, configure: Re-generate.

2000-04-05  J"orn Rennecke <[email protected]>

	* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
	stc GBR,@-<REG_N> is available for arch_sh1_up.
	Group parallel processing insn with identical mnemonics together.
	Make three-operand psha / pshl come first.

2000-04-05  J"orn Rennecke <[email protected]>

	* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
	Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
	(sh_arg_type): Add A_PC.
	(sh_table): Update entries using immediates.  Add repeat.
	* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
	Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.

2000-04-04  Alan Modra  <[email protected]>

	* po/opcodes.pot: Regenerate.

	* Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
	(DEP): Quote when passing vars to sub-make.  Add warning message
	to end.
	(DEP1): Rewrite for "gcc -MM".
	(CLEANFILES): Add DEP2.
	Update dependencies.
	* Makefile.in: Regenerate.

2000-04-03  Denis Chertykov  <[email protected]>

	* avr-dis.c: Syntax cleanup.
	(add0fff): Print the pc relative address as a signed number.
	(add03f8): Likewise.

2000-04-01  Ian Lance Taylor  <[email protected]>

	* disassemble.c (disassembler_usage): Don't use a prototype.  Mark
	the parameter ATTRIBUTE_UNUSED.
	* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.

2000-04-01  Alexandre Oliva  <[email protected]>

	* m10300-opc.c: SP-based offsets are always unsigned.

2000-03-29  Thomas de Lellis  <[email protected]>

	* arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
	[branch always] instead of "undefined".

2000-03-27  Nick Clifton  <[email protected]>

	* d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
	short instructions, from end of list of long instructions.

2000-03-27  Ian Lance Taylor  <[email protected]>

	* Makefile.am (CFILES): Add avr-dis.c.
	(ALL_MACHINES): Add avr-dis.lo.

2000-03-27  Alan Modra  <[email protected]>

	* avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
	truncate integers.
	(print_insn_avr): Call function via pointer in K&R compatible way.
	(dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
	add0fff, add03f8): Convert to old style function declaration and
	add prototype.
	(avrdis_opcode): Add prototype.

2000-03-27  Denis Chertykov  <[email protected]>

	* avr-dis.c: New file.  AVR disassembler.
	* configure.in (bfd_avr_arch): New architecture support.
	* disassemble.c: Likewise.
	* configure: Regenerate.

2000-03-06  J"oern Rennecke <[email protected]>

	* sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.

2000-03-02  J"orn Rennecke <[email protected]>

	* d30v-dis.c (print_insn): Remove d*i hacks.  Use per-operand
	flag to determine if operand is pc-relative.
	* d30v-opc.c:
	(d30v_format_table):
	(REL6S3): Renamed from IMM6S3.
	Added flag OPERAND_PCREL.
	(REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
	added flag OPERAND_PCREL.
	(IMM12S3U): Replaced with REL12S3.
	(SHORT_D2, LONG_D): Delay target is pc-relative.
	(SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
	Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
	using the REL* operands.
	(LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
	(SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
	LONG_Db, using REL* operands.
	(SHORT_U, SHORT_A5S): Removed stray alternatives.
	(d30v_opcode_table): Use new *r formats.

2000-02-28  Nick Clifton  <[email protected]>

	* m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
	'signed_overflow_ok_p'.

2000-02-27  Eli Zaretskii  <[email protected]>

	* Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
	name of the libtool directory.
	* Makefile.in: Rebuild.

2000-02-24  Nick Clifton  <[email protected]>

	* cgen-opc.c (cgen_set_signed_overflow_ok): New function.
	(cgen_clear_signed_overflow_ok): New function.
	(cgen_signed_overflow_ok_p): New function.

2000-02-23  Andrew Haley  <[email protected]>

	* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
	m32r-ibld.c,m32r-opc.h: Rebuild.

2000-02-23  Linas Vepstas <[email protected]>

	* i370-dis.c, i370-opc.c: New.

	* disassemble.c (ARCH_i370): Define.
	(disassembler): Handle it.

	* Makefile.am: Add support for Linux/IBM 370.
	* configure.in: Likewise.

	* Makefile.in: Regenerate.
	* configure: Likewise.

2000-02-22  Chandra Chavva   <[email protected]>

	* d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
	ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
	procedure.

2000-02-22  Andrew Haley  <[email protected]>

	* mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
	force gp32 to zero.
	* mips-opc.c (G6): New define.
	(mips_builtin_op): Add "move" definition for -gp32.

2000-02-22  Ian Lance Taylor  <[email protected]>

	From Grant Erickson <[email protected]>:
	* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.

2000-02-21  Alan Modra  <[email protected]>

	* dis-buf.c (buffer_read_memory): Change `length' param and all int
	vars to unsigned.

2000-02-17 J"orn Rennecke <[email protected]>

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.

2000-02-14  Fernando Nasser  <[email protected]>

	* arm-dis.c: Change flavor name from atpcs-special to
	special-atpcs to prevent name conflict in gdb.
	(get_arm_regname_num_options, set_arm_regname_option,
	get_arm_regnames): New functions.  API to access the several
	flavor of register names.  Note: Used by gdb.
	(print_insn_thumb): Use the register name entry from the currently
	selected flavor for LR and PC.

2000-02-10  Nick Clifton  <[email protected]>

	* mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
	classes.
	(mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
	"mulsh.h" instructions.
	* mcore-dis.c (imsk array): Add masks for MULSH and OPSR
	classes.
	(print_insn_mcore): Add support for little endian targets.
	Add support for MULSH and OPSR classes.

2000-02-07  Nick Clifton  <[email protected]>

	* arm-dis.c (parse_arm_diassembler_option): Rename again.
	Previous delat did not take.

2000-02-03  Timothy Wall  <[email protected]>

	* dis-buf.c (buffer_read_memory):  Use octets_per_byte field
	to adjust target address bounds checking and calculate the
	appropriate octet offset into data.

2000-01-27  Nick Clifton  <[email protected]>

	* arm-dis.c: (parse_disassembler_option): Rename to
	parse_arm_disassembler_option and allow to be exported.

	* disassemble.c (disassembler_usage): New function: Print out any
	target specific disassembler options.
	Call arm_disassembler_options() if the ARM architecture is being
	supported.

	* arm-dis.c (NUM_ELEM): Define this macro if not already
	defined.
	(arm_regname): New struct type for ARM register names.
	(arm_toggle_regnames): Delete.
	(parse_disassembler_option): Use register name structure.
	(print_insn): New function: Combines duplicate code found in
	print_insn_big_arm and print_insn_little_arm.
	(print_insn_big_arm): Call print_insn.
	(print_insn_little_arm): Call print_insn.
	(print_arm_disassembler_options): Display list of supported,
	ARM specific disassembler options.

2000-01-27  Thomas de Lellis  <[email protected]>

	* arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
	ARM_STT_16BIT flag as Thumb code symbols.

	* arm-dis.c (printf_insn_little_arm): Ditto.

2000-01-25  Thomas de Lellis  <[email protected]>

	* arm-dis.c (printf_insn_thumb): Prevent double dumping
	of raw thumb instructions.

2000-01-20  Nick Clifton  <[email protected]>

	* mcore-opc.h (mcore_table): Add "add" as an alias for "addu".

2000-01-03  Nick Clifton  <[email protected]>

	* arm-dis.c (streq): New macro.
	(strneq): New macro.
	(force_thumb): ew local variable.
	(parse_disassembler_option): New function: Parse a single, ARM
	specific disassembler command line switch.
	(parse_disassembler_option): Call parse_disassembler_option to
	parse individual command line switches.
	(print_insn_big_arm): Check force_thumb.
	(print_insn_little_arm): Check force_thumb.

For older changes see ChangeLog-9899
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