]> Git Repo - binutils.git/blame - opcodes/ChangeLog
2001-06-09 Philip Blundell <[email protected]>
[binutils.git] / opcodes / ChangeLog
CommitLineData
879db8be
NC
12001-06-06 Christian Groessler <[email protected]>
2
3 * z8k-dis.c: Fix formatting.
4 (unpack_instr): Remove unused cases in switch statement. Add
5 safety abort() in default case.
6 (unparse_instr): Add safety abort() in default case.
7
98b32482
NC
82001-06-06 Peter Jakubek <[email protected]>
9
10 * opcodes/m68k-dis.c (print_insn_m68k): Fix typo.
11 * opcodes/m68k-opc.c (m68k_opcodes): Correct allowed operands for
12 mcf (ColdFire) div, rem and moveb instructions.
13
3ffd33cf
AM
142001-06-06 Alan Modra <[email protected]>
15
16 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
17 (cond_jump_mode, loop_jcxz_mode): Define.
18 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as
19 appropriate, and 'F' suffix to loop insns.
20 (disx86_64_att): Likewise.
21 (dis386_twobyte_att): Likewise.
22 (print_insn_i386): Don't output addr prefix for loop, jcxz insns.
23 Output data size prefix for long conditional jumps. Output cs and
24 ds branch hints.
25 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
26 (OP_J): Don't make PREFIX_DATA used.
27
9ab433aa
AO
282001-06-04 Alexandre Oliva <[email protected]>
29
30 * sh-opc.h (sh_table): Complete last element entry to avoid
31 compiler warning.
32
d1cf510e
NC
332001-05-16 Thiemo Seufer <[email protected]>
34
35 * mips-dis.c (mips_isa_type): Add MIPS r12k support.
36
cba24d7d
AM
372001-05-23 Alan Modra <[email protected]>
38
39 * arc-opc.c: Whitespace changes.
40
22f3fc43
HPN
412001-05-18 Hans-Peter Nilsson <[email protected]>
42
43 * cris-opc.c (cris_spec_regs): Add missing initializer field for
44 last element.
45
84fd0d38
FCE
462001-05-15 Frank Ch. Eigler <[email protected]>
47
48 * cgen-dis.in (extract_normal): Complete support for min<base case.
49
aa5f19f2
NC
502001-05-15 Thiemo Seufer <[email protected]>
51
52 * mips-dis.c (INSNLEN): Rename MAXLEN.
53 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
54 (print_insn_arg): Remove $ prefix of register names.
55 (set_mips_isa_type): Remove.
cba24d7d 56 (mips_isa_type): New function.
aa5f19f2
NC
57 (get_mips_isa): New Function.
58 (print_insn_mips): Rename _print_insn_mips.
59 (_print_insn_mips): New function, contains code which was
60 duplicated in print_insn_big_mips and print_insn_little_mips.
61 (print_insn_big_mips): Moved code to _print_insn_mips.
62 (print_insn_little_mips): Likewise.
63 (print_mips16_insn_arg): Remove $ prefix of register names.
64 Print error message before abort.
65
24a7a601
C
662001-05-14 J.T. Conklin <[email protected]>
67
68 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
69 simplified mnemonics used for setting PPC750-specific special
70 purpose registers.
71
8d5ec599
L
722001-05-12 H.J. Lu <[email protected]>
73
74 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
75 `rm'.
76
bcee8eb8
AM
772001-05-12 Peter Targett <[email protected]>
78
79 * arc-opc.c (arc_reg_names): Correct attribute for lp_count
80 register to r/w. Formatting fixes throughout file.
81
67d6227d
AM
822001-05-12 Alan Modra <[email protected]>
83
84 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
85 movq operands.
4bba6815
AM
86 (twobyte_has_modrm): Update table.
87 (need_modrm): Give it file scope.
88 (MODRM_CHECK): Define.
89 (dofloat): Use MODRM_CHECK.
90 (OP_E): Likewise.
91 (OP_EM): Likewise.
92 (OP_EX): Likewise.
67d6227d 93
a00ad97d
FCE
942001-05-07 Frank Ch. Eigler <[email protected]>
95
96 * cgen-dis.in (default_print_insn): Tolerate min<base instructions
97 even at end of a section.
98 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
99 by ignoring precariously-unpacked insn_value in favor of raw buffer.
100
a28d0f3d
AM
1012001-05-03 Thiemo Seufer <[email protected]>
102
103 * disassemble.c (disassembler_usage): Remove unused attribute.
104
52646233
FCE
1052001-05-04 Frank Ch. Eigler <[email protected]>
106
107 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
108
1092001-05-04 Frank Ch. Eigler <[email protected]>
110
111 * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
112 assume incoming buffer already has the base insn loaded. Handle
714b578b 113 smaller-than-base instructions for variable-length case.
52646233 114
992aaec9
AM
1152001-05-04 Alan Modra <[email protected]>
116
117 * i386-dis.c (Ev, Ed): Remove duplicate define.
118 (Gd): Define.
119 (XS): Define.
120 (OP_XS): New function.
121 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
122 movmskp operands.
123 (dis386_twobyte_intel): Likewise.
124 (prefix_user_table): Use MS for maskmovq operand.
125
87e6d782
NC
1262001-04-27 Johan Rydberg <[email protected]>
127
128 * Makefile.am: Add OpenRISC target.
129 * Makefile.in: Regenerated.
130
131 * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
132
133 * configure.in (bfd_openrisc_arch): Add target.
134 * configure: Regenerated.
135
136 * openrisc-asm.c: New file.
137 * openrisc-desc.c: Likewise.
138 * openrisc-desc.h: Likewise.
139 * openrisc-dis.c: Likewise.
140 * openrisc-ibld.c: Likewise.
141 * openrisc-opc.c: Likewise.
142 * openrisc-opc.h: Likewise.
143
6840198f
NC
1442001-04-24 Christian Groessler <[email protected]>
145
146 * z8k-dis.c: add names of control registers (ctrl_names);
147 (seg_length): provides instruction length fixup for segmented
148 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
149 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
150 (unparse_intr): handle CLASS_PR, print addresses without '#'
151 * z8k-opc.h: re-created with new z8kgen
152 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
153 entries for ldctl/ldctlb instruction
154
c2419411
AJ
1552001-04-06 Andreas Jaeger <[email protected]>
156
157 * i386-dis.c: Add ffreep instruction.
158
3eb9799d
AO
1592001-03-30 Alexandre Oliva <[email protected]>
160
161 * ppc-opc.c (insert_mbe): Shift mask initializer as long.
162
0f17484f
AM
1632001-03-24 Alan Modra <[email protected]>
164
165 * i386-dis.c (PREGRP25): Define.
166 (dis386_twobyte_att): Use here in place of "movntq" entry.
167 (dis386_twobyte_intel): Likewise.
168 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
169 (PREGRP26): Define.
170 (dis386_twobyte_att): Use here.
171 (dis386_twobyte_intel): Likewise.
172 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
173 (prefix_user_table <maskmovdqu>): XM operand, not MX.
174 (prefix_user_table): Cosmetic changes to "bad" entries.
175
e93d7199
NC
1762001-03-23 Nick Clifton <[email protected]>
177
178 * mips-opc.c: Remove extraneous whitespace.
179 * mips-dis.c: Remove extraneous whitespace.
180
fca2040b
BE
1812001-03-22 Ben Elliston <[email protected]>
182
183 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
184 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
185 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
186 to allay a compiler warning.
187
87890af0
AM
1882001-03-22 Alan Modra <[email protected]>
189
190 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
191 (dis386_twobyte_intel): Likewise.
192 (twobyte_has_modrm): Set entry for paddq, psubq.
193
27fca2d8
PM
1942001-03-20 Patrick Macdonald <[email protected]>
195
196 * cgen-dis.in (print_insn_@arch@): Add support for target machine
197 determination via CGEN_COMPUTE_MACH.
198 * fr30-desc.c: Regenerate.
199 * fr30-dis.c: Regenerate.
200 * fr30-opc.h: Regenerate.
201 * m32r-desc.c: Regenerate.
202 * m32r-dis.c: Regenerate.
203 * m32r-opc.h: Regenerate.
204 * m32r-opinst.c: Regenerate.
205
f4fbb4a3
L
2062001-03-20 H.J. Lu <[email protected]>
207
208 * configure.in: Remove the redundent AC_ARG_PROGRAM.
209 * configure: Rebuild.
210
f4bc6bb0
JW
2112001-03-19 Jim Wilson <[email protected]>
212
213 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
214 notestr if larger than xsect.
215 (in_class): Handle format M5.
216 * ia64-asmtab.c: Regnerate.
217
bbe6d95f
AM
2182001-03-19 John David Anglin <[email protected]>
219
220 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
221 has more than one byte left to read.
222
82b66b23
NC
2232001-03-16 Martin Schwidefsky <[email protected]>
224
225 * s390-opc.c: Add new opcodes. Smooth out formatting.
226 * s390-opc.txt: Add new opcodes.
c2419411 227
4f3c3dbb
NC
2282001-03-06 Nick Clifton <[email protected]>
229
230 * arm-dis.c (print_insn_thumb): Compute destination address
231 of BLX(1) instruction by taking bit 1 from PC and not from bit
232 0 of the offset.
233
9d29e1b3
NC
2342001-03-06 Igor Shevlyakov <[email protected]>
235
236 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
237 so command line switches will work.
238
b3466c39
DB
2392001-03-05 Dave Brolley <[email protected]>
240
2edda1bf
DB
241 * fr30-asm.c: Regenerate.
242 * fr30-desc.c: Regenerate.
243 * fr30-desc.h: Regenerate.
244 * fr30-dis.c: Regenerate.
245 * fr30-ibld.c: Regenerate.
246 * fr30-opc.c: Regenerate.
247 * fr30-opc.h: Regenerate.
248 * m32r-asm.c: Regenerate.
249 * m32r-desc.c: Regenerate.
250 * m32r-desc.h: Regenerate.
251 * m32r-dis.c: Regenerate.
252 * m32r-ibld.c: Regenerate.
253 * m32r-opc.c: Regenerate.
254 * m32r-opc.h: Regenerate.
255 * m32r-opinst.c: Regenerate.
b3466c39 256
80a523c2
NC
2572001-02-28 Igor Shevlyakov <[email protected]>
258
259 * m68k-opc.c: fix cpushl according to Motorola. Enable
260 bunch of instructions for Coldfire 5407 and add all new.
261
27b7e12d
AM
2622001-02-27 Alan Modra <[email protected]>
263
264 * configure.in (BFD_VERSION): Do without grep.
265 * configure: Regenerate.
266 * Makefile.am: Run "make dep-am".
267 * Makefile.in: Regenerate.
268
b8e0eda2
L
2692001-02-23 David Mosberger <[email protected]>
270
271 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
272 * ia64-asmtab.c: Regenerate.
273
87f8eb97
JW
2742001-02-21 David Mosberger <[email protected]>
275
276 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
277 separate variants: one for IMM22 and the other for IMM14.
278 * ia64-asmtab.c: Regenerate.
c2419411 279
dd425ada
GM
2802001-02-21 Greg McGary <[email protected]>
281
282 * cgen-opc.c (cgen_get_insn_value): Add missing `return'.
283
b34fb0b4
L
2842001-02-20 H.J. Lu <[email protected]>
285
286 * Makefile.am (ia64-ic.tbl): Remove the target.
287 (ia64-raw.tbl): Likewise.
288 (ia64-waw.tbl): Likewise.
289 (ia64-war.tbl): Likewise.
290 (ia64-asmtab.c): Generate it in the source directory.
291 * Makefile.in: Regenerated.
292
e135f41b
NC
2932001-02-18 lars brinkhoff <[email protected]>
294
295 * Makefile.am: Add PDP-11 target.
296 * configure.in: Likewise.
297 * disassemble.c: Likewise.
298 * pdp11-dis.c: New file.
299 * pdp11-opc.c: New file.
300
42dc96ca
JW
3012001-02-14 Jim Wilson <[email protected]>
302
303 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
304 * ia64-asmtab.c: Regenerate.
305
76f227a5
JH
306Mon Feb 12 17:41:26 CET 2001 Jan Hubicka <[email protected]>
307
308 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
309 instructions.
310 (putop): Handle 'Y'
311
9117d219
NC
3122001-02-11 Maciej W. Rozycki <[email protected]>
313
314 * mips-dis.c (print_insn_arg): Use top four bits of the address of
315 the following instruction not of the jump itself for the jump
316 target.
317 (print_mips16_insn_arg): Likewise.
318
847ee773
MS
3192001-02-11 Michael Sokolov <[email protected]>
320
321 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
322 directory.
323 * Makefile.in: Regenerate.
324
a85d7ed0
NC
3252001-02-09 Schwidefsky <[email protected]>
326
327 * Makefile.am: Add linux target for S/390.
328 * Makefile.in: Likewise.
329 * configure.in: Likewise.
330 * disassemble.c: Likewise.
331 * s390-dis.c: New file.
332 * s390-mkopc.c: New file.
333 * s390-opc.c: New file.
334 * s390-opc.txt: New file.
335
e5943035
JW
3362001-02-05 Jim Wilson <[email protected]>
337
338 * ia64-asmtab.c: Revert 2000-12-16 change.
339
0715dc88
PM
3402001-02-02 Patrick Macdonald <[email protected]>
341
c2419411 342 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88
PM
343 * m32r-desc.h: Regenerate.
344
90530880
JH
345Thu Feb 1 16:29:06 MET 2001 Jan Hubicka <[email protected]>
346
76f227a5 347 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop
90530880
JH
348 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
349
1328dc98
AM
3502001-01-14 Alan Modra <[email protected]>
351
352 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
353
b7ed8fad
NC
3542001-01-13 Nick Clifton <[email protected]>
355
356 * disassemble.c: Remove spurious white space.
357
e2914f48
JH
358Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <[email protected]>
359
360 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
361 templates.
362
0d2bcfaf
NC
3632001-01-11 Peter Targett <[email protected]>
364
365 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
366 * Makefile.am (C_FILES): Add arc-ext.c.
367 (ALL_MACHINES) Add arc-ext.lo.
368 (INCLUDES) Add opcode directory to list.
369 New dependency entry for arc-ext.lo.
370 * disassemble.c (disassembler): Correct call to
371 arc_get_disassembler.
372 * arc-opc.c: New update for ARC, including full base
373 instructions for ARC variants.
374 * arc-dis.h, arc-dis.c: New update for ARC, including
375 extensibility functionality.
376 * arc-ext.h, arc-ext.c: New files for handling extensibility.
377
3782001-01-10 Jan Hubicka <[email protected]>
041bd2e0
JH
379
380 * i386-dis.c (PREGRP15 - PREGRP24): New.
381 (dis386_twobyt): Add SSE2 instructions.
382 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
383 (twobyte_uses_f3_prefix): ... this one.
384 (grps): Add SSE instructions.
385 (prefix_user_table): Add two new slots; add SSE2 instructions.
386 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
387 Handle the REPNZ and Data16 prefixes as well; do proper lookup
388 to prefix_user_table.
389 (OP_E): Accept mfence and lfence as well.
390 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
391 (OP_XMM): Support REX extensions.
392 (OP_EM): Likewise.
393 (OP_EX): Likewise.
394
6a56ec7e
NC
3952001-01-09 Nick Clifton <[email protected]>
396
397 * arm-dis.c (print_insn): Set pc to zero for instructions with
398 a reloc associated with them.
399
4a9f416d
JJ
4002001-01-09 Jeff Johnston <[email protected]>
401
402 * cgen-asm.in (parse_insn_normal): Changed syn to be
403 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
404 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
405 to '\0' to use 0 instead.
406 * cgen-dis.in (print_insn_normal): Ditto.
407 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
408
0d2bcfaf 4092001-01-05 Jan Hubicka <[email protected]>
52b15da3
JH
410
411 * i386-dis.c: Add x86_64 support.
412 (rex): New static variable.
413 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
414 (USED_REX): New macro.
415 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
416 (OP_I64, OP_OFF64, OP_IMREG): New functions.
417 (OP_REG, OP_OFF): Declare.
418 (get64, get32, get32s): New functions.
419 (r??_reg): New constants.
420 (dis386_att): Change templates of instruction implicitly promoted
421 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
422 (grps): Likewise.
423 (dis386_intel): Likewise.
424 (dixx86_64_att): New table based on dis386_att.
425 (dixx86_64_intel): New table based on dis386_intel.
426 (names64, names8rex): New global variable.
427 (names32, names16): Add extended registers.
428 (prefix_user_t): Recognize rex prefixes.
429 (prefix_name): Print REX prefixes nicely.
430 (op_riprel): New global variable.
431 (start_pc): Set type to bfd_vma.
432 (print_insn_i386): Detect the 64bit mode and use proper table;
433 move ckprefix after initializing the buffer; output unused rex prefixes;
434 output information about target of RIP relative addresses.
435 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
436 (print_operand_value): New function.
437 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
438 REX prefix and new modes.
439 (get64, get32s): New.
440 (get32): Return bfd_signed_vma type.
441 (set_op): Initialize the op_riprel.
442 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
443
7e30bc36
FCE
4442001-01-03 Richard Sandiford <[email protected]>
445
446 cgen-dis.in (read_insn): Use bfd_get_bits()
447
aed80dae
FCE
4482001-01-02 Richard Sandiford <[email protected]>
449
450 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
451 (hash_insn_list): Likewise
452 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
453 (extract_1): Use bfd_get_bits().
454 (extract_normal): Apply sign extension to both extraction
455 methods.
456 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
457 (cgen_put_insn_value): Use bfd_put_bits()
458
149fe25e
FCE
4592000-12-28 Frank Ch. Eigler <[email protected]>
460
461 * cgen-asm.in (parse_insn_normal): Print better error message for
462 instructions with missing operands.
463
a6cff3e3
NC
4642000-12-21 Santeri Paavolainen <[email protected]>
465
466 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
467
09919455
NC
4682000-12-16 Nick Clifton <[email protected]>
469
470 * Makefile.in: Regenerate.
471 * aclocal.m4: Regenerate.
472 * config.in: Regenerate.
473 * configure.in: Add spacing.
474 * configure: Regenerate.
475 * ia64-asmtab.c: Regenerate.
476 * po/opcodes.pot: Regenerate.
477
606d55bc
FCE
4782000-12-12 Frank Ch. Eigler <[email protected]>
479
480 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
481 error messages over later parse-time ones.
482
514829c3
JW
4832000-12-12 Jim Wilson <[email protected]>
484
485 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
486 argument.
060d22b0 487 * ia64-gen.c (insert_deplist): Cast sizeof result to int.
514829c3
JW
488 (print_dependency_table): Print NULL if semantics field not set.
489 (insert_opcode_dependencies): Mark cmp parameter as unused.
490 (print_main_table): Use fprintf_vma to print long long fields.
491 (main): Mark argv paramter as unused. Convert to old style definition.
492 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
493 * ia64-asmtab.c: Regnerate.
494
708b8a71
NC
4952000-12-09 Nick Clifton <[email protected]>
496
54faae25
NC
497 * m32r-dis.c (print_insn): Prevent re-read of instruction from
498 wrong address.
499
708b8a71
NC
500 * fr30-dis.c: Regenerate.
501
54faae25
NC
5022000-12-08 Peter Targett <[email protected]>
503
504 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
505 * Makefile.am (C_FILES): Add arc-ext.c.
506 (ALL_MACHINES) Add arc-ext.lo.
507 (INCLUDES) Add opcode directory to list.
508 New dependency entry for arc-ext.lo.
509 * disassemble.c (disassembler): Correct call to
510 arc_get_disassembler.
511 * arc-opc.c: New update for ARC, including full base
512 instructions for ARC variants.
513 * arc-dis.h, arc-dis.c: New update for ARC, including
514 extensibility functionality.
515 * arc-ext.h, arc-ext.c: New files for handling extensibility.
516
08fe7a7e
NC
5172000-12-03 Chris Demetriou [email protected]
518
519 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
520 MOD_HILO, and MOD_LO macros.
521
15305553
NC
522 * mips-opc.c (M1, M2): Delete.
523 (mips_builtin_opcodes): Remove all uses of M1.
524
0808b8a9
NC
525 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
526 instructions take "G" format second operands and use the
527 correct flags.
528 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
529 match.
530 Delete "sel" code operands from mfc1 and mtc1.
531 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
532 for dm[ft]c[023].
c2419411 533
e70f2590
NC
5342000-12-03 Ed Satterthwaite [email protected] and
535 Chris Demetriou [email protected]
536
537 * mips-opc.c (mips_builtin_opcodes): Finish additions
538 for MIPS32 support, and clean up existing entries for
539 aesthetics, consistency with the MIPS32 ISA, and
540 with consistency the rest of the table.
541
b23da31b
NC
5422000-12-01 Nick Clifton <[email protected]>
543
544 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
545 field.
546
4372b673
NC
5472000-12-01 Chris Demetriou <[email protected]>
548
549 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
550 specifiers. Update 'B' for new constant names, and remove
551 'm'.
552 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
553 near the top of the array, so they are disassembled properly.
554 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
555 code for MIPS32. Update "clo" and "clz" to use 'U' operand
556 specifier. Add 'H' format specifier variants for "mfc1,"
557 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
558 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
559 "wait" variant which uses 'J' operand specifier.
c2419411 560
e7af610e
NC
561 * mips-dis.c (set_mips_isa_type): Update to use
562 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
563 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
564 * mips-opc.c (I32): New constant for instructions added in
565 MIPS32.
566 (P4): Delete.
567 (mips_builtin_opcodes) Replace all uses of P4 with I32.
568
84ea6cf2
NC
569 * mips-dis.c (set_mips_isa_type): Add cases for
570 bfd_mach_mips5 and bfd_mach_mips64.
571 * mips-opc.c (I64): New definitions.
572
c6c98b38
NC
573 * mips-dis.c (set_mips_isa_type): Add case for
574 bfd_mach_mips_sb1.
575
caaaf822
HPN
5762000-11-28 Hans-Peter Nilsson <[email protected]>
577
578 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
579 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
580 Initialize variable dc to NULL.
581 (print_insn_shx): Remove unused label d_reg_n.
582
077b8428
NC
5832000-11-24 Nick Clifton <[email protected]>
584
585 * arm-opc.h: Add new opcode formatting parameter 'B'.
586 (arm_opcodes): Add XScale, v5, and v5te instructions.
587 (thumb_opcodes): Add v5t instructions.
588
589 * arm-dis.c (print_insn_arm): Handle new 'B' format
590 parameter.
591 (print_insn_thumb): Decode BLX(1) instruction.
592
657e7cec
CD
5932000-11-21 Chris Demetriou <[email protected]>
594
595 * mips-opc.c: Fix file header comment.
596
b6b0b32c
HPN
5972000-11-14 Hans-Peter Nilsson <[email protected]>
598
599 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
600 print_insn_cris_with_register_prefix.
601
54a4ca2e
AO
6022000-11-11 Alexandre Oliva <[email protected]>
603
604 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
605
025d2eab 6062000-11-07 Matthew Green <[email protected]>
1ffd7d02
DB
607
608 * cgen-dis.in (print_insn): All insns which can fit into insn_value
609 must be loaded there in their entirety.
610
19f7b010
JJ
6112000-10-20 Jakub Jelinek <[email protected]>
612
613 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
614 (compute_arch_mask): Add v8plusb and v9b machines.
615 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
060d22b0 616 * sparc-opc.c: Support for Cheetah instruction set.
19f7b010
JJ
617 (prefetch_table): Add #invalidate.
618
710c2d97
NC
6192000-10-16 Nick Clifton <[email protected]>
620
621 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
622
f40c3ea3
DB
6232000-10-06 Dave Brolley <[email protected]>
624
625 * fr30-desc.h: Regenerate.
626 * m32r-desc.h: Regenerate.
627 * m32r-ibld.c: Regenerate.
628
0d2bcfaf 6292000-10-05 Jim Wilson <[email protected]>
afa680f8
JW
630
631 * ia64-ic.tbl: Update from Intel.
632 * ia64-asmtab.c: Regenerate.
c2419411 633
d1e28e24
KH
6342000-10-04 Kazu Hirata <[email protected]>
635
636 * ia64-gen.c: Convert C++-style comments to C-style comments.
637 * tic54x-dis.c: Likewise.
638
b4db717d 6392000-09-29 Hans-Peter Nilsson <[email protected]>
78966507
HPN
640
641 Changes to add dollar prefix to registers for files where user symbols
642 don't have a leading underscore. Fix formatting.
643 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
644 (format_reg): Add parameter with_reg_prefix. All callers changed.
645 (print_with_operands): Ditto.
646 (print_insn_cris_generic): Renamed from print_insn_cris, add
647 parameter with_reg_prefix.
648 (print_insn_cris_with_register_prefix,
649 print_insn_cris_without_register_prefix, cris_get_disassembler):
650 New.
651 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
652
0d2bcfaf 6532000-09-22 Jim Wilson <[email protected]>
139368c9 654
d48ad4f3
JW
655 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
656 gt, ge, ngt, and nge.
657 * ia64-asmtab.c: Regenerate.
658
139368c9
JW
659 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
660 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
661 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
662 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
663 * ia64-asmtab.c: Regnerate.
664
156c2f8b 6652000-09-13 Anders Norlander <[email protected]>
c2419411
AJ
666
667 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
668 Add mfc0 and mtc0 with sub-selection values.
156c2f8b 669 Add clo and clz opcodes.
c2419411
AJ
670 Add msub and msubu instructions for MIPS32.
671 Add madd/maddu aliases for mad/madu for MIPS32.
672 Support wait, deret, eret, movn, pref for MIPS32.
156c2f8b 673 Support tlbp, tlbr, tlbwi, tlbwr.
c2419411
AJ
674 (P4): New define.
675
676 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
677 (print_insn_arg): Handle 'H' args.
678 (set_mips_isa_type): Recognize 4K.
156c2f8b
NC
679 Use CPU_* defines instead of hardcoded numbers.
680
de827f51
CM
6812000-09-11 Catherine Moore <[email protected]>
682
683 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
684 (d30v_format_tab): Use Rb2 for modinc and moddec.
c2419411 685
ea2aae66 6862000-09-07 Catherine Moore <[email protected]>
c2419411 687
ea2aae66
CM
688 * d30v-opc.c (d30v_format_tab): Use format Ra for
689 modinc and moddec.
690
90f2472a
AO
6912000-09-06 Alexandre Oliva <[email protected]>
692
693 * configure: Rebuilt with new libtool.m4.
694
5b343f5a
NC
6952000-09-05 Nick Clifton <[email protected]>
696
697 * configure: Regenerate.
698 * po/opcodes.pot: Regenerate.
c2419411 699
ac48eca1
AO
7002000-08-31 Alexandre Oliva <[email protected]>
701
702 * acinclude.m4: Include libtool and gettext macros from the
703 top level.
704 * aclocal.m4, configure: Rebuilt.
705
c6d805e0
KH
7062000-08-30 Kazu Hirata <[email protected]>
707
708 * tic80-dis.c: Fix formatting.
709
7d352fc8
KH
7102000-08-29 Kazu Hirata <[email protected]>
711
712 * w65-dis.c: Fix formatting.
713
a47cf567
NC
7142000-08-28 Mark Hatle <[email protected]>
715
716 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
717 (powerpc_opcodes): Add table entries for PPC 405 instructions.
718 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
719 instructions. Added extended mnemonic mftbl as defined in the
720 405GP manual for all PPCs.
721
0d2bcfaf 7222000-08-28 Jim Wilson <[email protected]>
f9365b11
JW
723
724 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
725 call. Change last goto to use failed instead of done.
726
6bb95a0f
DB
7272000-08-28 Dave Brolley <[email protected]>
728
729 * cgen-ibld.in (cgen_put_insn_int_value): New function.
730 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
731 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
732 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
733 * cgen-dis.in (read_insn): New static function.
734 (print_insn): Use read_insn to read the insn into the buffer and set
735 up for disassembly.
736 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
737 in the buffer.
738 * fr30-asm.c: Regenerated.
739 * fr30-desc.c: Regenerated.
060d22b0 740 * fr30-desc.h: Regenerated.
6bb95a0f
DB
741 * fr30-dis.c: Regenerated.
742 * fr30-ibld.c: Regenerated.
743 * fr30-opc.c: Regenerated.
060d22b0 744 * fr30-opc.h: Regenerated.
6bb95a0f
DB
745 * m32r-asm.c: Regenerated.
746 * m32r-desc.c: Regenerated.
060d22b0 747 * m32r-desc.h: Regenerated.
6bb95a0f
DB
748 * m32r-dis.c: Regenerated.
749 * m32r-ibld.c: Regenerated.
750 * m32r-opc.c: Regenerated.
751
bf830eae
KH
7522000-08-28 Kazu Hirata <[email protected]>
753
754 * tic30-dis.c: Fix formatting.
755
69eb4bbf
KH
7562000-08-27 Kazu Hirata <[email protected]>
757
758 * sh-dis.c: Fix formatting.
759
f509565f
GK
7602000-08-24 David Edelsohn <[email protected]>
761
762 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
763
5c90f90d
KH
7642000-08-24 Kazu Hirata <[email protected]>
765
766 * z8k-dis.c: Fix formatting.
767
0d2bcfaf 7682000-08-16 Jim Wilson <[email protected]>
50b81f19
JW
769
770 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
771 break, mov-immediate, nop.
772 * ia64-opc-f.c: Delete fpsub instructions.
773 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
774 address operand. Rewrite using macros to avoid long lines.
775 * ia64-opc.h (POSTINC): Define.
776 * ia64-asmtab.c: Regenerate.
777
0d2bcfaf 7782000-08-15 Jim Wilson <[email protected]>
19ba6717
JW
779
780 * ia64-ic.tbl: Add missing entries.
781
0d2bcfaf 7822000-08-08 Jason Eckhardt <[email protected]>
a5bc3299
JE
783
784 * i860-dis.c (print_br_address): Change third argument from int
785 to long.
786
0d2bcfaf 7872000-08-07 Richard Henderson <[email protected]>
0228082a
RH
788
789 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
790 for MLI templates. Handle IA64_OPND_TGT64.
791
a47cf567
NC
7922000-08-04 Ben Elliston <[email protected]>
793
794 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
795 * cgen.sh: Likewise.
796
0d2bcfaf 7972000-08-02 Jim Wilson <[email protected]>
c2419411 798
a47cf567
NC
799 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
800
463f102c
DC
8012000-07-29 Marek Michalkiewicz <[email protected]>
802
803 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
804 Change return type from void to int. Check the combination
805 of operands, return 1 if valid. Fix to avoid BUF overflow.
806 Report undefined combinations of operands in COMMENT.
807 Report internal errors to stderr. Output the adiw/sbiw
808 constant operand in both decimal and hex.
809 (print_insn_avr): Disassemble ldd/std with displacement of 0
810 as ld/st. Check avr_operand () return value, handle invalid
811 combinations of operands like unknown opcodes.
812
6e31aea3
BE
8132000-07-28 Ben Elliston <[email protected]>
814
815 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
816 (run-cgen, stamp-m32r, stamp-fr30): New targets.
817 * Makefile.in: Regenerate.
818 * configure.in: Add --enable-cgen-maint option.
819 * configure: Regenerate.
820
dc62a253
NC
8212000-07-26 Dave Brolley <[email protected]>
822
823 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
824 (cgen_hw_lookup_by_num): Ditto.
825 (cgen_operand_lookup_by_name): Ditto.
826 (print_address): Ditto.
827 (print_keyword): Ditto.
828 * cgen-dis.c (hash_insn_array): Mark unused parameters with
829 ATTRIBUTE_UNUSED.
830 * cgen-asm.c (hash_insn_array): Mark unused parameters with
831 ATTRIBUTE_UNUSED.
832 (cgen_parse_keyword): Ditto.
833
0d2bcfaf 8342000-07-22 Jason Eckhardt <[email protected]>
cdac37f6
JE
835
836 * i860-dis.c: New file.
837 (print_insn_i860): New function.
838 (print_br_address): New function.
839 (sign_extend): New function.
840 (BITWISE_OP): New macro.
841 (I860_REG_PREFIX): New macro.
842 (grnames, frnames, crnames): New structures.
843
844 * disassemble.c (ARCH_i860): Define.
845 (disassembler): Add check for bfd_arch_i860 to set disassemble
846 function to print_insn_i860.
847
848 * Makefile.in (CFILES): Added i860-dis.c.
849 (ALL_MACHINES): Added i860-dis.lo.
850 (i860-dis.lo): New dependences.
851
852 * configure.in: New bits for bfd_i860_arch.
853
854 * configure: Regenerated.
855
6c95a37f
HPN
8562000-07-20 Hans-Peter Nilsson <[email protected]>
857
858 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
859 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
860 (cris-dis.lo, cris-opc.lo): New rules.
861 * Makefile.in: Rebuild.
862 * configure.in (bfd_cris_arch): New target.
863 * configure: Rebuild.
864 * disassemble.c (ARCH_cris): Define.
865 (disassembler): Support ARCH_cris.
866 * cris-dis.c, cris-opc.c: New files.
867 * po/POTFILES.in, po/opcodes.pot: Regenerate.
868
09ab35c7
JJ
8692000-07-11 Jakub Jelinek <[email protected]>
870
871 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
872 Reported by Bill Clarke <[email protected]>.
873
0d2bcfaf 8742000-07-09 Geoffrey Keating <[email protected]>
1da5001c
GK
875
876 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
877 Patch by Randall J Fisher <[email protected]>.
878
6e09abd4
AM
8792000-07-09 Alan Modra <[email protected]>
880
881 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
882 fput_const, extract_3, extract_5_load, extract_5_store,
883 extract_5r_store, extract_5R_store, extract_10U_store,
884 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
885 extract_12, extract_17, extract_22): Prototype.
886 (print_insn_hppa): Rename inner block opcode -> opc to avoid
887 shadowing outer block.
888 (GET_BIT): Define.
889
90821790 8902000-07-05 DJ Delorie <[email protected]>
302ab118
DD
891
892 * MAINTAINERS: new
893
6eeeb4b4
AO
8942000-07-04 Alexandre Oliva <[email protected]>
895
896 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
897
00d2865b
NC
8982000-07-03 Marek Michalkiewicz <[email protected]>
899
900 * avr-dis.c (avr_operand): Change _ () to _() around all strings
901 marked for translation (exception from the usual coding style).
902 (print_insn_avr): Initialize insn2 to avoid warnings.
903
c07ab2ec
NC
9042000-07-03 Kazu Hirata <[email protected]>
905
906 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
907 * h8500-dis.c: Fix formatting.
908
0bdaf48b
AM
9092000-07-01 Alan Modra <[email protected]>
910
911 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
912 (CLEANFILES): Add DEPA.
913 * Makefile.in: Regenerate.
914
7c03c75e
SB
9152000-06-26 Scott Bambrough <[email protected]>
916
917 * arm-dis.c (regnames): Add an additional register set to match
918 the set used by GCC. Make it the default.
919
1581f8c9
AM
9202000-06-22 Alan Modra <[email protected]>
921
922 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
923 find one.
924 * Makefile.in: Regenerate.
925
bbeb2e03
L
9262000-06-20 H.J. Lu <[email protected]>
927
928 * Makefile.am: Rebuild dependency.
929 * Makefile.in: Rebuild.
9b443040
NC
930
9312000-06-18 Stephane Carrez <[email protected]>
932
933 * Makefile.in, configure: regenerate
c2419411 934 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
9b443040 935 ARCH_m68hc11.
c2419411 936 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
9b443040
NC
937 New functions.
938 * configure.in: Recognize m68hc12 and m68hc11.
939 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
c2419411 940 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
9b443040 941 and opcode generation for m68hc11 and m68hc12.
bbeb2e03 942
39c20e8f
ND
9432000-06-16 Nick Duffek <[email protected]>
944
945 * disassemble.c (disassembler): Refer to the PowerPC 620 using
946 bfd_mach_ppc_620 instead of 620.
947
53d388d1
JL
9482000-06-12 Kazu Hirata <[email protected]>
949
950 * h8300-dis.c: Fix formatting.
951 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
952 correctly.
953
0d2bcfaf 9542000-06-09 Denis Chertykov <[email protected]>
8776c5fe
DC
955
956 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
957
0d2bcfaf 9582000-06-07 Denis Chertykov <[email protected]>
bab84c47
DC
959
960 * avr-dis.c: completely rewritten.
961
79540e26 9622000-06-02 Kazu Hirata <[email protected]>
5fec0fc5
NC
963
964 * h8300-dis.c: Follow the GNU coding style.
965 (bfd_h8_disassemble) Fix a typo.
5fec0fc5 966
3903e627
NC
9672000-06-01 Kazu Hirata <[email protected]>
968
969 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
970 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
971 correctly. Fix a typo.
972
0d2bcfaf 9732000-05-31 Nick Clifton <[email protected]>
c0ae4ccc
NC
974
975 * opintl.h (_(String)): Explain why dgettext is used instead of
976 gettext.
977
0d2bcfaf 9782000-05-30 Nick Clifton <[email protected]>
c1485d85
NC
979
980 * opintl.h (gettext, dgettext, dcgettext, textdomain,
981 bindtextdomain): Replace defines with those from intl/libgettext.h
982 to quieten gcc warnings.
983
2114f57b
AM
9842000-05-26 Alan Modra <[email protected]>
985
986 * Makefile.am: Update dependencies with "make dep-am"
987 * Makefile.in: Regenerate.
988
0d2bcfaf 9892000-05-25 Alexandre Oliva <[email protected]>
d6062282
AO
990
991 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
992 sign-extending operands.
993
0d2bcfaf 9942000-05-15 Donald Lindsay <[email protected]>
344fc69a
DL
995
996 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
997 except brf's.
998
0d2bcfaf 9992000-05-21 Nick Clifton <[email protected]>
6c298591
NC
1000
1001 * Makefile.am (LIBIBERTY): Define.
1002
0d2bcfaf 10032000-05-19 Diego Novillo <[email protected]>
fb48caed
DN
1004
1005 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
1006 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
1007 (reg_names): Rename to std_reg_names. Change it to a char **
1008 static variable.
1009 (std_reg_names): New name for reg_names.
1010 (set_mips_isa_type): Set reg_names to point to std_reg_names by
1011 default.
1012
f660ee8b
FCE
10132000-05-16 Frank Ch. Eigler <[email protected]>
1014
1015 * fr30-desc.h: Partially regenerated to account for changed
1016 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
1017 * m32r-desc.h: Ditto.
1018
0d2bcfaf 10192000-05-15 Nick Clifton <[email protected]>
322f2c45
NC
1020
1021 * arm-opc.h: Use upper case for flasg in MSR and MRS
1022 instructions. Allow any bit to be set in the field_mask of
1023 the MSR instruction.
1024
1025 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
1026 field_mask of an MSR instruction.
1027
60fc8cba
NC
10282000-05-11 Thomas de Lellis <[email protected]>
1029
060d22b0 1030 * arm-opc.h: Disassembly of thumb ldsb/ldsh
79540e26
AM
1031 instructions changed to ldrsb/ldrsh.
1032
73da6b6b
AM
10332000-05-11 Ulf Carlsson <[email protected]>
1034
1035 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
1036 target addresses for 'jal' and 'j'.
1037
0d2bcfaf 10382000-05-10 Geoff Keating <[email protected]>
d2f75a6f
GK
1039
1040 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
1041 also available in common mode when powerpc syntax is being used.
1042
821011cc
AM
10432000-05-08 Alan Modra <[email protected]>
1044
1045 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
1046 (dummy_print_address): Ditto.
1047
0d2bcfaf 10482000-05-04 Timothy Wall <[email protected]>
5c84d377
TW
1049
1050 * tic54x-opc.c: New.
1051 * tic54x-dis.c: New.
1052 * disassemble.c (disassembler): Add ARCH_tic54x.
1053 * configure.in: Added tic54x target.
1054 * configure: Ditto.
1055 * Makefile.am: Add tic54x dependencies.
79540e26 1056 * Makefile.in: Ditto.
5c84d377 1057
786e2c0f
C
10582000-05-03 J.T. Conklin <[email protected]>
1059
1060 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
79540e26 1061 vector unit operands.
786e2c0f
C
1062 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
1063 unit instruction formats.
1064 (PPCVEC): New macro, mask for vector instructions.
1065 (powerpc_operands): Add table entries for above operand types.
1066 (powerpc_opcodes): Add table entries for vector instructions.
1067
1068 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
1069 (print_insn_little_powerpc): Likewise.
1070 (print_insn_powerpc): Prepend 'v' when printing vector registers.
1071
0d2bcfaf 10722000-04-24 Clinton Popetz <[email protected]>
a47cf567
NC
1073
1074 * configure.in: Add bfd_powerpc_64_arch.
1075 * disassemble.c (disassembler): Use print_insn_big_powerpc for
1076 64 bit code.
1077
0d2bcfaf 10782000-04-24 Nick Clifton <[email protected]>
a47cf567
NC
1079
1080 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
1081 field.
1082
0d2bcfaf 10832000-04-23 Denis Chertykov <[email protected]>
3c504221
DC
1084
1085 * avr-dis.c (reg_fmul_d): New. Extract destination register from
1086 FMUL instruction.
1087 (reg_fmul_r): New. Extract source register from FMUL instruction.
1088 (reg_muls_d): New. Extract destination register from MULS instruction.
1089 (reg_muls_r): New. Extract source register from MULS instruction.
1090 (reg_movw_d): New. Extract destination register from MOVW instruction.
1091 (reg_movw_r): New. Extract source register from MOVW instruction.
1092 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
1093 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
1094
0d2bcfaf 10952000-04-22 Timothy Wall <[email protected]>
aa170a07
TW
1096
1097 * ia64-gen.c (general): Add an ordered table of primary
1098 opcode names, as well as priority fields to disassembly data
1099 structures to enforce a preferred disassembly format based on the
1100 ordering of the opcode tables.
1101 (load_insn_classes): Show a useful message if IC tables are missing.
1102 (load_depfile): Ditto.
1103 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
1104 distinguish preferred disassembly.
1105 * ia64-opc-f.c: Reorder some insn for preferred disassembly
1106 format. Fix incorrect flag on fma.s/fma.s.s0.
1107 * ia64-opc.c: Scan *all* disassembly matches and use the one with
1108 the highest priority.
1109 * ia64-opc-b.c: Use more abbreviations.
1110 * ia64-asmtab.c: Regenerate.
79540e26 1111
0d2bcfaf 11122000-04-21 Jason Eckhardt <[email protected]>
91b1cc5d
JL
1113
1114 * hppa-dis.c (extract_16): New function.
1115 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
1116 new operand types l,y,&,fe,fE,fx.
1117
0d2bcfaf
NC
11182000-04-21 Richard Henderson <[email protected]>
1119 David Mosberger <[email protected]>
1120 Timothy Wall <[email protected]>
1121 Bob Manson <[email protected]>
1122 Jim Wilson <[email protected]>
800eeca4
JW
1123
1124 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
1125 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
1126 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
1127 ia64-asmtab.c.
1128 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
1129 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
1130 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
1131 * Makefile.in: Rebuild.
1132 * configure Rebuild.
1133 * configure.in (bfd_ia64_arch): New target.
1134 * disassemble.c (ARCH_ia64): Define.
1135 (disassembler): Support ARCH_ia64.
1136 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
1137 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
1138 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
060d22b0 1139 ia64-war.tbl, ia64-waw.tbl: New files.
79540e26 1140
0d2bcfaf 11412000-04-20 Alexandre Oliva <[email protected]>
4d85706b
AO
1142
1143 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
1144 (disassemble): Use them.
1145
0d8dfecf
AM
11462000-04-14 Alan Modra <[email protected]>
1147
1148 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
1149 * Makefile.am: Update dependencies.
1150 * Makefile.in: Regenerate.
1151
11522000-04-14 Michael Sokolov <[email protected]>
1153
1154 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
1155 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
1156 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
1157 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
1158 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
1159 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
1160 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
1161 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
1162 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
1163 ansidecl.h as sysdep.h includes it.
1164
0d2bcfaf 11652000-04-7 Andrew Cagney <[email protected]>
79540e26 1166
a2d91340 1167 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
79540e26 1168 --enable-build-warnings option.
a2d91340
AC
1169 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
1170 * Makefile.in, configure: Re-generate.
1171
0d2bcfaf 11722000-04-05 J"orn Rennecke <[email protected]>
52ccafd0 1173
060d22b0 1174 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
52ccafd0
JR
1175 stc GBR,@-<REG_N> is available for arch_sh1_up.
1176 Group parallel processing insn with identical mnemonics together.
1177 Make three-operand psha / pshl come first.
1178
0d2bcfaf 11792000-04-05 J"orn Rennecke <[email protected]>
015551fc
JR
1180
1181 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
1182 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
1183 (sh_arg_type): Add A_PC.
1184 (sh_table): Update entries using immediates. Add repeat.
1185 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
1186 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
1187
41b49281
AM
11882000-04-04 Alan Modra <[email protected]>
1189
8ad3436c
AM
1190 * po/opcodes.pot: Regenerate.
1191
41b49281
AM
1192 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
1193 (DEP): Quote when passing vars to sub-make. Add warning message
1194 to end.
1195 (DEP1): Rewrite for "gcc -MM".
1196 (CLEANFILES): Add DEP2.
1197 Update dependencies.
1198 * Makefile.in: Regenerate.
1199
b77a133c
AM
12002000-04-03 Denis Chertykov <[email protected]>
1201
1202 * avr-dis.c: Syntax cleanup.
1203 (add0fff): Print the pc relative address as a signed number.
1204 (add03f8): Likewise.
1205
9aaaa291
ILT
12062000-04-01 Ian Lance Taylor <[email protected]>
1207
1208 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
1209 the parameter ATTRIBUTE_UNUSED.
1210 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
1211
0d2bcfaf 12122000-04-01 Alexandre Oliva <[email protected]>
5728a7d7
AO
1213
1214 * m10300-opc.c: SP-based offsets are always unsigned.
1215
67b60d92
NC
12162000-03-29 Thomas de Lellis <[email protected]>
1217
1218 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
1219 [branch always] instead of "undefined".
1220
0d2bcfaf 12212000-03-27 Nick Clifton <[email protected]>
ba23e138
NC
1222
1223 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
1224 short instructions, from end of list of long instructions.
1225
832ddf62
ILT
12262000-03-27 Ian Lance Taylor <[email protected]>
1227
1228 * Makefile.am (CFILES): Add avr-dis.c.
1229 (ALL_MACHINES): Add avr-dis.lo.
1230
adde6300
AM
12312000-03-27 Alan Modra <[email protected]>
1232
1233 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
1234 truncate integers.
1235 (print_insn_avr): Call function via pointer in K&R compatible way.
1236 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
1237 add0fff, add03f8): Convert to old style function declaration and
1238 add prototype.
1239 (avrdis_opcode): Add prototype.
1240
12412000-03-27 Denis Chertykov <[email protected]>
1242
1243 * avr-dis.c: New file. AVR disassembler.
1244 * configure.in (bfd_avr_arch): New architecture support.
1245 * disassemble.c: Likewise.
1246 * configure: Regenerate.
1247
0d2bcfaf 12482000-03-06 J"oern Rennecke <[email protected]>
05102e70
JR
1249
1250 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
1251
0d2bcfaf 12522000-03-02 J"orn Rennecke <[email protected]>
866afedc 1253
79540e26
AM
1254 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
1255 flag to determine if operand is pc-relative.
1256 * d30v-opc.c:
1257 (d30v_format_table):
1258 (REL6S3): Renamed from IMM6S3.
1259 Added flag OPERAND_PCREL.
1260 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
1261 added flag OPERAND_PCREL.
1262 (IMM12S3U): Replaced with REL12S3.
1263 (SHORT_D2, LONG_D): Delay target is pc-relative.
1264 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
1265 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
1266 using the REL* operands.
1267 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
1268 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
1269 LONG_Db, using REL* operands.
1270 (SHORT_U, SHORT_A5S): Removed stray alternatives.
1271 (d30v_opcode_table): Use new *r formats.
866afedc 1272
0d2bcfaf 12732000-02-28 Nick Clifton <[email protected]>
77343c58
NC
1274
1275 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
1276 'signed_overflow_ok_p'.
1277
e56f75e9
ILT
12782000-02-27 Eli Zaretskii <[email protected]>
1279
1280 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
1281 name of the libtool directory.
1282 * Makefile.in: Rebuild.
1283
0d2bcfaf 12842000-02-24 Nick Clifton <[email protected]>
fa7928ca
NC
1285
1286 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
1287 (cgen_clear_signed_overflow_ok): New function.
1288 (cgen_signed_overflow_ok_p): New function.
1289
0d2bcfaf 12902000-02-23 Andrew Haley <[email protected]>
cfcdbe97 1291
79540e26 1292 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
060d22b0 1293 m32r-ibld.c, m32r-opc.h: Rebuild.
cfcdbe97 1294
5b93d8bb
AM
12952000-02-23 Linas Vepstas <[email protected]>
1296
1297 * i370-dis.c, i370-opc.c: New.
1298
1299 * disassemble.c (ARCH_i370): Define.
1300 (disassembler): Handle it.
1301
1302 * Makefile.am: Add support for Linux/IBM 370.
1303 * configure.in: Likewise.
1304
1305 * Makefile.in: Regenerate.
1306 * configure: Likewise.
1307
0d2bcfaf 13082000-02-22 Chandra Chavva <[email protected]>
b669ceb9
CC
1309
1310 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
1311 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
1312 procedure.
1313
0d2bcfaf 13142000-02-22 Andrew Haley <[email protected]>
8027df89
AH
1315
1316 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
1317 force gp32 to zero.
1318 * mips-opc.c (G6): New define.
1319 (mips_builtin_op): Add "move" definition for -gp32.
1320
4db3857a
ILT
13212000-02-22 Ian Lance Taylor <[email protected]>
1322
1323 From Grant Erickson <[email protected]>:
1324 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
1325
f6af82bd
AM
13262000-02-21 Alan Modra <[email protected]>
1327
1328 * dis-buf.c (buffer_read_memory): Change `length' param and all int
1329 vars to unsigned.
1330
0d2bcfaf 13312000-02-17 J"orn Rennecke <[email protected]>
d4845d57
JR
1332
1333 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
1334 (print_insn_ppi): Likewise.
1335 (print_insn_shx): Use info->mach to select appropriate insn set.
1336 Add support for sh-dsp. Remove FD_REG_N support.
1337 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
1338 (sh_arg_type): Likewise. Remove FD_REG_N.
1339 (sh_dsp_reg_nums): New enum.
1340 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
1341 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
1342 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
1343 (arch_sh3_dsp_up): Likewise.
1344 (sh_opcode_info): New field: arch.
1345 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
1346 D_REG_N. Fill in arch field. Add sh-dsp insns.
1347
0d2bcfaf 13482000-02-14 Fernando Nasser <[email protected]>
a7f8487e
FN
1349
1350 * arm-dis.c: Change flavor name from atpcs-special to
1351 special-atpcs to prevent name conflict in gdb.
1352 (get_arm_regname_num_options, set_arm_regname_option,
1353 get_arm_regnames): New functions. API to access the several
1354 flavor of register names. Note: Used by gdb.
1355 (print_insn_thumb): Use the register name entry from the currently
1356 selected flavor for LR and PC.
1357
0d2bcfaf 13582000-02-10 Nick Clifton <[email protected]>
97ee9b94
NC
1359
1360 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
1361 classes.
1362 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
1363 "mulsh.h" instructions.
1364 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
1365 classes.
1366 (print_insn_mcore): Add support for little endian targets.
1367 Add support for MULSH and OPSR classes.
1368
0d2bcfaf 13692000-02-07 Nick Clifton <[email protected]>
a3d9c82d
NC
1370
1371 * arm-dis.c (parse_arm_diassembler_option): Rename again.
1372 Previous delat did not take.
1373
79540e26
AM
13742000-02-03 Timothy Wall <[email protected]>
1375
940b2b78
TW
1376 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
1377 to adjust target address bounds checking and calculate the
1378 appropriate octet offset into data.
79540e26 1379
94470b23
NC
13802000-01-27 Nick Clifton <[email protected]>
1381
6c082ed8
NC
1382 * arm-dis.c: (parse_disassembler_option): Rename to
1383 parse_arm_disassembler_option and allow to be exported.
1384
94470b23
NC
1385 * disassemble.c (disassembler_usage): New function: Print out any
1386 target specific disassembler options.
58efb6c0 1387 Call arm_disassembler_options() if the ARM architecture is being
79540e26 1388 supported.
58efb6c0
NC
1389
1390 * arm-dis.c (NUM_ELEM): Define this macro if not already
1391 defined.
1392 (arm_regname): New struct type for ARM register names.
1393 (arm_toggle_regnames): Delete.
1394 (parse_disassembler_option): Use register name structure.
1395 (print_insn): New function: Combines duplicate code found in
1396 print_insn_big_arm and print_insn_little_arm.
1397 (print_insn_big_arm): Call print_insn.
1398 (print_insn_little_arm): Call print_insn.
1399 (print_arm_disassembler_options): Display list of supported,
1400 ARM specific disassembler options.
79540e26 1401
2f0ca46a
NC
14022000-01-27 Thomas de Lellis <[email protected]>
1403
79540e26 1404 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
2f0ca46a 1405 ARM_STT_16BIT flag as Thumb code symbols.
79540e26
AM
1406
1407 * arm-dis.c (printf_insn_little_arm): Ditto.
2f0ca46a 1408
cb268829
NC
14092000-01-25 Thomas de Lellis <[email protected]>
1410
1411 * arm-dis.c (printf_insn_thumb): Prevent double dumping
79540e26 1412 of raw thumb instructions.
cb268829 1413
0d2bcfaf 14142000-01-20 Nick Clifton <[email protected]>
06b53c1b
NC
1415
1416 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
1417
01c7f630
NC
14182000-01-03 Nick Clifton <[email protected]>
1419
1420 * arm-dis.c (streq): New macro.
1421 (strneq): New macro.
1422 (force_thumb): ew local variable.
1423 (parse_disassembler_option): New function: Parse a single, ARM
1424 specific disassembler command line switch.
1425 (parse_disassembler_option): Call parse_disassembler_option to
1426 parse individual command line switches.
1427 (print_insn_big_arm): Check force_thumb.
1428 (print_insn_little_arm): Check force_thumb.
1429
2f6d2f85 1430For older changes see ChangeLog-9899
252b5132
RH
1431\f
1432Local Variables:
2f6d2f85
NC
1433mode: change-log
1434left-margin: 8
1435fill-column: 74
252b5132
RH
1436version-control: never
1437End:
This page took 0.405554 seconds and 4 git commands to generate.