3 * Copyright (C) 2012 Renesas Solutions Corp.
5 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_KZM_A9_GT
15 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
16 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
18 #include <asm/arch/rmobile.h>
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_DISPLAY_CPUINFO
22 #define CONFIG_DISPLAY_BOARDINFO
23 #define CONFIG_BOARD_EARLY_INIT_F
25 #define CONFIG_CMDLINE_TAG
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28 #define CONFIG_DOS_PARTITION
30 #define CONFIG_BAUDRATE 115200
31 #define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200"
33 #define CONFIG_VERSION_VARIABLE
34 #undef CONFIG_SHOW_BOOT_PROGRESS
37 #define KZM_SDRAM_BASE (0x40000000)
38 #define PHYS_SDRAM KZM_SDRAM_BASE
39 #define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
40 #define CONFIG_NR_DRAM_BANKS (1)
43 #define KZM_FLASH_BASE (0x00000000)
44 #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
45 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
46 #define CONFIG_SYS_MAX_FLASH_BANKS (1)
47 #define CONFIG_SYS_MAX_FLASH_SECT (512)
50 #define CONFIG_SYS_LONGHELP
51 #define CONFIG_SYS_CBSIZE 256
52 #define CONFIG_SYS_PBSIZE 256
53 #define CONFIG_SYS_MAXARGS 16
54 #define CONFIG_SYS_BARGSIZE 512
55 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
58 #define CONFIG_SCIF_CONSOLE
59 #define CONFIG_CONS_SCIF4
60 #undef CONFIG_SYS_CONSOLE_INFO_QUIET
61 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
62 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
64 #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
65 #define CONFIG_SYS_MEMTEST_END \
66 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
67 #undef CONFIG_SYS_ALT_MEMTEST
68 #undef CONFIG_SYS_MEMTEST_SCRATCH
69 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
71 #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
72 #define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
73 #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
74 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
75 CONFIG_SYS_INIT_RAM_SIZE - \
76 GENERATED_GBL_DATA_SIZE)
77 #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
78 #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
79 #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
80 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
82 #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
83 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
84 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
86 #define CONFIG_SYS_TEXT_BASE 0x00000000
87 #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
90 #define CONFIG_FLASH_CFI_DRIVER
91 #define CONFIG_SYS_FLASH_CFI
92 #undef CONFIG_SYS_FLASH_QUIET_TEST
93 #define CONFIG_SYS_FLASH_EMPTY_INFO
94 #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
95 #define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE
96 #define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE
97 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
99 /* Timeout for Flash erase operations (in ms) */
100 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
101 /* Timeout for Flash write operations (in ms) */
102 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
103 /* Timeout for Flash set sector lock bit operations (in ms) */
104 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
105 /* Timeout for Flash clear lock bit operations (in ms) */
106 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
108 #undef CONFIG_SYS_FLASH_PROTECTION
109 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
110 #define CONFIG_ENV_IS_IN_FLASH
113 #define CONFIG_SH_GPIO_PFC
116 #define CONFIG_GLOBAL_TIMER
117 #define CONFIG_SYS_CLK_FREQ (48000000)
118 #define CONFIG_SYS_CPU_CLK (1196000000)
119 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
120 #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
123 #define CONFIG_SMC911X
124 #define CONFIG_SMC911X_BASE (0x10000000)
125 #define CONFIG_SMC911X_32_BIT
126 #define CONFIG_NFS_TIMEOUT 10000UL
129 #define CONFIG_SYS_I2C
130 #define CONFIG_SYS_I2C_SH
131 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
132 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
133 #define CONFIG_SYS_I2C_SH_SPEED0 100000
134 #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
135 #define CONFIG_SYS_I2C_SH_SPEED1 100000
136 #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
137 #define CONFIG_SYS_I2C_SH_SPEED2 100000
138 #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
139 #define CONFIG_SYS_I2C_SH_SPEED3 100000
140 #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
141 #define CONFIG_SYS_I2C_SH_SPEED4 100000
142 #define CONFIG_SH_I2C_8BIT
143 #define CONFIG_SH_I2C_DATA_HIGH 4
144 #define CONFIG_SH_I2C_DATA_LOW 5
145 #define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
147 #endif /* __KZM9G_H */