4 * SPDX-License-Identifier: GPL-2.0+
8 * This file contains the configuration parameters for the VCT board
14 * vct_premium_onenand_small
17 * vct_platinum_onenand
18 * vct_platinum_onenand_small
20 * vct_platinumavc_small
21 * vct_platinumavc_onenand
22 * vct_platinumavc_onenand_small
28 #define CONFIG_DISPLAY_BOARDINFO
30 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
31 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
33 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
35 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
37 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
38 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
39 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
41 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
42 #define CONFIG_VCT_NOR
44 #define CONFIG_SYS_NO_FLASH
50 #ifdef CONFIG_VCT_PLATINUMAVC
51 #define UART_1_BASE 0xBDC30000
53 #define UART_1_BASE 0xBF89C000
56 #define CONFIG_SYS_NS16550_SERIAL
57 #define CONFIG_SYS_NS16550_REG_SIZE -4
58 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE
59 #define CONFIG_CONS_INDEX 1
60 #define CONFIG_SYS_NS16550_CLK 921600
61 #define CONFIG_BAUDRATE 115200
66 #define CONFIG_SYS_SDRAM_BASE 0x80000000
67 #define CONFIG_SYS_MBYTES_SDRAM 128
68 #define CONFIG_SYS_MEMTEST_START 0x80200000
69 #define CONFIG_SYS_MEMTEST_END 0x80400000
70 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
72 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
74 * SMSC91C11x Network Card
76 #define CONFIG_SMC911X
77 #define CONFIG_SMC911X_BASE 0x00000000
78 #define CONFIG_SMC911X_32_BIT
79 #define CONFIG_NET_RETRY_COUNT 20
85 #define CONFIG_CMD_EEPROM
88 * Only Premium/Platinum have ethernet support right now
90 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
91 !defined(CONFIG_VCT_SMALL_IMAGE)
95 * Only Premium/Platinum have USB-EHCI support right now
97 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
98 !defined(CONFIG_VCT_SMALL_IMAGE)
101 #if defined(CONFIG_CMD_USB)
102 #define CONFIG_DOS_PARTITION
103 #define CONFIG_ISO_PARTITION
105 #define CONFIG_SUPPORT_VFAT
110 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
111 #define CONFIG_USB_EHCI_VCT /* on VCT platform */
112 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
113 #define CONFIG_EHCI_DESC_BIG_ENDIAN
114 #define CONFIG_EHCI_IS_TDI
115 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
116 #endif /* CONFIG_CMD_USB */
118 #if defined(CONFIG_VCT_NAND)
119 #define CONFIG_CMD_NAND
122 #if defined(CONFIG_VCT_ONENAND)
123 #define CONFIG_CMD_ONENAND
129 #define CONFIG_BOOTP_BOOTFILESIZE
130 #define CONFIG_BOOTP_BOOTPATH
131 #define CONFIG_BOOTP_GATEWAY
132 #define CONFIG_BOOTP_HOSTNAME
133 #define CONFIG_BOOTP_SUBNETMASK
136 * Miscellaneous configurable options
138 #define CONFIG_SYS_LONGHELP /* undef to save memory */
139 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
141 sizeof(CONFIG_SYS_PROMPT) + 16)
142 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
143 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
144 #define CONFIG_CMDLINE_EDITING /* add command line history */
145 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
148 * FLASH and environment organization
150 #if defined(CONFIG_VCT_NOR)
151 #define CONFIG_ENV_IS_IN_FLASH
152 #define CONFIG_FLASH_NOT_MEM_MAPPED
155 * We need special accessor functions for the CFI FLASH driver. This
156 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
158 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
161 * For the non-memory-mapped NOR FLASH, we need to define the
162 * NOR FLASH area. This can't be detected via the addr2info()
163 * function, since we check for flash access in the very early
164 * U-Boot code, before the NOR FLASH is detected.
166 #define CONFIG_FLASH_BASE 0xb0000000
167 #define CONFIG_FLASH_END 0xbfffffff
170 * CFI driver settings
172 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
173 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
174 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
175 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
177 #define CONFIG_SYS_FLASH_BASE 0xb0000000
178 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
179 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
180 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
182 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
183 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
185 #ifdef CONFIG_ENV_IS_IN_FLASH
186 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
187 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
188 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
190 /* Address and size of Redundant Environment Sector */
191 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
192 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
193 #endif /* CONFIG_ENV_IS_IN_FLASH */
194 #endif /* CONFIG_VCT_NOR */
196 #if defined(CONFIG_VCT_ONENAND)
197 #define CONFIG_USE_ONENAND_BOARD_INIT
198 #define CONFIG_ENV_IS_IN_ONENAND
199 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
200 #define CONFIG_SYS_FLASH_BASE 0x00000000
201 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
202 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */
203 #endif /* CONFIG_VCT_ONENAND */
208 #define CONFIG_SYS_I2C
209 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
210 #define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
211 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
214 * Software (bit-bang) I2C driver configuration
216 #define CONFIG_SYS_GPIO_I2C_SCL 11
217 #define CONFIG_SYS_GPIO_I2C_SDA 10
220 int vct_gpio_dir(int pin, int dir);
221 void vct_gpio_set(int pin, int val);
222 int vct_gpio_get(int pin);
225 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
226 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
227 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
228 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
229 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
230 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
231 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
233 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
235 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
236 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
237 /* 32 byte page write mode using*/
238 /* last 5 bits of the address */
239 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
241 #define CONFIG_BOOTCOMMAND "run test3"
246 #if defined(CONFIG_VCT_ONENAND)
247 #define CONFIG_SYS_USE_UBI
248 #define CONFIG_CMD_JFFS2
249 #define CONFIG_RBTREE
250 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
251 #define CONFIG_MTD_PARTITIONS
252 #define CONFIG_CMD_MTDPARTS
254 #define MTDIDS_DEFAULT "onenand0=onenand"
255 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
262 * We need a small, stripped down image to fit into the first 128k OneNAND
263 * erase block (gzipped). This image only needs basic commands for FLASH
264 * (NOR/OneNAND) usage and Linux kernel booting.
266 #if defined(CONFIG_VCT_SMALL_IMAGE)
267 #undef CONFIG_CMD_BEDBUG
268 #undef CONFIG_CMD_EEPROM
269 #undef CONFIG_CMD_EEPROM
270 #undef CONFIG_CMD_IRQ
271 #undef CONFIG_CMD_LOADY
272 #undef CONFIG_CMD_REGINFO
273 #undef CONFIG_CMD_STRINGS
274 #undef CONFIG_CMD_TERMINAL
276 #undef CONFIG_SMC911X
277 #undef CONFIG_SYS_I2C_SOFT
279 #undef CONFIG_SYS_LONGHELP
280 #undef CONFIG_TIMESTAMP
281 #endif /* CONFIG_VCT_SMALL_IMAGE */
283 #endif /* __CONFIG_H */