drivers/timer/fttmr010_timer.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2009 Faraday Technology
   4  * Po-Yu Chuang <[email protected]>
   5  *
   6  * 23/08/2022 Port to DM
   7  */
   8 #include <dm.h>
   9 #include <log.h>
  10 #include <timer.h>
  11 #include <asm/io.h>
  12 #include <dm/ofnode.h>
  13 #include <faraday/fttmr010.h>
  14 #include <asm/global_data.h>
  15
  16 #define TIMER_LOAD_VAL  0xffffffff
  17
  18 struct fttmr010_timer_priv {
  19         struct fttmr010 __iomem *regs;
  20 };
  21
  22 static u64 fttmr010_timer_get_count(struct udevice *dev)
  23 {
  24         struct fttmr010_timer_priv *priv = dev_get_priv(dev);
  25         struct fttmr010 *tmr = priv->regs;
  26         u32 now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
  27
  28         /* increment tbu if tbl has rolled over */
  29         if (now < gd->arch.tbl)
  30                 gd->arch.tbu++;
  31         gd->arch.tbl = now;
  32
  33         return ((u64)gd->arch.tbu << 32) | gd->arch.tbl;
  34 }
  35
  36 static int fttmr010_timer_probe(struct udevice *dev)
  37 {
  38         struct fttmr010_timer_priv *priv = dev_get_priv(dev);
  39         struct fttmr010 *tmr;
  40         unsigned int cr;
  41
  42         priv->regs = dev_read_addr_ptr(dev);
  43         if (!priv->regs)
  44                 return -EINVAL;
  45         tmr = priv->regs;
  46
  47         debug("Faraday FTTMR010 timer revision 0x%08X\n", readl(&tmr->revision));
  48
  49         /* disable timers */
  50         writel(0, &tmr->cr);
  51
  52         /* setup timer */
  53         writel(TIMER_LOAD_VAL, &tmr->timer3_load);
  54         writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
  55         writel(0, &tmr->timer3_match1);
  56         writel(0, &tmr->timer3_match2);
  57
  58         /* we don't want timer to issue interrupts */
  59         writel(FTTMR010_TM3_MATCH1 |
  60                FTTMR010_TM3_MATCH2 |
  61                FTTMR010_TM3_OVERFLOW,
  62                &tmr->interrupt_mask);
  63
  64         cr = readl(&tmr->cr);
  65         cr |= FTTMR010_TM3_CLOCK;       /* use external clock */
  66         cr |= FTTMR010_TM3_ENABLE;
  67         writel(cr, &tmr->cr);
  68
  69         gd->arch.tbl = 0;
  70         gd->arch.tbu = 0;
  71
  72         return 0;
  73 }
  74
  75 static const struct timer_ops fttmr010_timer_ops = {
  76         .get_count = fttmr010_timer_get_count,
  77 };
  78
  79 static const struct udevice_id fttmr010_timer_ids[] = {
  80         { .compatible = "faraday,fttmr010-timer" },
  81         {}
  82 };
  83
  84 U_BOOT_DRIVER(fttmr010_timer) = {
  85         .name = "fttmr010_timer",
  86         .id = UCLASS_TIMER,
  87         .of_match = fttmr010_timer_ids,
  88         .priv_auto = sizeof(struct fttmr010_timer_priv),
  89         .probe = fttmr010_timer_probe,
  90         .ops = &fttmr010_timer_ops,
  91 };