drivers/pinctrl/pinctrl-zynqmp.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Xilinx pinctrl driver for ZynqMP
   4  *
   5  * Author(s):   Ashok Reddy Soma <[email protected]>
   6  *              Michal Simek <[email protected]>
   7  *
   8  * Copyright (C) 2021 Xilinx, Inc. All rights reserved.
   9  */
  10
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <zynqmp_firmware.h>
  15 #include <asm/arch/sys_proto.h>
  16 #include <asm/io.h>
  17 #include <dm/device_compat.h>
  18 #include <dm/pinctrl.h>
  19 #include <linux/compat.h>
  20 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
  21
  22 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN        12
  23 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN         12
  24 #define NUM_GROUPS_PER_RESP                     6
  25 #define NA_GROUP                                -1
  26 #define RESERVED_GROUP                          -2
  27 #define MAX_GROUP_PIN                           50
  28 #define MAX_PIN_GROUPS                          50
  29 #define MAX_GROUP_NAME_LEN                      32
  30 #define MAX_FUNC_NAME_LEN                       16
  31
  32 #define DRIVE_STRENGTH_2MA      2
  33 #define DRIVE_STRENGTH_4MA      4
  34 #define DRIVE_STRENGTH_8MA      8
  35 #define DRIVE_STRENGTH_12MA     12
  36
  37 /*
  38  * This driver works with very simple configuration that has the same name
  39  * for group and function. This way it is compatible with the Linux Kernel
  40  * driver.
  41  */
  42 struct zynqmp_pinctrl_priv {
  43         u32 npins;
  44         u32 nfuncs;
  45         u32 ngroups;
  46         struct zynqmp_pmux_function *funcs;
  47         struct zynqmp_pctrl_group *groups;
  48 };
  49
  50 /**
  51  * struct zynqmp_pinctrl_config - pinconfig parameters
  52  * @slew:               Slew rate slow or fast
  53  * @bias:               Bias enabled or disabled
  54  * @pull_ctrl:          Pull control pull up or pull down
  55  * @input_type:         CMOS or Schmitt
  56  * @drive_strength:     Drive strength 2mA/4mA/8mA/12mA
  57  * @volt_sts:           Voltage status 1.8V or 3.3V
  58  * @tri_state:          Tristate enabled or disabled
  59  *
  60  * This structure holds information about pin control config
  61  * option that can be set for each pin.
  62  */
  63 struct zynqmp_pinctrl_config {
  64         u32 slew;
  65         u32 bias;
  66         u32 pull_ctrl;
  67         u32 input_type;
  68         u32 drive_strength;
  69         u32 volt_sts;
  70         u32 tri_state;
  71 };
  72
  73 /**
  74  * enum zynqmp_pin_config_param - possible pin configuration parameters
  75  * @PIN_CFG_IOSTANDARD: if the pin can select an IO standard,
  76  *                              the argument to this parameter (on a
  77  *                              custom format) tells the driver which
  78  *                              alternative IO standard to use
  79  * @PIN_CONFIG_SCHMITTCMOS:     this parameter (on a custom format) allows
  80  *                              to select schmitt or cmos input for MIO pins
  81  */
  82 enum zynqmp_pin_config_param {
  83         PIN_CFG_IOSTANDARD = PIN_CONFIG_END + 1,
  84         PIN_CONFIG_SCHMITTCMOS,
  85 };
  86
  87 /**
  88  * struct zynqmp_pmux_function - a pinmux function
  89  * @name:       Name of the pinmux function
  90  * @groups:     List of pingroups for this function
  91  * @ngroups:    Number of entries in @groups
  92  *
  93  * This structure holds information about pin control function
  94  * and function group names supporting that function.
  95  */
  96 struct zynqmp_pmux_function {
  97         char name[MAX_FUNC_NAME_LEN];
  98         const char * const *groups;
  99         unsigned int ngroups;
 100 };
 101
 102 /**
 103  * struct zynqmp_pctrl_group - Pin control group info
 104  * @name:       Group name
 105  * @pins:       Group pin numbers
 106  * @npins:      Number of pins in group
 107  */
 108 struct zynqmp_pctrl_group {
 109         const char *name;
 110         unsigned int pins[MAX_GROUP_PIN];
 111         unsigned int npins;
 112 };
 113
 114 static char pin_name[PINNAME_SIZE];
 115
 116 /**
 117  * zynqmp_pm_query_data() - Get query data from firmware
 118  * @qid:        Value of enum pm_query_id
 119  * @arg1:       Argument 1
 120  * @arg2:       Argument 2
 121  * @out:        Returned output value
 122  *
 123  * Return: Returns status, either success or error+reason
 124  */
 125 static int zynqmp_pm_query_data(enum pm_query_id qid, u32 arg1, u32 arg2, u32 *out)
 126 {
 127         int ret;
 128         u32 ret_payload[PAYLOAD_ARG_CNT];
 129
 130         ret = xilinx_pm_request(PM_QUERY_DATA, qid, arg1, arg2, 0, ret_payload);
 131         if (ret)
 132                 return ret;
 133
 134         *out = ret_payload[1];
 135
 136         return ret;
 137 }
 138
 139 static int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, u32 *value)
 140 {
 141         int ret;
 142         u32 ret_payload[PAYLOAD_ARG_CNT];
 143
 144         /* Get config for the pin */
 145         ret = xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 0, 0, ret_payload);
 146         if (ret) {
 147                 printf("%s failed\n", __func__);
 148                 return ret;
 149         }
 150
 151         *value = ret_payload[1];
 152
 153         return ret;
 154 }
 155
 156 static int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, u32 value)
 157 {
 158         int ret;
 159
 160         if (param == PM_PINCTRL_CONFIG_TRI_STATE) {
 161                 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
 162                 if (ret < PM_PINCTRL_PARAM_SET_VERSION)
 163                         return -EOPNOTSUPP;
 164         }
 165
 166         /* Request the pin first */
 167         ret = xilinx_pm_request(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
 168         if (ret) {
 169                 printf("%s: pin request failed\n", __func__);
 170                 return ret;
 171         }
 172
 173         /* Set config for the pin */
 174         ret = xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, pin, param, value, 0, NULL);
 175         if (ret) {
 176                 printf("%s failed\n", __func__);
 177                 return ret;
 178         }
 179
 180         return ret;
 181 }
 182
 183 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
 184 {
 185         int ret;
 186         u32 ret_payload[PAYLOAD_ARG_CNT];
 187
 188         ret = xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_FUNCTION_GROUPS,
 189                                 fid, index, 0, ret_payload);
 190         if (ret) {
 191                 printf("%s failed\n", __func__);
 192                 return ret;
 193         }
 194
 195         memcpy(groups, &ret_payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
 196
 197         return ret;
 198 }
 199
 200 static int zynqmp_pinctrl_prepare_func_groups(u32 fid,
 201                                               struct zynqmp_pmux_function *func,
 202                                               struct zynqmp_pctrl_group *groups)
 203 {
 204         const char **fgroups;
 205         char name[MAX_GROUP_NAME_LEN];
 206         u16 resp[NUM_GROUPS_PER_RESP] = {0};
 207         int ret, index, i;
 208
 209         fgroups = kcalloc(func->ngroups, sizeof(*fgroups), GFP_KERNEL);
 210         if (!fgroups)
 211                 return -ENOMEM;
 212
 213         for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
 214                 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
 215                 if (ret)
 216                         return ret;
 217
 218                 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
 219                         if (resp[i] == (u16)NA_GROUP)
 220                                 goto done;
 221                         if (resp[i] == (u16)RESERVED_GROUP)
 222                                 continue;
 223
 224                         snprintf(name, MAX_GROUP_NAME_LEN, "%s_%d_grp",
 225                                  func->name, index + i);
 226                         fgroups[index + i] = strdup(name);
 227
 228                         snprintf(name, MAX_GROUP_NAME_LEN, "%s_%d_grp",
 229                                  func->name, index + i);
 230                         groups[resp[i]].name = strdup(name);
 231                 }
 232         }
 233 done:
 234         func->groups = fgroups;
 235
 236         return ret;
 237 }
 238
 239 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
 240 {
 241         int ret;
 242         u32 ret_payload[PAYLOAD_ARG_CNT];
 243
 244         ret = xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_PIN_GROUPS,
 245                                 pin, index, 0, ret_payload);
 246         if (ret) {
 247                 printf("%s failed to get pin groups\n", __func__);
 248                 return ret;
 249         }
 250
 251         memcpy(groups, &ret_payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
 252
 253         return ret;
 254 }
 255
 256 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
 257                                          unsigned int pin)
 258 {
 259         group->pins[group->npins++] = pin;
 260 }
 261
 262 static int zynqmp_pinctrl_create_pin_groups(struct zynqmp_pctrl_group *groups,
 263                                             unsigned int pin)
 264 {
 265         u16 resp[NUM_GROUPS_PER_RESP] = {0};
 266         int ret, i, index = 0;
 267
 268         do {
 269                 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
 270                 if (ret)
 271                         return ret;
 272
 273                 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
 274                         if (resp[i] == (u16)NA_GROUP)
 275                                 goto done;
 276                         if (resp[i] == (u16)RESERVED_GROUP)
 277                                 continue;
 278                         zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
 279                 }
 280                 index += NUM_GROUPS_PER_RESP;
 281         } while (index <= MAX_PIN_GROUPS);
 282
 283 done:
 284         return ret;
 285 }
 286
 287 static int zynqmp_pinctrl_probe(struct udevice *dev)
 288 {
 289         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 290         int ret, i;
 291         u32 pin;
 292         u32 ret_payload[PAYLOAD_ARG_CNT];
 293
 294         /* Get number of pins first */
 295         ret = zynqmp_pm_query_data(PM_QID_PINCTRL_GET_NUM_PINS, 0, 0, &priv->npins);
 296         if (ret) {
 297                 printf("%s failed to get no of pins\n", __func__);
 298                 return ret;
 299         }
 300
 301         /* Get number of functions available */
 302         ret = zynqmp_pm_query_data(PM_QID_PINCTRL_GET_NUM_FUNCTIONS, 0, 0, &priv->nfuncs);
 303         if (ret) {
 304                 printf("%s failed to get no of functions\n", __func__);
 305                 return ret;
 306         }
 307
 308         /* Allocating structures for functions and its groups */
 309         priv->funcs = kzalloc(sizeof(*priv->funcs) * priv->nfuncs, GFP_KERNEL);
 310         if (!priv->funcs)
 311                 return -ENOMEM;
 312
 313         for (i = 0; i < priv->nfuncs; i++) {
 314                 /* Get function name for the function and fill */
 315                 xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_FUNCTION_NAME,
 316                                   i, 0, 0, ret_payload);
 317
 318                 memcpy((void *)priv->funcs[i].name, ret_payload, MAX_FUNC_NAME_LEN);
 319
 320                 /* And fill number of groups available for certain function */
 321                 xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS,
 322                                   i, 0, 0, ret_payload);
 323
 324                 priv->funcs[i].ngroups = ret_payload[1];
 325                 priv->ngroups += priv->funcs[i].ngroups;
 326         }
 327
 328         /* Prepare all groups */
 329         priv->groups = kzalloc(sizeof(*priv->groups) * priv->ngroups,
 330                                GFP_KERNEL);
 331         if (!priv->groups)
 332                 return -ENOMEM;
 333
 334         for (i = 0; i < priv->nfuncs; i++) {
 335                 ret = zynqmp_pinctrl_prepare_func_groups(i, &priv->funcs[i],
 336                                                          priv->groups);
 337                 if (ret) {
 338                         printf("Failed to prepare_func_groups\n");
 339                         return ret;
 340                 }
 341         }
 342
 343         for (pin = 0; pin < priv->npins; pin++) {
 344                 ret = zynqmp_pinctrl_create_pin_groups(priv->groups, pin);
 345                 if (ret)
 346                         return ret;
 347         }
 348
 349         return 0;
 350 }
 351
 352 static int zynqmp_pinctrl_get_functions_count(struct udevice *dev)
 353 {
 354         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 355
 356         return priv->nfuncs;
 357 }
 358
 359 static const char *zynqmp_pinctrl_get_function_name(struct udevice *dev,
 360                                                     unsigned int selector)
 361 {
 362         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 363
 364         return priv->funcs[selector].name;
 365 }
 366
 367 static int zynqmp_pinmux_set(struct udevice *dev, unsigned int selector,
 368                              unsigned int func_selector)
 369 {
 370         int ret;
 371
 372         /* Request the pin first */
 373         ret = xilinx_pm_request(PM_PINCTRL_REQUEST, selector, 0, 0, 0, NULL);
 374         if (ret) {
 375                 printf("%s: pin request failed\n", __func__);
 376                 return ret;
 377         }
 378
 379         /* Set the pin function */
 380         ret = xilinx_pm_request(PM_PINCTRL_SET_FUNCTION, selector, func_selector,
 381                                 0, 0, NULL);
 382         if (ret) {
 383                 printf("%s: Failed to set pinmux function\n", __func__);
 384                 return ret;
 385         }
 386
 387         return 0;
 388 }
 389
 390 static int zynqmp_pinmux_group_set(struct udevice *dev, unsigned int selector,
 391                                    unsigned int func_selector)
 392 {
 393         int i;
 394         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 395         const struct zynqmp_pctrl_group *pgrp = &priv->groups[selector];
 396
 397         for (i = 0; i < pgrp->npins; i++)
 398                 zynqmp_pinmux_set(dev, pgrp->pins[i], func_selector);
 399
 400         return 0;
 401 }
 402
 403 static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin,
 404                               unsigned int param, unsigned int arg)
 405 {
 406         int ret = 0;
 407         unsigned int value;
 408
 409         switch (param) {
 410         case PIN_CONFIG_SLEW_RATE:
 411                 param = PM_PINCTRL_CONFIG_SLEW_RATE;
 412                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 413                 break;
 414         case PIN_CONFIG_BIAS_PULL_UP:
 415                 param = PM_PINCTRL_CONFIG_PULL_CTRL;
 416                 arg = PM_PINCTRL_BIAS_PULL_UP;
 417                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 418                 break;
 419         case PIN_CONFIG_BIAS_PULL_DOWN:
 420                 param = PM_PINCTRL_CONFIG_PULL_CTRL;
 421                 arg = PM_PINCTRL_BIAS_PULL_DOWN;
 422                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 423                 break;
 424         case PIN_CONFIG_BIAS_DISABLE:
 425                 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
 426                 arg = PM_PINCTRL_BIAS_DISABLE;
 427                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 428                 break;
 429         case PIN_CONFIG_SCHMITTCMOS:
 430                 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
 431                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 432                 break;
 433         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 434                 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
 435                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 436                 break;
 437         case PIN_CONFIG_DRIVE_STRENGTH:
 438                 switch (arg) {
 439                 case DRIVE_STRENGTH_2MA:
 440                         value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
 441                         break;
 442                 case DRIVE_STRENGTH_4MA:
 443                         value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
 444                         break;
 445                 case DRIVE_STRENGTH_8MA:
 446                         value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
 447                         break;
 448                 case DRIVE_STRENGTH_12MA:
 449                         value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
 450                         break;
 451                 default:
 452                         /* Invalid drive strength */
 453                         dev_warn(dev, "Invalid drive strength for pin %d\n", pin);
 454                         return -EINVAL;
 455                 }
 456
 457                 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
 458                 ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
 459                 break;
 460         case PIN_CFG_IOSTANDARD:
 461                 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
 462                 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
 463                 if (arg != value)
 464                         dev_warn(dev, "Invalid IO Standard requested for pin %d\n",
 465                                  pin);
 466                 break;
 467         case PIN_CONFIG_POWER_SOURCE:
 468                 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
 469                 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
 470                 if (arg != value)
 471                         dev_warn(dev, "Invalid IO Standard requested for pin %d\n",
 472                                  pin);
 473                 break;
 474         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 475                 param = PM_PINCTRL_CONFIG_TRI_STATE;
 476                 arg = PM_PINCTRL_TRI_STATE_ENABLE;
 477                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 478                 break;
 479         case PIN_CONFIG_LOW_POWER_MODE:
 480                 /*
 481                  * This cases are mentioned in dts but configurable
 482                  * registers are unknown. So falling through to ignore
 483                  * boot time warnings as of now.
 484                  */
 485                 ret = 0;
 486                 break;
 487         case PIN_CONFIG_OUTPUT_ENABLE:
 488                 param = PM_PINCTRL_CONFIG_TRI_STATE;
 489                 arg = PM_PINCTRL_TRI_STATE_DISABLE;
 490                 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
 491                 break;
 492         default:
 493                 dev_warn(dev, "unsupported configuration parameter '%u'\n",
 494                          param);
 495                 ret = -ENOTSUPP;
 496                 break;
 497         }
 498
 499         return ret;
 500 }
 501
 502 static int zynqmp_pinconf_group_set(struct udevice *dev,
 503                                     unsigned int group_selector,
 504                                     unsigned int param, unsigned int arg)
 505 {
 506         int i;
 507         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 508         const struct zynqmp_pctrl_group *pgrp = &priv->groups[group_selector];
 509
 510         for (i = 0; i < pgrp->npins; i++)
 511                 zynqmp_pinconf_set(dev, pgrp->pins[i], param, arg);
 512
 513         return 0;
 514 }
 515
 516 static int zynqmp_pinctrl_get_pins_count(struct udevice *dev)
 517 {
 518         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 519
 520         return priv->npins;
 521 }
 522
 523 static const char *zynqmp_pinctrl_get_pin_name(struct udevice *dev,
 524                                                unsigned int selector)
 525 {
 526         snprintf(pin_name, PINNAME_SIZE, "MIO%d", selector);
 527
 528         return pin_name;
 529 }
 530
 531 static int zynqmp_pinctrl_get_pin_muxing(struct udevice *dev,
 532                                          unsigned int selector,
 533                                          char *buf,
 534                                          int size)
 535 {
 536         struct zynqmp_pinctrl_config pinmux;
 537
 538         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_SLEW_RATE,
 539                                      &pinmux.slew);
 540         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_BIAS_STATUS,
 541                                      &pinmux.bias);
 542         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_PULL_CTRL,
 543                                      &pinmux.pull_ctrl);
 544         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_SCHMITT_CMOS,
 545                                      &pinmux.input_type);
 546         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_DRIVE_STRENGTH,
 547                                      &pinmux.drive_strength);
 548         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_VOLTAGE_STATUS,
 549                                      &pinmux.volt_sts);
 550         zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_TRI_STATE,
 551                                      &pinmux.tri_state);
 552
 553         switch (pinmux.drive_strength) {
 554         case PM_PINCTRL_DRIVE_STRENGTH_2MA:
 555                 pinmux.drive_strength = DRIVE_STRENGTH_2MA;
 556                 break;
 557         case PM_PINCTRL_DRIVE_STRENGTH_4MA:
 558                 pinmux.drive_strength = DRIVE_STRENGTH_4MA;
 559                 break;
 560         case PM_PINCTRL_DRIVE_STRENGTH_8MA:
 561                 pinmux.drive_strength = DRIVE_STRENGTH_8MA;
 562                 break;
 563         case PM_PINCTRL_DRIVE_STRENGTH_12MA:
 564                 pinmux.drive_strength = DRIVE_STRENGTH_12MA;
 565                 break;
 566         default:
 567                 /* Invalid drive strength */
 568                 dev_warn(dev, "Invalid drive strength\n");
 569                 return -EINVAL;
 570         }
 571
 572         snprintf(buf, size,
 573                  "slew:%s\tbias:%s\tpull:%s\tinput:%s\tdrive:%dmA\tvolt:%s\ttri_state:%s",
 574                  pinmux.slew ? "slow" : "fast",
 575                  pinmux.bias ? "enabled" : "disabled",
 576                  pinmux.pull_ctrl ? "up" : "down",
 577                  pinmux.input_type ? "schmitt" : "cmos",
 578                  pinmux.drive_strength,
 579                  pinmux.volt_sts ? "1.8" : "3.3",
 580                  pinmux.tri_state ? "enabled" : "disabled");
 581
 582         return 0;
 583 }
 584
 585 static int zynqmp_pinctrl_get_groups_count(struct udevice *dev)
 586 {
 587         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 588
 589         return priv->ngroups;
 590 }
 591
 592 static const char *zynqmp_pinctrl_get_group_name(struct udevice *dev,
 593                                                  unsigned int selector)
 594 {
 595         struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev);
 596
 597         return priv->groups[selector].name;
 598 }
 599
 600 static const struct pinconf_param zynqmp_conf_params[] = {
 601         { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
 602         { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
 603         { "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 },
 604         { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
 605         { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
 606         { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
 607         { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
 608         { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 },
 609         { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
 610         { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
 611         { "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 },
 612         { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
 613         { "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 614         { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
 615         { "input-schmitt", PIN_CONFIG_INPUT_SCHMITT, 0 },
 616         { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
 617         { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
 618         { "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 },
 619         { "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 },
 620         { "output-disable", PIN_CONFIG_OUTPUT_ENABLE, 0 },
 621         { "output-enable", PIN_CONFIG_OUTPUT_ENABLE, 1 },
 622         { "output-high", PIN_CONFIG_OUTPUT, 1, },
 623         { "output-low", PIN_CONFIG_OUTPUT, 0, },
 624         { "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
 625         { "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 },
 626         { "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
 627         { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 },
 628         /* zynqmp specific */
 629         {"io-standard", PIN_CFG_IOSTANDARD, IO_STANDARD_LVCMOS18},
 630         {"schmitt-cmos", PIN_CONFIG_SCHMITTCMOS, PM_PINCTRL_INPUT_TYPE_SCHMITT},
 631 };
 632
 633 static struct pinctrl_ops zynqmp_pinctrl_ops = {
 634         .get_pins_count = zynqmp_pinctrl_get_pins_count,
 635         .get_pin_name = zynqmp_pinctrl_get_pin_name,
 636         .get_pin_muxing = zynqmp_pinctrl_get_pin_muxing,
 637         .set_state = pinctrl_generic_set_state,
 638         .get_groups_count = zynqmp_pinctrl_get_groups_count,
 639         .get_group_name = zynqmp_pinctrl_get_group_name,
 640         .get_functions_count = zynqmp_pinctrl_get_functions_count,
 641         .get_function_name = zynqmp_pinctrl_get_function_name,
 642         .pinmux_group_set = zynqmp_pinmux_group_set,
 643         .pinmux_set = zynqmp_pinmux_set,
 644         .pinconf_params = zynqmp_conf_params,
 645         .pinconf_group_set = zynqmp_pinconf_group_set,
 646         .pinconf_set = zynqmp_pinconf_set,
 647         .pinconf_num_params = ARRAY_SIZE(zynqmp_conf_params),
 648 };
 649
 650 static const struct udevice_id zynqmp_pinctrl_ids[] = {
 651         { .compatible = "xlnx,zynqmp-pinctrl" },
 652         { }
 653 };
 654
 655 U_BOOT_DRIVER(pinctrl_zynqmp) = {
 656         .name = "zynqmp-pinctrl",
 657         .id = UCLASS_PINCTRL,
 658         .of_match = zynqmp_pinctrl_ids,
 659         .priv_auto = sizeof(struct zynqmp_pinctrl_priv),
 660         .ops = &zynqmp_pinctrl_ops,
 661         .probe = zynqmp_pinctrl_probe,
 662 };