2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/cache.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 #ifdef CONFIG_DISPLAY_CPUINFO
17 int print_cpuinfo(void)
19 printf("CPU: Nios-II\n");
22 #endif /* CONFIG_DISPLAY_CPUINFO */
24 #ifdef CONFIG_ALTERA_SYSID
32 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
35 /* indirect call to go beyond 256MB limitation of toolchain */
36 nios2_callr(gd->arch.reset_addr);
41 * COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
42 * exception address. Define CONFIG_ROM_STUBS to prevent
43 * the copy (e.g. exception in flash or in other
44 * softare/firmware component).
46 #ifndef CONFIG_ROM_STUBS
47 static void copy_exception_trampoline(void)
49 extern int _except_start, _except_end;
50 void *except_target = (void *)gd->arch.exception_addr;
52 if (&_except_start != except_target) {
53 memcpy(except_target, &_except_start,
54 &_except_end - &_except_start);
55 flush_cache(gd->arch.exception_addr,
56 &_except_end - &_except_start);
61 int arch_cpu_init_dm(void)
66 ret = uclass_first_device_err(UCLASS_CPU, &dev);
70 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
71 #ifndef CONFIG_ROM_STUBS
72 copy_exception_trampoline();
78 static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)
80 const char *cpu_name = "Nios-II";
82 if (size < strlen(cpu_name))
84 strcpy(buf, cpu_name);
89 static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)
91 info->cpu_freq = gd->cpu_clk;
92 info->features = (1 << CPU_FEAT_L1_CACHE) |
93 (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
98 static int altera_nios2_get_count(struct udevice *dev)
103 static int altera_nios2_probe(struct udevice *dev)
105 const void *blob = gd->fdt_blob;
106 int node = dev_of_offset(dev);
108 gd->cpu_clk = fdtdec_get_int(blob, node,
109 "clock-frequency", 0);
110 gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
111 "dcache-line-size", 0);
112 gd->arch.icache_line_size = fdtdec_get_int(blob, node,
113 "icache-line-size", 0);
114 gd->arch.dcache_size = fdtdec_get_int(blob, node,
116 gd->arch.icache_size = fdtdec_get_int(blob, node,
118 gd->arch.reset_addr = fdtdec_get_int(blob, node,
119 "altr,reset-addr", 0);
120 gd->arch.exception_addr = fdtdec_get_int(blob, node,
121 "altr,exception-addr", 0);
122 gd->arch.has_initda = fdtdec_get_int(blob, node,
123 "altr,has-initda", 0);
124 gd->arch.has_mmu = fdtdec_get_int(blob, node,
126 gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000;
127 gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000;
128 gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff;
133 static const struct cpu_ops altera_nios2_ops = {
134 .get_desc = altera_nios2_get_desc,
135 .get_info = altera_nios2_get_info,
136 .get_count = altera_nios2_get_count,
139 static const struct udevice_id altera_nios2_ids[] = {
140 { .compatible = "altr,nios2-1.0" },
141 { .compatible = "altr,nios2-1.1" },
145 U_BOOT_DRIVER(altera_nios2) = {
146 .name = "altera_nios2",
148 .of_match = altera_nios2_ids,
149 .probe = altera_nios2_probe,
150 .ops = &altera_nios2_ops,
151 .flags = DM_FLAG_PRE_RELOC,