include/configs/ts4800.h

   1 /*
   2  * Copyright (C) 2015, Savoir-faire Linux Inc.
   3  *
   4  * Derived from MX51EVK code by
   5  *   Guennadi Liakhovetski <[email protected]>
   6  *   Freescale Semiconductor, Inc.
   7  *
   8  * Configuration settings for the TS4800 Board
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /* High Level Configuration Options */
  17
  18 #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is a 2nd stage bootloader */
  19
  20 #define CONFIG_HW_WATCHDOG
  21
  22 #define CONFIG_MACH_TYPE        MACH_TYPE_TS48XX
  23
  24 /* text base address used when linking */
  25
  26 #include <asm/arch/imx-regs.h>
  27
  28 /* enable passing of ATAGs */
  29 #define CONFIG_CMDLINE_TAG
  30 #define CONFIG_SETUP_MEMORY_TAGS
  31 #define CONFIG_INITRD_TAG
  32 #define CONFIG_REVISION_TAG
  33
  34 /*
  35  * Size of malloc() pool
  36  */
  37 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  38
  39 /*
  40  * Hardware drivers
  41  */
  42
  43 #define CONFIG_MXC_UART
  44 #define CONFIG_MXC_UART_BASE    UART1_BASE
  45
  46 /*
  47  * SPI Configs
  48  * */
  49 #define CONFIG_HARD_SPI /* puts SPI: ready */
  50
  51 /*
  52  * MMC Configs
  53  * */
  54 #define CONFIG_SYS_FSL_ESDHC_ADDR       MMC_SDHC1_BASE_ADDR
  55
  56 /*
  57  * Eth Configs
  58  */
  59 #define CONFIG_MII
  60 #define CONFIG_PHY_SMSC
  61
  62 #define CONFIG_FEC_MXC
  63 #define IMX_FEC_BASE            FEC_BASE_ADDR
  64 #define CONFIG_ETHPRIME         "FEC"
  65 #define CONFIG_FEC_MXC_PHYADDR  0
  66
  67 /* allow to overwrite serial and ethaddr */
  68 #define CONFIG_ENV_OVERWRITE            /* disable vendor parameters protection (serial#, ethaddr) */
  69
  70 /***********************************************************
  71  * Command definition
  72  ***********************************************************/
  73
  74 /* Environment variables */
  75
  76
  77 #define CONFIG_LOADADDR         0x91000000      /* loadaddr env var */
  78
  79 #define CONFIG_EXTRA_ENV_SETTINGS \
  80         "script=boot.scr\0" \
  81         "image=zImage\0" \
  82         "fdt_file=imx51-ts4800.dtb\0" \
  83         "fdt_addr=0x90fe0000\0" \
  84         "mmcdev=0\0" \
  85         "mmcpart=2\0" \
  86         "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
  87         "mmcargs=setenv bootargs root=${mmcroot}\0" \
  88         "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
  89         "loadbootscript=" \
  90                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  91         "bootscript=echo Running bootscript from mmc ...; " \
  92                 "source\0" \
  93         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
  94         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  95         "mmcboot=echo Booting from mmc ...; " \
  96                 "run mmcargs addtty; " \
  97                 "if run loadfdt; then " \
  98                         "bootz ${loadaddr} - ${fdt_addr}; " \
  99                 "else " \
 100                         "echo ERR: cannot load FDT; " \
 101                 "fi; "
 102
 103
 104 #define CONFIG_BOOTCOMMAND \
 105         "mmc dev ${mmcdev}; if mmc rescan; then " \
 106                 "if run loadbootscript; then " \
 107                         "run bootscript; " \
 108                 "else " \
 109                         "if run loadimage; then " \
 110                                 "run mmcboot; " \
 111                         "fi; " \
 112                 "fi; " \
 113         "fi; "
 114
 115 /*
 116  * Miscellaneous configurable options
 117  */
 118
 119 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 120
 121 /*-----------------------------------------------------------------------
 122  * Physical Memory Map
 123  */
 124 #define CONFIG_NR_DRAM_BANKS    1
 125 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
 126 #define PHYS_SDRAM_1_SIZE       (256 * 1024 * 1024)
 127
 128 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 129 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 130 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 131
 132 #define CONFIG_SYS_INIT_SP_OFFSET \
 133         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 134 #define CONFIG_SYS_INIT_SP_ADDR \
 135         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 136
 137 /* Low level init */
 138 #define CONFIG_SYS_DDR_CLKSEL   0
 139 #define CONFIG_SYS_CLKTL_CBCDR  0x59E35100
 140 #define CONFIG_SYS_MAIN_PWR_ON
 141
 142 /*-----------------------------------------------------------------------
 143  * Environment organization
 144  */
 145
 146 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
 147 #define CONFIG_ENV_SIZE        (8 * 1024)
 148 #define CONFIG_SYS_MMC_ENV_DEV 0
 149
 150 #endif