arch/arm/dts/k3-am642-r5-sk.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 #include "k3-am642-sk.dts"
   7 #include "k3-am64-sk-lp4-1600MTs.dtsi"
   8 #include "k3-am64-ddr.dtsi"
   9
  10 #include "k3-am642-sk-u-boot.dtsi"
  11
  12 / {
  13         aliases {
  14                 remoteproc0 = &sysctrler;
  15                 remoteproc1 = &a53_0;
  16         };
  17
  18         a53_0: a53@0 {
  19                 compatible = "ti,am654-rproc";
  20                 reg = <0x00 0x00a90000 0x00 0x10>;
  21                 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
  22                                 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
  23                                 <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
  24                 resets = <&k3_reset 135 0>;
  25                 clocks = <&k3_clks 61 0>;
  26                 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
  27                 assigned-clock-parents = <&k3_clks 61 2>;
  28                 assigned-clock-rates = <200000000>, <1000000000>;
  29                 ti,sci = <&dmsc>;
  30                 ti,sci-proc-id = <32>;
  31                 ti,sci-host-id = <10>;
  32                 bootph-pre-ram;
  33         };
  34
  35         clk_200mhz: dummy-clock-200mhz {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <200000000>;
  39                 bootph-pre-ram;
  40         };
  41 };
  42
  43 &cbass_main {
  44         sysctrler: sysctrler {
  45                 compatible = "ti,am654-system-controller";
  46                 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
  47                 mbox-names = "tx", "rx";
  48                 bootph-pre-ram;
  49         };
  50 };
  51
  52 &main_esm {
  53         bootph-pre-ram;
  54 };
  55
  56 &mcu_esm {
  57         bootph-pre-ram;
  58 };
  59
  60 &dmsc {
  61         mboxes= <&secure_proxy_main 0>,
  62                 <&secure_proxy_main 1>,
  63                 <&secure_proxy_main 0>;
  64         mbox-names = "rx", "tx", "notify";
  65         ti,host-id = <35>;
  66         ti,secure-host;
  67 };
  68
  69 &sdhci1 {
  70         clocks = <&clk_200mhz>;
  71         clock-names = "clk_xin";
  72 };
  73
  74 &serdes_wiz0 {
  75         status = "okay";
  76 };
  77
  78 /* UART is initialized before SYSFW is started
  79  * so we can't do any power-domain/clock operations.
  80  * Delete clock/power-domain properties to avoid
  81  * UART init failure
  82  */
  83 &main_uart0 {
  84         /delete-property/ power-domains;
  85         /delete-property/ clocks;
  86         /delete-property/ clock-names;
  87 };
  88
  89 /* timer init is called as part of rproc_start() while
  90  * starting System Firmware, so any clock/power-domain
  91  * operations will fail as SYSFW is not yet up and running.
  92  * Delete all clock/power-domain properties to avoid
  93  * timer init failure.
  94  * This is an always on timer at 20MHz.
  95  */
  96 &main_timer0 {
  97         /delete-property/ clocks;
  98         /delete-property/ assigned-clocks;
  99         /delete-property/ assigned-clock-parents;
 100         /delete-property/ power-domains;
 101 };