arch/arm/dts/mt7986b-sd-rfb.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2022 MediaTek Inc.
   4  * Author: Sam Shih <[email protected]>
   5  */
   6
   7 /dts-v1/;
   8 #include "mt7986.dtsi"
   9 #include <dt-bindings/gpio/gpio.h>
  10
  11 / {
  12         #address-cells = <1>;
  13         #size-cells = <1>;
  14         model = "mt7986-rfb";
  15         compatible = "mediatek,mt7986", "mediatek,mt7986-rfb",
  16                      "mediatek,mt7986-sd-rfb";
  17         chosen {
  18                 stdout-path = &uart0;
  19                 tick-timer = &timer0;
  20         };
  21
  22         memory@40000000 {
  23                 device_type = "memory";
  24                 reg = <0x40000000 0x10000000>;
  25         };
  26
  27         reg_3p3v: regulator-3p3v {
  28                 compatible = "regulator-fixed";
  29                 regulator-name = "fixed-3.3V";
  30                 regulator-min-microvolt = <3300000>;
  31                 regulator-max-microvolt = <3300000>;
  32                 regulator-boot-on;
  33                 regulator-always-on;
  34         };
  35 };
  36
  37 &uart0 {
  38         status = "okay";
  39 };
  40
  41 &uart1 {
  42         pinctrl-names = "default";
  43         pinctrl-0 = <&uart1_pins>;
  44         status = "disabled";
  45 };
  46
  47 &eth {
  48         status = "okay";
  49         mediatek,gmac-id = <0>;
  50         phy-mode = "2500base-x";
  51         mediatek,switch = "mt7531";
  52         reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  53
  54         fixed-link {
  55                 speed = <2500>;
  56                 full-duplex;
  57         };
  58 };
  59
  60 &pinctrl {
  61         spi_flash_pins: spi0-pins-func-1 {
  62                 mux {
  63                         function = "flash";
  64                         groups = "spi0", "spi0_wp_hold";
  65                 };
  66
  67                 conf-pu {
  68                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
  69                         drive-strength = <MTK_DRIVE_8mA>;
  70                         bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
  71                 };
  72
  73                 conf-pd {
  74                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  75                         drive-strength = <MTK_DRIVE_8mA>;
  76                         bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
  77                 };
  78         };
  79
  80         spic_pins: spi1-pins-func-1 {
  81                 mux {
  82                         function = "spi";
  83                         groups = "spi1_2";
  84                 };
  85         };
  86
  87         uart1_pins: spi1-pins-func-3 {
  88                 mux {
  89                         function = "uart";
  90                         groups = "uart1_2";
  91                 };
  92         };
  93
  94         pwm_pins: pwm0-pins-func-1 {
  95                 mux {
  96                         function = "pwm";
  97                         groups = "pwm0";
  98                 };
  99         };
 100
 101         mmc0_pins_default: mmc0default {
 102                 mux {
 103                         function = "flash";
 104                         groups =  "emmc_45";
 105                         input-schmitt-enable;
 106                 };
 107
 108                 conf-cmd-dat {
 109                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
 110                                "SPI0_CS", "SPI0_HOLD", "SPI0_WP",
 111                                "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
 112                         input-enable;
 113                         drive-strength = <MTK_DRIVE_4mA>;
 114                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 115                 };
 116
 117                 conf-clk {
 118                         pins = "SPI1_CS";
 119                         drive-strength = <MTK_DRIVE_6mA>;
 120                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 121                 };
 122
 123                 conf-rst {
 124                         pins = "PWM1";
 125                         drive-strength = <MTK_DRIVE_4mA>;
 126                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 127                 };
 128         };
 129 };
 130
 131 &spi0 {
 132         #address-cells = <1>;
 133         #size-cells = <0>;
 134         pinctrl-names = "default";
 135         pinctrl-0 = <&spi_flash_pins>;
 136         status = "okay";
 137         must_tx;
 138         enhance_timing;
 139         dma_ext;
 140         ipm_design;
 141         support_quad;
 142         tick_dly = <2>;
 143         sample_sel = <0>;
 144
 145         spi_nor@0 {
 146                 compatible = "jedec,spi-nor";
 147                 reg = <0>;
 148                 spi-max-frequency = <52000000>;
 149         };
 150
 151         spi_nand@1 {
 152                 compatible = "spi-nand";
 153                 reg = <1>;
 154                 spi-max-frequency = <52000000>;
 155         };
 156 };
 157
 158 &pwm {
 159         pinctrl-names = "default";
 160         pinctrl-0 = <&pwm_pins>;
 161         status = "okay";
 162 };
 163
 164 &watchdog {
 165         status = "disabled";
 166 };
 167
 168 &mmc0 {
 169         pinctrl-names = "default";
 170         pinctrl-0 = <&mmc0_pins_default>;
 171         bus-width = <4>;
 172         max-frequency = <52000000>;
 173         cap-sd-highspeed;
 174         r_smpl = <1>;
 175         vmmc-supply = <&reg_3p3v>;
 176         vqmmc-supply = <&reg_3p3v>;
 177         status = "okay";
 178 };