1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP Mini Configuration
5 * (C) Copyright 2018, Xilinx, Inc.
13 model = "ZynqMP MINI EMMC0";
14 compatible = "xlnx,zynqmp";
24 stdout-path = "serial0:115200n8";
28 device_type = "memory";
29 reg = <0x0 0x0 0x0 0x20000000>;
33 compatible = "arm,dcc";
39 compatible = "fixed-clock";
41 clock-frequency = <200000000>;
45 compatible = "simple-bus";
50 sdhci0: sdhci@ff160000 {
52 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
56 reg = <0x0 0xff160000 0x0 0x1000>;
57 clock-names = "clk_xin", "clk_ahb";
58 clocks = <&clk_xin &clk_xin>;