1 # SPDX-License-Identifier: GPL-2.0+
3 # Copyright (C) 2015 Google. Inc
9 A wide range of Rockchip SoCs are supported in mainline U-Boot
13 This document is being moved to doc/board/rockchip, so information on it
14 might be incomplete or outdated.
21 - Firefly RK3288 board or something else with a supported RockChip SoC
22 - Power connection to 5V using the supplied micro-USB power cable
23 - Separate USB serial cable attached to your computer and the Firefly
24 (connect to the micro-USB connector below the logo)
26 - openssl (sudo apt-get install openssl)
27 - Serial UART connection [4]
28 - Suitable ARM cross compiler, e.g.:
29 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34 1. To build RK3288 board:
36 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
38 (or you can use another cross compiler if you prefer)
40 2. To build RK3308 board:
42 See doc/board/rockchip/rockchip.rst
44 3. To build RK3399 board:
46 Option 1: Package the image with Rockchip miniloader:
51 => make nanopi-neo4-rk3399_defconfig
56 => git clone https://github.com/rockchip-linux/rkbin.git
61 => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
66 => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
68 (Get trust.img and uboot.img)
70 Option 2: Package the image with SPL:
72 - Export cross compiler path for aarch64
76 => git clone https://github.com/TrustedFirmware-A/trusted-firmware-a.git
77 => cd trusted-firmware-a
79 (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
81 => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
84 => export BL31=/path/to/trusted-firmware-a/build/rk3399/release/bl31/bl31.elf
86 - Compile PMU M0 firmware
88 This is optional for most of the rk3399 boards.
90 => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
91 => cd rk3399-cortex-m0
93 (export cross compiler path for Cortex-M0 PMU)
94 => make CROSS_COMPILE=arm-cortex_m0-eabi-
97 => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
101 => cd /path/to/u-boot
102 => make orangepi-rk3399_defconfig
105 (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
106 spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
108 If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
109 if CONFIG_TPL_OF_CONTROL not enabled)
111 Writing to the board with USB
112 =============================
114 For USB to work you must get your board into ROM boot mode, either by erasing
115 your MMC or (perhaps) holding the recovery button when you boot the board.
116 To erase your MMC, you can boot into Linux and type (as root)
118 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
120 Connect your board's OTG port to your computer.
122 To create a suitable image and write it to the board:
124 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
125 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
126 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
128 If all goes well you should something like:
130 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
131 Card did not respond to voltage select!
132 spl: mmc init failed with error: -17
133 ### ERROR ### Please RESET the board ###
135 You will need to reset the board before each time you try. Yes, that's all
136 it does so far. If support for the Rockchip USB protocol or DFU were added
137 in SPL then we could in principle load U-Boot and boot to a prompt from USB
138 as several other platforms do. However it does not seem to be possible to
139 use the existing boot ROM code from SPL.
142 Writing to the eMMC with USB on ROC-RK3308-CC
143 =============================================
144 For USB to work you must get your board into Bootrom mode,
145 either by erasing the eMMC or short circuit the GND and D0
148 Connect the board to your computer via tyepc.
149 => rkdeveloptool db rk3308_loader_v1.26.117.bin
150 => rkdeveloptool wl 0x40 idbloader.img
151 => rkdeveloptool wl 0x4000 u-boot.itb
154 Then you will see the boot log from Debug UART at baud rate 1500000:
156 REGFB: 0x00000032, 0x00000032
160 Col=10 Bank=8 Row=14 Size=256MB
162 Returning to boot ROM...
164 U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
165 Trying to boot from MMC1
166 INFO: Preloader serial: 2
167 NOTICE: BL31: v1.3(release):30f1405
168 NOTICE: BL31: Built : 17:08:28, Sep 23 2019
169 INFO: Lastlog: last=0x100000, realtime=0x102000, size=0x2000
170 INFO: ARM GICv2 driver initialized
171 INFO: Using opteed sec cpu_context!
172 INFO: boot cpu mask: 1
173 INFO: plat_rockchip_pmu_init: pd status 0xe b
174 INFO: BL31: Initializing runtime services
175 WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
176 ERROR: Error initializing runtime service opteed_fast
177 INFO: BL31: Preparing for EL3 exit to normal world
178 INFO: Entry point address = 0x600000
182 U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
184 Model: Firefly ROC-RK3308-CC board
186 MMC: dwmmc@ff480000: 0, dwmmc@ff490000: 1
187 rockchip_dnl_key_pressed read adc key val failed
188 Net: No ethernet found.
189 Hit any key to stop autoboot: 0
190 Card did not respond to voltage select!
191 switch to partitions #0, OK
192 mmc1(part 0) is current device
194 Found /extlinux/extlinux.conf
195 Retrieving file: /extlinux/extlinux.conf
196 151 bytes read in 3 ms (48.8 KiB/s)
198 Retrieving file: /Image
199 14737920 bytes read in 377 ms (37.3 MiB/s)
200 append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
201 Retrieving file: /rk3308-roc-cc.dtb
202 28954 bytes read in 4 ms (6.9 MiB/s)
203 Flattened Device Tree blob at 01f00000
204 Booting using the fdt blob at 0x1f00000
205 ## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
208 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
209 [ 0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
210 [ 0.000000] Machine model: Firefly ROC-RK3308-CC board
211 [ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
212 [ 0.000000] printk: bootconsole [uart8250] enabled
214 Booting from an SD card
215 =======================
217 To write an image that boots from an SD card (assumed to be /dev/sdc):
219 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
220 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
221 sudo dd if=out of=/dev/sdc seek=64 && \
222 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
224 This puts the Rockchip header and SPL image first and then places the U-Boot
225 image at block 16384 (i.e. 8MB from the start of the SD card). This
226 corresponds with this setting in U-Boot:
228 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000
230 Put this SD (or micro-SD) card into your board and reset it. You should see
233 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
235 Model: Radxa Rock 2 Square
237 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
238 *** Warning - bad CRC, using default environment
243 Net: Net Initialization Skipped
245 Hit any key to stop autoboot: 0
248 The rockchip bootrom can load and boot an initial spl, then continue to
249 load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
250 to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
251 The configuration option enabling this is:
253 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
255 You can create the image via the following operations:
257 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
258 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
259 cat firefly-rk3288/u-boot-dtb.bin >> out && \
260 sudo dd if=out of=/dev/sdc seek=64
263 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
264 firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
266 sudo dd if=out of=/dev/sdc seek=64
268 If you have an HDMI cable attached you should see a video console.
270 For evb_rk3036 board:
271 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
272 cat evb-rk3036/u-boot-dtb.bin >> out && \
273 sudo dd if=out of=/dev/sdc seek=64
276 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
277 evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
278 sudo dd if=out of=/dev/sdc seek=64
280 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
281 debug uart must be disabled
284 Booting from an SD card on RK3288 with TPL
285 ==========================================
287 Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
288 new SPL features like Falcon mode or etc.
290 So introduce TPL so-that adding new features to SPL is possible because now TPL should
291 run minimal with code like DDR, clock etc and rest of new features in SPL.
293 As of now TPL is added on Vyasa-RK3288 board.
295 To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
297 sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
298 sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
300 Booting from an SD card on RK3188
301 =================================
303 For rk3188 boards the general storage onto the card stays the same as
304 described above, but the image creation needs a bit more care.
306 The bootrom of rk3188 expects to find a small 1kb loader which returns
307 control to the bootrom, after which it will load the real loader, which
308 can then be up to 29kb in size and does the regular ddr init. This is
309 handled by a single image (built as the SPL stage) that tests whether
310 it is handled for the first or second time via code executed from the
313 Additionally the rk3188 requires everything the bootrom loads to be
314 rc4-encrypted. Except for the very first stage the bootrom always reads
315 and decodes 2kb pages, so files should be sized accordingly.
317 # copy tpl, pad to 1020 bytes and append spl
318 tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
320 # truncate, encode and append u-boot.bin
321 truncate -s %2048 u-boot.bin
322 cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
324 Booting from an SD card on Pine64 Rock64 (RK3328)
325 =================================================
327 For Rock64 rk3328 board the following three parts are required:
328 TPL, SPL, and the u-boot image tree blob.
330 - Write TPL/SPL image at 64 sector
332 => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
334 - Write u-boot image tree blob at 16384 sector
336 => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
338 Booting from an SD card on RK3399
339 =================================
341 To write an image that boots from an SD card (assumed to be /dev/sdc):
343 Option 1: Package the image with Rockchip miniloader:
345 - Create idbloader.img
347 => cd /path/to/u-boot
348 => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
349 => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
351 - Write idbloader.img at 64 sector
353 => sudo dd if=idbloader.img of=/dev/sdc seek=64
355 - Write trust.img at 24576
357 => sudo dd if=trust.img of=/dev/sdc seek=24576
359 - Write uboot.img at 16384 sector
361 => sudo dd if=uboot.img of=/dev/sdc seek=16384
364 Put this SD (or micro-SD) card into your board and reset it. You should see
367 DDR Version 1.20 20190314
369 Channel 0: DDR3, 933MHz
370 Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
372 ch 0 ddrconfig = 0x101, ddrsize = 0x20
373 pmugrf_os_reg[2] = 0x10006281, stride = 0x17
375 Boot1: 2019-03-14, version: 1.19
378 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
379 mmc: ERROR: Card did not respond to voltage select!
381 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
382 mmc: ERROR: Card did not respond to voltage select!
384 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
385 mmc: ERROR: Card did not respond to voltage select!
391 FwPartOffset=2000 , 0
392 StorageInit ok = 45266
394 SecureInit read PBA: 0x4
395 SecureInit read PBA: 0x404
396 SecureInit read PBA: 0x804
397 SecureInit read PBA: 0xc04
398 SecureInit read PBA: 0x1004
399 SecureInit read PBA: 0x1404
400 SecureInit read PBA: 0x1804
401 SecureInit read PBA: 0x1c04
402 SecureInit ret = 0, SecureMode = 0
403 atags_set_bootdev: ret:(0)
404 GPT 0x3380ec0 signature is wrong
406 GPT 0x3380ec0 signature is wrong
408 LoadTrust Addr:0x4000
410 Load uboot, ReadLba = 2000
411 hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
413 Load OK, addr=0x200000, size=0x9c9c0
415 NOTICE: BL31: v1.3(debug):370ab80
416 NOTICE: BL31: Built : 09:23:41, Mar 4 2019
417 NOTICE: BL31: Rockchip release version: v1.1
418 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
419 INFO: Using opteed sec cpu_context!
420 INFO: boot cpu mask: 0
421 INFO: plat_rockchip_pmu_init(1181): pd status 3e
422 INFO: BL31: Initializing runtime services
423 INFO: BL31: Initializing BL32
424 INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
426 INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
428 INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
429 INFO: BL31: Preparing for EL3 exit to normal world
430 INFO: Entry point address = 0x200000
434 U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
436 Model: FriendlyARM NanoPi NEO4
438 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
439 Loading Environment from MMC... *** Warning - bad CRC, using default environment
444 Model: FriendlyARM NanoPi NEO4
445 Net: eth0: ethernet@fe300000
446 Hit any key to stop autoboot: 0
449 Option 2: Package the image with SPL:
451 - Prefix rk3399 header to SPL image
453 => cd /path/to/u-boot
454 => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
456 - Write prefixed SPL at 64th sector
458 => sudo dd if=out of=/dev/sdc seek=64
460 - Write U-Boot proper at 16384 sector
462 => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
465 Put this SD (or micro-SD) card into your board and reset it. You should see
468 U-Boot SPL board init
469 Trying to boot from MMC1
472 U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
474 Model: Orange Pi RK3399 Board
476 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
477 Loading Environment from MMC... OK
481 Model: Orange Pi RK3399 Board
482 Net: eth0: ethernet@fe300000
483 Hit any key to stop autoboot: 0
486 Option 3: Package the image with TPL:
488 - Write tpl+spl at 64th sector
490 => sudo dd if=idbloader.img of=/dev/sdc seek=64
492 - Write U-Boot proper at 16384 sector
494 => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
497 Put this SD (or micro-SD) card into your board and reset it. You should see
500 U-Boot TPL board init
501 Trying to boot from BOOTROM
502 Returning to boot ROM...
504 U-Boot SPL board init
505 Trying to boot from MMC1
508 U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
510 Model: Orange Pi RK3399 Board
512 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
513 Loading Environment from MMC... OK
517 Model: Orange Pi RK3399 Board
518 Net: eth0: ethernet@fe300000
519 Hit any key to stop autoboot: 0
522 Using fastboot on rk3288
523 ========================
524 - Write GPT partition layout to mmc device which fastboot want to use it to
527 => gpt write mmc 1 $partitions
529 - Invoke fastboot command to prepare
533 - Start fastboot request on PC
535 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
537 You should see something like:
540 WARNING: unknown variable: partition-type:loader
541 Starting download of 357796 bytes
543 downloading of 357796 bytes finished
545 ........ wrote 357888 bytes to 'loader'
550 To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
553 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
554 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
555 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
556 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
557 dd if=out.bin of=out.bin.pad bs=4M conv=sync
559 This converts the SPL image to the required SPI format by adding the Rockchip
560 header and skipping every second 2KB block. Then the U-Boot image is written at
561 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
562 The position of U-Boot is controlled with this setting in U-Boot:
564 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
566 If you have a Dediprog em100pro connected then you can write the image with:
568 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
570 When booting you should see something like:
572 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
575 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
580 Using default environment
590 Immediate priorities are:
594 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
596 - Boot U-Boot proper over USB OTG (at present only SPL works)
602 There are plenty of patches in the links below to help with this work.
604 [1] https://github.com/rkchrome/uboot.git
605 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
606 [3] https://github.com/linux-rockchip/rkflashtool.git
607 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
612 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
613 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
614 followed by u-boot-spl-dtb.bin.
616 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
617 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
622 rksd.c produces an image consisting of 32KB of empty space, a header and
623 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
624 most of the fields are unused by U-Boot. We just need to specify the
625 signature, a flag and the block offset and size of the SPL image.
627 The header occupies a single block but we pad it out to 4 blocks. The header
628 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
629 image can be encoded too but we don't do that.
631 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
632 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
633 around this limitation, since there is plenty of SRAM, but at present the
634 board refuses to boot if this limit is exceeded.
636 The image produced is padded up to a block boundary (512 bytes). It should be
637 written to the start of an SD card using dd.
639 Since this image is set to load U-Boot from the SD card at block offset,
640 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
641 u-boot-dtb.img to the SD card at that offset. See above for instructions.
646 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
647 resulting image is then spread out so that only the first 2KB of each 4KB
648 sector is used. The header is the same as with rksd and the maximum size is
649 also 32KB (before spreading). The image should be written to the start of
652 See above for instructions on how to write a SPI image.
657 You can use this script to create #defines for SoC register access. See the
661 Device tree and driver model
662 ----------------------------
664 Where possible driver model is used to provide a structure to the
665 functionality. Device tree is used for configuration. However these have an
666 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
667 In general all Rockchip drivers should use these features, with SPL-specific
668 modifications where required.
671 ----------------------------
673 Rockchip use a unified GPT partition layout in open source support.
674 With this GPT partition layout, uboot can be compatilbe with other components,
675 like miniloader, trusted-os, arm-trust-firmware.
677 There are some documents about partitions in the links below.
678 http://rockchip.wikidot.com/partitions