2 * Configuation settings for the Renesas Solutions Migo-R board
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_CPU_SH7722 1
14 #define CONFIG_DISPLAY_BOARDINFO
15 #undef CONFIG_SHOW_BOOT_PROGRESS
18 #define CONFIG_SMC91111
19 #define CONFIG_SMC91111_BASE (0xB0000000)
22 #define MIGO_R_SDRAM_BASE (0x8C000000)
23 #define MIGO_R_FLASH_BASE_1 (0xA0000000)
24 #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
26 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
27 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
30 #define CONFIG_CONS_SCIF0 1
32 #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
33 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
35 /* Enable alternate, more extensive, memory test */
36 #undef CONFIG_SYS_ALT_MEMTEST
37 /* Scratch address used by the alternate memory test */
38 #undef CONFIG_SYS_MEMTEST_SCRATCH
40 /* Enable temporary baudrate change while serial download */
41 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
43 #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
44 /* maybe more, but if so u-boot doesn't know about it... */
45 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
46 /* default load address for scripts ?!? */
47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
49 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
50 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
52 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
53 /* Size of DRAM reserved for malloc() use */
54 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
55 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
58 #define CONFIG_SYS_FLASH_CFI
59 #define CONFIG_FLASH_CFI_DRIVER
60 #undef CONFIG_SYS_FLASH_QUIET_TEST
61 /* print 'E' for empty sector on flinfo */
62 #define CONFIG_SYS_FLASH_EMPTY_INFO
63 /* Physical start address of Flash memory */
64 #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
65 /* Max number of sectors on each Flash chip */
66 #define CONFIG_SYS_MAX_FLASH_SECT 512
68 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
69 #define CONFIG_SYS_MAX_FLASH_BANKS 1
70 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
72 /* Timeout for Flash erase operations (in ms) */
73 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
74 /* Timeout for Flash write operations (in ms) */
75 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
76 /* Timeout for Flash set sector lock bit operations (in ms) */
77 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
78 /* Timeout for Flash clear lock bit operations (in ms) */
79 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
81 /* Use hardware flash sectors protection instead of U-Boot software protection */
82 #undef CONFIG_SYS_FLASH_PROTECTION
83 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
86 #define CONFIG_ENV_OVERWRITE 1
87 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
88 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
89 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
90 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
91 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
92 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
95 #define CONFIG_SYS_CLK_FREQ 33333333
96 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
97 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
98 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
100 #endif /* __MIGO_R_H */