drivers/usb/host/ehci-atmel.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2012
   4  * Atmel Semiconductor <www.atmel.com>
   5  * Written-by: Bo Shen <[email protected]>
   6  */
   7
   8 #include <common.h>
   9 #include <clk.h>
  10 #include <dm.h>
  11 #include <log.h>
  12 #include <malloc.h>
  13 #include <usb.h>
  14 #include <asm/io.h>
  15 #include <asm/arch/clk.h>
  16
  17 #include "ehci.h"
  18
  19 #if !CONFIG_IS_ENABLED(DM_USB)
  20
  21 int ehci_hcd_init(int index, enum usb_init_type init,
  22                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  23 {
  24         /* Enable UTMI PLL */
  25         if (at91_upll_clk_enable())
  26                 return -1;
  27
  28         /* Enable USB Host clock */
  29         at91_periph_clk_enable(ATMEL_ID_UHPHS);
  30
  31         *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
  32         *hcor = (struct ehci_hcor *)((uint32_t)*hccr +
  33                         HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
  34
  35         return 0;
  36 }
  37
  38 int ehci_hcd_stop(int index)
  39 {
  40         /* Disable USB Host Clock */
  41         at91_periph_clk_disable(ATMEL_ID_UHPHS);
  42
  43         /* Disable UTMI PLL */
  44         if (at91_upll_clk_disable())
  45                 return -1;
  46
  47         return 0;
  48 }
  49
  50 #else
  51
  52 struct ehci_atmel_priv {
  53         struct ehci_ctrl ehci;
  54 };
  55
  56 static int ehci_atmel_enable_clk(struct udevice *dev)
  57 {
  58         struct clk clk;
  59         int ret;
  60
  61         ret = clk_get_by_index(dev, 0, &clk);
  62         if (ret)
  63                 return ret;
  64
  65         ret = clk_enable(&clk);
  66         if (ret)
  67                 return ret;
  68
  69         ret = clk_get_by_index(dev, 1, &clk);
  70         if (ret)
  71                 return -EINVAL;
  72
  73         return clk_enable(&clk);
  74 }
  75
  76 static int ehci_atmel_probe(struct udevice *dev)
  77 {
  78         struct ehci_hccr *hccr;
  79         struct ehci_hcor *hcor;
  80         fdt_addr_t hcd_base;
  81         int ret;
  82
  83         ret = ehci_atmel_enable_clk(dev);
  84         if (ret) {
  85                 debug("Failed to enable USB Host clock\n");
  86                 return ret;
  87         }
  88
  89         /*
  90          * Get the base address for EHCI controller from the device node
  91          */
  92         hcd_base = dev_read_addr(dev);
  93         if (hcd_base == FDT_ADDR_T_NONE) {
  94                 debug("Can't get the EHCI register base address\n");
  95                 return -ENXIO;
  96         }
  97
  98         hccr = (struct ehci_hccr *)hcd_base;
  99         hcor = (struct ehci_hcor *)
 100                 ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 101
 102         debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n",
 103               (u32)hccr, (u32)hcor,
 104               (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 105
 106         return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
 107 }
 108
 109 static const struct udevice_id ehci_usb_ids[] = {
 110         { .compatible = "atmel,at91sam9g45-ehci", },
 111         { }
 112 };
 113
 114 U_BOOT_DRIVER(ehci_atmel) = {
 115         .name           = "ehci_atmel",
 116         .id             = UCLASS_USB,
 117         .of_match       = ehci_usb_ids,
 118         .probe          = ehci_atmel_probe,
 119         .remove         = ehci_deregister,
 120         .ops            = &ehci_usb_ops,
 121         .plat_auto      = sizeof(struct usb_plat),
 122         .priv_auto      = sizeof(struct ehci_atmel_priv),
 123         .flags          = DM_FLAG_ALLOC_PRIV_DMA,
 124 };
 125
 126 #endif