5 * SPDX-License-Identifier: GPL-2.0+
9 * This file contains the configuration parameters for the dbau1x00 board.
15 #define CONFIG_PB1X00 1
16 #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
19 #define CONFIG_SOC_AU1000 1
22 #define CONFIG_SOC_AU1100 1
25 #define CONFIG_SOC_AU1500 1
27 #error "No valid board set"
33 #define CONFIG_BAUDRATE 115200
35 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
36 #undef CONFIG_BOOTARGS
38 #define CONFIG_EXTRA_ENV_SETTINGS \
39 "addmisc=setenv bootargs ${bootargs} " \
40 "console=ttyS0,${baudrate} " \
42 "bootfile=/vmlinux.img\0" \
43 "load=tftp 80500000 ${u-boot}\0" \
45 /* Boot from NFS root */
46 #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
49 * Miscellaneous configurable options
51 #define CONFIG_SYS_LONGHELP /* undef to save memory */
52 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
53 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
54 #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
56 #define CONFIG_SYS_MALLOC_LEN 128*1024
58 #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
60 #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
62 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
64 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
66 #define CONFIG_SYS_MEMTEST_START 0x80100000
67 #undef CONFIG_SYS_MEMTEST_START
68 #define CONFIG_SYS_MEMTEST_START 0x80200000
69 #define CONFIG_SYS_MEMTEST_END 0x83800000
71 /*-----------------------------------------------------------------------
72 * FLASH and environment organization
74 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
75 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
77 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
78 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
80 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
81 #define CONFIG_SYS_MONITOR_LEN (192 << 10)
83 #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
85 /* We boot from this flash, selected with dip switch */
86 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
88 /* timeout values are in ticks */
89 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
90 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
92 #define CONFIG_ENV_IS_NOWHERE 1
94 /* Address and size of Primary Environment Sector */
95 #define CONFIG_ENV_ADDR 0xB0030000
96 #define CONFIG_ENV_SIZE 0x10000
98 #define CONFIG_FLASH_16BIT
100 #define CONFIG_NR_DRAM_BANKS 2
102 #define CONFIG_MEMSIZE_IN_BYTES
104 /*---USB -------------------------------------------*/
106 #define CONFIG_USB_OHCI
109 /*---ATA PCMCIA ------------------------------------*/
111 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
112 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
113 #define CONFIG_PCMCIA_SLOT_A
115 #define CONFIG_ATAPI 1
117 /* We run CF in "true ide" mode or a harddrive via pcmcia */
118 #define CONFIG_IDE_PCMCIA 1
120 /* We only support one slot for now */
121 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
122 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
124 #undef CONFIG_IDE_LED /* LED for ide not supported */
125 #undef CONFIG_IDE_RESET /* reset for ide not supported */
127 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
129 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
131 /* Offset for data I/O */
132 #define CONFIG_SYS_ATA_DATA_OFFSET 8
134 /* Offset for normal register accesses */
135 #define CONFIG_SYS_ATA_REG_OFFSET 0
137 /* Offset for alternate registers */
138 #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
145 #define CONFIG_BOOTP_BOOTFILESIZE
146 #define CONFIG_BOOTP_BOOTPATH
147 #define CONFIG_BOOTP_GATEWAY
148 #define CONFIG_BOOTP_HOSTNAME
151 * Command line configuration.
154 #undef CONFIG_CMD_IDE
155 #undef CONFIG_CMD_BEDBUG
157 #endif /* __CONFIG_H */