1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019 DENX Software Engineering
9 #include <dm/device_compat.h>
10 #include <dm/devres.h>
12 #include <linux/err.h>
14 #include <dm/pinctrl.h>
16 #include "pinctrl-mxs.h"
18 DECLARE_GLOBAL_DATA_PTR;
20 struct mxs_pinctrl_priv {
22 const struct mxs_regs *regs;
25 static unsigned long mxs_dt_node_to_map(struct udevice *conf)
27 unsigned long config = 0;
31 ret = dev_read_u32(conf, "fsl,drive-strength", &val);
33 config = val | MA_PRESENT;
35 ret = dev_read_u32(conf, "fsl,voltage", &val);
37 config |= val << VOL_SHIFT | VOL_PRESENT;
39 ret = dev_read_u32(conf, "fsl,pull-up", &val);
41 config |= val << PULL_SHIFT | PULL_PRESENT;
46 static int mxs_pinctrl_set_mux(struct udevice *dev, u32 val, int bank, int pin)
48 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
49 int muxsel = MUXID_TO_MUXSEL(val), shift;
52 reg = iomux->base + iomux->regs->muxsel;
53 reg += bank * 0x20 + pin / 16 * 0x10;
56 mxs_pinctrl_rmwl(muxsel, 0x3, shift, reg);
57 debug(" mux %d,", muxsel);
62 static int mxs_pinctrl_set_state(struct udevice *dev, struct udevice *conf)
64 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
65 u32 *pin_data, val, ma, vol, pull;
66 int npins, size, i, ret;
69 debug("\n%s: set state: %s\n", __func__, conf->name);
71 size = dev_read_size(conf, "fsl,pinmux-ids");
75 if (!size || size % sizeof(int)) {
76 dev_err(dev, "Invalid fsl,pinmux-ids property in %s\n",
81 npins = size / sizeof(int);
83 pin_data = devm_kzalloc(dev, size, 0);
87 ret = dev_read_u32_array(conf, "fsl,pinmux-ids", pin_data, npins);
89 dev_err(dev, "Error reading pin data.\n");
90 devm_kfree(dev, pin_data);
94 config = mxs_dt_node_to_map(conf);
96 ma = CONFIG_TO_MA(config);
97 vol = CONFIG_TO_VOL(config);
98 pull = CONFIG_TO_PULL(config);
100 for (i = 0; i < npins; i++) {
101 int pinid, bank, pin, shift;
106 pinid = MUXID_TO_PINID(val);
107 bank = PINID_TO_BANK(pinid);
108 pin = PINID_TO_PIN(pinid);
110 debug("(val: 0x%x) pin %d,", val, pinid);
112 mxs_pinctrl_set_mux(dev, val, bank, pin);
114 debug(" ma: %d, vol: %d, pull: %d\n", ma, vol, pull);
117 reg = iomux->base + iomux->regs->drive;
118 reg += bank * 0x40 + pin / 8 * 0x10;
121 if (config & MA_PRESENT) {
123 mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
127 if (config & VOL_PRESENT) {
128 shift = pin % 8 * 4 + 2;
130 writel(1 << shift, reg + SET);
132 writel(1 << shift, reg + CLR);
136 if (config & PULL_PRESENT) {
137 reg = iomux->base + iomux->regs->pull;
141 writel(1 << shift, reg + SET);
143 writel(1 << shift, reg + CLR);
147 devm_kfree(dev, pin_data);
151 static struct pinctrl_ops mxs_pinctrl_ops = {
152 .set_state = mxs_pinctrl_set_state,
155 static int mxs_pinctrl_probe(struct udevice *dev)
157 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
159 iomux->base = dev_read_addr_ptr(dev);
160 iomux->regs = (struct mxs_regs *)dev_get_driver_data(dev);
165 static const struct mxs_regs imx23_regs = {
171 static const struct mxs_regs imx28_regs = {
177 static const struct udevice_id mxs_pinctrl_match[] = {
178 { .compatible = "fsl,imx23-pinctrl", .data = (ulong)&imx23_regs },
179 { .compatible = "fsl,imx28-pinctrl", .data = (ulong)&imx28_regs },
183 U_BOOT_DRIVER(mxs_pinctrl) = {
184 .name = "mxs-pinctrl",
185 .id = UCLASS_PINCTRL,
186 .of_match = of_match_ptr(mxs_pinctrl_match),
187 .probe = mxs_pinctrl_probe,
188 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
189 .bind = dm_scan_fdt_dev,
191 .priv_auto_alloc_size = sizeof(struct mxs_pinctrl_priv),
192 .ops = &mxs_pinctrl_ops,