]> Git Repo - J-u-boot.git/blob - drivers/pinctrl/nxp/pinctrl-mxs.c
Merge branch '2020-05-18-reduce-size-of-common.h'
[J-u-boot.git] / drivers / pinctrl / nxp / pinctrl-mxs.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019 DENX Software Engineering
4  * Lukasz Majewski, DENX Software Engineering, [email protected]
5  */
6
7 #include <common.h>
8 #include <log.h>
9 #include <dm/device_compat.h>
10 #include <dm/devres.h>
11 #include <linux/io.h>
12 #include <linux/err.h>
13 #include <dm.h>
14 #include <dm/pinctrl.h>
15 #include <dm/read.h>
16 #include "pinctrl-mxs.h"
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 struct mxs_pinctrl_priv {
21         void __iomem *base;
22         const struct mxs_regs *regs;
23 };
24
25 static unsigned long mxs_dt_node_to_map(struct udevice *conf)
26 {
27         unsigned long config = 0;
28         int ret;
29         u32 val;
30
31         ret = dev_read_u32(conf, "fsl,drive-strength", &val);
32         if (!ret)
33                 config = val | MA_PRESENT;
34
35         ret = dev_read_u32(conf, "fsl,voltage", &val);
36         if (!ret)
37                 config |= val << VOL_SHIFT | VOL_PRESENT;
38
39         ret = dev_read_u32(conf, "fsl,pull-up", &val);
40         if (!ret)
41                 config |= val << PULL_SHIFT | PULL_PRESENT;
42
43         return config;
44 }
45
46 static int mxs_pinctrl_set_mux(struct udevice *dev, u32 val, int bank, int pin)
47 {
48         struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
49         int muxsel = MUXID_TO_MUXSEL(val), shift;
50         void __iomem *reg;
51
52         reg = iomux->base + iomux->regs->muxsel;
53         reg += bank * 0x20 + pin / 16 * 0x10;
54         shift = pin % 16 * 2;
55
56         mxs_pinctrl_rmwl(muxsel, 0x3, shift, reg);
57         debug(" mux %d,", muxsel);
58
59         return 0;
60 }
61
62 static int mxs_pinctrl_set_state(struct udevice *dev, struct udevice *conf)
63 {
64         struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
65         u32 *pin_data, val, ma, vol, pull;
66         int npins, size, i, ret;
67         unsigned long config;
68
69         debug("\n%s: set state: %s\n", __func__, conf->name);
70
71         size = dev_read_size(conf, "fsl,pinmux-ids");
72         if (size < 0)
73                 return size;
74
75         if (!size || size % sizeof(int)) {
76                 dev_err(dev, "Invalid fsl,pinmux-ids property in %s\n",
77                         conf->name);
78                 return -EINVAL;
79         }
80
81         npins = size / sizeof(int);
82
83         pin_data = devm_kzalloc(dev, size, 0);
84         if (!pin_data)
85                 return -ENOMEM;
86
87         ret = dev_read_u32_array(conf, "fsl,pinmux-ids", pin_data, npins);
88         if (ret) {
89                 dev_err(dev, "Error reading pin data.\n");
90                 devm_kfree(dev, pin_data);
91                 return -EINVAL;
92         }
93
94         config = mxs_dt_node_to_map(conf);
95
96         ma = CONFIG_TO_MA(config);
97         vol = CONFIG_TO_VOL(config);
98         pull = CONFIG_TO_PULL(config);
99
100         for (i = 0; i < npins; i++) {
101                 int pinid, bank, pin, shift;
102                 void __iomem *reg;
103
104                 val = pin_data[i];
105
106                 pinid = MUXID_TO_PINID(val);
107                 bank = PINID_TO_BANK(pinid);
108                 pin = PINID_TO_PIN(pinid);
109
110                 debug("(val: 0x%x) pin %d,", val, pinid);
111                 /* Setup pinmux */
112                 mxs_pinctrl_set_mux(dev, val, bank, pin);
113
114                 debug(" ma: %d, vol: %d, pull: %d\n", ma, vol, pull);
115
116                 /* drive */
117                 reg = iomux->base + iomux->regs->drive;
118                 reg += bank * 0x40 + pin / 8 * 0x10;
119
120                 /* mA */
121                 if (config & MA_PRESENT) {
122                         shift = pin % 8 * 4;
123                         mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
124                 }
125
126                 /* vol */
127                 if (config & VOL_PRESENT) {
128                         shift = pin % 8 * 4 + 2;
129                         if (vol)
130                                 writel(1 << shift, reg + SET);
131                         else
132                                 writel(1 << shift, reg + CLR);
133                 }
134
135                 /* pull */
136                 if (config & PULL_PRESENT) {
137                         reg = iomux->base + iomux->regs->pull;
138                         reg += bank * 0x10;
139                         shift = pin;
140                         if (pull)
141                                 writel(1 << shift, reg + SET);
142                         else
143                                 writel(1 << shift, reg + CLR);
144                 }
145         }
146
147         devm_kfree(dev, pin_data);
148         return 0;
149 }
150
151 static struct pinctrl_ops mxs_pinctrl_ops = {
152         .set_state = mxs_pinctrl_set_state,
153 };
154
155 static int mxs_pinctrl_probe(struct udevice *dev)
156 {
157         struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
158
159         iomux->base = dev_read_addr_ptr(dev);
160         iomux->regs = (struct mxs_regs *)dev_get_driver_data(dev);
161
162         return 0;
163 }
164
165 static const struct mxs_regs imx23_regs = {
166         .muxsel = 0x100,
167         .drive = 0x200,
168         .pull = 0x400,
169 };
170
171 static const struct mxs_regs imx28_regs = {
172         .muxsel = 0x100,
173         .drive = 0x300,
174         .pull = 0x600,
175 };
176
177 static const struct udevice_id mxs_pinctrl_match[] = {
178         { .compatible = "fsl,imx23-pinctrl", .data = (ulong)&imx23_regs },
179         { .compatible = "fsl,imx28-pinctrl", .data = (ulong)&imx28_regs },
180         { /* sentinel */ }
181 };
182
183 U_BOOT_DRIVER(mxs_pinctrl) = {
184         .name = "mxs-pinctrl",
185         .id = UCLASS_PINCTRL,
186         .of_match = of_match_ptr(mxs_pinctrl_match),
187         .probe = mxs_pinctrl_probe,
188 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
189         .bind           = dm_scan_fdt_dev,
190 #endif
191         .priv_auto_alloc_size = sizeof(struct mxs_pinctrl_priv),
192         .ops = &mxs_pinctrl_ops,
193 };
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