1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2022 Gateworks Corporation
10 #include <asm/unaligned.h>
11 #include <linux/delay.h>
12 #include <dm/device.h>
13 #include <dm/device-internal.h>
14 #include <dm/ofnode.h>
18 #define GSC_SC_ADDR 0x20
19 #define GSC_HWMON_ADDR 0x29
20 #define GSC_RTC_ADDR 0x68
22 /* System Controller registers */
32 GSC_SC_RST_CAUSE = 16,
33 GSC_SC_THERM_PROTECT = 19,
36 /* System Controller Control1 bits */
38 GSC_SC_CTRL1_SLEEP_EN = 0, /* 1 = enable sleep */
39 GSC_SC_CTRL1_SLEEP_ACTIVATE = 1, /* 1 = activate sleep */
40 GSC_SC_CTRL1_SLEEP_ADD = 2, /* 1 = latch and add sleep time */
41 GSC_SC_CTRL1_SLEEP_NOWAKEPB = 3, /* 1 = do not wake on sleep on button press */
42 GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
43 GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
44 GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */
45 GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
48 /* System Controller Interrupt bits */
50 GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
51 GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
52 GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
53 GSC_SC_IRQ_GPIO = 4, /* GPIO change */
54 GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
55 GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
56 GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
59 /* System Controller WP bits */
61 GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */
62 GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */
65 /* System Controller Reset Cause */
67 GSC_SC_RST_CAUSE_VIN = 0,
68 GSC_SC_RST_CAUSE_PB = 1,
69 GSC_SC_RST_CAUSE_WDT = 2,
70 GSC_SC_RST_CAUSE_CPU = 3,
71 GSC_SC_RST_CAUSE_TEMP_LOCAL = 4,
72 GSC_SC_RST_CAUSE_TEMP_REMOTE = 5,
73 GSC_SC_RST_CAUSE_SLEEP = 6,
74 GSC_SC_RST_CAUSE_BOOT_WDT = 7,
75 GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8,
76 GSC_SC_RST_CAUSE_SOFT_PWR = 9,
77 GSC_SC_RST_CAUSE_MAX = 10,
80 #if CONFIG_IS_ENABLED(DM_I2C)
86 struct udevice *hwmon;
91 * GSCv2 will fail to ACK an I2C transaction if it is busy, which can occur
92 * during its 1HZ timer tick while reading ADC's. When this does occur,
93 * it will never be busy longer than 2 back-to-back transfers so retry 3 times.
95 static int gsc_i2c_read(struct udevice *dev, uint addr, u8 *buf, int len)
97 struct gsc_priv *priv = dev_get_priv(dev);
98 int retry = (priv->gscver == 3) ? 1 : 3;
102 while (n++ < retry) {
103 ret = dm_i2c_read(dev, addr, buf, len);
106 if (ret != -EREMOTEIO)
113 static int gsc_i2c_write(struct udevice *dev, uint addr, const u8 *buf, int len)
115 struct gsc_priv *priv = dev_get_priv(dev);
116 int retry = (priv->gscver == 3) ? 1 : 3;
120 while (n++ < retry) {
121 ret = dm_i2c_write(dev, addr, buf, len);
124 if (ret != -EREMOTEIO)
131 static struct udevice *gsc_get_dev(int busno, int slave)
133 struct udevice *dev, *bus;
136 ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
139 ret = dm_i2c_probe(bus, slave, 0, &dev);
146 static int gsc_thermal_get_info(struct udevice *dev, u8 *outreg, int *tmax, bool *enable)
148 struct gsc_priv *priv = dev_get_priv(dev);
152 if (priv->gscver > 2 && priv->fwver > 52) {
153 ret = gsc_i2c_read(dev, GSC_SC_THERM_PROTECT, ®, 1);
158 *tmax = ((reg & 0xf8) >> 3) * 2;
174 static int gsc_thermal_get_temp(struct udevice *dev)
176 struct gsc_priv *priv = dev_get_priv(dev);
182 ofnode_for_each_subnode(node, dev_read_subnode(dev, "adc")) {
183 if (ofnode_read_u32(node, "reg", ®))
185 if (ofnode_read_u32(node, "gw,mode", &mode))
187 label = ofnode_read_string(node, "label");
189 if ((reg == -1) || (mode == -1) || !label)
192 if (mode != 0 || strcmp(label, "temp"))
195 memset(buf, 0, sizeof(buf));
196 if (!gsc_i2c_read(priv->hwmon, reg, buf, sizeof(buf))) {
197 val = buf[0] | buf[1] << 8;
207 static void gsc_thermal_info(struct udevice *dev)
209 struct gsc_priv *priv = dev_get_priv(dev);
211 switch (priv->gscver) {
213 printf("board_temp:%dC ", gsc_thermal_get_temp(dev) / 10);
216 if (priv->fwver > 52) {
220 if (!gsc_thermal_get_info(dev, NULL, &tmax, &enabled)) {
221 puts("Thermal protection:");
223 printf("enabled at %dC ", tmax);
232 static void gsc_reset_info(struct udevice *dev)
234 struct gsc_priv *priv = dev_get_priv(dev);
235 static const char * const names[] = {
250 switch (priv->gscver) {
252 if (!gsc_i2c_read(dev, GSC_SC_STATUS, ®, 1)) {
253 if (reg & BIT(GSC_SC_IRQ_WATCHDOG)) {
255 reg &= ~BIT(GSC_SC_IRQ_WATCHDOG);
256 gsc_i2c_write(dev, GSC_SC_STATUS, ®, 1);
260 printf(" WDT:%sabled ",
261 (reg & BIT(GSC_SC_CTRL1_WDEN)) ? "en" : "dis");
265 if (priv->fwver > 52 &&
266 !gsc_i2c_read(dev, GSC_SC_RST_CAUSE, ®, 1)) {
268 if (reg < ARRAY_SIZE(names))
269 printf("%s ", names[reg]);
271 printf("0x%02x ", reg);
277 /* display hardware monitor ADC channels */
278 static int gsc_hwmon(struct udevice *dev)
280 struct gsc_priv *priv = dev_get_priv(dev);
281 u32 reg, mode, val, offset;
288 /* iterate over hwmon nodes */
289 ofnode_for_each_subnode(node, dev_read_subnode(dev, "adc")) {
290 if (ofnode_read_u32(node, "reg", ®))
292 if (ofnode_read_u32(node, "gw,mode", &mode))
294 label = ofnode_read_string(node, "label");
295 if ((reg == -1) || (mode == -1) || !label)
298 memset(buf, 0, sizeof(buf));
299 ret = gsc_i2c_read(priv->hwmon, reg, buf, sizeof(buf));
301 printf("i2c error: %d\n", ret);
304 val = buf[0] | buf[1] << 8;
307 case 0: /* temperature (C*10) */
310 printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
312 case 1: /* prescaled voltage */
314 printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
316 case 2: /* scaled based on ref volt and resolution */
320 /* apply pre-scaler voltage divider */
321 if (!ofnode_read_u32_index(node, "gw,voltage-divider-ohms", 0, &r[0]) &&
322 !ofnode_read_u32_index(node, "gw,voltage-divider-ohms", 1, &r[1]) &&
324 val *= (r[0] + r[1]);
328 /* adjust by offset */
329 val += (offset / 1000);
331 printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
339 static int gsc_banner(struct udevice *dev)
341 struct gsc_priv *priv = dev_get_priv(dev);
344 printf("GSCv%d : v%d 0x%04x ", priv->gscver, priv->fwver, priv->fwcrc);
346 gsc_thermal_info(dev);
355 if (!gsc_i2c_read(priv->rtc, 0, buf, 4)) {
356 timestamp = get_unaligned_le32(buf);
357 rtc_to_tm(timestamp, &tm);
358 printf("RTC : %4d-%02d-%02d %2d:%02d:%02d UTC\n",
359 tm.tm_year, tm.tm_mon, tm.tm_mday,
360 tm.tm_hour, tm.tm_min, tm.tm_sec);
367 static int gsc_probe(struct udevice *dev)
369 struct gsc_priv *priv = dev_get_priv(dev);
373 ret = gsc_i2c_read(dev, 0, buf, sizeof(buf));
379 * GSCv2 has 16 registers (which overlap)
380 * GSCv3 has 32 registers
382 priv->gscver = memcmp(buf, buf + 16, 16) ? 3 : 2;
383 priv->fwver = buf[GSC_SC_FWVER];
384 priv->fwcrc = buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8;
385 priv->hwmon = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR);
387 dev_set_priv(priv->hwmon, priv);
388 priv->rtc = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR);
390 dev_set_priv(priv->rtc, priv);
392 #ifdef CONFIG_XPL_BUILD
399 static const struct udevice_id gsc_ids[] = {
400 { .compatible = "gw,gsc", },
404 U_BOOT_DRIVER(gsc) = {
409 .priv_auto = sizeof(struct gsc_priv),
410 .flags = DM_FLAG_PRE_RELOC,
413 static int gsc_sleep(struct udevice *dev, unsigned long secs)
418 printf("GSC Sleeping for %ld seconds\n", secs);
419 put_unaligned_le32(secs, regs);
420 ret = gsc_i2c_write(dev, GSC_SC_TIME_ADD, regs, sizeof(regs));
423 ret = gsc_i2c_read(dev, GSC_SC_CTRL1, regs, 1);
426 regs[0] |= BIT(GSC_SC_CTRL1_SLEEP_ADD);
427 ret = gsc_i2c_write(dev, GSC_SC_CTRL1, regs, 1);
430 regs[0] &= ~BIT(GSC_SC_CTRL1_SLEEP_ADD);
431 regs[0] |= BIT(GSC_SC_CTRL1_SLEEP_EN) | BIT(GSC_SC_CTRL1_SLEEP_ACTIVATE);
432 ret = gsc_i2c_write(dev, GSC_SC_CTRL1, regs, 1);
439 printf("i2c error: %d\n", ret);
443 static int gsc_wd_disable(struct udevice *dev)
448 ret = gsc_i2c_read(dev, GSC_SC_CTRL1, ®, 1);
451 reg |= BIT(GSC_SC_CTRL1_WDDIS);
452 reg &= ~BIT(GSC_SC_CTRL1_BOOT_CHK);
453 ret = gsc_i2c_write(dev, GSC_SC_CTRL1, ®, 1);
456 puts("GSC : boot watchdog disabled\n");
465 static int gsc_thermal(struct udevice *dev, const char *cmd, const char *val)
467 struct gsc_priv *priv = dev_get_priv(dev);
472 if (priv->gscver < 3 || priv->fwver < 53)
474 ret = gsc_thermal_get_info(dev, ®, &tmax, &enabled);
477 if (cmd && !strcmp(cmd, "enable")) {
479 tmax = clamp((int)simple_strtoul(val, NULL, 0), 72, 122);
481 reg |= ((tmax - 70) / 2) << 3;
484 gsc_i2c_write(dev, GSC_SC_THERM_PROTECT, ®, 1);
485 } else if (cmd && !strcmp(cmd, "disable")) {
487 gsc_i2c_write(dev, GSC_SC_THERM_PROTECT, ®, 1);
493 gsc_thermal_info(dev);
499 /* override in board files to display additional board EEPROM info */
500 __weak void board_gsc_info(void)
504 static void gsc_info(struct udevice *dev)
510 static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
515 /* get/probe driver */
516 ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev);
518 return CMD_RET_USAGE;
521 return CMD_RET_SUCCESS;
522 } else if (strcasecmp(argv[1], "sleep") == 0) {
524 return CMD_RET_USAGE;
525 if (!gsc_sleep(dev, dectoul(argv[2], NULL)))
526 return CMD_RET_SUCCESS;
527 } else if (strcasecmp(argv[1], "hwmon") == 0) {
529 return CMD_RET_SUCCESS;
530 } else if (strcasecmp(argv[1], "wd-disable") == 0) {
531 if (!gsc_wd_disable(dev))
532 return CMD_RET_SUCCESS;
533 } else if (strcasecmp(argv[1], "thermal") == 0) {
534 const char *cmd, *val;
536 cmd = cmd_arg2(argc, argv);
537 val = cmd_arg3(argc, argv);
538 if (!gsc_thermal(dev, cmd, val))
539 return CMD_RET_SUCCESS;
542 return CMD_RET_USAGE;
545 U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
546 "[sleep <secs>]|[hwmon]|[wd-disable][thermal [disable|enable [temp]]]\n");
548 /* disable boot watchdog - useful for an SPL that wants to use falcon mode */
549 int gsc_boot_wd_disable(void)
554 /* get/probe driver */
555 ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev);
557 ret = gsc_wd_disable(dev);
565 * GSCv2 will fail to ACK an I2C transaction if it is busy, which can occur
566 * during its 1HZ timer tick while reading ADC's. When this does occur,
567 * it will never be busy longer than 2 back-to-back transfers so retry 3 times.
569 static int gsc_i2c_read(uint chip, uint addr, u8 *buf, int len)
575 while (n++ < retry) {
576 ret = i2c_read(chip, addr, 1, buf, len);
579 if (ret != -EREMOTEIO)
581 printf("%s 0x%02x retry %d\n", __func__, addr, n);
587 static int gsc_i2c_write(uint chip, uint addr, u8 *buf, int len)
593 while (n++ < retry) {
594 ret = i2c_write(chip, addr, 1, buf, len);
597 if (ret != -EREMOTEIO)
599 printf("%s 0x%02x retry %d\n", __func__, addr, n);
605 /* disable boot watchdog - useful for an SPL that wants to use falcon mode */
606 int gsc_boot_wd_disable(void)
611 i2c_set_bus_num(GSC_BUSNO);
612 ret = gsc_i2c_read(GSC_SC_ADDR, 0, buf, sizeof(buf));
614 buf[GSC_SC_CTRL1] |= BIT(GSC_SC_CTRL1_WDDIS);
615 ret = gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, &buf[GSC_SC_CTRL1], 1);
616 printf("GSCv%d: v%d 0x%04x ",
617 memcmp(buf, buf + 16, 16) ? 3 : 2,
619 buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
620 if (buf[GSC_SC_STATUS] & BIT(GSC_SC_IRQ_WATCHDOG)) {
622 buf[GSC_SC_STATUS] &= ~BIT(GSC_SC_IRQ_WATCHDOG);
623 gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, &buf[GSC_SC_STATUS], 1);
627 puts("WDT:disabled\n");