1 // SPDX-License-Identifier: GPL-2.0
3 * A driver for the I2C members of the Abracon AB x8xx RTC family,
4 * and compatible: AB 1805 and AB 0805
6 * Copyright 2014-2015 Macq S.A.
7 * Copyright 2020 Linaro
20 #include <linux/bitfield.h>
22 #define ABX8XX_REG_HTH 0x00
23 #define ABX8XX_REG_SC 0x01
24 #define ABX8XX_REG_MN 0x02
25 #define ABX8XX_REG_HR 0x03
26 #define ABX8XX_REG_DA 0x04
27 #define ABX8XX_REG_MO 0x05
28 #define ABX8XX_REG_YR 0x06
29 #define ABX8XX_REG_WD 0x07
31 #define ABX8XX_REG_AHTH 0x08
32 #define ABX8XX_REG_ASC 0x09
33 #define ABX8XX_REG_AMN 0x0a
34 #define ABX8XX_REG_AHR 0x0b
35 #define ABX8XX_REG_ADA 0x0c
36 #define ABX8XX_REG_AMO 0x0d
37 #define ABX8XX_REG_AWD 0x0e
39 #define ABX8XX_REG_STATUS 0x0f
40 #define ABX8XX_STATUS_AF BIT(2)
41 #define ABX8XX_STATUS_BLF BIT(4)
42 #define ABX8XX_STATUS_WDT BIT(6)
44 #define ABX8XX_REG_CTRL1 0x10
45 #define ABX8XX_CTRL_WRITE BIT(0)
46 #define ABX8XX_CTRL_ARST BIT(2)
47 #define ABX8XX_CTRL_12_24 BIT(6)
49 #define ABX8XX_REG_CTRL2 0x11
50 #define ABX8XX_CTRL2_RSVD BIT(5)
52 #define ABX8XX_REG_IRQ 0x12
53 #define ABX8XX_IRQ_AIE BIT(2)
54 #define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
56 #define ABX8XX_REG_CD_TIMER_CTL 0x18
58 #define ABX8XX_REG_OSC 0x1c
59 #define ABX8XX_OSC_FOS BIT(3)
60 #define ABX8XX_OSC_BOS BIT(4)
61 #define ABX8XX_OSC_ACAL_512 BIT(5)
62 #define ABX8XX_OSC_ACAL_1024 BIT(6)
64 #define ABX8XX_OSC_OSEL BIT(7)
66 #define ABX8XX_REG_OSS 0x1d
67 #define ABX8XX_OSS_OF BIT(1)
68 #define ABX8XX_OSS_OMODE BIT(4)
70 #define ABX8XX_REG_WDT 0x1b
71 #define ABX8XX_WDT_WDS BIT(7)
72 #define ABX8XX_WDT_BMB_MASK 0x7c
73 #define ABX8XX_WDT_BMB_SHIFT 2
74 #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
75 #define ABX8XX_WDT_WRB_MASK 0x03
76 #define ABX8XX_WDT_WRB_1HZ 0x02
78 #define ABX8XX_REG_CFG_KEY 0x1f
79 #define ABX8XX_CFG_KEY_OSC 0xa1
80 #define ABX8XX_CFG_KEY_MISC 0x9d
82 #define ABX8XX_REG_ID0 0x28
84 #define ABX8XX_REG_OUT_CTRL 0x30
85 #define ABX8XX_OUT_CTRL_EXDS BIT(4)
87 #define ABX8XX_REG_TRICKLE 0x20
88 #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
89 #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
90 #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
92 #define ABX8XX_REG_EXTRAM 0x3f
93 #define ABX8XX_EXTRAM_XADS GENMASK(1, 0)
95 #define ABX8XX_SRAM_BASE 0x40
96 #define ABX8XX_SRAM_WIN_SIZE 0x40U
97 #define ABX8XX_RAM_SIZE 256
99 #define RAM_ADDR_LOWER GENMASK(5, 0)
100 #define RAM_ADDR_UPPER GENMASK(7, 6)
102 static u8 trickle_resistors[] = {0, 3, 6, 11};
104 enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
105 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
113 static struct abx80x_cap abx80x_caps[] = {
114 [AB0801] = {.pn = 0x0801},
115 [AB0803] = {.pn = 0x0803},
116 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
117 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
118 [AB1801] = {.pn = 0x1801},
119 [AB1803] = {.pn = 0x1803},
120 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
121 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
122 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
126 static int abx80x_rtc_xfer(struct udevice *dev, unsigned int offset,
127 u8 *val, unsigned int bytes, bool write)
131 if (offset + bytes > ABX8XX_RAM_SIZE)
135 u8 extram, reg, len, lower, upper;
137 lower = FIELD_GET(RAM_ADDR_LOWER, offset);
138 upper = FIELD_GET(RAM_ADDR_UPPER, offset);
139 extram = FIELD_PREP(ABX8XX_EXTRAM_XADS, upper);
140 reg = ABX8XX_SRAM_BASE + lower;
141 len = min(lower + bytes, ABX8XX_SRAM_WIN_SIZE) - lower;
143 ret = dm_i2c_reg_write(dev, ABX8XX_REG_EXTRAM, extram);
148 ret = dm_i2c_write(dev, reg, val, len);
150 ret = dm_i2c_read(dev, reg, val, len);
162 static int abx80x_rtc_read(struct udevice *dev, unsigned int offset, u8 *val,
165 return abx80x_rtc_xfer(dev, offset, val, bytes, false);
168 static int abx80x_rtc_write(struct udevice *dev, unsigned int offset,
169 const u8 *val, unsigned int bytes)
171 return abx80x_rtc_xfer(dev, offset, (u8 *)val, bytes, true);
174 static int abx80x_is_rc_mode(struct udevice *dev)
178 flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
180 log_err("Failed to read autocalibration attribute\n");
184 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
187 static int abx80x_enable_trickle_charger(struct udevice *dev, u8 trickle_cfg)
192 * Write the configuration key register to enable access to the Trickle
195 err = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY, ABX8XX_CFG_KEY_MISC);
197 log_err("Unable to write configuration key\n");
201 err = dm_i2c_reg_write(dev, ABX8XX_REG_TRICKLE,
202 ABX8XX_TRICKLE_CHARGE_ENABLE | trickle_cfg);
204 log_err("Unable to write trickle register\n");
211 static int abx80x_rtc_read_time(struct udevice *dev, struct rtc_time *tm)
213 unsigned char buf[8];
214 int err, flags, rc_mode = 0;
216 /* Read the Oscillator Failure only in XT mode */
217 rc_mode = abx80x_is_rc_mode(dev);
222 flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
224 log_err("Unable to read oscillator status.\n");
228 if (flags & ABX8XX_OSS_OF)
229 log_debug("Oscillator fail, data is not accurate.\n");
232 err = dm_i2c_read(dev, ABX8XX_REG_HTH,
235 log_err("Unable to read date\n");
239 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
240 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
241 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
242 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
243 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
244 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F);
245 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 2000;
250 static int abx80x_rtc_set_time(struct udevice *dev, const struct rtc_time *tm)
252 unsigned char buf[8];
255 if (tm->tm_year < 2000)
258 buf[ABX8XX_REG_HTH] = 0;
259 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
260 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
261 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
262 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
263 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon);
264 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 2000);
265 buf[ABX8XX_REG_WD] = tm->tm_wday;
267 err = dm_i2c_write(dev, ABX8XX_REG_HTH,
270 log_err("Unable to write to date registers\n");
274 /* Clear the OF bit of Oscillator Status Register */
275 flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSS);
277 log_err("Unable to read oscillator status.\n");
281 err = dm_i2c_reg_write(dev, ABX8XX_REG_OSS,
282 flags & ~ABX8XX_OSS_OF);
284 log_err("Unable to write oscillator status register\n");
291 static int abx80x_rtc_set_autocalibration(struct udevice *dev,
294 int retval, flags = 0;
296 if (autocalibration != 0 && autocalibration != 1024 &&
297 autocalibration != 512) {
298 log_err("autocalibration value outside permitted range\n");
302 flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSC);
306 if (autocalibration == 0) {
307 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
308 } else if (autocalibration == 1024) {
309 /* 1024 autocalibration is 0x10 */
310 flags |= ABX8XX_OSC_ACAL_1024;
311 flags &= ~(ABX8XX_OSC_ACAL_512);
313 /* 512 autocalibration is 0x11 */
314 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
317 /* Unlock write access to Oscillator Control Register */
318 retval = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY,
321 log_err("Failed to write CONFIG_KEY register\n");
325 retval = dm_i2c_reg_write(dev, ABX8XX_REG_OSC, flags);
330 static int abx80x_rtc_get_autocalibration(struct udevice *dev)
332 int flags = 0, autocalibration;
334 flags = dm_i2c_reg_read(dev, ABX8XX_REG_OSC);
338 if (flags & ABX8XX_OSC_ACAL_512)
339 autocalibration = 512;
340 else if (flags & ABX8XX_OSC_ACAL_1024)
341 autocalibration = 1024;
345 return autocalibration;
348 static struct rtc_time default_tm = { 0, 0, 0, 1, 1, 2000, 6, 0, 0 };
350 static int abx80x_rtc_reset(struct udevice *dev)
354 int autocalib = abx80x_rtc_get_autocalibration(dev);
357 abx80x_rtc_set_autocalibration(dev, 0);
359 ret = abx80x_rtc_set_time(dev, &default_tm);
361 log_err("cannot set time to default_tm. error %d\n", ret);
368 static const struct rtc_ops abx80x_rtc_ops = {
369 .get = abx80x_rtc_read_time,
370 .set = abx80x_rtc_set_time,
371 .reset = abx80x_rtc_reset,
372 .read = abx80x_rtc_read,
373 .write = abx80x_rtc_write,
376 static int abx80x_dt_trickle_cfg(struct udevice *dev)
383 diode = ofnode_read_string(dev_ofnode(dev), "abracon,tc-diode");
387 if (!strcmp(diode, "standard")) {
388 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
389 } else if (!strcmp(diode, "schottky")) {
390 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
392 log_err("Invalid tc-diode value: %s\n", diode);
396 ret = ofnode_read_u32(dev_ofnode(dev), "abracon,tc-resistor", &tmp);
400 for (i = 0; i < sizeof(trickle_resistors); i++)
401 if (trickle_resistors[i] == tmp)
404 if (i == sizeof(trickle_resistors)) {
405 log_err("Invalid tc-resistor value: %u\n", tmp);
409 return (trickle_cfg | i);
412 static int abx80x_probe(struct udevice *dev)
414 int i, data, err, trickle_cfg = -EINVAL;
415 unsigned char buf[7];
416 unsigned int part = dev->driver_data;
417 unsigned int partnumber;
418 unsigned int majrev, minrev;
423 err = dm_i2c_read(dev, ABX8XX_REG_ID0, buf, sizeof(buf));
425 log_err("Unable to read partnumber\n");
429 partnumber = (buf[0] << 8) | buf[1];
430 majrev = buf[2] >> 3;
431 minrev = buf[2] & 0x7;
432 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
433 uid = ((buf[4] & 0x7f) << 8) | buf[5];
434 wafer = (buf[6] & 0x7c) >> 2;
435 log_debug("model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
436 partnumber, majrev, minrev, lot, wafer, uid);
438 data = dm_i2c_reg_read(dev, ABX8XX_REG_CTRL1);
440 log_err("Unable to read control register\n");
444 err = dm_i2c_reg_write(dev, ABX8XX_REG_CTRL1,
445 ((data & ~(ABX8XX_CTRL_12_24 |
449 log_err("Unable to write control register\n");
453 /* Configure RV1805 specifics */
454 if (part == RV1805) {
456 * Avoid accidentally entering test mode. This can happen
457 * on the RV1805 in case the reserved bit 5 in control2
458 * register is set. RV-1805-C3 datasheet indicates that
459 * the bit should be cleared in section 11h - Control2.
461 data = dm_i2c_reg_read(dev, ABX8XX_REG_CTRL2);
463 log_err("Unable to read control2 register\n");
467 err = dm_i2c_reg_write(dev, ABX8XX_REG_CTRL2,
468 data & ~ABX8XX_CTRL2_RSVD);
470 log_err("Unable to write control2 register\n");
475 * Avoid extra power leakage. The RV1805 uses smaller
476 * 10pin package and the EXTI input is not present.
477 * Disable it to avoid leakage.
479 data = dm_i2c_reg_read(dev, ABX8XX_REG_OUT_CTRL);
481 log_err("Unable to read output control register\n");
486 * Write the configuration key register to enable access to
487 * the config2 register
489 err = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY,
490 ABX8XX_CFG_KEY_MISC);
492 log_err("Unable to write configuration key\n");
496 err = dm_i2c_reg_write(dev, ABX8XX_REG_OUT_CTRL,
497 data | ABX8XX_OUT_CTRL_EXDS);
499 log_err("Unable to write output control register\n");
504 /* part autodetection */
505 if (part == ABX80X) {
506 for (i = 0; abx80x_caps[i].pn; i++)
507 if (partnumber == abx80x_caps[i].pn)
509 if (abx80x_caps[i].pn == 0) {
510 log_err("Unknown part: %04x\n", partnumber);
516 if (partnumber != abx80x_caps[part].pn) {
517 log_err("partnumber mismatch %04x != %04x\n",
518 partnumber, abx80x_caps[part].pn);
522 if (abx80x_caps[part].has_tc)
523 trickle_cfg = abx80x_dt_trickle_cfg(dev);
525 if (trickle_cfg > 0) {
526 log_debug("Enabling trickle charger: %02x\n", trickle_cfg);
527 abx80x_enable_trickle_charger(dev, trickle_cfg);
530 err = dm_i2c_reg_write(dev, ABX8XX_REG_CD_TIMER_CTL, BIT(2));
537 static const struct udevice_id abx80x_of_match[] = {
539 .compatible = "abracon,abx80x",
543 .compatible = "abracon,ab0801",
547 .compatible = "abracon,ab0803",
551 .compatible = "abracon,ab0804",
555 .compatible = "abracon,ab0805",
559 .compatible = "abracon,ab1801",
563 .compatible = "abracon,ab1803",
567 .compatible = "abracon,ab1804",
571 .compatible = "abracon,ab1805",
575 .compatible = "microcrystal,rv1805",
581 U_BOOT_DRIVER(abx80x_rtc) = {
582 .name = "rtc-abx80x",
584 .probe = abx80x_probe,
585 .of_match = abx80x_of_match,
586 .ops = &abx80x_rtc_ops,