include/configs/imx8mp_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MP_EVK_H
   7 #define __IMX8MP_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  14
  15 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  16 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  19 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  20 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  21
  22 #ifdef CONFIG_SPL_BUILD
  23 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  24 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  25 #define CONFIG_SPL_STACK                0x960000
  26 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  27 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  28 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  29 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  30 #define CONFIG_SYS_ICACHE_OFF
  31 #define CONFIG_SYS_DCACHE_OFF
  32
  33 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  34
  35 #undef CONFIG_DM_MMC
  36 #undef CONFIG_DM_PMIC
  37 #undef CONFIG_DM_PMIC_PFUZE100
  38
  39 #define CONFIG_POWER
  40 #define CONFIG_POWER_I2C
  41 #define CONFIG_POWER_PCA9450
  42
  43 #undef CONFIG_DM_I2C
  44 #define CONFIG_SYS_I2C
  45
  46 #endif
  47
  48 /* Initial environment variables */
  49 #define CONFIG_EXTRA_ENV_SETTINGS               \
  50         "script=boot.scr\0" \
  51         "image=Image\0" \
  52         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
  53         "fdt_addr=0x43000000\0"                 \
  54         "fdt_high=0xffffffffffffffff\0"         \
  55         "boot_fdt=try\0" \
  56         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  57         "initrd_addr=0x43800000\0"              \
  58         "initrd_high=0xffffffffffffffff\0" \
  59         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  60         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  61         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  62         "mmcautodetect=yes\0" \
  63         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
  64         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  65         "bootscript=echo Running bootscript from mmc ...; " \
  66                 "source\0" \
  67         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  68         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  69         "mmcboot=echo Booting from mmc ...; " \
  70                 "run mmcargs; " \
  71                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  72                         "if run loadfdt; then " \
  73                                 "booti ${loadaddr} - ${fdt_addr}; " \
  74                         "else " \
  75                                 "echo WARN: Cannot load the DT; " \
  76                         "fi; " \
  77                 "else " \
  78                         "echo wait for boot; " \
  79                 "fi;\0" \
  80         "netargs=setenv bootargs ${jh_clk} console=${console} " \
  81                 "root=/dev/nfs " \
  82                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  83         "netboot=echo Booting from net ...; " \
  84                 "run netargs;  " \
  85                 "if test ${ip_dyn} = yes; then " \
  86                         "setenv get_cmd dhcp; " \
  87                 "else " \
  88                         "setenv get_cmd tftp; " \
  89                 "fi; " \
  90                 "${get_cmd} ${loadaddr} ${image}; " \
  91                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  92                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  93                                 "booti ${loadaddr} - ${fdt_addr}; " \
  94                         "else " \
  95                                 "echo WARN: Cannot load the DT; " \
  96                         "fi; " \
  97                 "else " \
  98                         "booti; " \
  99                 "fi;\0"
 100
 101 #define CONFIG_BOOTCOMMAND \
 102            "mmc dev ${mmcdev}; if mmc rescan; then " \
 103                    "if run loadbootscript; then " \
 104                            "run bootscript; " \
 105                    "else " \
 106                            "if run loadimage; then " \
 107                                    "run mmcboot; " \
 108                            "else run netboot; " \
 109                            "fi; " \
 110                    "fi; " \
 111            "else booti ${loadaddr} - ${fdt_addr}; fi"
 112
 113 /* Link Definitions */
 114 #define CONFIG_LOADADDR                 0x40480000
 115
 116 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 117
 118 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 119 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 120 #define CONFIG_SYS_INIT_SP_OFFSET \
 121         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 122 #define CONFIG_SYS_INIT_SP_ADDR \
 123         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 124
 125 #define CONFIG_ENV_OVERWRITE
 126 #define CONFIG_SYS_MMC_ENV_DEV          1   /* USDHC2 */
 127 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 128
 129 /* Size of malloc() pool */
 130 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
 131
 132 /* Totally 6GB DDR */
 133 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 134 #define PHYS_SDRAM                      0x40000000
 135 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 136 #define PHYS_SDRAM_2                    0x100000000
 137 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 138
 139 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
 140
 141 /* Monitor Command Prompt */
 142 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 143 #define CONFIG_SYS_CBSIZE               2048
 144 #define CONFIG_SYS_MAXARGS              64
 145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 146 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 147                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 148
 149 #define CONFIG_FSL_USDHC
 150
 151 #define CONFIG_SYS_FSL_USDHC_NUM        2
 152 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 153
 154 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 155
 156 #define CONFIG_SYS_I2C_SPEED            100000
 157
 158 #endif