1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2020 Compass Electronics Group, LLC
13 #include <asm/global_data.h>
15 #include <asm/arch/ddr.h>
16 #include <asm/arch/imx8mn_pins.h>
17 #include <asm/mach-imx/boot_mode.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/arch/clock.h>
20 #include <asm/mach-imx/iomux-v3.h>
21 #include <asm/mach-imx/gpio.h>
22 #include <asm/mach-imx/mxc_i2c.h>
23 #include <fsl_esdhc_imx.h>
25 #include <linux/delay.h>
26 #include <power/pmic.h>
27 #include <power/bd71837.h>
30 #include <dm/uclass.h>
31 #include <dm/device.h>
32 #include <dm/uclass-internal.h>
33 #include <dm/device-internal.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 int spl_board_boot_device(enum boot_device boot_dev_spl)
39 return BOOT_DEVICE_BOOTROM;
42 void spl_dram_init(void)
44 ddr_init(&dram_timing);
47 void spl_board_init(void)
52 debug("Normal Boot\n");
54 ret = uclass_get_device_by_name(UCLASS_CLK,
55 "clock-controller@30380000",
58 puts("Failed to find clock node. Check device tree\n");
61 #ifdef CONFIG_SPL_LOAD_FIT
62 int board_fit_config_name_match(const char *name)
64 /* Just empty function now - can't decide what to choose */
65 debug("%s: %s\n", __func__, name);
71 #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 | PAD_CTL_DSE6)
73 static iomux_v3_cfg_t const pwm_pads[] = {
74 IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL),
77 static int power_init_board(void)
82 ret = pmic_get("pmic@4b", &dev);
91 /* decrease RESET key long push time from the default 10s to 10ms */
92 pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
94 /* unlock the PMIC regs */
95 pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
97 /* increase VDD_SOC to typical value 0.85v before first DRAM access */
98 pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
100 /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
101 pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
103 /* lock the PMIC regs */
104 pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
109 int board_early_init_f(void)
111 /* Claiming pwm pins prevents LCD flicker during startup*/
112 imx_iomux_v3_setup_multiple_pads(pwm_pads, ARRAY_SIZE(pwm_pads));
119 void board_init_f(ulong dummy)
124 memset(__bss_start, 0, __bss_end - __bss_start);
128 board_early_init_f();
134 debug("spl_init() failed: %d\n", ret);
138 preloader_console_init();
142 /* LPDDR4 at 1.6GHz requires a voltage adjustment on the PMIC */
145 /* DDR initialization */
148 board_init_r(NULL, 0);