1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2013 Atmel Corporation.
6 * Configuation settings for the AT91SAM9N12-EK boards.
9 #ifndef __AT91SAM9N12_CONFIG_H_
10 #define __AT91SAM9N12_CONFIG_H_
12 /* ARM asynchronous clock */
13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
16 /* Misc CPU related */
19 #define LCD_BPP LCD_COLOR16
20 #define LCD_OUTPUT_BPP 24
22 #define CONFIG_SYS_SDRAM_BASE 0x20000000
23 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
28 #ifdef CONFIG_CMD_NAND
29 #define CONFIG_SYS_MAX_NAND_DEVICE 1
30 #define CONFIG_SYS_NAND_BASE 0x40000000
31 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
32 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
33 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
34 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
37 #define CONFIG_EXTRA_ENV_SETTINGS \
38 "console=console=ttyS0,115200\0" \
39 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
40 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
41 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
45 #define CONFIG_USB_ATMEL
46 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
47 #define CONFIG_USB_OHCI_NEW
48 #define CONFIG_SYS_USB_OHCI_CPU_INIT
49 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
50 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
51 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
56 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
58 #define CONFIG_SYS_MASTER_CLOCK 132096000
59 #define CONFIG_SYS_AT91_PLLA 0x20953f03
60 #define CONFIG_SYS_MCKR 0x1301
61 #define CONFIG_SYS_MCKR_CSS 0x1302