1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Aries M53 configuration
7 #ifndef __M53EVK_CONFIG_H__
8 #define __M53EVK_CONFIG_H__
10 #include <asm/arch/imx-regs.h>
12 #define CONFIG_REVISION_TAG
13 #define CONFIG_SYS_FSL_CLK
15 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
18 * Memory configurations
20 #define CONFIG_NR_DRAM_BANKS 2
21 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
22 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
23 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
24 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
25 #define PHYS_SDRAM_SIZE (gd->ram_size)
26 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
27 #define CONFIG_SYS_MEMTEST_START 0x70000000
28 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
30 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
31 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
32 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
34 #define CONFIG_SYS_INIT_SP_OFFSET \
35 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
36 #define CONFIG_SYS_INIT_SP_ADDR \
37 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
40 * U-Boot general configurations
42 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
43 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
44 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
45 /* Boot argument buffer size */
50 #define CONFIG_MXC_UART
51 #define CONFIG_MXC_UART_BASE UART2_BASE
57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
58 #define CONFIG_SYS_FSL_ESDHC_NUM 1
64 #define CONFIG_ENV_SIZE (16 * 1024)
65 #ifdef CONFIG_CMD_NAND
66 #define CONFIG_SYS_MAX_NAND_DEVICE 1
67 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
68 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
69 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
70 #define CONFIG_SYS_NAND_LARGEPAGE
71 #define CONFIG_MXC_NAND_HWECC
72 #define CONFIG_SYS_NAND_USE_FLASH_BBT
74 /* Environment is in NAND */
75 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
76 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
77 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
78 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
79 #define CONFIG_ENV_OFFSET_REDUND \
80 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
82 #define CONFIG_MTD_DEVICE
83 #define CONFIG_MTD_PARTITIONS
87 * Ethernet on SOC (FEC)
90 #define CONFIG_FEC_MXC
91 #define IMX_FEC_BASE FEC_BASE_ADDR
92 #define CONFIG_FEC_MXC_PHYADDR 0x0
94 #define CONFIG_DISCOVER_PHY
95 #define CONFIG_FEC_XCV_TYPE RMII
96 #define CONFIG_ETHPRIME "FEC0"
102 #ifdef CONFIG_CMD_I2C
103 #define CONFIG_SYS_I2C
104 #define CONFIG_SYS_I2C_MXC
105 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
106 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
107 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
108 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
114 #ifdef CONFIG_CMD_DATE
115 #define CONFIG_RTC_M41T62
116 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
117 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
123 #ifdef CONFIG_CMD_USB
124 #define CONFIG_USB_EHCI_MX5
125 #define CONFIG_MXC_USB_PORT 1
126 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
127 #define CONFIG_MXC_USB_FLAGS 0
133 #ifdef CONFIG_CMD_SATA
134 #define CONFIG_SYS_SATA_MAX_DEVICE 1
135 #define CONFIG_DWC_AHSATA_PORT_ID 0
136 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
144 #define CONFIG_VIDEO_IPUV3
145 #define CONFIG_VIDEO_BMP_RLE8
146 #define CONFIG_VIDEO_BMP_GZIP
147 #define CONFIG_SPLASH_SCREEN
148 #define CONFIG_SPLASHIMAGE_GUARD
149 #define CONFIG_SPLASH_SCREEN_ALIGN
150 #define CONFIG_BMP_16BPP
151 #define CONFIG_VIDEO_LOGO
152 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
158 #define CONFIG_CMDLINE_TAG
159 #define CONFIG_INITRD_TAG
160 #define CONFIG_REVISION_TAG
161 #define CONFIG_SETUP_MEMORY_TAGS
162 #define CONFIG_BOOTFILE "fitImage"
163 #define CONFIG_LOADADDR 0x70800000
164 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
165 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
170 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
171 #define CONFIG_SPL_TEXT_BASE 0x70008000
172 #define CONFIG_SPL_PAD_TO 0x8000
173 #define CONFIG_SPL_STACK 0x70004000
175 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
176 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
177 #define CONFIG_SYS_NAND_OOBSIZE 64
178 #define CONFIG_SYS_NAND_PAGE_COUNT 64
179 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
180 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
185 #define CONFIG_PREBOOT "run try_bootscript"
186 #define CONFIG_HOSTNAME "m53evk"
188 #define CONFIG_EXTRA_ENV_SETTINGS \
189 "consdev=ttymxc1\0" \
190 "baudrate=115200\0" \
191 "bootscript=boot.scr\0" \
192 "bootdev=/dev/mmcblk0p1\0" \
193 "rootdev=/dev/mmcblk0p2\0" \
195 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
196 "kernel_addr_r=0x72000000\0" \
198 "setenv bootargs ${bootargs} " \
199 "console=${consdev},${baudrate}\0" \
201 "setenv bootargs ${bootargs} " \
202 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
203 "${netmask}:${hostname}:${netdev}:off\0" \
205 "setenv bootargs ${bootargs} ${miscargs}\0" \
207 "if test \"x${mtdparts}\" == \"x\" ; then " \
208 "mtdparts default ; " \
211 "run adddfltmtd ; " \
212 "setenv bootargs ${bootargs} ${mtdparts}\0" \
213 "addargs=run addcons addmtd addmisc\0" \
216 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
218 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
219 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
221 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
222 "miscargs=nohlt panic=1\0" \
223 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
225 "setenv bootargs ubi.mtd=5 " \
226 "root=ubi0:rootfs rootfstype=ubifs\0" \
228 "setenv bootargs root=/dev/nfs rw " \
229 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
231 "run mmcload mmcargs addargs ; " \
232 "bootm ${kernel_addr_r}\0" \
234 "run mmcload ubiargs addargs ; " \
235 "bootm ${kernel_addr_r}\0" \
237 "run mmcload nfsargs addip addargs ; " \
238 "bootm ${kernel_addr_r}\0" \
240 "run ubiload mmcargs addargs ; " \
241 "bootm ${kernel_addr_r}\0" \
243 "run ubiload ubiargs addargs ; " \
244 "bootm ${kernel_addr_r}\0" \
246 "run ubiload nfsargs addip addargs ; " \
247 "bootm ${kernel_addr_r}\0" \
249 "run netload mmcargs addargs ; " \
250 "bootm ${kernel_addr_r}\0" \
252 "run netload ubiargs addargs ; " \
253 "bootm ${kernel_addr_r}\0" \
255 "run netload nfsargs addip addargs ; " \
256 "bootm ${kernel_addr_r}\0" \
259 "if test -e mmc 0:1 ${bootscript} ; then " \
260 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
262 "echo Running bootscript... ; " \
263 "source ${kernel_addr_r} ; " \
267 #endif /* __M53EVK_CONFIG_H__ */