4 * Copyright 2005, Seagate Technology LLC
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #define SMSC9118_BASE CONFIG_DRIVER_SMC911X_BASE
35 #define BYTE_TEST (SMSC9118_BASE + 0x64)
36 #define GPIO_CFG (SMSC9118_BASE + 0x88)
37 #define MAC_CSR_CMD (SMSC9118_BASE + 0xA4)
38 #define MAC_CSR_CMD_CSR_BUSY (0x80000000)
39 #define MAC_CSR_CMD_RNW (0x40000000)
40 #define MAC_RD_CMD(reg) ((reg & 0x000000FF) | \
41 (MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_RNW))
42 #define MAC_WR_CMD(reg) ((reg & 0x000000FF) | \
43 (MAC_CSR_CMD_CSR_BUSY))
44 #define MAC_CSR_DATA (SMSC9118_BASE + 0xA8)
45 #define E2P_CMD (SMSC9118_BASE + 0xB0)
46 #define E2P_CMD_EPC_BUSY_ (0x80000000UL) /* Self Clearing */
47 #define E2P_CMD_EPC_CMD_ (0x70000000UL) /* R/W */
48 #define E2P_CMD_EPC_CMD_READ_ (0x00000000UL) /* R/W */
49 #define E2P_CMD_EPC_CMD_EWDS_ (0x10000000UL) /* R/W */
50 #define E2P_CMD_EPC_CMD_EWEN_ (0x20000000UL) /* R/W */
51 #define E2P_CMD_EPC_CMD_WRITE_ (0x30000000UL) /* R/W */
52 #define E2P_CMD_EPC_CMD_WRAL_ (0x40000000UL) /* R/W */
53 #define E2P_CMD_EPC_CMD_ERASE_ (0x50000000UL) /* R/W */
54 #define E2P_CMD_EPC_CMD_ERAL_ (0x60000000UL) /* R/W */
55 #define E2P_CMD_EPC_CMD_RELOAD_ (0x70000000UL) /* R/W */
56 #define E2P_CMD_EPC_TIMEOUT_ (0x00000200UL) /* R */
57 #define E2P_CMD_MAC_ADDR_LOADED_ (0x00000100UL) /* RO */
58 #define E2P_CMD_EPC_ADDR_ (0x000000FFUL) /* R/W */
59 #define E2P_DATA (SMSC9118_BASE + 0xB4)
61 #define MAC_ADDRH (0x2)
62 #define MAC_ADDRL (0x3)
64 #define MAC_TIMEOUT 200
66 #define HIBYTE(word) ((u8)(((u16)(word)) >> 8))
67 #define LOBYTE(word) ((u8)(((u16)(word)) & 0x00FFU))
68 #define HIWORD(dword) ((u16)(((u32)(dword)) >> 16))
69 #define LOWORD(dword) ((u16)(((u32)(dword)) & 0x0000FFFFUL))
71 static int mac_busy(int req_to)
76 if (!(smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY))
79 return 1; /* Timeout */
82 return 0; /* No timeout */
85 static ulong get_mac_reg(int reg)
87 ulong reg_val = 0xffffffff;
89 if (smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) {
90 printf("get_mac_reg: previous command not complete\n");
94 smc911x_reg_write(MAC_CSR_CMD, MAC_RD_CMD(reg));
97 if (mac_busy(MAC_TIMEOUT) == 1) {
98 printf("get_mac_reg: timeout waiting for response from MAC\n");
102 reg_val = smc911x_reg_read(MAC_CSR_DATA);
108 static ulong eeprom_enable_access(void)
112 gpio = smc911x_reg_read(GPIO_CFG);
113 debug("%s: gpio= 0x%08lx ---> 0x%08lx\n", __func__, gpio,
114 (gpio & 0xFF0FFFFFUL));
116 smc911x_reg_write(GPIO_CFG, (gpio & 0xFF0FFFFFUL));
120 static void eeprom_disable_access(ulong gpio)
122 debug("%s: gpio= 0x%08lx\n", __func__, gpio);
123 smc911x_reg_write(GPIO_CFG, gpio);
126 static int eeprom_is_mac_address_loaded(void)
130 ret = smc911x_reg_read(MAC_CSR_CMD) & E2P_CMD_MAC_ADDR_LOADED_;
131 debug("%s: ret = %x\n", __func__, ret);
136 static int eeprom_read_location(unchar address, u8 *data)
138 ulong timeout = 100000;
141 if ((temp = smc911x_reg_read(E2P_CMD)) & E2P_CMD_EPC_BUSY_) {
142 printf("%s: Busy at start, E2P_CMD=0x%08lX\n", __func__, temp);
146 smc911x_reg_write(E2P_CMD,
147 (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_ |
150 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
159 (*data) = (unchar) (smc911x_reg_read(E2P_DATA));
160 debug("%s: ret = %x\n", __func__, (*data));
165 static int eeprom_enable_erase_and_write(void)
167 ulong timeout = 100000;
169 if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
170 printf("%s: Busy at start\n", __func__);
173 smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_));
175 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
181 printf("Timeout[1]\n");
188 static int eeprom_disable_erase_and_write(void)
190 ulong timeout = 100000;
192 if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
193 printf("%s: Busy at start\n", __func__);
196 smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWDS_));
198 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
204 printf("Timeout[2]\n");
211 static int eeprom_write_location(unchar address, unchar data)
213 ulong timeout = 100000;
215 debug("%s: address: %x data = %x\n", __func__, address, data);
217 if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
218 printf("%s: Busy at start\n", __func__);
222 smc911x_reg_write(E2P_DATA, ((ulong) data));
223 smc911x_reg_write(E2P_CMD,
224 (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_ |
227 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
233 printf("Timeout[3]\n");
240 static int eeprom_erase_all(void)
242 ulong timeout = 100000;
244 if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
245 printf("%s: Busy at start\n", __func__);
249 smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_ERAL_));
251 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
257 printf("Timeout[4]\n");
264 static int eeprom_reload(void)
266 ulong timeout = 100000;
268 if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
269 printf("%s: Busy at start\n", __func__);
272 smc911x_reg_write(E2P_CMD,
273 (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_RELOAD_));
275 while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
286 static int eeprom_save_mac_address(ulong dwHi16, ulong dwLo32)
290 debug("%s: dwHI: 0x%08lx dwLO: %08lx, \n", __func__, dwHi16, dwLo32);
292 if (!eeprom_enable_erase_and_write())
294 if (!eeprom_erase_all())
296 if (!eeprom_write_location(0, 0xA5))
298 if (!eeprom_write_location(1, LOBYTE(LOWORD(dwLo32))))
300 if (!eeprom_write_location(2, HIBYTE(LOWORD(dwLo32))))
302 if (!eeprom_write_location(3, LOBYTE(HIWORD(dwLo32))))
304 if (!eeprom_write_location(4, HIBYTE(HIWORD(dwLo32))))
306 if (!eeprom_write_location(5, LOBYTE(LOWORD(dwHi16))))
308 if (!eeprom_write_location(6, HIBYTE(LOWORD(dwHi16))))
310 if (!eeprom_disable_erase_and_write())
319 static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
321 unchar data = 0, index = 0;
324 gpio_old_val = eeprom_enable_access();
326 printf("EEPROM content: \n");
327 for (index = 0; index < 8; index++) {
328 if (eeprom_read_location(index, &data))
329 printf("%02x ", data);
334 eeprom_disable_access(gpio_old_val);
340 static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
347 static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
350 unchar ethaddr[6], i;
355 for (i = 0; i < 6; i++) {
356 ethaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
358 tmp = (*end) ? end + 1 : end;
361 hi16 = (ethaddr[5] << 8) | (ethaddr[4]);
362 lo32 = (ethaddr[3] << 24) | (ethaddr[2] << 16) |
363 (ethaddr[1] << 8) | (ethaddr[0]);
365 gpio = eeprom_enable_access();
367 eeprom_save_mac_address(hi16, lo32);
371 /* Check new values */
372 if (eeprom_is_mac_address_loaded()) {
373 ulong mac_hi16, mac_lo32;
375 mac_hi16 = get_mac_reg(MAC_ADDRH);
376 mac_lo32 = get_mac_reg(MAC_ADDRL);
377 printf("New MAC address: %lx, %lx\n", mac_hi16, mac_lo32);
379 printf("Address is not reloaded \n");
381 eeprom_disable_access(gpio);
386 U_BOOT_CMD(smcee, 1, 0, do_eeprom_erase_all,
387 "smcee - Erase content of SMC EEPROM",);
389 U_BOOT_CMD(smced, 1, 0, do_eeprom_dump,
390 "smced - Dump content of SMC EEPROM",);
392 U_BOOT_CMD(smcew, 2, 0, do_eeprom_save_mac,
393 "smcew - Write MAC address to SMC EEPROM\n",
394 "aa:bb:cc:dd:ee:ff new mac address");